Display device and display equipment
The power signal voltage of the display device is dynamically adjusted through the power drive circuit, which solves the problem that the fixed voltage cannot take into account both highlighting and low power consumption, and achieves brightness matching and energy efficiency improvement.
Patent Information
- Application Number
- CN202510616549.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-05-13
- Publication Date
- 2025-07-11
AI Technical Summary
The pixel power supply in existing display devices is fixed voltage, and it is impossible to take into account both the highlighting and low power consumption requirements.
The power drive circuit is used to output the first power supply signal and the second power supply signal, and the voltage of the first power supply signal is dynamically adjusted in the highlight mode according to the display brightness, so that it changes between the first preset voltage and the second preset voltage, and combines the analog voltage signal to match the display brightness.
It realizes effective reduction of power consumption while meeting different brightness requirements, and improves the energy efficiency of the display device.
Smart Images

Figure CN120299409A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of display technologies, and in particular, to a display device and a display apparatus. Background Art
[0002] An organic light-emitting diode (OLED) display device has advantages such as self-luminance, no need for backlight, low power consumption, and high brightness, and is widely used in various electronic devices.
[0003] The magnitude of the pixel power supply affects the emission brightness of the light-emitting elements in the display device. Currently, the pixel power supply adopted by the display device is a fixed voltage, which cannot balance the high-brightness display requirement and the low-power consumption requirement of the display device. Summary of the Invention
[0004] The present invention provides a display device and a display apparatus, which can effectively reduce power consumption while meeting the high-brightness display requirement.
[0005] According to one aspect of the present invention, a display panel is provided, including: a display panel and a power supply driving circuit;
[0006] The working modes of the display device include a first working mode and a second working mode, and the display brightness in the first working mode is lower than that in the second working mode;
[0007] The power supply driving circuit is configured to output a first power signal and a second power signal to the display panel; the voltage of the first power signal is greater than that of the second power signal;
[0008] In the second working mode, the power supply driving circuit controls the voltage of the first power signal to vary between a first preset voltage and a second preset voltage according to the display brightness of the display device; the first preset voltage is less than the second preset voltage.
[0009] According to another aspect of the present invention, a display apparatus is provided, including: the above display device.
[0010] The technical solution provided by the present invention outputs a first power signal, a second power signal, and an analog voltage signal to the display panel through the power supply driving circuit, and in the second working mode of high-brightness display, the power supply driving circuit controls the voltage of the first power signal to vary between a first preset voltage and a second preset voltage according to the display brightness, so that the voltage of the first power signal can be automatically adjusted according to the display brightness, the voltage value of the first power signal can match the display brightness, different brightness requirements of the display device can be met, and power consumption can be effectively reduced on the basis of meeting the brightness requirement.
[0011] It should be understood that the content described in this part is not intended to identify the key or important features of the embodiments of the present invention, nor is it used to limit the scope of the present invention. Other features of the present invention will become readily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS
[0012] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.
[0013] Figure 1 is a schematic structural diagram of a display device in the prior art;
[0014] Figure 2 is a schematic structural diagram of a pixel circuit provided by an embodiment of the present invention;
[0015] Figure 3 is a schematic diagram of a signal curve provided by an embodiment of the present invention;
[0016] Figure 4 is another schematic diagram of a signal curve provided by an embodiment of the present invention;
[0017] Figure 5 is yet another schematic diagram of a signal curve provided by an embodiment of the present invention;
[0018] Figure 6 is yet another schematic diagram of a signal curve provided by an embodiment of the present invention;
[0019] Figure 7 is another schematic structural diagram of a pixel circuit provided by an embodiment of the present invention;
[0020] Figure 8 is a schematic structural diagram of a display device provided by an embodiment of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS
[0021] In order to enable those skilled in the art to better understand the solutions of the present invention, the following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.
[0022] It should be noted that the terms "first", "second", etc. in the description, claims and above-mentioned drawings of the present invention are used to distinguish similar objects, and do not necessarily have to be used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged under appropriate circumstances, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "comprising" and "having" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product or device comprising a series of steps or units does not necessarily have to be limited to those steps or units clearly listed, but may include other steps or units not clearly listed or inherent to these processes, methods, products or devices.
[0023] As introduced in the background art, currently, the pixel power supply adopted by display devices is a fixed voltage. For display devices with a relatively small pixel power supply, the power consumption of the driving IC can be saved, but the display brightness in the high-brightness mode (HBM) and the average pixel level (APL - Average pixel level) brightness will be reduced; for display devices with a relatively large pixel power supply, the display brightness in the high-brightness mode and the average pixel level brightness can be increased, but the power consumption of the driving IC is relatively large.
[0024] To solve the above technical problems, an embodiment of the present invention provides a display device, including: a display panel and a power supply driving circuit; the working modes of the display device include a first working mode and a second working mode, and the display brightness in the first working mode is lower than that in the second working mode; the power supply driving circuit is used to output a first power signal, a second power signal and an analog voltage signal to the display panel; the voltage of the first power signal is greater than that of the second power signal; in the second working mode, the power supply driving circuit controls the voltage of the first power signal to vary between a first preset voltage and a second preset voltage according to the display brightness of the display device; the first preset voltage is less than the second preset voltage.
[0025] By adopting the above technical solution, the power supply driving circuit outputs a first power signal, a second power signal and an analog voltage signal to the display panel, and in the second working mode of high-brightness display, the power supply driving circuit controls the voltage of the first power signal to vary between a first preset voltage and a second preset voltage according to the display brightness, so that the voltage of the first power signal can be automatically adjusted according to the display brightness, the voltage value of the first power signal can match the display brightness, different brightness requirements of the display device can be met, and the power consumption can be effectively reduced on the basis of meeting the brightness requirements.
[0026] The above is the core idea of this application. Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the scope of protection of the present invention.
[0027] Figure 1 is a schematic structural diagram of a display device provided by an embodiment of the present invention. As Figure 1 shown, an embodiment of the present invention provides a display device 100, including: a display panel 10 and a power supply driving circuit 20; the working modes of the display device 100 include a first working mode Mode1 and a second working mode Mode2, and the display brightness in the first working mode Mode1 is lower than that in the second working mode Mode2; the power supply driving circuit 20 is used to output a first power signal ELVDD and a second power signal ELVSS to the display panel 10; the voltage of the first power signal ELVDD is greater than the voltage of the second power signal ELVSS; in the second working mode Mode2, the power supply driving circuit 20 controls the voltage of the first power signal ELVDD to change between a first preset voltage V1 and a second preset voltage V2 according to the display brightness of the display device 100; the first preset voltage V1 is less than the second preset voltage V2.
[0028] Specifically, the first working mode Mode1 may be a low-brightness display mode. When the working mode of the display device 100 is the first working mode Mode1, the display brightness DBV (unit: nit) of the display device 10 may be relatively low; and, the second working mode Mode2 may be a high-brightness display mode. When the working mode of the display device 100 is the second working mode Mode2, the display brightness DBV of the display device 10 may be relatively high. For example, the display brightness DBV in the first working mode Mode1 may be less than or equal to 500 nit or 100 nit, and the display brightness DBV in the second working mode Mode2 may be greater than 500 nit or greater than 100 nit. Specifically, it can be designed according to actual needs, and the embodiments of the present invention do not make specific limitations on this.
[0029] The display panel 10 may include pixel circuits 11 arranged in an array. The power supply driving circuit 20 may be integrated in a Power Management Integrated Circuit (PMIC for short) and electrically connected to each pixel circuit 11. The display device 10 may further include a first power supply signal line EL1 and a second power supply signal line EL2. The first power supply signal line EL1 is used to transmit a first power supply signal ELVDD, and the second power supply signal line EL2 is used to transmit a second power supply signal ELVSS. The power supply driving circuit 20 supplies the pixel circuit 11 with the first power supply signal ELVDD at a high level and the second power supply signal ELVSS at a low level.
[0030] Figure 2 is a schematic structural diagram of a pixel circuit provided by an embodiment of the present invention, as Figure 2As shown, the pixel circuit 11 may include a light-emitting element D0, a driving transistor M1, a data-writing transistor M2, a threshold compensation transistor M3, an initialization transistor M4, a reset transistor M5, a first light-emitting control transistor M6, a second light-emitting control transistor M7, and a storage capacitor Cst. The first light-emitting control transistor M6, the driving transistor M1, the second light-emitting control transistor M7, and the light-emitting element D0 are sequentially electrically connected between a first power signal terminal and a second power signal terminal, and the gates of the first light-emitting control transistor M6 and the second light-emitting control transistor M7 both receive a light-emitting control signal EM. The first power signal terminal is used to receive a first power signal ELVDD, and the second power signal terminal is used to receive a second power signal ELVSS. The first pole of the data-writing transistor M2 receives a data voltage signal Vdata, the second pole of the data-writing transistor M2 is electrically connected to the first pole of the driving transistor M1, and the gate of the data-writing transistor M2 receives a first scan signal S1. The data-writing transistor M2 is used to conduct or turn off under the control of the first scan signal S1, and when conducting, transmit the data voltage signal Vdata to the first pole of the driving transistor M1. The first pole of the threshold compensation transistor M3 is electrically connected to the second pole of the driving transistor M1, the second pole of the threshold compensation transistor M3 is electrically connected to the gate of the driving transistor M1, and the gate of the threshold compensation transistor M3 receives a second scan signal S2. The threshold compensation transistor M3 is used to conduct or turn off under the control of the second scan signal S2, and when conducting, transmit the voltage of the second pole of the driving transistor M1 to the gate of the driving transistor M1. The first pole of the initialization transistor M4 receives a gate reset signal Vref_Gate, the second pole of the initialization transistor M4 is electrically connected to the gate of the driving transistor M1, and the gate of the initialization transistor M4 receives a third scan signal S3. The initialization transistor M4 is used to conduct or turn off under the control of the third scan signal S3, and when conducting, transmit the gate reset signal Vref_Gate to the gate of the driving transistor M1. The first pole of the reset transistor M5 receives an anode reset signal Vref_anode, the second pole of the reset transistor M5 is electrically connected to the anode of the light-emitting element D0, and the gate of the reset transistor M5 receives a fourth scan signal S4. The reset transistor M5 is used to conduct or turn off under the control of the fourth scan signal S4, and when conducting, write the anode reset signal Vref_anode to the anode of the light-emitting element D0. One end of the storage capacitor Cst is electrically connected to the gate of the driving transistor M1, and the other end of the storage capacitor Cst receives the first power signal ELVDD. The storage capacitor Cst is used to store the gate potential of the driving transistor M1.
[0031] The above only exemplarily shows a pixel circuit 11 with a 7T1C structure. In other feasible embodiments of the present invention, the pixel circuit 11 may also be in other forms, and the embodiments of the present invention do not make specific limitations thereto. Among them, the first pole of each transistor may be the drain, the second pole may be the gate, and the type of each transistor can be set according to design requirements. It can be understood that, without special instructions, the embodiments of the present invention take the driving transistor M1, the data writing transistor M2, the reset transistor M5, the first light-emitting control transistor M6, and the second light-emitting control transistor M7 as P-type MOS transistors, and the threshold compensation transistor M3 and the initialization transistor M4 as N-type MOS transistors as examples for exemplary explanation.
[0032] When the first light-emitting control transistor M6, the driving transistor M1, and the second light-emitting control transistor M7 are all turned on, a current path is generated between the first power signal terminal and the second power signal terminal. The driving transistor M1 generates a driving current according to the data voltage signal Vdata written to its gate, so as to drive the light-emitting element 11 to emit light. Moreover, the greater the driving current, the higher the light-emitting brightness of the light-emitting element D0. In the display panel 10, to achieve a higher display brightness, a lower bright-state gamma reference voltage and a larger dark-state gamma reference voltage are required to be able to achieve a higher bright-state display brightness and a lower dark-state display brightness. Both the bright-state gamma reference voltage and the dark-state gamma reference voltage are related to the first power signal ELVDD. Therefore, the maximum light-emitting brightness of the light-emitting element 11 can be controlled by controlling the magnitude of the first power signal ELVDD, so as to control the maximum display brightness of the display device 100. Exemplarily, in the second working mode Mode2 of high-brightness display, the power supply driving circuit 20 can control the voltage of the first power signal ELVDD to dynamically change between a first preset voltage V1 and a second preset voltage V2 according to the display brightness of the display device 100. In this way, the voltage of the first power signal ELVDD can be automatically adjusted according to the display brightness, so that the voltage value of the first power signal ELVDD can match the display brightness, which can solve the problems that the voltage of the first power signal ELVDD is fixed at a lower voltage value and cannot meet the high-brightness display requirements, and the voltage of the first power signal ELVDD is fixed at a higher voltage value and the power consumption is large, and can reduce the power consumption while meeting the high-brightness display requirements. Among them, the first preset voltage V1 can be 2.8V, and the second preset voltage can be 4.6V.
[0033] Exemplarily, Figure 3 is a schematic diagram of a signal curve provided by an embodiment of the present invention. With reference to Figure 1 、 Figure 2 and Figure 3 , in the second working mode Mode2, the voltage of the first power signal ELVDD output by the power supply driving circuit 20 is positively correlated with the display brightness DBV.
[0034] Specifically, in the second operating mode Mode2, the voltage of the first power supply signal ELVDD output by the power supply driving circuit 20 can have a linear relationship proportional to the display brightness, and the slope of the linear relationship can be set according to design requirements, which is not specifically limited in the embodiments of the present invention. Then, in the second operating mode Mode2 of high-brightness display, the greater the display brightness DBV, the greater the voltage of the corresponding first power supply signal ELVDD, and the smaller the display brightness DBV, the smaller the voltage of the corresponding first power supply signal ELVDD, so that the voltage of the first power supply signal ELVDD can be dynamically adjusted according to the display brightness, and the power consumption can be effectively reduced on the basis of meeting the display brightness requirements.
[0035] The display device provided by the embodiments of the present invention outputs a first power supply signal, a second power supply signal, and an analog voltage signal to the display panel through a power supply driving circuit, and in the second operating mode of high-brightness display, the power supply driving circuit controls the voltage of the first power supply signal to change between a first preset voltage and a second preset voltage according to the display brightness, which can make the voltage of the first power supply signal automatically adjusted according to the display brightness, so that the voltage value of the first power supply signal can match the display brightness, can meet different brightness requirements of the display device, and can effectively reduce the power consumption on the basis of meeting the brightness requirements.
[0036] Optionally, referring to Figure 3 , in the first operating mode Mode1, the power supply driving circuit 20 controls the voltage of the first power supply signal ELVDD to remain at the first preset voltage V1.
[0037] Specifically, the display brightness of the display device 100 in the first operating mode Mode1 is relatively low. Controlling the voltage of the first power supply signal ELVDD to remain at the relatively low first preset voltage V1 in the first operating mode Mode1 can make the power consumption of the display device relatively low on the basis of meeting the low-brightness display requirements.
[0038] Optionally, in combination with reference to Figures 1 to 3 , in the second operating mode Mode2, the power supply driving circuit 20 is further configured to control the voltage of the second power supply signal ELVSS to change between a third preset voltage V3 and a fourth preset voltage V4 according to the display brightness of the display device 100; the third preset voltage V3 is less than the fourth preset voltage V4.
[0039] Specifically, the second power supply signal ELVSS can be a ground signal and can be used as a reference signal for generating the anode reset signal Vref_anode. The luminous brightness of the light-emitting element D0 is also related to the anode reset signal Vref_anode. The larger the voltage of the anode reset signal Vref_anode, the larger the anode potential of the light-emitting element D0, and the higher the luminous brightness of the light-emitting element D0 can be made; conversely, the smaller the voltage of the anode reset signal Vref_anode, the smaller the anode potential of the light-emitting element D0, and the lower the luminous brightness of the light-emitting element D0. In the second operating mode Mode2 of high-brightness display, the power supply driving circuit 20 can also control the voltage of the second power supply signal ELVSS to dynamically change between a third preset voltage V3 and a fourth preset voltage V4 according to the display brightness of the display device 100. In this way, the anode reset signal Vref_anode can follow the dynamic change of the second power supply signal ELVSS, so that the luminous brightness of the light-emitting element D0 can be adjusted, and the luminous brightness of the light-emitting element D0 can meet the display brightness of the display device 100. Also, power consumption can be reduced while meeting different display requirements. Among them, the fourth preset voltage V4 can be less than the first preset voltage V1 to provide a low-voltage signal to the display panel 10.
[0040] Exemplarily, continuing to refer to Figure 3 , in the second operating mode Mode2, the voltage of the second power supply signal ELVSS output by the power supply driving circuit 20 is positively correlated with the display brightness DBV. That is, when controlling the second power supply signal ELVSS to change between the third preset voltage V3 and the fourth preset voltage V4 in the second operating mode Mode2, the second power supply signal ELVSS can be controlled to linearly change in a positive correlation with the display brightness DBV between the third preset voltage V3 and the fourth preset voltage V4. In the second operating mode Mode2 of high-brightness display, the larger the display brightness DBV, the larger the voltage of the corresponding second power supply signal ELVSS, and the smaller the display brightness DBV, the smaller the voltage of the corresponding second power supply signal ELVSS. Thus, the voltage of the second power supply signal ELVSS can be dynamically adjusted according to the display brightness, effectively reducing power consumption while meeting the high-brightness display requirements, and simplifying the corresponding relationship between the second power supply signal ELVSS and the display brightness DBV, which is beneficial to simplifying the operation process. Among them, the slope of the linear relationship between the second power supply signal ELVSS and the display brightness DBV can be set according to design requirements, and the embodiments of the present invention do not make specific limitations in this regard.
[0041] Optionally, continuing to refer to Figure 3, in the first operating mode Mode1, the power supply driving circuit 20 controls the voltage of the second power supply signal ELVSS to remain at a third preset voltage V3. In this way, it is possible to control the second power supply signal ELVSS to a lower voltage and keep it unchanged in the first operating mode Mode1 of low-brightness display, which can reduce the light-emitting brightness of the light-emitting elements in the pixel circuit 11, achieve low-brightness display, and is beneficial to reducing power consumption.
[0042] Optionally, Figure 4 is another signal curve schematic diagram provided by an embodiment of the present invention. Refer to Figure 4 , in the first operating mode Mode1, when the display brightness DBV of the display panel 10 is lower than or equal to the first brightness value DBV-1, the power supply driving circuit 20 controls the voltage of the second power supply signal ELVSS to remain at a fifth preset voltage V5. When the display brightness of the display panel 10 is greater than the first brightness value DBV01, the power supply driving circuit 20 controls the voltage of the second power supply signal ELVSS to change between the fifth preset voltage V5 and the third preset voltage V3; the fifth preset voltage V5 is less than the third preset voltage V3.
[0043] Specifically, assuming that the brightness value range of the first operating mode Mode1 is 0 nit to 500 nit, the first brightness value DBV-1 can be a certain brightness value between 0 nit and 500 nit. When the display brightness DBV of the display panel 10 is lower than or equal to the first brightness value DBV-1, it means that the display device 100 is displaying at the lowest display brightness at this time. At this time, the voltage of the second power supply signal ELVSS can be controlled to remain at the lower fifth preset voltage V5 to meet the low-power consumption requirements of the display device 100. In the range of the first brightness value DBV-1 to 500 nit, the voltage of the second power supply signal ELVSS can be controlled to change between the fifth preset voltage V5 and the third preset voltage V3, so that the second power supply signal ELVSS is related to the display brightness, and the dynamic adjustment of the second power supply signal ELVSS in the first operating mode Mode1 is realized, which can meet the display brightness requirements on the basis of reducing power consumption.
[0044] Exemplarily, in the first working mode Mode1, when the display brightness of the display panel 10 is greater than the first brightness value DBV-1, the power supply driving circuit 20 controls the voltage of the second power supply signal ELVSS to be linearly and positively correlated with the display brightness between the fifth preset voltage V5 and the third preset voltage V3. Assuming that within the range where the display brightness is greater than the first brightness value DBV-1 in the first working mode Mode1, the relationship slope between the second power supply signal ELVSS and the display brightness DBV is k1, and the relationship slope between the second power supply signal ELVSS and the display brightness DBV in the second working mode Mode2 is k2, then k1 = k2 can be set, which can further simplify the linear relationship between the second power supply signal ELVSS and the display brightness DBV, and is beneficial to simplifying the control process of the second power supply signal ELVSS.
[0045] Optionally, Figure 5 is another signal curve schematic diagram provided by the embodiment of the present invention. With reference to Figure 1 , Figure 2 and 5 , the display device 100 further includes a driving chip 30, and the power supply driving circuit 20 is further configured to output an analog voltage signal AVDD to the driving chip 30; the driving chip 30 is configured to output a data voltage signal Vdata to the display panel at least according to the analog voltage signal AVDD; in the second working mode Mode2, the power supply driving circuit 20 controls the analog voltage signal AVDD to change between the sixth preset voltage V6 and the seventh preset voltage V7 according to the display brightness of the display device 100; the sixth preset voltage V6 is less than the seventh preset voltage V7.
[0046] Specifically, the display device 100 may further include an analog voltage signal line AL for transmitting the analog voltage signal AVDD. The power supply driving circuit 20 is electrically connected to the driving chip 30 through the analog voltage signal line AL. The analog voltage signal AVDD can be used as a reference signal for generating the data voltage signal Vdata. The larger the analog voltage signal AVDD is, the larger the range of the generated data voltage signal Vdata is, which can meet a larger display brightness range, especially the display requirements during high-brightness display. In the second working mode Mode2 of high-brightness display, by controlling the analog voltage signal AVDD to change between the sixth preset voltage V6 and the seventh preset voltage V7, the problems that the analog voltage signal AVDD fixed at a lower voltage value cannot meet a larger display brightness range and that fixed at a larger voltage value results in a larger power consumption can be solved.
[0047] Exemplarily, continue to refer to Figure 1 , Figure 2 and 5, in the second working mode Mode2, the analog voltage signal AVDD output by the power supply driving circuit 20 is positively correlated with the display brightness DBV. Thus, in the second working mode Mode2, the greater the display brightness DBV, the greater the voltage of the corresponding analog voltage signal AVDD, and the smaller the display brightness DBV, the smaller the voltage of the corresponding analog voltage signal AVDD, so that the voltage of the analog voltage signal AVDD can be dynamically adjusted according to the display brightness DBV, and the power consumption can be effectively reduced on the basis of meeting a large display brightness range. The analog voltage signal AVDD and the display brightness DBV can be in a proportional relationship, which can simplify the corresponding relationship between the analog voltage signal AVDD and the display brightness DBV, and thus simplify the control process of the analog voltage signal AVDD. Among them, the slope of the proportional relationship between the analog voltage signal AVDD and the display brightness DBV can be set according to the design requirements, and the embodiments of the present invention do not make specific limitations on this.
[0048] Optionally, continue to refer to Figure 1 , Figure 2 and 5 , in the first working mode Mode1, the analog voltage signal AVDD output by the power supply driving circuit 20 is maintained at the sixth preset voltage V6. Thus, in the first working mode Mode1 of low-brightness display, the analog voltage signal AVDD is maintained at the lower sixth preset voltage V6, which can meet the display requirements of low-brightness display and reduce power consumption.
[0049] Optionally, Figure 6 is another signal curve schematic diagram provided by the embodiments of the present invention. Referring to Figure 1 , Figure 2 , 5 and Figure 6 , the power supply driving circuit 20 is further configured to output a first power signal ELVDD to the driving chip 30; the driving chip 30 is further configured to determine a first gamma reference signal VGMP according to the first power signal ELVDD and the analog voltage signal AVDD, and determine a second gamma reference signal VGSP according to the first power signal ELVDD; and output a data voltage signal Vdata to the display panel 10 according to the analog voltage signal AVDD, the first gamma reference signal VGMP, and the second gamma reference signal VGSP.
[0050] Specifically, the power supply driving circuit 20 can also be electrically connected to the driving chip 30 through the first power supply signal line EL1 to supply the first power supply signal ELVDD to the driving chip 30. The first gamma reference signal VGMP, i.e., the dark state gamma reference voltage signal, has a relatively high voltage value and can be used to determine the minimum gray scale brightness of the display panel 10, i.e., the dark state brightness. The second gamma reference signal VGSP, i.e., the bright state gamma reference voltage signal, has a relatively low voltage value and can be used to determine the maximum gray scale brightness of the display panel 10. When the driving chip 30 supplies the data voltage signal Vdata to the pixel circuit 11, it can generate the data voltage signal Vdata corresponding to the display brightness DBV based on the analog voltage signal AVDD, the first gamma reference signal VGMP, and the second gamma reference signal VGSP, so that the driving transistor M1 in the pixel circuit 11 generates a driving current according to the data voltage signal Vdata to drive the light emitting element D0 to emit light. Among them, the first gamma reference signal VGMP can be determined according to the first power supply signal ELVDD and the analog voltage signal AVDD. Thus, when at least one of the first power supply signal ELVDD and the analog voltage signal AVDD can be dynamically adjusted according to the display brightness DBV, the first gamma reference signal VGMP can also be dynamically adjusted according to the display brightness DBV, making the first gamma reference signal VGMP match the display brightness DBV, having a sufficiently high bright state brightness in the second working mode Mode2 of high brightness display, so that the light emitting brightness of the light emitting element D0 conforms to the display brightness DBV of the display device 100, which is beneficial to improving the display effect.
[0051] Similarly, by setting the second gamma reference signal VGSP to be determined according to the first power supply signal ELVDD, when the first power supply signal ELVDD is dynamically adjustable according to the display brightness DBV, the second gamma reference signal VGSP can also be dynamically adjustable according to the display brightness DBV, making the second gamma reference signal VGSP match the display brightness DBV, having a sufficiently low dark state brightness in the second working mode Mode2 of high brightness display, so that the light emitting brightness of the light emitting element D0 conforms to the display brightness DBV of the display device 100, which is beneficial to enhancing the high brightness display effect.
[0052] Exemplarily, the driving chip 30 is further configured to: based on a first preset relationship, determine a first gamma reference signal VGMP according to a first power supply signal ELVDD and an analog voltage signal AVDD; the first preset relationship is: VGMP = ELVDD + Vc1, VGMP ≤ AVDD, and Vc1 > 0; where Vc1 is a first associated voltage. In this way, the first gamma reference signal VGMP is in a direct proportional relationship with the first power supply signal ELVDD, and the maximum voltage value of the first gamma reference signal VGMP does not exceed the voltage value of the analog voltage signal AVDD. When the first power supply signal ELVDD is dynamically adjustable according to the display brightness DBV, the first gamma reference signal VGMP can also be positively correlated with the display brightness DBV, so that the first gamma reference signal VGMP matches the display brightness DBV, and the larger the display brightness DBV, the larger the corresponding first gamma reference signal VGMP, that is, the larger the dark state voltage during high-brightness display, which is beneficial to improving the dark state display effect during high-brightness display. In an exemplary embodiment, the voltage adjustable range of the first gamma reference signal VGMP is 4.5V ≤ VGMP ≤ 7.9V. The value of the first associated voltage Vc1 can be set according to design requirements, and the embodiments of the present invention do not make specific limitations on this.
[0053] Exemplarily, the driving chip 20 is further configured to: based on a second preset relationship, determine a second gamma reference signal VGSP according to the first power supply signal ELVDD; the second preset relationship is: VGSP = ELVDD - Vc2, and 0 < Vc2 < ELVDD; where Vc2 is a second associated voltage. In this way, by setting the value range of the second associated voltage Vc2 as 0 < Vc2 < ELVDD and setting the proportionality coefficient greater than 0, the second gamma reference signal VGSP is in a direct proportional relationship with the first power supply signal ELVDD, and the voltage value of the second gamma reference signal VGSP does not exceed the first power supply signal ELVDD, so that the voltage value of the second gamma reference signal VGSP will not be too large, which can ensure that the display panel 10 has a large display brightness range. And when the first power supply signal ELVDD is dynamically adjustable according to the display brightness DBV, the second gamma reference signal VGSP can also be positively correlated with the display brightness DBV, so that the second gamma reference signal VGSP matches the display brightness DBV, and the larger the display brightness DBV, the larger the corresponding second gamma reference signal VGSP, that is, the larger the bright state voltage during high-brightness display, which is beneficial to improving the bright state display effect during high-brightness display. In an exemplary embodiment, the voltage adjustable range of the second gamma reference signal VGSP is 0.2V ≤ VGSP ≤ 4.5V.
[0054] Optionally, continue to refer to Figure 1 、 Figure 2 、 Figure 5 and Figure 6, the driving chip 30 is further configured to: based on a third preset relationship, determine a first gate driving signal VGH according to the analog voltage signal AVDD; and output the first gate control signal VGH to the display panel 10; the third preset relationship is: VGH = AVDD + Vc3; where Vc3 is a third associated voltage.
[0055] Specifically, the display panel 10 may further include a shift register circuit 12. The shift register circuit 12 includes a plurality of cascaded shift register units to respectively provide a sequentially shifted scan signal (such as at least one of a first scan signal S1, a second scan signal S2, a third scan signal S3, and a fourth scan signal S4) to each row of pixel circuits 11. The shift register unit is usually composed of a plurality of thin film transistors and requires different gate driving signals to drive the states of the thin film transistors. For example, for an N-type thin film transistor, a positive voltage signal with a high level is required as the gate driving signal to control its conduction, while for a P-type thin film transistor, a negative voltage signal with a low level is required as the gate driving signal to control its conduction. The first gate driving signal VGH may be a positive voltage signal, i.e., a high-level signal. As can be seen from the foregoing embodiments, in the second operating mode Mode2, the first power supply signal ELVDD is positively correlated with the display brightness DBV. In the shift register circuit 12, the first power supply signal ELVDD can also be used as the high-level signal provided to the source or drain of the thin film transistor. At this time, since the first power supply signal ELVDD changes following the display brightness DBV, it is necessary to correspondingly adjust the first gate driving signal VGH to ensure that when the first power supply signal ELVDD increases, the first gate driving signal VGH can drive the corresponding thin film transistor in the shift register unit to conduct or turn off, and can correspondingly control the first gate driving signal VGH to decrease when the first power supply signal ELVDD decreases to reduce power consumption. In the application of the display panel 10, it is usually set that the first power supply signal ELVDD is less than the analog voltage signal AVDD, and the first power supply signal ELVDD is less than the first gate driving signal VGH. And since the first gate driving signal VGH is a relatively large voltage, the corresponding first gate driving signal VGH can be first determined according to the first power supply signal ELVDD, and then the first gate driving signal VGH can be adjusted by the analog voltage signal AVDD based on the third preset relationship, which can ensure that the third associated voltage Vc3 does not exceed the setting range of the driving chip 30, and make the first gate driving signal VGH match the first power supply signal ELVDD. Based on this, the driving chip 30 can also determine the first gate driving signal VGH according to the analog voltage signal AVDD and output the first gate driving signal VGH to the shift register circuit 12 in the display panel 10. The value of the third associated voltage Vc3 can be set according to the conduction condition of the N-type thin film transistor and the voltage value of the analog voltage signal AVDD, so that the first gate driving signal VGH is associated with the analog voltage signal AVDD.After determining the value of the third associated voltage Vc3, the first gate driving signal VGH can be made positively correlated with the analog voltage signal AVDD, so that the first gate driving signal VGH is positively correlated with the display brightness of the display device 100. Similarly, the first gate driving signal VGH can be made to match the display brightness, and the linkage control of the first gate driving signal VGH and the analog voltage signal AVDD can be achieved, simplifying the control process of the first gate driving signal VGH.
[0056] Optionally, referring to Figure 1 or Figure 5 , the driving chip 30 is further configured to: determine the second gate driving signal VGL based on the fourth preset relationship according to the analog voltage signal AVDD; and output the second gate driving signal VGL to the display panel 10; the fourth preset relationship is VGL = -AVDD + Vc4; where Vc4 is the fourth associated voltage.
[0057] Specifically, based on a principle similar to that for determining the first gate driving signal VGH, in the shift register circuit 12, the first power supply signal ELVDD can also be used as the high-level signal supplied to the source or drain of the thin-film transistor. At this time, since the first power supply signal ELVDD changes following the display brightness DBV, it is necessary to correspondingly adjust the second gate driving signal VGL to ensure that when the first power supply signal ELVDD increases, the second gate driving signal VGL can drive the corresponding thin-film transistor in the shift register unit to conduct or turn off, and can correspondingly control the second gate driving signal VGL to decrease when the first power supply signal ELVDD decreases to reduce power consumption. And since the second gate driving signal VGL is a relatively large negative voltage, the corresponding second gate driving signal VGL can be first determined according to the first power supply signal ELVDD, and then the second gate driving signal VGL is adjusted by the analog voltage signal AVDD based on the fourth preset relationship, so that the second gate driving signal VGL matches the first power supply signal ELVDD. Among them, the value of the fourth associated voltage Vc4 can be set according to the conduction condition of the P-type thin-film transistor and the voltage value of the analog voltage signal AVDD, so that the second gate driving signal VGL is associated with the analog voltage signal AVDD. After determining the value of the fourth associated voltage Vc4, since the analog voltage signal AVDD is a positive voltage while the second gate driving signal VGL is a negative voltage with a relatively low voltage value, a proportionality coefficient less than zero is set so that the second gate driving signal VGL is negatively correlated with the analog voltage signal AVDD, so that the second gate driving signal VGL is negatively correlated with the display brightness DBV of the display device 100. That is, the larger the analog voltage signal AVDD, the smaller the second gate driving signal VGL, and there is a trend that the larger the display brightness DBV, the smaller the second gate driving signal VGL, which can make the second gate driving signal VGL match the display brightness, and can realize the linkage control of the second gate driving signal VGL and the analog voltage signal AVDD, simplifying the operation process of the second gate driving signal VGL.
[0058] Optionally, continuing to refer to Figure 1 、 Figure 2 、 Figure 5 and Figure 6 ,the driving chip 30 is further configured to: based on the fifth preset relationship, determine the gate reset signal Vref_Gate according to the analog voltage signal AVDD; and output the gate reset signal Vref_Gate to the display panel 10; the fifth preset relationship is: Vref_Gate = -AVDD + Vc5; where Vc5 is the fifth associated voltage.
[0059] Specifically, the driving chip 30 can also generate a gate reset signal Vref_Gate required for the pixel circuit 11 in the display panel 10 according to the analog voltage signal AVDD. Since the driving transistor M1 in the pixel circuit 11 is usually a P-type MOS transistor, it can control the driving transistor M1 to conduct when the potential of its gate is at a low level. By setting the fifth preset relationship as: Vref_Gate = -AVDD + Vc5, the associated control of the gate reset signal Vref_Gate and the analog voltage signal AVDD can be achieved, and the proportionality coefficient between the gate reset signal Vref_Gate and the analog voltage signal AVDD is set to be less than zero, so that the gate reset signal Vref_Gate is negatively correlated with the analog voltage signal AVDD, then the gate reset signal Vref_Gate is negatively correlated with the display brightness DBV, making the gate reset signal Vref_Gate associated with the display brightness DBV, and ensuring that the voltage value of the gate reset signal Vref_Gate written to the gate of the driving transistor M1 is not too large, and it is only necessary to ensure that the driving transistor M1 can be turned off by the gate reset signal Vref_Gate, so as to ensure that the subsequent data voltage signal Vdata can be accurately written. The fifth associated voltage Vc5 can be greater than zero or less than zero, and the embodiments of the present invention do not make specific limitations on this.
[0060] Optionally, Figure 7 is a schematic structural diagram of another pixel circuit provided by an embodiment of the present invention. As Figure 7 shown, the pixel circuit 11 further includes a bias adjustment transistor M8. The first pole of the bias adjustment transistor M8 receives a bias signal DVH, the second pole of the bias adjustment transistor M8 is electrically connected to the first pole of the driving transistor, and the gate of the bias adjustment transistor M8 receives a fifth scan signal S5. The bias adjustment transistor M8 is used to conduct or turn off under the control of the fifth scan signal S5, and write the bias signal DVH to the first pole of the driving transistor M1 when conducting. In other feasible embodiments, the second pole of the bias adjustment transistor M8 can also be electrically connected to the second pole of the driving transistor M1, and write the bias signal DVH to the second pole of the driving transistor M1 when it can conduct.
[0061] With reference to Figure 1 、 Figure 5 and Figure 7 , the driving chip 30 is further configured to: determine a bias signal DVH according to the analog voltage signal AVDD based on a sixth preset relationship; and output the bias signal DVH to the display panel 10; the sixth preset relationship is: DVH = AVDD + Vc6; where Vc6 is a sixth associated voltage.
[0062] Specifically, the bias signal DVH may be a voltage signal similar to the first gamma reference signal VGMP. When determining the voltage value of the bias signal DVH, it can be calibrated according to the flickering situation of the display panel 10 at different display brightness levels, and then the sixth associated voltage Vc6 at different display brightness levels can be determined. Since the analog voltage signal AVDD may also be different at different display brightness levels, the analog voltage signal AVDD at each display brightness level can be associated and stored with the sixth associated voltage Vc6, so as to realize the linkage control of the bias signal DVH and the analog voltage signal AVDD, and effectively improve the flickering situation at different display brightness levels.
[0063] Optionally, continue to refer to Figure 1 、 Figure 2 、 Figures 5 to 7 The power supply driving circuit 20 is further configured to output a second power signal ELVSS to the driving chip 30; the driving chip 30 is further configured to: based on a seventh preset relationship, determine an anode reset signal Vref_anode according to the second power signal ELVSS; and output the anode reset signal Vref_anode to the display panel 10; the seventh preset relationship is: Vref_anode = ELVSS + Vc7; where Vc7 is the seventh associated voltage.
[0064] Specifically, the value of the seventh associated voltage V7 can be set according to design requirements. In an exemplary embodiment, an increase in the analog voltage signal AVDD will cause an increase in the emission brightness of the light-emitting element D0. In order to balance the emission brightness of the light-emitting element D0 to avoid excessive emission brightness affecting the user's visual experience, Vc7 < 0 can be set. In another exemplary embodiment, Vc7 > 0 can also be set to improve the situation where the emission brightness of the light-emitting element D0 is reduced due to leakage in the pixel circuit, and the display uniformity of the display panel 10 can be improved. Then, through the seventh preset relationship, the linkage control of the anode reset signal Vref_anode and the second power signal ELVSS can be realized, and the corresponding relationship between the anode reset signal Vref_anode and the second power signal ELVSS can be simplified, which is beneficial to simplifying the operation process.
[0065] Based on the same inventive concept, the technical solution of the embodiment of the present invention also provides a display device. Figure 8 It is a schematic structural diagram of a display device provided by an embodiment of the present invention. Refer to Figure 8 The display device 200 includes the display device 100 provided by any of the above embodiments. The display device 200 may be a mobile phone, a tablet computer, a display, a smart watch, an MP3, an MP4, or other wearable devices, etc. Since it includes the pixel circuit provided by any embodiment of the present invention, it also has the same beneficial effects, which will not be elaborated here.
[0066] It should be understood that the various forms of processes shown above can be used, with steps reordered, added, or deleted. For example, the steps recited in the present invention can be executed in parallel, sequentially, or in a different order, as long as the desired results of the technical solution of the present invention can be achieved, and no limitation is made herein.
[0067] The above specific embodiments do not constitute a limitation on the protection scope of the present invention. Those skilled in the art should understand that various modifications, combinations, sub - combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention shall be included within the protection scope of the present invention.
Claims
1. A display device, characterized in that, Comprising: A display panel and a power supply driving circuit; The operating modes of the display device include a first operating mode and a second operating mode, and the display brightness in the first operating mode is lower than that in the second operating mode; The power supply driving circuit is used to output a first power signal and a second power signal to the display panel; The voltage of the first power signal is greater than the voltage of the second power signal; In the second operating mode, the power supply driving circuit controls the voltage of the first power signal to vary between a first preset voltage and a second preset voltage according to the display brightness of the display device; The first preset voltage is less than the second preset voltage.
2. The display device according to claim 1, wherein In the second operating mode, the voltage of the first power signal output by the power supply driving circuit is positively correlated with the display brightness.
3. The display device according to claim 1, characterized in that, In the first operating mode, the power supply driving circuit controls the voltage of the first power signal to remain at the first preset voltage.
4. The display device according to claim 1, characterized in that, In the second operating mode, the power supply driving circuit is further used to control the voltage of the second power signal to vary between a third preset voltage and a fourth preset voltage according to the display brightness of the display device; the third preset voltage is less than the fourth preset voltage.
5. The display device according to claim 4, characterized in that, In the second operating mode, the voltage of the second power signal output by the power supply driving circuit is positively correlated with the display brightness.
6. The display device according to claim 4, wherein In the first operating mode, the power supply driving circuit controls the voltage of the second power signal to remain at the third preset voltage; Alternatively, in the first operating mode, when the display brightness of the display panel is lower than or equal to a first brightness value, the power supply driving circuit controls the voltage of the second power signal to remain at a fifth preset voltage, and when the display brightness of the display panel is greater than the first brightness value, the power supply driving circuit controls the voltage of the second power signal to vary between the fifth preset voltage and the third preset voltage; The fifth preset voltage is less than the third preset voltage.
7. The display device according to claim 1, wherein Further comprising: A driving chip; The power supply driving circuit is further used to output an analog voltage signal to the driving chip; the driving chip is used to output a data voltage signal to the display panel at least according to the analog voltage signal; In the second operating mode, the power supply driving circuit controls the analog voltage signal to vary between a sixth preset voltage and a seventh preset voltage according to the display brightness of the display device; The sixth preset voltage is less than the seventh preset voltage.
8. The display device according to claim 7, wherein In the second operating mode, the analog voltage signal output by the power supply driving circuit is positively correlated with the display brightness.
9. The display device according to claim 7, wherein In the first operating mode, the analog voltage signal output by the power supply driving circuit remains at the sixth preset voltage.
10. The display device according to claim 7, wherein The power supply driving circuit is further used to output a first power signal to the driving chip; The driving chip is further configured to determine a first gamma reference signal according to the first power signal and the analog voltage signal, and determine a second gamma reference signal according to the first power signal; and output the data voltage signal to the display panel according to the analog voltage signal, the first gamma reference signal, and the second gamma reference signal.
11. The display device according to claim 9, characterized in that, The driving chip is further configured to: determine a first gamma reference signal according to the first power signal and the analog voltage signal based on a first preset relationship; The first preset relationship is: VGMP = ELVDD + Vc1, VGMP ≤ AVDD, and Vc1 > 0; where VGMP is the first gamma reference signal; ELVDD is the voltage of the first power signal, Vc1 is the first associated voltage, and AVDD is the analog voltage signal.
12. The display device according to claim 10, wherein The driving chip is further configured to: determine a second gamma reference signal according to the first power signal based on a second preset relationship; The second preset relationship is: VGSP = ELVDD - Vc2, and 0 < Vc2 < ELVDD; where VGSP is the second gamma reference signal; ELVDD is the voltage of the first power signal, and Vc2 is the second associated voltage.
13. The display device according to claim 7, wherein, The driving chip is further configured to: determine a first gate driving signal according to the analog voltage signal based on a third preset relationship; and output the first gate driving signal to the display panel; The third preset relationship is: VGH = AVDD + Vc3; where AVDD is the analog voltage signal, VGH is the first gate driving signal, and Vc3 is the third associated voltage.
14. The display device according to claim 7, wherein The driving chip is further configured to: determine a second gate driving signal according to the analog voltage signal based on a fourth preset relationship; and output the second gate driving signal to the display panel; The fourth preset relationship is VGL = -AVDD + Vc4; where AVDD is the analog voltage signal, VGL is the second gate driving signal, and Vc4 is the fourth associated voltage.
15. The display device according to claim 7, wherein The driving chip is further configured to: determine a gate reset signal according to the analog voltage signal based on a fifth preset relationship; and output the gate reset signal to the display panel; The fifth preset relationship is: Vref_Gate = -AVDD + Vc5; where AVDD is the analog voltage signal, Vref_Gate is the gate reset signal, and Vc5 is the fifth associated voltage.
16. The display device according to claim 7, characterized in that, The driving chip is further configured to: determine a bias signal according to the analog voltage signal based on a sixth preset relationship; and output the bias signal to the display panel; The sixth preset relationship is: DVH = AVDD + Vc6; where AVDD is the analog voltage signal, DVH is the bias signal, and Vc6 is the sixth associated voltage.
17. The display device according to claim 7, wherein The power supply driving circuit is further configured to output a second power signal to the driving chip; The driving chip is further configured to: determine an anode reset signal according to the second power signal based on a seventh preset relationship; and output the anode reset signal to the display panel; The seventh preset relationship is: Vref_anode = ELVSS + Vc7; where ELVSS is the voltage of the second power signal, Vref_anode is the anode reset signal, and Vc7 is the seventh associated voltage.
18. A display device, characterized in that, A display device according to any one of claims 1 to 17.