High-precision arbitrary carrier generation method based on FPGA and intermediate-frequency DAC

Abstract

The invention discloses a high-precision arbitrary carrier generation method based on an FPGA (Field Programmable Gate Array) and an intermediate-frequency DAC (Digital-to-Analog Converter), which comprises the following steps of: when a system needs to execute arbitrary carrier generation, firstly, configuring a carrier frequency needing to be generated through instruction input, and calculating to obtain an equivalent carrier frequency by using an equivalent carrier conversion module based on a Nyquist sampling theorem and an equivalent carrier conversion formula; the phase calibration unit formulates a phase value of each channel, and then performs dynamic phase compensation based on a linear feedback shift register to generate a dynamically compensated phase control word; and finally, the multi-channel waveform generation module generates an equivalent carrier based on the multi-channel parallel DDS. According to the high-precision arbitrary carrier generation method based on the FPGA and the intermediate-frequency DAC, the limitation of the working clock frequency of an existing FPGA device is broken through through cooperative work of the carrier conversion module and the multi-channel waveform generation module, and high-flexibility arbitrary carrier generation is achieved.

Description

Technical Field

[0001] The present invention relates to the field of communication technologies, and in particular, to a high-precision arbitrary carrier generation method based on FPGA and intermediate frequency DAC. Background Art

[0002] With the continuous development and innovation of satellite communication technologies, satellite communication systems have received increasing attention. The high-precision arbitrary carrier generation technology based on FPGA and intermediate frequency DAC has wide applications in fields such as signal transmission and mass production testing. For example, it can be used to flexibly configure the modulation frequencies required for communication transmitters or receivers.

[0003] However, due to the limitation of the working frequency of FPGA devices in intermediate frequency carrier generation, traditional digital transmitters mostly adopt the architecture of "FPGA + DSP + DAC + channel". For example, in the system proposed by Zhang Xiaodong in "Design of a Low EVM Zero Intermediate Frequency Transmitter Based on Cognitive Radio", the hardware architecture is complex, and the software part needs to frequently process data interaction between chips, especially the interface design between FPGA and DSP. Frequent data transmission seriously reduces the processing efficiency of DSP.

[0004] To solve this problem, Li Mengting et al. proposed a method for realizing baseband shaping function based on a DDS module with N-channel pre-stored FQPSK shaping waveforms in "A UWB Variable Symbol Rate FQPSK Modulation Method", reducing the working frequency of FPGA to 1 / N of the DAC sampling frequency, thus breaking through the dependence on the clock frequency of traditional systems. However, this method has significant deficiencies in the scenario of arbitrary carrier generation: the implementation method of pre-stored waveforms not only occupies a large amount of on-chip storage resources of FPGA, but also has poor flexibility and is difficult to meet the requirements of arbitrary waveform generation. Summary of the Invention

[0005] In view of the above-mentioned defects of the prior art, the technical problem to be solved by the present invention is that the existing implementation method of pre-stored waveforms in the high-precision arbitrary carrier generation technology based on FPGA and intermediate frequency DAC not only occupies a large amount of on-chip storage resources of FPGA, but also has poor flexibility and is difficult to meet the requirements of arbitrary waveform generation. Therefore, the present invention provides a high-precision arbitrary carrier generation method based on FPGA and intermediate frequency DAC. Through the collaborative work of a carrier conversion module and a multi-channel waveform generation module, the limitation of the working clock frequency of existing FPGA devices is broken through, and high-flexibility arbitrary carrier generation is realized. At the same time, through a dynamic phase compensation mechanism, the periodic step error caused by the fixed step of the phase accumulator in the multi-channel DDS scheme is randomized, and the statistical averaging effect of multi-channel equivalent carrier synthesis is utilized to improve the signal purity and achieve high-precision carrier generation.

[0006] To achieve the above object, the present invention provides a high-precision arbitrary carrier generation method based on FPGA and intermediate-frequency DAC. When the system needs to perform arbitrary carrier generation, first, the carrier frequency to be generated is configured through instruction input. The equivalent carrier conversion module calculates the equivalent carrier frequency based on the Nyquist sampling theorem and the equivalent carrier conversion formula. The phase calibration unit formulates the phase values of each channel, and then performs dynamic phase compensation based on the linear feedback shift register to generate a phase control word after dynamic compensation. Finally, the multi-channel waveform generation module generates the equivalent carrier based on multi-channel parallel DDS.

[0007] Further, it includes an instruction receiving module, an equivalent carrier conversion module, a dynamic phase compensation module, and a multi-channel waveform generation module. Among them, the instruction receiving module is used to parse and obtain the carrier information to be generated; the equivalent carrier conversion module calculates the equivalent carrier frequency and the frequency control word according to the target carrier frequency; the dynamic phase compensation module converts and corrects the system phase error through the pseudo-random phase perturbation mechanism to generate a dynamic phase control word; the multi-channel waveform generation module generates the equivalent carrier waveform based on the frequency control word and the dynamic phase control word through the multi-channel parallel DDS method.

[0008] Further, the equivalent carrier conversion module includes an equivalent carrier conversion unit and a frequency control word generation unit. Among them, the equivalent carrier conversion unit converts the carrier frequency in the form of undersampling according to the following formula based on the Nyquist sampling theorem according to the target carrier frequency to calculate and generate the equivalent carrier frequency:

[0009]

[0010] where, f carrier is the intermediate-frequency carrier frequency to be generated, f equivalent is the equivalent carrier frequency, f clock is the FPGA working clock frequency, represents rounding down.

[0011] Further, the frequency control word generation unit generates the frequency control word required by DDS based on the equivalent carrier frequency using the following formula:

[0012]

[0013] where, N is the width of the phase accumulator in DDS.

[0014] Furthermore, the dynamic phase compensation module includes a phase calibration unit, a pseudo-random phase scrambler, and a phase compensator; among them, the phase calibration unit ensures that after the multi-channel equivalent carriers are combined, the phase change of each sampling point strictly matches the discrete time step of sampling according to the time interval between each sampling point determined by the DAC sampling rate. The pseudo-random phase scrambler generates a pseudo-random perturbation amount based on a linear feedback shift register (LFSR) to add random perturbations to the phase control word, and then uses the phase compensator to generate the perturbed phase control word.

[0015] Furthermore, the phases of the equivalent carriers of each channel are determined according to the following formula:

[0016]

[0017] where, θ i is the phase value of a certain channel, n is the total number of channels, f dac is the sampling rate, is the initial phase;

[0018] And the phase control word required for the DDS to generate the equivalent carrier is obtained based on the following formula:

[0019]

[0020] where, N is the bit width of the phase accumulator of the DDS, and PCW i is the phase control word corresponding to the i-th channel.

[0021] Furthermore, the pseudo-random phase scrambler generates a pseudo-random perturbation amount ΔPCW i based on the linear feedback shift register (LFSR) to add random perturbations to the phase control word PCW i , breaking the periodic step error caused by the fixed-step growth of the phase accumulator in the DDS. The perturbed phase control word PCW i ′ is expressed as:

[0022] PCW i ′ = PCW i + ΔPCW i

[0023] To avoid excessive perturbation affecting the signal quality, by performing a function mapping on the output sequence of the LFSR, it is ensured that ΔPCW i is within a reasonable range. The function mapping relationship is:

[0024] ΔPCW i = (LFSR out mod(2·Δmax)) - Δmax

[0025] where, LFSR outis the output value of the current LFSR register, and Δmax is the maximum value of the perturbation amount.

[0026] Further, through the function mapping relationship for pseudo-random perturbation, the single-channel error changes from periodicity to uniform distribution, and the errors of each channel are independent. Therefore, the error after equivalent carrier synthesis is expressed as:

[0027]

[0028] where n is the total number of channels, and σ i is the error of a certain channel, and σ equivalent is the error after synthesis.

[0029] Further, the multi-channel waveform generation module includes n parallel DDS units, and generates an equivalent carrier according to the frequency control word PCW i ′ and the frequency control word FTW after dynamic phase compensation.

[0030] Further, according to the central limit theorem, the conversion of the equivalent carrier conversion module is carried out, and the error after synthesis is reduced to

[0031] Technical effects

[0032] A high-precision arbitrary carrier generation method based on FPGA and intermediate frequency DAC of the present invention realizes equivalent carrier frequency conversion based on the Nyquist sampling theorem; uses multi-channel parallel DDS to generate equivalent carriers; and breaks the periodic step error caused in the operation of DDS through dynamic phase compensation design. Compared with the prior art, the present invention only needs to adopt the architecture of "FPGA + DAC + channel" to realize the generation of arbitrary carriers; can break through the limitation of the working clock frequency of FPGA devices, and approximately replace the intermediate frequency carrier in the way of equivalent carrier synthesis; makes the step error randomly distributed through compensation, so as to realize high-precision carrier generation.

[0033] The following will further illustrate the concept, specific structure and technical effects generated by the present invention in conjunction with the drawings, so as to fully understand the purpose, features and effects of the present invention. Description of the drawings

[0034] Figure 1 is a schematic flow chart of a high-precision arbitrary carrier generation method based on FPGA and intermediate frequency DAC according to a preferred embodiment of the present invention;

[0035] Figure 2 is a schematic framework diagram of a high-precision arbitrary carrier generation method based on FPGA and intermediate frequency DAC according to a preferred embodiment of the present invention applied to intermediate frequency carrier modulation;

[0036] Figure 3It is a schematic diagram of generating a 612 MHz carrier by a high-precision arbitrary carrier generation method based on FPGA and intermediate-frequency DAC in a preferred embodiment of the present invention;

[0037] Figure 4 It is an analysis diagram of the result of generating a 612 MHz carrier by a high-precision arbitrary carrier generation method based on FPGA and intermediate-frequency DAC in a preferred embodiment of the present invention;

[0038] Figure 5 It is an analysis diagram of the result of generating a 612 MHz carrier by a high-precision arbitrary carrier generation method based on FPGA and intermediate-frequency DAC in a preferred embodiment of the present invention. Detailed implementation manners

[0039] In order to make the technical problems, technical solutions and beneficial effects to be solved by the present invention clearer and more understandable, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0040] In the following description, specific details such as specific internal programs and technologies are put forward for the purpose of illustration rather than limitation, so as to thoroughly understand the embodiments of the present invention. However, those skilled in the art should clearly understand that the present invention can also be implemented in other embodiments without these specific details. In other cases, detailed descriptions of well-known systems, devices, circuits and methods are omitted to avoid unnecessary details from interfering with the description of the present invention.

[0041] As Figure 1 shown, the present invention provides a high-precision arbitrary carrier generation method based on FPGA and intermediate-frequency DAC. When the system needs to execute arbitrary carrier generation, first, the carrier frequency to be generated is configured through instruction input, and the equivalent carrier frequency is calculated by using an equivalent carrier conversion module based on the Nyquist sampling theorem and the equivalent carrier conversion formula. The phase calibration unit formulates the phase values of each channel, and then dynamic phase compensation is performed based on a linear feedback shift register to generate a phase control word after dynamic compensation; finally, the multi-channel waveform generation module generates an equivalent carrier based on multi-channel parallel DDS.

[0042] As Figure 2As shown in the figure, the framework of a high-precision arbitrary carrier generation method based on FPGA and intermediate frequency DAC includes an instruction receiving module, an equivalent carrier conversion module, a dynamic phase compensation module, and a multi-channel waveform generation module. Among them, the instruction receiving module is used to parse and obtain the carrier information to be generated; the equivalent carrier conversion module calculates the equivalent carrier frequency and the frequency control word according to the target carrier frequency; the dynamic phase compensation module converts and corrects the system phase error through a pseudo-random phase perturbation mechanism to generate a dynamic phase control word; the multi-channel waveform generation module generates an equivalent carrier waveform through a multi-channel parallel DDS method based on the frequency control word and the dynamic phase control word.

[0043] The equivalent carrier conversion module includes an equivalent carrier conversion unit and a frequency control word generation unit. Among them, the equivalent carrier conversion unit converts the carrier frequency in the form of under-sampling according to the target carrier frequency based on the Nyquist sampling theorem and calculates and generates the equivalent carrier frequency according to the following formula:

[0044]

[0045] Among them, f carrier is the intermediate frequency carrier frequency to be generated, f equivalent is the equivalent carrier frequency, f clock is the FPGA working clock frequency, represents rounding down.

[0046] The frequency control word generation unit generates the frequency control word required by DDS based on the equivalent carrier frequency using the following formula:

[0047]

[0048] Among them, N is the width of the phase accumulator in DDS.

[0049] The dynamic phase compensation module includes a phase calibration unit, a pseudo-random phase perturbator, and a phase compensator. Among them, the phase calibration unit ensures that after the multi-channel equivalent carriers are merged, the phase change of each sampling point strictly matches the discrete time step of sampling according to the time interval between each sampling point determined by the DAC sampling rate. The pseudo-random phase perturbator generates a pseudo-random perturbation amount based on the linear feedback shift register LFSR, which is used to add random perturbation to the phase control word, and then uses the phase compensator to generate the perturbed phase control word.

[0050] The phase of each channel's equivalent carrier is determined according to the following formula:

[0051]

[0052] Among them, θ i is the phase value of a certain channel, n is the total number of channels, f dacis the sampling rate, is the initial phase;

[0053] And obtain the phase control word required for the DDS to generate an equivalent carrier based on the following formula:

[0054]

[0055] where N is the bit width of the phase accumulator of the DDS, and PCW i is the phase control word corresponding to the i-th channel.

[0056] The pseudo-random phase scrambler generates a pseudo-random perturbation amount ΔPCW based on the linear feedback shift register LFSR i , which is used to add random perturbation to the phase control word PCW i , and break the periodic step error caused by the phase accumulator in the DDS growing at a fixed step. The perturbed phase control word PCW i ' is expressed as:

[0057] PCW i ' = PCW i + ΔPCW i

[0058] To avoid excessive perturbation affecting the signal quality, by performing function mapping on the output sequence of the LFSR, ensure that ΔPCW i is within a reasonable range. The function mapping relationship is:

[0059] ΔPCW i = (LFSR out mod (2·Δmax)) - Δmax

[0060] where LFSR out is the output value of the current LFSR register, and Δmax is the maximum value of the perturbation amount.

[0061] Through the function mapping relationship for pseudo-random perturbation, the single-channel error changes from periodicity to uniform distribution, and the errors of each channel are independent. Therefore, the error after equivalent carrier synthesis is expressed as:

[0062]

[0063] where n is the total number of channels, σ i is the error of a certain channel, and σ equivalent is the error after synthesis.

[0064] The multi-channel waveform generation module includes n parallel DDS units, and generates an equivalent carrier according to the frequency control word PCW i ' after dynamic phase compensation and the frequency control word FTW.

[0065] According to the central limit theorem, perform the conversion of the equivalent carrier conversion module, and the synthesized error is reduced to

[0066] The following takes the generation of a 612 MHz intermediate frequency carrier as an example to illustrate a high-precision arbitrary carrier generation method based on FPGA and intermediate frequency DAC provided by the present invention.

[0067] FPGA: The full English name is Field Programmable Gate Array, that is, Field Programmable Gate Array.

[0068] DDS: The full English name is Direct Digital Synthesis, that is, digital signal synthesis technology, which generates waveform data digitally.

[0069] Intermediate frequency: Intermediate frequency is a commonly used concept in the fields of wireless communication and signal processing. It is located between radio frequency and baseband frequencies, and the specific value depends on the system design.

[0070] When the system needs to perform arbitrary carrier generation, first configure the frequency value f of the intermediate frequency carrier to be generated through instruction input carrier to be 612 MHz; the equivalent carrier conversion module calculates the equivalent carrier frequency f based on the Nyquist sampling theorem and the equivalent carrier conversion formula equivalent ; the phase calibration unit formulates the phase values of each channel, and then performs dynamic phase compensation based on LFSR (Linear Feedback Shift Register), and finally generates a phase control word after dynamic compensation; finally, the multi-channel waveform generation module generates an equivalent carrier based on multi-channel parallel DDS. The working flow chart of the high-precision arbitrary carrier generation method based on FPGA and intermediate frequency DAC is as Figure 1 shown. For this embodiment, the architecture block diagram of using the generated equivalent carrier for intermediate frequency carrier modulation is as Figure 2 shown. Among them, the specific steps of the high-precision arbitrary carrier generation method are as follows.

[0071] Step 1: Calculate the equivalent carrier frequency. First, determine the equivalent carrier frequency value f equivalent . In the system parameters, the clock frequency f clock is selected as 150 MHz, and the total number of channels n is selected as 12, meeting the setting that the sampling rate f dac is 1.8 GHz. According to the equivalent carrier conversion formula: Calculate to get f equivalent to be 12 MHz. Therefore, the system adopts the method of synthesizing 12 channels of 12 MHz equivalent carriers to replace the direct generation of 612 MHz intermediate frequency carriers.

[0072] Subsequently, calculate the frequency control word Among them, the width N of the phase accumulator of the DDS is selected to be 32 bits, and the calculated FTW is 343597383.

[0073] Step 2: Dynamic phase compensation.

[0074] The dynamic phase compensation module first calibrates the phase values of 12 channels. The phase calibration unit determines the time interval between each sampling point according to the sampling rate of the DAC to ensure that after the multi-channel equivalent carriers are combined, the phase changes of each sampling point strictly match the discrete time step of the sampling. That is, at the same clock trigger edge, the sampling points after the combination of the 12-channel 12MHz equivalent carriers need to be the same as the sampling points of the DAC directly sampling the 612MHz intermediate frequency carrier. Based on the formula where is selected to be 0, and the phase values of 12 channels are calibrated to ensure continuous phase after synthesis.

[0075] Subsequently, according to the formula the phase control words of 12 channels are calculated.

[0076] In order to eliminate the periodic step error introduced by the DDS phase accumulator increasing with a fixed step, the present invention compensates for the calibrated phase control word through a pseudo-random phase perturbator. The pseudo-random phase perturbator is based on a 12-bit LFSR register and updates the calculation results 12 times at the same clock trigger edge to generate the perturbation values ΔPCW of 12 channels i . The feedback polynomial is selected as P(x) = x 12 +x 9 +x 4 +x 1 +1.

[0077] To avoid excessive perturbation affecting the signal quality, the phase compensator restricts the range of the perturbation value based on the following formula: ΔPCW i =(LFSR out mod(2·Δmax)) - Δmax, where Δmax is selected to be 1024.

[0078] Finally, according to PCW i ′ = PCW i +ΔPCW i the frequency control word PCW i ′ after the phase perturbation compensation of 12 channels is generated.

[0079] Step 3: Equivalent carrier generation and intermediate frequency modulation.

[0080] The equivalent carrier is generated according to the phase control word PCW iThe frequency control is as follows: after generating 12 12-MHz equivalent carriers in parallel based on a 12-channel DDS, multiplying them with service data to achieve intermediate-frequency carrier modulation, and then outputting through the DAC interface.

[0081] The schematic diagram of generating a 612-MHz carrier by the high-precision carrier generation method of the present invention is as Figure 3 shown. Taking channel 0 and channel 1 as examples at two adjacent clock trigger edges, the sampled values of the 12-MHz equivalent carriers generated are as follows:

[0082] Channel 0: The sampled values are 1.00 and 0.88, as Figure 3 (b) shown;

[0083] Channel 1: The sampled values are -0.54 and -0.88, as Figure 3 (c) shown

[0084] These sampled values are exactly the same as the 1st, 2nd, 13th, and 14th sampled values obtained by directly generating a 612-MHz carrier and sampling at a frequency of 1.8 GHz, as Figure 3 (d) shown.

[0085] The result analysis diagram of generating a 612-MHz carrier by the high-precision arbitrary carrier generation method of the present invention is as Figure 4 shown. As Figure 4 (a) shown, the time-domain waveform after combining the sampled values of the equivalent carriers of 12 channels. It can be seen from the figure that the overall waveform shows good smoothness and periodicity; performing spectral analysis on the combined waveform, as Figure 4 (b) shown, the maximum frequency point after Fourier transform is 612.000275 MHz, the absolute error relative to the target frequency of 612 MHz is 275 Hz, and the error ratio is about 0.45 ppm; as Figure 4 (c) shown, the spectrum near the carrier frequency point shows high purity. The main lobe energy is highly concentrated, and no obvious spurious components or noise interference appear in the introduced random perturbation.

[0086] Figure 5 This is the result comparison diagram of generating a 612-MHz carrier by the high-precision arbitrary carrier generation method based on FPGA and intermediate-frequency DAC in a preferred embodiment of the present invention. As Figure 5 shown, after adding phase perturbation to break the periodic error, compared with not adding phase perturbation, the energy superposition of multi-channel equivalent carriers is more sufficient during the synthesis process. Therefore, the spectral energy is more concentrated in the main lobe region, the sidelobe energy is suppressed, and the spectral purity is improved.

[0087] The preferred specific embodiments of the present invention have been described in detail above. It should be understood that those of ordinary skill in the art can make many modifications and variations based on the concept of the present invention without creative efforts. Therefore, all technical solutions that can be obtained by those skilled in the art in the technical field based on the concept of the present invention through logical analysis, reasoning or limited experiments on the basis of the prior art shall fall within the protection scope determined by the claims.

Claims

1. A high-precision arbitrary carrier generation method based on FPGA and intermediate frequency DAC, characterized in that, When the system needs to perform any carrier generation, first, the carrier frequency to be generated is configured through instruction input. The equivalent carrier conversion module calculates the equivalent carrier frequency based on the Nyquist sampling theorem and the equivalent carrier conversion formula. The phase calibration unit formulates the phase values of each channel, and then dynamic phase compensation is performed based on a linear feedback shift register to generate a phase control word after dynamic compensation. Finally, the multi-channel waveform generation module generates the equivalent carrier based on multi-channel parallel DDS.

2. The high-precision arbitrary carrier generation method based on FPGA and intermediate frequency DAC according to claim 1, characterized in that It includes an instruction receiving module, an equivalent carrier conversion module, a dynamic phase compensation module, and a multi-channel waveform generation module. Among them, the instruction receiving module is used to parse and obtain the carrier information to be generated; the equivalent carrier conversion module calculates the equivalent carrier frequency and the frequency control word according to the target carrier frequency; the dynamic phase compensation module converts and corrects the system phase error through a pseudo-random phase perturbation mechanism to generate a dynamic phase control word; the multi-channel waveform generation module generates an equivalent carrier waveform in a multi-channel parallel DDS manner based on the frequency control word and the dynamic phase control word.

3. The high-precision arbitrary carrier generation method based on FPGA and intermediate frequency DAC according to claim 2, wherein, The equivalent carrier conversion module includes an equivalent carrier conversion unit and a frequency control word generation unit. Among them, the equivalent carrier conversion unit converts the carrier frequency in the form of under-sampling according to the following formula based on the Nyquist sampling theorem according to the target carrier frequency to calculate and generate the equivalent carrier frequency: Among them, f carrier is the intermediate frequency carrier frequency to be generated, f equivalent is the equivalent carrier frequency, f clo is the FPGA working clock frequency, represents rounding down.

4. The high-precision arbitrary carrier generation method based on FPGA and intermediate-frequency DAC according to claim 3, characterized in that, The frequency control word generation unit generates the frequency control word required for DDS based on the equivalent carrier frequency using the following formula: Where N is the width of the phase accumulator in DDS.

5. The high-precision arbitrary carrier generation method based on FPGA and intermediate frequency DAC according to claim 2, characterized in that, The dynamic phase compensation module includes a phase calibration unit, a pseudo-random phase perturbator, and a phase compensator. Among them, the phase calibration unit ensures that after the multi-channel equivalent carriers are merged, the phase change of each sampling point strictly matches the discrete time step of sampling according to the time interval between each sampling point determined by the DAC sampling rate. The pseudo-random phase perturbator generates a pseudo-random perturbation amount based on the linear feedback shift register LFSR to add random perturbation to the phase control word, and then uses the phase compensator to generate the phase control word after perturbation.

6. The high-precision arbitrary carrier generation method based on FPGA and intermediate-frequency DAC according to claim 5, wherein, The phase of each channel's equivalent carrier is determined according to the following formula: Among them, θ i is the phase value of a certain channel, n is the total number of channels, f dac is the sampling rate, is the initial phase; And the phase control word required for DDS to generate the equivalent carrier is obtained based on the following formula: Where N is the bit width of the phase accumulator of the DDS, and PCW i is the phase control word corresponding to the i-th channel.

7. The high-precision arbitrary carrier generation method based on FPGA and intermediate-frequency DAC according to claim 5, wherein The pseudo-random phase scrambler generates a pseudo-random scrambling quantity ΔPCW based on a linear feedback shift register (LFSR). i It is used to add a random perturbation to the phase control word (PCW). i This can break the periodic stepping error caused by the phase accumulator in the direct digital synthesizer (DDS) increasing with a fixed step size. The perturbed phase control word PCW′ i is expressed as: PCW' i = PCW i + ΔPCW i To avoid excessive disturbance from affecting the signal quality, a function mapping is performed on the output sequence of the LFSR to ensure that ΔPCW i is within a reasonable range, and the function mapping relationship is as follows: ΔPCW i =(LFSR out mod(2·Δmax)) - Δmax Among them, LFSR out is the output value of the current LFSR register, and Δmax is the maximum value of the perturbation amount.

8. The high-precision arbitrary carrier generation method based on FPGA and intermediate frequency DAC according to claim 7, characterized in that, Through the function mapping relationship for pseudo-random perturbation, the single-channel error changes from periodicity to uniform distribution, and the errors of each channel are independent. Therefore, the error after equivalent carrier synthesis is expressed as: where n is the total number of channels, and σ i is the error of a certain channel, and σ equivalen is the synthesized error.

9. A high-precision arbitrary carrier generation method based on FPGA and intermediate frequency DAC according to claim 7, characterized in that, The multi-channel waveform generation module includes n parallel DDS units, and generates an equivalent carrier according to the frequency control word PCW' after dynamic phase compensation i and the frequency control word FTW.

10. A high-precision arbitrary carrier generation method based on FPGA and intermediate frequency DAC according to claim 1, characterized in that, According to the central limit theorem, perform the conversion of the equivalent carrier conversion module, and the error after synthesis is reduced to

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