MMC voltage balancing control method and device based on dynamic mean value of capacitor voltage

Abstract

An MMC input-stage voltage equalization control method and device based on the dynamic mean value of capacitor voltage includes the following steps: S1, real-time acquisition of the capacitor voltage, bridge arm current, and upper and lower tube drive signals of each submodule; S2, calculating the capacitor voltage deviation and voltage deviation threshold of the submodules in the same bridge arm based on the capacitor voltage and bridge arm current; S3, when the capacitor voltage deviation exceeds the voltage deviation threshold, swapping the submodule order and determining the switching sequence; S4, when the capacitor voltage deviation does not exceed the voltage deviation threshold, determining the submodule in the switched-on state; S5, calculating the dynamic mean value of the capacitor voltage change of the switched-on submodule, swapping the switched-on submodules in order, and determining the switching sequence; S6, calculating the number of submodules switched on in the upper and lower bridge arms in the current control cycle, and determining the set of submodules to be switched on in the upper and lower bridge arms. The present invention introduces an adaptive voltage deviation threshold and dynamic mean value as a sorting basis, thereby reducing the accumulation of capacitor voltage imbalance.

Description

Technical Field

[0001] The present invention belongs to the technical field of power transmission control and relates to capacitor voltage balancing control of a modular multilevel converter (MMC), and in particular to an MMC voltage balancing control method and device based on a dynamic mean value of capacitor voltage. Background Art

[0002] As the global energy structure transitions toward a low-carbon future, the integration of new energy sources, flexible direct current transmission (HVDC), and smart grid development are placing higher demands on the efficiency and reliability of power electronics. Modular multilevel converters, core components of power electronic transformers (PETs), directly impact system performance through capacitor voltage balancing.

[0003] Currently available voltage balancing control methods include: Patent No. CN115514248A provides a voltage balancing sorting method based on dynamic voltage limits. This method sets dynamic upper and lower limits to handle out-of-limit sub-modules and combines them with nearest level modulation to achieve switching control. However, there are problems such as frequent changes in switching frequency with current direction and large computational complexity caused by sorting all sub-modules; Chinese patent CN117526744A discloses a voltage balancing control method based on current threshold switching, which synergistically reduces the switching frequency through NLM modulation and dynamic voltage balancing threshold correction, but still has narrow pulses in the near-zero current region, and the fixed proportional coefficient easily causes the voltage fluctuation range to expand; in addition, Patent No. CN119628445A provides a switching strategy based on risk zone judgment, which reduces switching actions by prohibiting module rotation in the risk zone, but still relies on traditional bubble sorting in non-risk areas. When the voltage changes rapidly, there is a sorting lag, resulting in accumulated deviations.

[0004] In summary, although the existing voltage-balancing control method can maintain voltage balance through periodic sorting, it ignores the dynamic coupling relationship between the bridge arm current direction and the sub-module charge and discharge rate, resulting in frequent invalid switching actions and accumulated deviations; the existing method also does not consider the time-varying correlation between the voltage fluctuation rate and the current change rate, resulting in threshold switching rigidity, causing narrow pulses and the risk of excessive discreteness. Summary of the Invention

[0005] To address the shortcomings of the existing technology, the present invention addresses the problems of frequent invalid switching, accumulated voltage deviations, and rigid threshold switching in existing voltage-sharing control methods. By providing an MMC voltage-sharing control method and device based on the dynamic mean of capacitor voltage, this method implements sorting strategy switching by setting an adaptive voltage deviation threshold, thereby improving the flexibility and adaptability of submodule voltage control. Furthermore, by introducing the dynamic mean of the capacitor voltages of the same bridge arm submodule as a trigger condition for improved sorting, selective sorting is achieved, thereby reducing invalid switching.

[0006] The present invention adopts the following technical solution. On one hand, the present invention provides an MMC input stage voltage equalization control method based on the dynamic mean value of capacitor voltage, comprising the following steps:

[0007] S1, real-time acquisition of capacitor voltage, bridge arm current, and upper and lower tube drive signals of each submodule;

[0008] S2, calculating the capacitor voltage deviation of the submodules in the same bridge arm based on the capacitor voltage; determining the voltage deviation threshold of the submodules in the same bridge arm based on the bridge arm current;

[0009] S3, when the capacitor voltage deviation exceeds the voltage deviation threshold, the submodule order is swapped to determine the switching sequence;

[0010] S4, when the capacitor voltage deviation does not exceed the voltage deviation threshold, determining the submodule in the activation state;

[0011] S5: Determine the voltage change scenario of the activated submodules and calculate the dynamic mean of the capacitor voltage change based on the capacitor voltage of the activated submodules. Sequentially swap the activated submodules in the same bridge arm to determine the switching sequence.

[0012] S6, calculating the number of submodules put into operation in the upper and lower bridge arms in the current control cycle, and determining the submodule sets to be put into operation in the upper and lower bridge arms based on the switching sequence and the number of submodules put into operation in the upper and lower bridge arms.

[0013] Preferably, step S2 includes:

[0014] Step S2.1, calculating the maximum and minimum values ​​of the capacitor voltages of the submodules in the same bridge arm based on the number of submodules and the capacitor voltages in the same bridge arm, to obtain the capacitor voltage deviation;

[0015] Step S2.2: Calculate the voltage deviation threshold of the submodules in the same bridge arm based on the rated capacitor voltage of the submodule and the real-time acquired bridge arm current. The specific formula is:

[0016] ;

[0017] Where, for Voltage deviation threshold of the submodule in the same bridge arm at the same moment; is the baseline threshold, is the rated voltage of the capacitor of the submodule; for The instantaneous absolute value of the bridge arm current at time t; is the rated current of the bridge arm; is the weight coefficient of the per-unit current value; is the weight coefficient of the current change rate.

[0018] Preferably, step S3 includes:

[0019] On the same bridge arm, the submodule capacitor voltage sequence is: ; Starting from the first submodule, the capacitor voltages of the two adjacent submodules are compared in turn, that is, and :

[0020] In the upper arm, if , then swap the order of the two submodules until the adjacent submodules in the upper bridge arm do not meet Stop when , and get the switching sequence;

[0021] In the lower arm, if , then swap the order of the two submodules until all adjacent submodules in the lower bridge arm do not meet Stop when , and get the switching sequence;

[0022] in, Indicates the The capacitor voltage of each submodule, ; Indicates the number of submodules on the same bridge arm.

[0023] Preferably, step S4 includes:

[0024] Determine the status of the submodule based on the upper and lower tube drive signals of the submodule ; Calculate the measured port voltage based on the capacitor rated voltage and the submodule status:

[0025] ;

[0026] Where, Indicates the The status of each submodule: 1 means it is in use and 0 means it is removed;

[0027] Compare with the measured port voltage and capacitor rated voltage ,like , the submodule is in a valid input state; if it is inconsistent, the submodule is excluded.

[0028] Preferably, step S5 includes:

[0029] Step S5.1, determining the voltage change scenario of the submodule according to the direction of the bridge arm current;

[0030] Step S5.2: dynamically adjust the dynamic mean of the capacitor voltage change based on the voltage change scenario of the input submodule and the capacitor voltage;

[0031] Step S5.3: In the same bridge arm, the switched-in submodules are sequentially exchanged according to the dynamic average value of the capacitor voltage of the switched-in submodule to determine the switching sequence.

[0032] Preferably, the specific formula of the dynamic mean in step S5.2 is:

[0033] During charging:

[0034] ;

[0035] During the discharge process:

[0036] ;

[0037] Where, The submodule to be put into operation in the previous control cycle The capacitor voltage; The submodule that is in the input state at the beginning of the control cycle The capacitor voltage; The number of submodules put into operation for the last control cycle.

[0038] Preferably, step S5.3 includes:

[0039] Compare the capacitor voltages of adjacent input submodules in the upper and lower bridge arms respectively, that is, and and :

[0040] For the upper arm, if , then swap the positions of the two input submodules; until the capacitor voltages of the adjacent input submodules do not meet the swap condition, the switching sequence is obtained;

[0041] For the lower arm, if , then swap the positions of the two input submodules; until the capacitor voltages of the adjacent input submodules do not meet the swap condition, the switching sequence is obtained.

[0042] Preferably, the specific calculation process of the number of submodules put into use in the upper and lower bridge arms in the current control cycle in step S6 is:

[0043] Generate a modulation wave based on the control target of the MMC power electronic transformer and calculate the number of upper and lower bridge arm submodules put into operation at any time in the current control cycle:

[0044] ;

[0045] ;

[0046] Where, and are the number of submodules in the upper and lower bridge arms that are in operation at any time; is the rounding function; for The instantaneous value of the modulated wave at a moment; is the rated voltage value of the capacitor; the number of upper and lower bridge arm input submodules at each moment changes with the change of the instantaneous value of the sinusoidal modulation wave. The total number of upper and lower bridge arm input submodules at any moment is N The number of submodules put into the upper bridge arm is equal to the number of submodules removed from the lower bridge arm.

[0047] Preferably, the specific process of determining the set of submodules to be put into operation in the upper and lower bridge arms in step S6 is:

[0048] In the upper arm, according to the switching sequence, select the one with the lowest voltage value. The sub-modules are used as the upper bridge arm sub-modules to be put into use, and the upper bridge arm sub-module set is obtained. ;

[0049] In the lower bridge arm, according to the switching sequence, select the one with the highest voltage value The sub-modules are used as the lower bridge arm sub-modules to be put into use, and the lower bridge arm sub-module set is obtained. .

[0050] Another aspect of the present invention provides an MMC input stage voltage equalization control device based on a dynamic mean value of capacitor voltage, comprising:

[0051] The data acquisition module collects the capacitor voltage, bridge arm current, and upper and lower tube drive signals of each submodule in real time;

[0052] The deviation threshold calculation module calculates the capacitor voltage deviation of the submodules in the same bridge arm based on the capacitor voltage; and determines the voltage deviation threshold of the submodules in the same bridge arm based on the bridge arm current;

[0053] Full sequencing module, when the capacitor voltage deviation exceeds the voltage deviation threshold, the submodule order is swapped to determine the switching sequence;

[0054] An input state confirmation module, which determines the submodule in the input state when the capacitor voltage deviation does not exceed the voltage deviation threshold;

[0055] Improve the sorting module to determine the voltage change scenarios of the activated submodules and calculate the dynamic mean of the capacitor voltage changes based on the capacitor voltage of the activated submodules. Sequentially swap the activated submodules in the same bridge arm to determine the switching sequence.

[0056] The input status update module calculates the number of sub-modules put into operation in the upper and lower bridge arms in the current control cycle, and determines the set of sub-modules to be put into operation in the upper and lower bridge arms based on the switching sequence and the number of sub-modules put into operation in the upper and lower bridge arms.

[0057] Compared with the prior art, the beneficial effects of the present invention include at least:

[0058] 1. This invention provides an adaptive voltage deviation threshold to construct a dynamic balancing interval. By comparing the capacitor voltage deviation of the same bridge arm submodule with a preset voltage deviation threshold, the sorting strategy is switched, thereby improving the flexibility and adaptability of the submodule voltage control. This method stabilizes the voltage fluctuation rate within 5%.

[0059] 2. This invention provides a method for calculating the dynamic mean of capacitor voltages in real time based on the direction of bridge arm current, using this mean as the trigger threshold for sorting. During the charging phase, the mean of the voltage increments of modules to be put into operation is calculated, while during the discharging phase, the mean of the voltage decays of already put modules into operation is calculated. This mechanism optimizes traditional full-cycle sorting into a selective triggering mechanism, and simulations have shown that it can reduce ineffective switching operations by 21%.

[0060] 3. The present invention accurately identifies the actual input module and eliminates the virtual connection fault module through dual verification of the driving signal and the measured voltage. Experimental data shows that this mechanism can reduce the amount of invalid sorting data and avoid the problem of voltage deviation expansion caused by misjudgment. BRIEF DESCRIPTION OF THE DRAWINGS

[0061] Figure 1 The topological structure diagram of the MMC type PET provided by the present invention;

[0062] Figure 2 The MMC submodule structure diagram provided by the present invention;

[0063] Figure 3 Flowchart of the MMC voltage balancing control method based on the dynamic mean value of capacitor voltage provided by the present invention;

[0064] Figure 4 A flow chart of the voltage balancing strategy based on the dynamic mean value of capacitor voltage provided by the present invention;

[0065] Figure 5 A comparison chart of the average switching frequencies of different submodules provided by the present invention;

[0066] Figure 6 This is the submodule capacitor voltage waveform diagram under the traditional strategy provided by the present invention;

[0067] Figure 7 This is the submodule capacitor voltage waveform diagram under the improved strategy provided by the present invention;

[0068] Figure 8 This is a waveform diagram of the DC bus voltage under the improved strategy provided by the present invention. DETAILED DESCRIPTION

[0069] To make the objectives, technical solutions, and advantages of the present invention more clear, the technical solutions of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. The embodiments described in this application are only part of the embodiments of the present invention, not all of them. Based on the spirit of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0070] The voltage balancing control method and voltage balancing control device provided by the present invention can be applied to MMC type power electronic transformer (PET). Figure 1 As shown in Figure 2, in the MMC-type PET topology, the input-stage MMC submodule SM adopts a half-bridge topology. During normal operation, the switching states of the two fully controlled devices in each submodule complement each other. When the upper switch is on and the lower switch is off, the submodule is in the active state; when the upper switch is off and the lower switch is on, the submodule is in the deactivated state. Without considering redundancy, the total number of submodules in the upper and lower bridge arms of each phase unit that are active at any given time is N.

[0071] Specifically, the switching state of the switch tube is controlled by the modulation signal. Under different switching state combinations of the upper and lower switch tubes, the working state of the submodule includes: on, off and locked. The submodule port voltage Can be and 0. Figure 2 The reference direction of the submodule port input current is: positive when the input voltage is positive, and negative when it is negative. Therefore, based on the submodule's operating state and the direction of the submodule port current, the submodule has six operating modes, as shown in Table 1.

[0072] Table 1 Six working modes of submodules

[0073]

[0074] When the MMC is operating normally, the submodule switches between the two states of input and removal. When T1 is turned on and T2 is turned off, the submodule port voltage , the submodule is in the input state; when When , the submodule capacitor absorbs power to charge, and the submodule capacitor voltage rises; when When T1 is turned off and T2 is turned on, the submodule port voltage is , the submodule is in the cut-off state, the submodule capacitor is bypassed, the capacitor voltage remains unchanged, and the submodule is equivalent to not being connected to the bridge arm. When the MMC is not working properly, T1 and T2 are both turned off, and the submodule is in the locked state. This state is used to charge the submodule capacitor at startup (i.e. ) or bypass the submodule capacitor when a fault occurs (i.e. ).

[0075] The technical solution of the present invention is described below through specific embodiments 1 and 2 and the accompanying drawings.

[0076] Example 1

[0077] Embodiment 1 of the present invention discloses a method for controlling the voltage equalization of an MMC input stage based on the dynamic mean value of the capacitor voltage; Figure 3 , the specific steps include:

[0078] S1 collects the capacitor voltage, bridge arm current, and upper and lower tube drive signals of each submodule in real time.

[0079] In this example, an MMC-type PET overall simulation model for a 10kV distribution network is built in Matlab Simulink 2023a to perform real-time data acquisition. The specific acquisition process includes:

[0080] Specifically, a voltage divider circuit is installed at both ends of the capacitor of each submodule to convert the collected high-voltage signal into a low-voltage signal at a fixed ratio for subsequent processing. A low-pass filter is used to filter out high-frequency noise and retain the effective voltage fluctuation information of the low-voltage signal. Finally, the collected voltage signals of all submodules are converted into voltage values ​​through analog-to-digital conversion to obtain the capacitor voltage of each submodule, ensuring real-time data.

[0081] A current detection module is connected in series in the bridge arm loop of each submodule to collect the magnitude and direction of the bridge arm current in real time.

[0082] S2, calculating the capacitor voltage deviation of the submodules in the same bridge arm according to the capacitor voltage of the submodule; and determining the voltage deviation threshold of the submodules in the same bridge arm based on the bridge arm current of the submodule.

[0083] Furthermore, step S2 includes:

[0084] Step S2.1: Determine the maximum and minimum values ​​of the capacitor voltage of the submodules in the same bridge arm based on the number of submodules and the capacitor voltage in the same bridge arm, and calculate the capacitor voltage deviation; the specific calculation formula is:

[0085] ;

[0086] ;

[0087] ;

[0088] Where, Indicates the capacitor voltage deviation; and Indicates the maximum and minimum values ​​of the submodule capacitor voltage in the same bridge arm; Indicates the first Capacitor voltage of the submodule; Indicates the number of submodules in the same bridge arm.

[0089] Step S2.2: Calculate the voltage deviation threshold of the submodules in the same bridge arm based on the rated capacitor voltage of the submodule and the real-time acquired bridge arm current. The specific formula is:

[0090] ;

[0091] Where, for Voltage deviation threshold of the submodule in the same bridge arm at the same moment; is the baseline threshold, is the rated voltage of the submodule capacitor, Usually 0.2; for The instantaneous absolute value of the bridge arm current at time t; is the rated current of the bridge arm; is the weight coefficient of the per-unit current value, and 0.1≤ ≤0.3; is the weight coefficient of the current change rate, and 0.05≤ ≤0.15; is the absolute value of the rate of change of the bridge arm current.

[0092] Specifically, when near When the threshold is automatically raised to , allowing a larger voltage deviation to reduce the switching frequency; when When it is low, the threshold value returns to the reference value to maintain high-precision balance control. When the threshold is increased instantaneously, it approaches 0 during steady-state operation to avoid excessive relaxation of the threshold.

[0093] S3, see Figure 4 The flow chart of the voltage balancing strategy based on the dynamic average value of the capacitor voltage is shown. On the same bridge arm, when the capacitor voltage deviation exceeds the voltage deviation threshold, the order of the submodules is exchanged to determine the switching sequence.

[0094] Furthermore, step S3 includes:

[0095] On the same bridge arm, the submodule capacitor voltage sequence is: ; Starting from the first submodule, the capacitor voltages of the two adjacent submodules are compared in turn, that is, and :

[0096] In the upper arm, if , then swap the order of the two submodules until the adjacent submodules in the upper bridge arm do not meet Stop when , and get the switching sequence;

[0097] In the lower arm, if , then swap the order of the two submodules until all adjacent submodules in the lower bridge arm do not meet Stop when , and get the switching sequence;

[0098] in, Indicates the The capacitor voltage of each submodule, ; Indicates the number of submodules on the same bridge arm.

[0099] S4, see Figure 4 The flow chart of the voltage balancing strategy based on the dynamic average value of the capacitor voltage is shown. On the same bridge arm, when the capacitor voltage deviation does not exceed the voltage deviation threshold, the submodule in the active state is determined based on the upper and lower tube drive signals of each submodule;

[0100] The state of the submodule is determined according to the upper and lower tube drive signals of the submodule; the specific formula is expressed as:

[0101] ;

[0102] Where, Indicates the The status of each submodule: 1 means it is in use and 0 means it is removed; and Respectively The upper and lower tube driving signals of each sub-module; Indicates that both conditions are met at the same time;

[0103] Calculate the measured port voltage based on the capacitor rated voltage and the submodule status:

[0104] ;

[0105] Compare Measured port voltage of each submodule and capacitor rated voltage , verify the authenticity of the input state; if , the submodule is in a valid input state; if it is inconsistent, the submodule is excluded.

[0106] S5, determining the voltage change scenario of the sub-module being put into operation, and calculating the dynamic mean of the capacitor voltage change in combination with the capacitor voltage of the sub-module being put into operation; sequentially exchanging the sub-modules being put into operation to determine the switching sequence.

[0107] Furthermore, step S5 includes:

[0108] Step S5.1: Determine the voltage change scenario of the submodule according to the direction of the bridge arm current. The specific process is as follows:

[0109] When the bridge arm current direction is positive and When the submodule is in the charging scenario, the capacitor voltage of the submodule in the on-state increases, while the capacitor voltage of the submodule in the off-state remains unchanged;

[0110] When the bridge arm current direction is negative and When the submodule is in the discharge scenario, the capacitor voltage of the submodule in the on-state decreases, and the capacitor voltage of the submodule in the off-state remains unchanged;

[0111] When the bridge arm current is zero or close to zero, When , the submodule is in a steady-state maintenance scenario, and the capacitor voltages of all submodules remain unchanged at the current value.

[0112] Step S5.2: Based on the voltage change scenario of the submodule and the capacitor voltage, the dynamic mean value of the capacitor voltage change is dynamically adjusted. The specific formula is:

[0113] During charging:

[0114] ;

[0115] During the discharge process:

[0116] ;

[0117] Where, The submodule to be put into operation in the previous control cycle The capacitor voltage; The submodule that is in the input state at the beginning of the control cycle The capacitor voltage; The number of submodules put into operation for the last control cycle.

[0118] Step S5.3: In the same bridge arm, the submodules are sequentially swapped based on the dynamic mean of the capacitor voltages of the submodules to determine the switching sequence. The specific process is as follows:

[0119] Compare the capacitor voltages of adjacent input submodules in the upper and lower bridge arms respectively, that is, and and :

[0120] For the upper arm, if , then swap the positions of the two input submodules; until the capacitor voltages of the adjacent input submodules do not meet the swap condition, the switching sequence is obtained;

[0121] For the lower arm, if , then swap the positions of the two input submodules; until the capacitor voltages of the adjacent input submodules do not meet the swap condition, the switching sequence is obtained.

[0122] In this embodiment, only the submodules in the same bridge arm that are in the active state and not in the stable maintenance scenario are sorted. For example, the capacitor voltage sequence of the submodules in a bridge arm is , of which only 、 and If the corresponding sub-modules are in the investment state and are not in the stable maintenance scenario, then only these three sub-modules need to be sorted, and the positions of other sub-modules remain unchanged.

[0123] S6, calculating the number of submodules put into operation in the upper and lower bridge arms in the current control cycle, and determining the submodule sets to be put into operation in the upper and lower bridge arms based on the switching sequence and the number of submodules put into operation in the upper and lower bridge arms.

[0124] Furthermore, step S6 includes:

[0125] Step S6.1: Generate a modulation wave according to the control target of the MMC power electronic transformer and calculate the number of upper and lower bridge arm submodules put into operation at any time in the current control cycle:

[0126] ;

[0127] ;

[0128] Where, and are the number of submodules in the upper and lower bridge arms that are in operation at any time; is the rounding function; for The instantaneous value of the modulated wave at a moment; is the rated voltage value of the capacitor; the number of upper and lower bridge arm input submodules at each moment changes with the change of the instantaneous value of the sinusoidal modulation wave. The total number of upper and lower bridge arm input submodules at any moment is N The number of submodules put into the upper bridge arm is equal to the number of submodules removed from the lower bridge arm.

[0129] Step S6.2, respectively determine the submodule sets to be put into operation on the upper and lower bridge arms; the specific process is as follows:

[0130] In the upper arm, according to the switching sequence, select the one with the lowest voltage value. The sub-modules are used as the upper bridge arm sub-modules to be put into use, and the upper bridge arm sub-module set is obtained. ;

[0131] In the lower bridge arm, according to the switching sequence, select the one with the highest voltage value The sub-modules are used as the lower bridge arm sub-modules to be put into use, and the lower bridge arm sub-module set is obtained. .

[0132] Further, The submodule in generates a high-level driving signal; The sub-module in the circuit generates a low-level drive signal; all drive signals are transmitted to the IGBT driver of the sub-module, and the pulse width is synchronized with the modulation period, thereby ensuring that the IGBT of the sub-module operates accurately according to the desired switching state.

[0133] This example builds a comprehensive simulation model of an MMC-type PET for a 10kV distribution network in the Matlab Simulink environment. The input-stage MMC simulation system uses dual closed-loop control, with an AC input of 10kV, a DC bus voltage of 5kV, 10 submodules per bridge arm, a submodule capacitor voltage of 0.5kV, a half-bridge structure, and 2mF capacitance. The bridge arm inductance is 20mH.

[0134] The traditional voltage balancing control strategy and the improved voltage balancing strategy based on the dynamic mean value of capacitor voltage are simulated respectively, and the simulation results under the two strategies are compared and analyzed. Figure 5 The figure plots the relationship between the maximum allowable voltage deviation and the average switching frequency of the submodules when using the improved voltage balancing strategy. It can be seen that as increases, the switching frequency decreases significantly. Considering that excessive can lead to excessive deviations between capacitor voltages, in actual engineering applications, the value can be set as needed to achieve both reduced switching frequency and better capacitor voltage balancing. As the maximum allowable voltage deviation increases, the switching frequency decreases significantly. When the maximum allowable voltage deviation is set to 2% of the capacitor's rated voltage, or 10V, the average switching frequency of the submodules is reduced by 21%.

[0135] According to the attached Figure 5 The maximum allowable voltage deviation is set to 10V, and the comparison of the submodule capacitor voltage is as follows: Figure 6 Figure 7As shown in Figure 2, waveform measurements revealed that under the traditional strategy, the maximum deviation of the submodule capacitor voltage from the reference value was approximately 15V, and the maximum deviation between submodule capacitor voltages was approximately 6V. Under the improved strategy, the maximum deviation of the submodule capacitor voltage from the reference value was approximately 24V, and the maximum deviation between the capacitor voltages of the ten submodules was 10V. The capacitor voltage fluctuation rate and dispersion under the two strategies were calculated using the following formulas:

[0136] ;

[0137] ;

[0138] Where, for Moment The capacitor voltage of each submodule, is the rated capacitor voltage.

[0139] As shown in Table 2, compared with the traditional voltage balancing strategy, the capacitor voltage fluctuation rate of the improved voltage balancing strategy is 4.58%, and the capacitor voltage dispersion is 2.00%. When set to 2% of the rated capacitor voltage, that is, 10V, the balance between the capacitor voltages has been significantly distorted. However, the MMC capacitor voltage fluctuation rate is still within the 5% range allowed by the project.

[0140] Table 2 Capacitor voltage fluctuation rate and dispersion under two strategies

[0141]

[0142] The comparison of output DC bus voltage under the two strategies is as follows: Figure 8 As shown in the figure, it shows that the improved strategy can also ensure the stable output of DC bus voltage.

[0143] Example 2

[0144] This embodiment provides an MMC input stage voltage balancing control device based on a dynamic mean value of capacitor voltage, including:

[0145] The data acquisition module collects the capacitor voltage, bridge arm current, and upper and lower tube drive signals of each submodule in real time;

[0146] The deviation threshold calculation module calculates the capacitor voltage deviation of the submodules in the same bridge arm based on the capacitor voltage; and determines the voltage deviation threshold of the submodules in the same bridge arm based on the bridge arm current;

[0147] Full sequencing module, when the capacitor voltage deviation exceeds the voltage deviation threshold, the submodule order is swapped to determine the switching sequence;

[0148] An input state confirmation module, which determines the submodule in the input state when the capacitor voltage deviation does not exceed the voltage deviation threshold;

[0149] Improve the sorting module to determine the voltage change scenarios of the activated submodules and calculate the dynamic mean of the capacitor voltage changes based on the capacitor voltage of the activated submodules. Sequentially swap the activated submodules in the same bridge arm to determine the switching sequence.

[0150] The input status update module calculates the number of sub-modules put into operation in the upper and lower bridge arms in the current control cycle, and determines the set of sub-modules to be put into operation in the upper and lower bridge arms based on the switching sequence and the number of sub-modules put into operation in the upper and lower bridge arms.

[0151] Compared with the prior art, the beneficial effects of the present invention include at least:

[0152] 1. This invention provides an adaptive voltage deviation threshold to construct a dynamic balancing interval. By comparing the capacitor voltage deviation of the same bridge arm submodule with a preset voltage deviation threshold, the sorting strategy is switched, thereby improving the flexibility and adaptability of the submodule voltage control. This method stabilizes the voltage fluctuation rate within 5%.

[0153] 2. This invention provides a method for calculating the dynamic mean of capacitor voltages in real time based on the direction of bridge arm current, using this mean as the trigger threshold for sorting. During the charging phase, the mean of the voltage increments of modules to be put into operation is calculated, while during the discharging phase, the mean of the voltage decays of already put modules into operation is calculated. This mechanism optimizes traditional full-cycle sorting into a selective triggering mechanism, and simulations have shown that it can reduce ineffective switching operations by 21%.

[0154] 3. The present invention accurately identifies the actual input module and eliminates the virtual connection fault module through dual verification of the driving signal and the measured voltage. Experimental data shows that this mechanism can reduce the amount of invalid sorting data and avoid the problem of voltage deviation expansion caused by misjudgment.

[0155] The present disclosure may be a system, method and / or computer program product. The computer program product may include a computer-readable storage medium carrying computer-readable program instructions for causing a processor to implement various aspects of the present disclosure.

[0156] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention rather than to limit it. Although the present invention has been described in detail with reference to the above embodiments, ordinary technicians in the field should understand that the specific implementation methods of the present invention can still be modified or replaced by equivalents. Any modification or equivalent replacement that does not depart from the spirit and scope of the present invention should be covered by the scope of protection of the claims of the present invention.

Claims

1. An MMC input stage voltage equalization control method based on the dynamic mean value of capacitor voltage is characterized in that: The following steps are involved: S1, real-time acquisition of capacitor voltage, bridge arm current, and upper and lower tube drive signals of each submodule; S2, calculating the capacitor voltage deviation of the submodules in the same bridge arm based on the capacitor voltage; determining the voltage deviation threshold of the submodules in the same bridge arm based on the bridge arm current; S3, when the capacitor voltage deviation exceeds the voltage deviation threshold, the submodule order is swapped to determine the switching sequence; S4, when the capacitor voltage deviation does not exceed the voltage deviation threshold, determining the submodule in the activation state; S5: Determine the voltage change scenario of the activated submodules and calculate the dynamic mean of the capacitor voltage change based on the capacitor voltage of the activated submodules. Sequentially swap the activated submodules in the same bridge arm to determine the switching sequence. S6, calculating the number of submodules put into operation in the upper and lower bridge arms in the current control cycle, and determining the submodule sets to be put into operation in the upper and lower bridge arms based on the switching sequence and the number of submodules put into operation in the upper and lower bridge arms.

2. The MMC input stage voltage balancing control method based on capacitor voltage dynamic mean according to claim 1, characterized in that: Step S2 includes: Step S2.1, calculating the maximum and minimum values ​​of the capacitor voltages of the submodules in the same bridge arm based on the number of submodules and the capacitor voltages in the same bridge arm, to obtain the capacitor voltage deviation; Step S2.2: Calculate the voltage deviation threshold of the submodules in the same bridge arm based on the rated capacitor voltage of the submodule and the real-time acquired bridge arm current. The specific formula is: ； Where, for Voltage deviation threshold of the submodule in the same bridge arm at the same moment; is the baseline threshold, is the rated voltage of the capacitor of the submodule; for The instantaneous absolute value of the bridge arm current at time t; is the rated current of the bridge arm; is the weight coefficient of the per-unit current value; is the weight coefficient of the current change rate.

3. The MMC input stage voltage balancing control method based on capacitor voltage dynamic mean according to claim 1, characterized in that: Step S3 includes: On the same bridge arm, the submodule capacitor voltage sequence is: ; Starting from the first submodule, the capacitor voltages of the two adjacent submodules are compared in turn, that is, and : In the upper arm, if , then swap the order of the two submodules until the adjacent submodules in the upper bridge arm do not meet Stop when , and get the switching sequence; In the lower arm, if , then swap the order of the two submodules until all adjacent submodules in the lower bridge arm do not meet Stop when , and get the switching sequence; in, Indicates the The capacitor voltage of each submodule, ; Indicates the number of submodules on the same bridge arm.

4. The MMC input stage voltage balancing control method based on capacitor voltage dynamic mean according to claim 1, characterized in that: Step S4 includes: Determine the status of the submodule based on the upper and lower tube drive signals of the submodule ; Calculate the measured port voltage based on the capacitor rated voltage and the submodule status: ； Where, Indicates the The status of each submodule: 1 means it is in use and 0 means it is removed; Compare with the measured port voltage and capacitor rated voltage ,like , the submodule is in a valid input state; if it is inconsistent, the submodule is excluded.

5. The MMC input stage voltage balancing control method based on capacitor voltage dynamic mean according to claim 1, characterized in that: Step S5 includes: Step S5.1, determining the voltage change scenario of the submodule according to the direction of the bridge arm current; Step S5.2: dynamically adjust the dynamic mean of the capacitor voltage change based on the voltage change scenario of the input submodule and the capacitor voltage; Step S5.3: In the same bridge arm, the switched-in submodules are sequentially exchanged according to the dynamic average value of the capacitor voltage of the switched-in submodule to determine the switching sequence.

6. The MMC input stage voltage balancing control method based on capacitor voltage dynamic mean according to claim 5, characterized in that: The specific formula for the dynamic mean in step S5.2 is: During charging: ； During the discharge process: ； Where, The submodule to be put into operation in the previous control cycle The capacitor voltage; The submodule that is in the input state at the beginning of the control cycle The capacitor voltage; The number of submodules put into operation for the last control cycle.

7. The MMC input stage voltage balancing control method based on capacitor voltage dynamic mean according to claim 5, characterized in that: Step S5.3 includes: Compare the capacitor voltages of adjacent input submodules in the upper and lower bridge arms respectively, that is, and and : For the upper arm, if , then swap the positions of the two input submodules; until the capacitor voltages of the adjacent input submodules do not meet the swap condition, the switching sequence is obtained; For the lower arm, if , then swap the positions of the two input submodules; until the capacitor voltages of the adjacent input submodules do not meet the swap condition, the switching sequence is obtained.

8. The MMC input stage voltage balancing control method based on capacitor voltage dynamic mean according to claim 1, characterized in that: The specific calculation process of the number of submodules put into use in the upper and lower bridge arms in the current control cycle in step S6 is: Generate a modulation wave based on the control target of the MMC power electronic transformer and calculate the number of upper and lower bridge arm submodules put into operation at any time in the current control cycle: ； ； Where, and are the number of submodules in the upper and lower bridge arms that are in operation at any time; is the rounding function; for The instantaneous value of the modulated wave at a moment; is the rated voltage value of the capacitor; At each moment, the number of upper and lower bridge arm input submodules changes with the change of the instantaneous value of the sinusoidal modulation wave. The total number of upper and lower bridge arm input submodules at any moment is N The number of submodules put into the upper bridge arm is equal to the number of submodules removed from the lower bridge arm.

9. The MMC input stage voltage balancing control method based on capacitor voltage dynamic mean according to claim 1, characterized in that: The specific process of determining the upper and lower bridge arm submodule sets to be put into operation in step S6 is as follows: In the upper arm, according to the switching sequence, select the one with the lowest voltage value. The sub-modules are used as the upper bridge arm sub-modules to be put into use, and the upper bridge arm sub-module set is obtained. ; In the lower bridge arm, according to the switching sequence, select the one with the highest voltage value The sub-modules are used as the lower bridge arm sub-modules to be put into use, and the lower bridge arm sub-module set is obtained. .

10. An MMC input stage voltage balancing control device based on the dynamic mean value of capacitor voltage, executing the MMC input stage voltage balancing control method based on the dynamic mean value of capacitor voltage according to any one of claims 1 to 9, characterized in that: include: The data acquisition module collects the capacitor voltage, bridge arm current, and upper and lower tube drive signals of each submodule in real time; The deviation threshold calculation module calculates the capacitor voltage deviation of the submodules in the same bridge arm according to the capacitor voltage; Based on the bridge arm current, determine the voltage deviation threshold of the submodule in the same bridge arm; Full sequencing module, when the capacitor voltage deviation exceeds the voltage deviation threshold, the submodule order is swapped to determine the switching sequence; An input state confirmation module, which determines the submodule in the input state when the capacitor voltage deviation does not exceed the voltage deviation threshold; Improve the sorting module to determine the voltage change scenarios of the activated submodules and calculate the dynamic mean of the capacitor voltage changes based on the capacitor voltage of the activated submodules. Sequentially swap the activated submodules in the same bridge arm to determine the switching sequence. The input status update module calculates the number of sub-modules put into operation in the upper and lower bridge arms in the current control cycle, and determines the set of sub-modules to be put into operation in the upper and lower bridge arms based on the switching sequence and the number of sub-modules put into operation in the upper and lower bridge arms.

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