Image data transmission method and device, computer equipment, storage medium and computer program product
The image data transmission method improves real-time performance by eliminating redundant interactions and intermediate steps in the data transmission process, ensuring seamless pipeline operation and efficient data processing.
Patent Information
- Application Number
- CN202510536480.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-27
- Publication Date
- 2025-07-15
AI Technical Summary
The existing image data transmission methods have process redundancy, resulting in poor real-time data transmission.
In the image data transmission system, the processing side stores the image data in a predefined memory area and generates an interrupt signal, and the driver side reads and transmits it to the upper computer, avoiding redundant interaction between the processing side and the driver side, and using DMA mapping to achieve direct data interaction, bypassing the frequent intervention of the CPU, forming a seamless pipeline operation.
It shortens data transmission delay, improves transmission efficiency and robustness, and ensures that scenarios such as semiconductor detection and other timeliness can obtain the latest image data in real time.
Smart Images

Figure CN120321357A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the technical field of image data processing, and in particular to an image data transmission method, apparatus, computer device, storage medium, and computer program product. Background Art
[0002] In modern computer systems, the efficiency of data transmission directly affects the overall performance of the system. In the fields of semiconductors and image processing, high-speed image transmission technology is the key to realizing real-time image acquisition, processing, and display. Especially in fields involving high-speed data processing, such as real-time video processing and big data analysis, how to efficiently transmit data between the host and FPGA has become a key issue. In the field of semiconductor electron microscopy, image transmission technology is a crucial link to ensure the real-time and accurate transmission of high-resolution images. With the continuous progress of semiconductor manufacturing processes, the device size has gradually shrunk to the nanometer level, posing higher requirements for the resolution and accuracy of microscopic imaging. Electron microscopes (such as transmission electron microscopes TEM and scanning electron microscopes SEM) generate high-resolution images by the interaction of electron beams with samples. However, the amount of these image data is huge, and traditional wired transmission methods have limitations in terms of bandwidth and latency, making it difficult to meet the requirements of real-time processing and remote control.
[0003] In related technologies, with the development of high-speed network technology and image compression algorithms, image transmission technology has been significantly improved. For example, high-speed transmission systems based on optical fibers can achieve large-bandwidth and low-latency data transmission, while advanced image compression technologies (such as JPEG2000, HEVC) effectively reduce the amount of data while maintaining image quality. In addition, the introduction of wireless transmission technologies (such as 5G) further expands the application scenarios of remote microscopic imaging, enabling researchers to obtain and analyze microscopic images at a distance in real time. The combination of these technologies not only improves the efficiency and reliability of image transmission but also provides strong support for real-time monitoring and defect analysis in the semiconductor manufacturing process.
[0004] However, the current image data transmission methods have the following technical problems:
[0005] The current image data transmission methods have the problem of process redundancy, resulting in poor real-time performance of data transmission. Summary of the Invention
[0006] Based on this, it is necessary to provide an image data transmission method, apparatus, computer device, computer-readable storage medium, and computer program product that can improve the transmission efficiency of image data, improve real-time performance, and enhance robustness in view of the above technical problems.
[0007] In a first aspect, the present application provides an image data transmission method. The method is implemented based on an image data transmission system, which includes a driving side and a processing side. The method includes:
[0008] In response to the processing side obtaining the image data to be processed, storing the image data in a predefined memory area;
[0009] In response to the completion of the storage of the image data, the processing side generates an interrupt signal and sends it to the driving side;
[0010] In response to the driving side obtaining the interrupt signal, reading the image data from the memory area;
[0011] The driving side transmits the obtained image data to the host computer to implement the processing of the image data.
[0012] In one embodiment, the step of in response to the completion of the storage of the image data, the processing side generates an interrupt signal and sends it to the driving side includes:
[0013] Obtaining the image data, and based on the association relationship between the image data and the images, determining the target image data associated with the same target image;
[0014] When all of any one of the target image data is stored in the memory area, generating the interrupt signal.
[0015] In one embodiment, before the step of in response to the processing side obtaining the image data to be processed and storing the image data in a predefined memory area, the method further includes:
[0016] The processing side performs a check on the image data;
[0017] If the image data is abnormal, generating abnormal information and storing the abnormal information in a predefined status memory.
[0018] In one embodiment, the method includes:
[0019] The driving side generates definition information and sends it to the processing side;
[0020] The processing side defines the memory area in the memory based on the definition information and the mapping relationship between the processing side and the memory.
[0021] In one embodiment, before the step of the driving side transmitting the obtained image data to the host computer to implement the processing of the image data, the method further includes:
[0022] Obtain the data requirements of the application layer and filter the image data;
[0023] The driving side transmits the filtered image data to the host computer.
[0024] In one embodiment, the method further includes:
[0025] In response to the host computer issuing a scanning instruction, the driving side registers an asynchronous processing function based on a preset processing flow;
[0026] The processing side processes the image data based on an asynchronous communication method, and triggers the callback execution of the asynchronous processing function in response to the completion of the transmission of the image data, so that the host computer determines that the transmission of the image data is completed.
[0027] In a second aspect, the present application also provides an image data transmission device. The device includes:
[0028] A data storage module, configured to store the image data in a predefined memory area in response to the processing side obtaining the image data to be processed;
[0029] An interrupt signal module, configured to generate an interrupt signal and send it to the driving side in response to the completion of the storage of the image data by the processing side;
[0030] A data reading module, configured to read the image data from the memory area in response to the driving side obtaining the interrupt signal;
[0031] A data processing module, configured to transmit the obtained image data by the driving side to the host computer to implement the processing of the image data.
[0032] In one embodiment, the interrupt signal module includes:
[0033] A picture data module, configured to obtain the image data and determine target image data associated with the same target image based on the association relationship between the image data and the image;
[0034] An interrupt generation module, configured to generate the interrupt signal when all of the target image data is stored in the memory area.
[0035] In one embodiment, before the data storage module, there is further:
[0036] A data verification module, configured to verify the image data by the processing side;
[0037] An exception response module, configured to generate exception information and store the exception information in a predefined status memory if the image data is abnormal.
[0038] In one embodiment, the device includes:
[0039] A definition information module, configured to generate definition information on the driving side and send it to the processing side;
[0040] A memory definition module, configured to define the memory area in the memory on the processing side based on the definition information and the mapping relationship between the processing side and the memory.
[0041] In one embodiment, before the data processing module, there is also included:
[0042] A data filtering module, configured to obtain the data requirements of the application layer and filter the image data;
[0043] A data uploading module, configured to transmit the filtered image data from the driving side to the host computer.
[0044] In one embodiment, the device further includes:
[0045] A processing function module, configured to, in response to a scanning instruction issued by the host computer, register an asynchronous processing function on the driving side based on a preset processing flow;
[0046] An asynchronous processing module, configured to process the image data on the processing side based on an asynchronous communication method, and trigger the callback execution of the asynchronous processing function in response to the completion of the transmission of the image data, so that the host computer determines that the transmission of the image data is completed.
[0047] In a third aspect, the present application further provides a computer device. The computer device includes a memory and a processor. The memory stores a computer program, and when the processor executes the computer program, it implements the steps in an image data transmission method as described in any one of the embodiments in the first aspect.
[0048] In a fourth aspect, the present application further provides a computer-readable storage medium. The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, it implements the steps in an image data transmission method as described in any one of the embodiments in the first aspect.
[0049] In a fifth aspect, the present application further provides a computer program product. The computer program product includes a computer program, and when the computer program is executed by a processor, it implements the steps in an image data transmission method as described in any one of the embodiments in the first aspect.
[0050] The above-mentioned image data transmission method, device, computer equipment, storage medium and computer program product can achieve the following beneficial effects for the technical problems in the corresponding background technology through derivation of the technical features in the claims:
[0051] The present application provides an image data transmission method. The method is implemented based on an image data transmission system, and the image data transmission system includes a driving side and a processing side. The method includes: in response to the processing side obtaining image data to be processed, storing the image data in a predefined memory area; in response to the completion of storing the image data, the processing side generates an interrupt signal and sends it to the driving side; in response to the driving side obtaining the interrupt signal, reading the image data from the memory area; and the driving side transmitting the obtained image data to a host computer to implement processing of the image data. In implementation, the above method deletes the unnecessary BAR space register handshake confirmation step in traditional PCIE communication, avoids redundant interaction between the processing side and the driving side, and shortens the delay of data transmission; realizes direct data interaction between the processing side and the driving side through a predefined memory area (DMA mapping), bypasses the frequent intervention of the CPU, and reduces the overhead of intermediate links in data transmission. On the other hand, the image data forms a seamless pipeline from acquisition (SICU), processing side, storage (DMA) to the driving side, and each link operates in parallel, shortening the end-to-end processing time; the driving side quickly responds to the interrupt and uploads the data to the host computer, ensuring that the GUI or subsequent analysis module can obtain the latest image data in real time, and can enhance the adaptation effect for scenarios with strict timeliness requirements such as semiconductor detection. Description of the Drawings
[0052] In order to more clearly illustrate the technical solutions in the embodiments of the present application or related technologies, the following will briefly introduce the drawings required for use in the description of the embodiments of the present application or related technologies. Obviously, the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other related drawings can also be obtained based on these drawings.
[0053] Figure 1 It is a schematic diagram of the system architecture of an image data transmission system in an embodiment;
[0054] Figure 2 It is a first flowchart of an image data transmission method in an embodiment;
[0055] Figure 3 It is a second flowchart of an image data transmission method in another embodiment;
[0056] Figure 4It is the schematic diagram of the third process of an image data transmission method in another embodiment;
[0057] Figure 5 It is the schematic diagram of the fourth process of an image data transmission method in another embodiment;
[0058] Figure 6 It is the schematic diagram of the fifth process of an image data transmission method in another embodiment;
[0059] Figure 7 It is the schematic diagram of the sixth process of an image data transmission method in another embodiment;
[0060] Figure 8 It is the schematic diagram of the system connection of an image data transmission system in a specific embodiment;
[0061] Figure 9 It is the schematic diagram of the module connection of an image data transmission system in a specific embodiment;
[0062] Figure 10 It is the schematic diagram of the process of image data transmission in a specific embodiment;
[0063] Figure 11 It is the schematic diagram of the process of image data transmission in another specific embodiment;
[0064] Figure 12 It is the interaction schematic diagram of image data transmission in a specific embodiment;
[0065] Figure 13 It is the structural block diagram of an image data transmission device in an embodiment;
[0066] Figure 14 It is the internal structure diagram of a computer device in an embodiment. Detailed implementation manners
[0067] In order to make the objectives, technical solutions and advantages of the present application clearer and more understandable, the present application will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.
[0068] In the related art, with the development of high-speed network technology and image compression algorithms, image transmission technology has been significantly improved. For example, high-speed transmission systems based on optical fibers can achieve large-bandwidth and low-latency data transmission, while advanced image compression technologies (such as JPEG2000 and HEVC) effectively reduce the amount of data while maintaining image quality. In addition, the introduction of wireless transmission technologies (such as 5G) further expands the application scenarios of remote microscopy, enabling researchers to obtain and analyze microscopic images at a distance in real time. The combination of these technologies not only improves the efficiency and reliability of image transmission but also provides strong support for real-time monitoring and defect analysis in the semiconductor manufacturing process.
[0069] However, the current image data transmission methods have the following technical problems:
[0070] The current image data transmission methods have the problem of process redundancy, resulting in poor real-time performance of data transmission.
[0071] Based on this, the embodiments of the present application provide an image data transmission method, device, computer device, storage medium, and computer program product.
[0072] The image data transmission method provided by the embodiments of the present application can be applied to an application environment as Figure 1 shown. Figure 1 An image data transmission system is shown, including an acquisition (SICU), a processing side, a storage (DMA), and a driving side.
[0073] In one embodiment, as Figure 2 shown, an image data transmission method is provided. Taking the application of this method to the Figure 1 image data transmission system as an example, the method includes the following steps:
[0074] Step 202: In response to the processing side obtaining the image data to be processed, store the image data in a predefined memory area.
[0075] Step 204: In response to the completion of storing the image data, the processing side generates an interrupt signal and sends it to the driving side.
[0076] Step 206: In response to the driving side obtaining the interrupt signal, read the image data from the memory area.
[0077] Step 208: The driving side transmits the obtained image data to the host computer to implement the processing of the image data.
[0078] In the above-mentioned image data transmission method, through reasonable derivation in combination with the technical features in the embodiments, the following beneficial effects can be achieved to solve the technical problems proposed in the background art:
[0079] This application provides an image data transmission method. The method is implemented based on an image data transmission system. The image data transmission system includes a driving side and a processing side. The method includes: in response to the processing side obtaining the image data to be processed, storing the image data in a predefined memory area; in response to the completion of storing the image data, the processing side generates an interrupt signal and sends it to the driving side; in response to the driving side obtaining the interrupt signal, reading the image data from the memory area; the driving side transmits the obtained image data to the host computer to realize the processing of the image data. In implementation, the above method deletes the unnecessary BAR space register handshake confirmation step in traditional PCIE communication, avoids redundant interaction between the processing side and the driving side, and shortens the delay of data transmission; through the predefined memory area (DMA mapping), direct data interaction between the processing side and the driving side is realized, bypassing the frequent intervention of the CPU, and reducing the overhead of the intermediate link of data transmission. On the other hand, the image data forms a seamless pipeline from acquisition (SICU), processing side, storage (DMA) to the driving side, and each link operates in parallel, shortening the end-to-end processing time; the driving side quickly responds to the interrupt and uploads the data to the host computer, ensuring that the GUI or subsequent analysis module can obtain the latest image data in real time, and enhancing the adaptation effect for scenarios with strict timeliness requirements such as semiconductor detection.
[0080] In one embodiment, as Figure 3 shown, step 204 includes:
[0081] Step 302: Obtain the image data, and based on the association relationship between the image data and the images, determine the target image data associated with the same target image.
[0082] Step 304: Generate the interrupt signal when all of any one of the target image data is stored in the memory area.
[0083] In this embodiment, in the process of image data transmission, when all the data of the entire image is transmitted, an interrupt signal is triggered, which helps to improve the stability of the process and reduce the possibility of transmission anomalies caused by multiple interruptions.
[0084] In one embodiment, as Figure 4 shown, before step 202, it further includes:
[0085] Step 402: The processing side verifies the image data;
[0086] Step 404: If the image data is abnormal, generate abnormal information and store the abnormal information in a predefined status memory.
[0087] In this embodiment, verifying the image data before transmitting it helps improve the stability of image data transmission and handle abnormal situations in a timely manner.
[0088] In one embodiment, as Figure 5 shown, the method includes:
[0089] Step 502: The driving side generates definition information and sends it to the processing side;
[0090] Step 504: The processing side defines the memory area in the memory based on the definition information and the mapping relationship between the processing side and the memory.
[0091] In this embodiment, performing initialization and memory allocation processing before startup enables the transmission, storage, and extraction of image data in a predefined memory area, which helps improve the stability of method implementation.
[0092] In one embodiment, as Figure 6 shown, before step 208, it further includes:
[0093] Step 602: Obtain the data requirements of the application layer and filter the image data;
[0094] Step 604: The driving side transmits the filtered image data to the host computer.
[0095] In this embodiment, filtering the image data before it is transmitted to the application layer helps the image data match the application requirements and improves the stability of image data application processing in the application layer.
[0096] In one embodiment, as Figure 7 shown, the method further includes:
[0097] Step 702: In response to the scan image instruction issued by the host computer, the driving side registers an asynchronous processing function based on a preset processing flow;
[0098] Step 704: The processing side processes the image data based on an asynchronous communication method, and triggers the callback execution of the asynchronous processing function in response to the completion of the transmission of the image data, so that the host computer determines that the image data transmission is completed.
[0099] In this embodiment, processing the transmission of image data based on asynchronous communication helps improve the transmission efficiency.
[0100] In a most specific embodiment, an image data transmission system provided by the present application can be as follows Figure 8 shown. The process of the image data transmission method implemented by applying the image data transmission system as shown in Figure 8 and Figure 9 can be as shown in Figures 10 - 12 shown.
[0101] Specifically by way of example, the specific module composition of the image data transmission system can be as shown in Figure 9 shown, where:
[0102] Clock Domain Sync: The input data and control signals are synchronized to the PCIE clock domain, and flow control logic is embedded to prevent data loss caused by data overflow;
[0103] DMA Engine: The DMA engine includes basic Block DMA transceiver / scheduling / address mapping / 4KB out-of-bounds prevention calculation logic, and is one of the basic component modules for user control and interaction with the BAR space / host computer;
[0104] Reg Space: Stores control / status registers such as DMA and PCIE.
[0105] TX_Req Engine: A control module that actively initiates TLP read / write requests from the user to the RC.
[0106] TX_Cpl Engine: A control module for sending TLP response packets in response to RC requests.
[0107] RX_Req Engine: A control module for receiving BAR space read / write requests initiated by the RC.
[0108] RX_Cpl Engine: A control module for receiving response TLP packets returned in response to requests actively initiated by the user to the RC.
[0109] EP_Logic & High-Speed SerDes: The IP core of the EP.
[0110] Specifically by way of example, the interaction process of the image data transmission method based on the above system can be described as follows:
[0111] First, the driver writes the length / address / dma_start information to the corresponding positions of the BAR0 register of the FPGA; after the FPGA receives the necessary information of length / address / dma_start in sequence, it sets an update signal and then starts the DMA transfer; the FPGA receives an image sent from the SICU, and after the image reception is completed, the FPGA side will check the received image. If there is an error in the image, the error information will be filled into the status register; the FPGA stores the received image information in the memory area mapped during the driver initialization process through the Block DMA mode; after the FPGA successfully transfers an image information to the DDR, it will send an MSI interrupt to the driver.
[0112] Among them, during the device initialization matching process, the mapping relationship between the physical address and the virtual address is obtained using the DMA memory mapping method; when the GUI issues a scan image instruction, the driver sends the parsed length and the pre-allocated and mapped address information to the FPGA; the driver reads the status register of the FPGA to ensure that the status of the FPGA is ready.
[0113] The driver sends the dma_start (DMA start instruction) to the FPGA to start DMA image reception, and then the driver enters the waiting and sleeping state; when the FPGA finishes sending the image and triggers an interrupt, it will wake up the currently sleeping driver thread in the interrupt; the driver reads the image data from the DDR after receiving the interrupt and transfers it to the application layer; the data received by the application layer is the raw data collected by the ADC. After filtering out the highest 4 bits, the lower 12 bits are processed into 1-byte (8-bit) image data and then passed to the GUI for display.
[0114] For the above-mentioned driver-side solution, improvements can also be made in the driver-side implementation plan. The specific implementation plan is as Figure 12 shown. Since the synchronous communication of dma has a large overhead on system resources, in order to ensure faster and more efficient image data transmission, the synchronous communication method of dma is changed to the asynchronous communication method of dma.
[0115] When the GUI issues a scan image instruction, in addition to sending the length and address information to the fpga, the driver side will also register an asynchronous io processing function and notify the kernel that there is an asynchronous io event waiting to be processed;
[0116] After the image transfer is completed, it will trigger the execution of the asynchronous callback function and notify the application layer.
[0117] In an implementation, the asynchronous communication with DMA helps to achieve that there is no need to use the wait / block timeout method to obtain images whether at the application layer or the driver layer. After the image data transmission is completed, the kernel will notify the driver in the way of asynchronous notification, and the driver will then notify the application. This approach can greatly improve the transmission efficiency and is more concise both in terms of code style and DMA transmission behavior.
[0118] Specifically, in the interaction process implemented based on the above image data transmission system in this embodiment, the processing steps of the FPGA in the hardware part can be as follows:
[0119] After all elements required for DMA and control are passed into Reg_Space through Driver_Logic→EP Logic→Rx_Demux→RX_Req_Engine→Reg_Space, the DMA engine control module of the FPGA will retrieve the information of the corresponding register in Reg_Space, start the DMA engine, and wait for the data at the data input end to be transmitted to the DMA engine module after passing through the clock synchronization module. The data will be converted into the TLP format specified by the PCIE 2.0 protocol and sent to the corresponding memory space of the Host PC through TX_Req_Engine→TX_Mux→EPLogic→Driver Logic. At the same time, an MSI interrupt is sent to wake up the software driver and wait for the software driver to execute the next step. In addition, the FPGA logic can also write TX_Cpl_Engine to passively reply with the CPLD packet of the MRD type TLP packet sent by the Host through Rx_Req_Engine. Among them, in order to debug TX_Req_Engine, RX_Cpl_Engine is written to obtain the CPLD packet of the MRD type TLP packet sent by the FPGA to the Host. This helps to improve the overall stability and integrity of the system.
[0120] In the implementation, DMA uses the Block DMA technology, simplifies all necessary elements of SG-DMA, reduces the number of registers that need to be configured between the software driver and the FPGA, further reduces the transmission overhead of the TLP packet carrying configuration information, and thus reduces the time consumption of each DMA start and stop, greatly improving the overall transmission efficiency.
[0121] It should be understood that although the steps in the flowcharts involved in the above-described embodiments are sequentially shown according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless there is a clear indication in this article, the execution of these steps has no strict order limit, and these steps can be executed in other orders. Moreover, at least a part of the steps in the flowcharts involved in the above-described embodiments may include multiple steps or multiple stages. These steps or stages are not necessarily executed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be executed alternately or in turn with at least a part of other steps or steps or stages in other steps.
[0122] Based on the same inventive concept, an embodiment of the present application further provides an image data transmission device for implementing an image data transmission method as described above. The implementation solutions provided by this device to solve problems are similar to the implementation solutions described in the above method. Therefore, the specific limitations in one or more embodiments of the following image data transmission device can refer to the limitations on the image data transmission method in the above text, and will not be repeated here.
[0123] In one embodiment, as Figure 13 shown, an image data transmission device is provided, including: a data storage module, an interrupt signal module, a data reading module, and a data processing module, where:
[0124] The data storage module is used to store the image data in a predefined memory area in response to the processing side obtaining the image data to be processed;
[0125] The interrupt signal module is used to generate an interrupt signal by the processing side and send it to the driving side in response to the completion of storing the image data;
[0126] The data reading module is used to read the image data from the memory area in response to the driving side obtaining the interrupt signal;
[0127] The data processing module is used to transmit the obtained image data by the driving side to the host computer to realize the processing of the image data.
[0128] In one of the embodiments, the interrupt signal module includes:
[0129] The picture data module is used to obtain the image data and determine the target image data associated with the same target image based on the association relationship between the image data and the image;
[0130] An interrupt generation module, configured to generate the interrupt signal after all of the target image data is stored in the memory area.
[0131] In one embodiment, before the data storage module, it further includes:
[0132] A data verification module, configured to verify the image data by the processing side;
[0133] An exception response module, configured to generate exception information and store the exception information in a predefined status memory if the image data is abnormal.
[0134] In one embodiment, the device includes:
[0135] A definition information module, configured to generate definition information by the driving side and send it to the processing side;
[0136] A memory definition module, configured to define the memory area in the memory by the processing side based on the definition information and the mapping relationship between the processing side and the memory.
[0137] In one embodiment, before the data processing module, it further includes:
[0138] A data filtering module, configured to obtain the data requirements of the application layer and filter the image data;
[0139] A data uploading module, configured to transmit the filtered image data to the host computer by the driving side.
[0140] In one embodiment, the device further includes:
[0141] A processing function module, configured to register an asynchronous processing function by the driving side based on a preset processing flow in response to a scanning instruction issued by the host computer;
[0142] An asynchronous processing module, configured to process the image data by the processing side based on an asynchronous communication method, and trigger the callback execution of the asynchronous processing function in response to the completion of the transmission of the image data, so that the host computer determines that the transmission of the image data is completed.
[0143] Each module in the above image data transmission device can be implemented in whole or in part by software, hardware, and their combination. The above modules can be embedded in or independent of the processor in the computer device in the form of hardware, or stored in the memory in the computer device in the form of software, so as to facilitate the processor to call and execute the operations corresponding to the above modules.
[0144] In one embodiment, a computer device is provided. The computer device may be a terminal, and its internal structural diagram may be as shown in Figure 14 . The computer device includes a processor, a memory, an input / output interface, a communication interface, a display unit, and an input device. Among them, the processor, the memory, and the input / output interface are connected through a system bus, and the communication interface, the display unit, and the input device are connected to the system bus through the input / output interface. Among them, the processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The input / output interface of the computer device is used to exchange information between the processor and external devices. The communication interface of the computer device is used to communicate with external terminals in a wired or wireless manner. The wireless manner can be implemented through WIFI, a mobile cellular network, NFC (Near Field Communication), or other technologies. The computer program, when executed by the processor, implements an image data transmission method. The display unit of the computer device is used to form a visually visible picture, which may be a display screen, a projection device, or a virtual reality imaging device. The display screen may be a liquid crystal display screen or an electronic ink display screen. The input device of the computer device may be a touch layer covering the display screen, or a button, a trackball, or a touchpad provided on the housing of the computer device, or an external keyboard, touchpad, or mouse, etc.
[0145] Those skilled in the art can understand that Figure 14 the structure shown in is only a block diagram of some structures related to the solution of the present application, and does not constitute a limitation on the computer device to which the solution of the present application is applied. The specific computer device may include more or fewer components than those shown in the figure, or combine some components, or have a different component layout.
[0146] In one embodiment, a computer device is further provided, including a memory and a processor. A computer program is stored in the memory, and when the processor executes the computer program, the steps in the above method embodiments are implemented.
[0147] In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, the steps in the above method embodiments are implemented.
[0148] In one embodiment, a computer program product is provided, including a computer program. When the computer program is executed by a processor, the steps in the above method embodiments are implemented.
[0149] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data for analysis, stored data, displayed data, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties, and the collection, use, and processing of relevant data need to comply with the relevant laws, regulations, and standards of relevant countries and regions.
[0150] Those of ordinary skill in the art can understand that all or part of the processes in the methods of the above embodiments can be completed by instructing relevant hardware through a computer program. The computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above methods. Among them, any reference to a memory, database, or other medium used in the embodiments provided in this application can include at least one of non-volatile and volatile memories. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetoresistive random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM can be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM), etc. The databases involved in the embodiments provided in this application can include at least one of relational databases and non-relational databases. Non-relational databases can include distributed databases based on blockchain, etc., without limitation. The processors involved in the embodiments provided in this application can be general-purpose processors, central processors, graphics processors, digital signal processors, programmable logic devices, data processing logics based on quantum computing, etc., without limitation.
[0151] The technical features of the above embodiments can be combined arbitrarily. For the sake of brevity of description, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered to be within the scope described in this specification.
[0152] The above-described embodiments merely represent several implementation manners of the present application. The description thereof is relatively specific and detailed, but it should not be construed as a limitation on the patent scope of the present application. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present application, several modifications and improvements can still be made, and these all fall within the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the appended claims.
Claims
1. An image data transmission method, characterized in that, The method is implemented based on an image data transmission system, which includes a driving side and a processing side. The method includes: In response to the processing side obtaining image data to be processed, storing the image data in a predefined memory area; In response to the completion of storing the image data, the processing side generates an interrupt signal and sends it to the driving side; In response to the driving side obtaining the interrupt signal, reading the image data from the memory area; The driving side transmits the obtained image data to a host computer to implement the processing of the image data.
2. The method according to claim 1, characterized in that The step of, in response to the completion of storing the image data, the processing side generating an interrupt signal and sending it to the driving side includes: Obtaining the image data, and based on the association relationship between the image data and an image, determining target image data associated with the same target image; When all of any of the target image data is stored in the memory area, generating the interrupt signal.
3. The method according to claim 1, characterized in that Before, in response to the processing side obtaining image data to be processed and storing the image data in a predefined memory area, it further includes: The processing side performs verification on the image data; If the image data is abnormal, generating abnormal information and storing the abnormal information in a predefined status memory.
4. The method according to claim 1, wherein The method includes: The driving side generates definition information and sends it to the processing side; The processing side defines the memory area in the memory based on the definition information and the mapping relationship between the processing side and the memory.
5. The method according to claim 1, characterized in that Before the driving side transmits the obtained image data to the host computer to implement the processing of the image data, it further includes: Obtaining the data requirements of the application layer and filtering the image data; The driving side transmits the filtered image data to the host computer.
6. The method according to claim 1, characterized in that, The method further includes: In response to the host computer sending a scanning instruction, the driving side registers an asynchronous processing function based on a preset processing flow; The processing side processes the image data based on an asynchronous communication method, and in response to the completion of the transmission of the image data, triggers the callback execution of the asynchronous processing function, so that the host computer determines that the image data transmission is completed.
7. An image data transmission device, characterized in that, The device includes: A data storage module, configured to store the image data in a predefined memory area in response to the processing side obtaining image data to be processed; An interrupt signal module, configured to, in response to the completion of storing the image data, the processing side generates an interrupt signal and sends it to the driving side; A data reading module, configured to read the image data from the memory area in response to the driving side obtaining the interrupt signal; A data processing module, configured to the driving side transmits the obtained image data to a host computer to implement the processing of the image data.
8. A computer device, comprising a memory and a processor, the memory storing a computer program, characterized in that, When the processor executes the computer program, it implements the steps of the method according to any one of claims 1 to 6.
9. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the steps of the method according to any one of claims 1 to 6.
10. A computer program product, comprising a computer program, characterized in that, When this computer program is executed by a processor, it implements the steps of the method according to any one of claims 1 to 6.