Silicon carbide epitaxial wafer, preparation method thereof, and power device

Abstract

The present invention belongs to the field of power devices and specifically discloses a silicon carbide epitaxial wafer, a preparation method thereof, and a power device. The silicon carbide epitaxial wafer comprises: a silicon carbide substrate; a buffer layer, the buffer layer comprising a first buffer layer and a second buffer layer, the first buffer layer being disposed on a side surface of the silicon carbide substrate, and the second buffer layer being disposed on a surface of the first buffer layer away from the silicon carbide substrate; and a silicon carbide epitaxial layer, the silicon carbide epitaxial layer being disposed on a surface of the second buffer layer away from the silicon carbide substrate. The contact angle between the silicon carbide substrate and water is θ1, the contact angle between the first buffer layer and water is θ2, and the contact angle between the second buffer layer and water is θ3, satisfying θ1 < θ2 and θ2 > θ3. The application precisely controls the distribution of the buffer layer contact angles, thereby facilitating the production of a buffer layer with high crystal quality, and thereby facilitating the production of a silicon carbide epitaxial wafer with low defect density and high crystal quality.

Description

Technical Field

[0001] The present invention belongs to the field of power devices, and in particular relates to a silicon carbide epitaxial wafer, a preparation method thereof, and a power device. Background Art

[0002] Silicon carbide epitaxial wafers are semiconductor materials formed by epitaxially growing a thin silicon carbide film on a silicon carbide substrate. They can be used to manufacture high-power, high-frequency, and high-temperature resistant devices, and are widely used in power electronics, radio frequency devices, and optoelectronics. The thickness, doping concentration, and conductivity type of the epitaxial layer of silicon carbide epitaxial wafers can be adjusted to meet diverse application requirements.

[0003] For silicon carbide devices, under the same test conditions, the crystal quality of the silicon carbide epitaxial wafer has a greater impact on its yield. The better the crystal quality of the silicon carbide epitaxial wafer, the higher the yield of the silicon carbide device. Therefore, improving the crystal quality of the silicon carbide epitaxial wafer is crucial to reducing device losses and improving chip yield. The current preparation method for silicon carbide epitaxial wafers is generally: etching the substrate surface, growing a buffer layer, and growing an epitaxial layer. Among them, the quality of the buffer layer directly determines the quality of the epitaxial layer subsequently grown on its surface, and directly determines the quality of the subsequent epitaxial layer and the entire epitaxial wafer. Summary of the Invention

[0004] The present invention aims to at least partially address one of the technical problems in the related art. To this end, the present invention provides a silicon carbide epitaxial wafer, a method for preparing the same, and a power device. By precisely controlling the distribution of the contact angles of the buffer layer, namely, the contact angle θ1 of the silicon carbide substrate with water is smaller than the contact angle θ2 of the first buffer layer with water, and the contact angle θ2 of the first buffer layer with water is larger than the contact angle θ3 of the second buffer layer with water, the present invention facilitates obtaining a buffer layer with high crystal quality, thereby facilitating the production of a silicon carbide epitaxial wafer with low defect density and high crystal quality.

[0005] A first aspect of the present invention provides a silicon carbide epitaxial wafer. According to an embodiment of the present invention, the silicon carbide epitaxial wafer comprises:

[0006] Silicon carbide substrate;

[0007] a buffer layer, the buffer layer comprising a first buffer layer and a second buffer layer, the first buffer layer being disposed on a surface of one side of the silicon carbide substrate, and the second buffer layer being disposed on a surface of the first buffer layer away from the silicon carbide substrate;

[0008] a silicon carbide epitaxial layer, the silicon carbide epitaxial layer being disposed on a surface of the second buffer layer away from the silicon carbide substrate;

[0009] Among them, the contact angle between the silicon carbide substrate and water is θ1, the contact angle between the first buffer layer and water is θ2, and the contact angle between the second buffer layer and water is θ3, satisfying θ1 < θ2 and θ2 > θ3.

[0010] For the silicon carbide epitaxial wafer of the above embodiment of the present invention, by precisely controlling the distribution of the contact angles of the buffer layers, that is, the contact angle θ1 between the silicon carbide substrate and water is less than the contact angle θ2 between the first buffer layer and water, and the contact angle θ2 between the first buffer layer and water is greater than the contact angle θ3 between the second buffer layer and water, it is beneficial to obtain a buffer layer with high crystal quality, and further beneficial to obtain a silicon carbide epitaxial wafer with low defect density and high crystal quality.

[0011] In addition, the silicon carbide epitaxial wafer according to the above embodiment of the present invention may further have the following additional technical features:

[0012] In some embodiments of the present invention, 20° ≤ θ1 ≤ 30°, 30° < θ2 ≤ 63°, 0° < θ3 ≤ 33° are satisfied; or, 20° ≤ θ1 ≤ 30°, 31° ≤ θ2 ≤ 60°, 0° < θ3 ≤ 30° are satisfied.

[0013] In some embodiments of the present invention, the first buffer layer includes a plurality of first sub-buffer layers, and along the direction away from the silicon carbide substrate, the contact angles between the plurality of first sub-buffer layers and water increase in sequence.

[0014] In some embodiments of the present invention, along the direction away from the silicon carbide substrate, the contact angles between the plurality of first sub-buffer layers and water increase gradiently or linearly.

[0015] In some embodiments of the present invention, the second buffer layer includes a plurality of second sub-buffer layers, and along the direction away from the silicon carbide substrate, the contact angles between the plurality of second sub-buffer layers and water decrease in sequence. <0​​​​​​​​​​​​​​​-3 ≤n3≤2E18 cm -3 .

[0019] In some embodiments of the present invention, the first buffer layer includes a plurality of first sub-buffer layers, and the doping concentrations of the plurality of first sub-buffer layers increase successively along the direction away from the silicon carbide substrate; and / or the second buffer layer includes a plurality of second sub-buffer layers, and the doping concentrations of the plurality of second sub-buffer layers decrease successively along the direction away from the silicon carbide substrate.

[0020] In some embodiments of the present invention, the doping concentration of multiple first sub-buffer layers increases gradually or linearly along the direction away from the silicon carbide substrate; and / or, the doping concentration of multiple second sub-buffer layers decreases gradually or linearly along the direction away from the silicon carbide substrate.

[0021] In some embodiments of the present invention, the thickness of the first buffer layer is 0.14 μm to 3.2 μm; and / or the thickness of the second buffer layer is 0.14 μm to 3.2 μm; and / or the total thickness of the buffer layer is 0.28 μm to 6.4 μm.

[0022] In some embodiments of the present invention, the thickness of the silicon carbide epitaxial layer is 5 μm to 20 μm.

[0023] A second aspect of the present invention provides a method for preparing the silicon carbide epitaxial wafer of the above embodiment. According to an embodiment of the present invention, the method comprises:

[0024] forming a first buffer layer on a surface of one side of the silicon carbide substrate;

[0025] forming a second buffer layer on a surface of the first buffer layer away from the silicon carbide substrate, wherein the first buffer layer and the second buffer layer together form a buffer layer;

[0026] forming a silicon carbide epitaxial layer on a surface of the second buffer layer away from the silicon carbide substrate;

[0027] The contact angle between the silicon carbide substrate and water is θ1, the contact angle between the first buffer layer and water is θ2, and the contact angle between the second buffer layer and water is θ3, satisfying θ1<θ2, and θ2>θ3.

[0028] The method for preparing silicon carbide epitaxial wafers according to the above embodiment of the present invention is beneficial for obtaining a buffer layer with high crystal quality, and further beneficial for obtaining silicon carbide epitaxial wafers with low defect density and high crystal quality, by precisely controlling the distribution of the contact angle of the buffer layer, that is, the contact angle θ1 between the silicon carbide substrate and water is smaller than the contact angle θ2 between the first buffer layer and water, and the contact angle θ2 between the first buffer layer and water is larger than the contact angle θ3 between the second buffer layer and water.

[0029] In addition, the method for preparing a silicon carbide epitaxial wafer according to the above embodiment of the present invention may also have the following additional technical features:

[0030] In some embodiments of the present invention, before forming the first buffer layer on one side surface of the silicon carbide substrate, the method further comprises: etching one side surface of the silicon carbide substrate, wherein the etching conditions include at least one of the following conditions: a) the etching temperature is 1500 o C-1600 o C, b) etching time is 5 min-10 min, c) hydrogen flow rate is 80 slm-200 slm, d) reaction pressure is 100 mbar-150 mbar.

[0031] In some embodiments of the present invention, when forming the first buffer layer, the reaction pressure is 70 mbar-90 mbar, the center doping source flow rate is 300 sccm-400 sccm, the carbon source flow rate is 10 sccm-15 sccm, the silicon source flow rate is 50 sccm-70 sccm, and the temperature is 1600 o C-1700 o C, the reaction time is 1 min-5 min; or, when forming the first buffer layer, the reaction pressure is reduced from 100 mbar-150 mbar to 70 mbar-90 mbar in a step-by-step or linear manner, the center doping source flow rate is increased from 50 sccm-100 sccm in a step-by-step or linear manner to 300 sccm-400 sccm, the carbon source flow rate is reduced from 15 sccm-30 sccm in a step-by-step or linear manner to 10 sccm-15 sccm, the silicon source flow rate is increased from 10 sccm-15 sccm in a step-by-step or linear manner to 50 sccm-70 sccm, and the temperature is increased from 1450 o C-1550 o C increases in steps or linearly to 1600 o C-1700 o C, reaction time is 1 min-5 min.

[0032] In some embodiments of the present invention, when forming the second buffer layer, the reaction pressure is increased from 70 mbar-90 mbar to 110 mbar-170 mbar in a stepwise, linear or direct manner, the center doping source flow rate is decreased from 300 sccm-400 sccm in a stepwise, linear or direct manner to 40 sccm-105 sccm, the carbon source flow rate is increased from 10 sccm-15 sccm in a stepwise, linear or direct manner to 25 sccm-40 sccm, the silicon source flow rate is decreased from 50 sccm-70 sccm in a stepwise, linear or direct manner to 20 sccm-50 sccm, and the temperature is increased from 1600 to 1600 sccm. o C-1700 o C stepwise, linear or directly reduced to 1450 o C-1600 o C, reaction time is 1 min-5 min.

[0033] In some embodiments of the present invention, the doping source includes one of nitrogen, ammonia and trimethylaluminum; and / or the carbon source includes at least one of ethylene, methane and propane; and / or the silicon source includes at least one of trichlorosilane, silane and dichlorosilane.

[0034] In some embodiments of the present invention, during the formation of the silicon carbide epitaxial layer, the flow rate of the carbon source is controlled to be 150 sccm-300 sccm, the flow rate of the silicon source is controlled to be 350 sccm-600 sccm, and the duration is 5 min-30 min.

[0035] A third aspect of the present invention provides a power device. According to an embodiment of the present invention, the power device comprises a silicon carbide epitaxial wafer according to the first aspect or a silicon carbide epitaxial wafer produced by the method according to the second aspect. This helps improve the yield of the power device. It should be noted that the features and advantages described above for the silicon carbide epitaxial wafer also apply to this power device and will not be repeated here.

[0036] Additional aspects and advantages of the present invention will be set forth in part in the description which follows and, in part, will be obvious from the description which follows, or may be learned by practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] The above and / or additional aspects and advantages of the present invention will become apparent and readily understood from the description of the embodiments with reference to the following drawings, in which:

[0038] Figure 1 Schematic diagram of the structure of silicon carbide epitaxial wafers according to some embodiments of the present invention;

[0039] Figure 2Schematic diagram of the structure of silicon carbide epitaxial wafers according to some further embodiments of the present invention;

[0040] Figure 3 This is the SIMS test result of the buffer layer of the silicon carbide epitaxial wafer of Example 1;

[0041] Figure 4 1 is the contact angle test result of the buffer layer of the silicon carbide epitaxial wafer of Example 1;

[0042] Figure 5 This is the SIMS test result of the buffer layer of the silicon carbide epitaxial wafer of Example 2;

[0043] Figure 6 1 is the contact angle test result of the buffer layer of the silicon carbide epitaxial wafer of Example 2;

[0044] Figure 7 This is the SIMS test result of the buffer layer of the silicon carbide epitaxial wafer of Example 3;

[0045] Figure 8 1 is the contact angle test result of the buffer layer of the silicon carbide epitaxial wafer of Example 3;

[0046] Figure 9 This is the SIMS test result of the buffer layer of the silicon carbide epitaxial wafer of Example 4;

[0047] Figure 10 1 is the contact angle test result of the buffer layer of the silicon carbide epitaxial wafer of Example 4;

[0048] Figure 11 This is the SIMS test result of the buffer layer of the silicon carbide epitaxial wafer of Example 5;

[0049] Figure 12 1 is the contact angle test result of the buffer layer of the silicon carbide epitaxial wafer of Example 5;

[0050] Figure 13 This is the SIMS test result of the buffer layer of the silicon carbide epitaxial wafer of Example 6;

[0051] Figure 14 1 is the contact angle test result of the buffer layer of the silicon carbide epitaxial wafer of Example 6;

[0052] Figure 15 1 is the SIMS test result of the buffer layer of the silicon carbide epitaxial wafer of Example 7;

[0053] Figure 16 1 is the contact angle test result of the buffer layer of the silicon carbide epitaxial wafer of Example 7;

[0054] Figure 17 This is the SIMS test result of the buffer layer of the silicon carbide epitaxial wafer of Comparative Example 1;

[0055] Figure 18 This is the contact angle test result of the buffer layer of the silicon carbide epitaxial wafer in Comparative Example 1.

[0056] Reference numerals:

[0057] 100 - silicon carbide substrate, 200 - buffer layer, 210 - first buffer layer, 211 - first sub-buffer layer, 220 - second buffer layer, 221 - second sub-buffer layer, 300 - silicon carbide epitaxial layer. DETAILED DESCRIPTION

[0058] The following describes embodiments of the present invention in detail, examples of which are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are intended to be used to explain the present invention, and are not to be construed as limiting the present invention.

[0059] The present invention is proposed by the inventor based on the following problems:

[0060] The various properties of the existing buffer layer cannot directly determine the crystal quality of the subsequent epitaxial layer. The crystal quality of the epitaxial layer can only be determined after the epitaxial layer growth is completed and the characterization test is completed. It cannot be used as a performance indicator to directly regulate the crystal quality of the epitaxial layer, resulting in uneven crystal quality of the epitaxial layer, and thus the quality of the epitaxial wafer products cannot be guaranteed.

[0061] In order to solve the problem that the existing buffer layer cannot guarantee that the silicon carbide epitaxial layer has high crystal quality and high-quality epitaxial wafer products, the first aspect of the present invention proposes a silicon carbide epitaxial wafer with high crystal quality. Figure 1 and attached Figure 2 The silicon carbide epitaxial wafer includes: a silicon carbide substrate 100; a buffer layer 200, wherein the buffer layer 200 includes a first buffer layer 210 and a second buffer layer 220, wherein the first buffer layer 210 is disposed on a side surface of the silicon carbide substrate 100, and the second buffer layer 220 is disposed on a surface of the first buffer layer 210 away from the silicon carbide substrate 100; and a silicon carbide epitaxial layer 300, wherein the silicon carbide epitaxial layer 300 is disposed on a surface of the second buffer layer 220 away from the silicon carbide substrate 100. The contact angle between the silicon carbide substrate 100 and water is θ1, the contact angle between the first buffer layer 210 and water is θ2, and the contact angle between the second buffer layer 220 and water is θ3, satisfying θ1<θ2 and θ2>θ3. Furthermore, the contact angle between the side of the silicon carbide substrate 100 adjacent to the first buffer layer and water is θ1.

[0062] The silicon carbide epitaxial wafer of the above embodiment of the present invention is advantageous in obtaining a buffer layer with high crystal quality by precisely controlling the distribution of the contact angle of the buffer layer, that is, the contact angle θ1 between the silicon carbide substrate and water is smaller than the contact angle θ2 between the first buffer layer and water, and the contact angle θ2 between the first buffer layer and water is larger than the contact angle θ3 between the second buffer layer and water. This is advantageous in obtaining a buffer layer with high crystal quality, and further advantageous in obtaining a silicon carbide epitaxial wafer with low defect density and high crystal quality.

[0063] The reasons why the silicon carbide epitaxial wafer proposed in the present invention can achieve the above beneficial effects are described in detail below:

[0064] The present invention proposes a silicon carbide epitaxial wafer with a novel buffer layer. The contact angles along the thickness of the buffer layer are designed to be specially distributed, which facilitates the growth of high-quality epitaxial layers. Specifically, the contact angle of the first buffer layer is larger than that of the silicon carbide substrate, resulting in a lower surface energy. This facilitates the sealing and healing of defects in the silicon carbide substrate, thereby preventing the formation of epitaxial defects such as stacking faults, basal plane dislocations, and large pits. This effectively inhibits the evolution of silicon carbide substrate defects into epitaxial defects, ultimately ensuring the device's test yield. Furthermore, the contact angle of the second buffer layer is smaller than that of the first buffer layer, resulting in a higher surface energy. This facilitates the adsorption of the vapor precursor of the silicon carbide epitaxial layer on the surface of the second buffer layer, thereby ensuring the continuous and stable chemical vapor deposition process of the silicon carbide epitaxial layer and facilitating the production of high-quality silicon carbide epitaxial layers. Thus, by precisely controlling the distribution of the buffer layer contact angles, a high-quality buffer layer is obtained, thereby achieving a silicon carbide epitaxial wafer with low defect density and high crystal quality.

[0065] It should be understood that the quality of the buffer layer will affect the quality of the silicon carbide epitaxial layer. By precisely controlling the distribution of the contact angle of the buffer layer, it is beneficial to improve the crystal quality of the silicon carbide epitaxial layer, thereby improving the yield of silicon carbide devices.

[0066] It satisfies 20°≤θ1≤30°, 30°<θ2≤63°, and 0°<θ3≤33°; preferably, it satisfies 20°≤θ1≤30°, 31°≤θ2≤60°, and 0°<θ3≤30°.

[0067] According to some specific embodiments of the present invention, 20°≤θ1≤30° (for example, θ1 can be 20°, 21°, 22°, 23°, 24°, 25°, 26°, 27°, 28°, 29°, 30°, etc., or any range within this range, for example, 20°≤θ1≤25°, 25°≤θ1≤30°, 23°≤θ1≤28°, etc.), 33°≤θ2≤63° (for example, θ2 can be 33°, 35°, 37°, 40°, 42°, 45°, 47°, etc.), , 50°, 52°, 55°, 57°, 60°, 63°, etc., or any range within this range, for example, 35°≤θ2≤45°, 45°≤θ2≤60°, 40°≤θ2≤50°, etc.), 0°<θ3≤33° (for example, θ3 can be 1°, 5°, 10°, 15°, 20°, 25°, 30°, 33°, etc., or any range within this range, for example, 0°<θ3≤15°, 15°≤θ3≤30°, 5°≤θ3≤10°, etc.). Thus, by precisely controlling the distribution of the contact angle of the buffer layer, it is further advantageous to obtain a buffer layer with high crystal quality, thereby further facilitating the production of silicon carbide epitaxial wafers with low defect density and high crystal quality. Preferably, 20°≤θ1≤30°, 35°≤θ2≤60°, and 0°<θ3≤30° are satisfied.

[0068] According to some further specific embodiments of the present invention, Figure 2 The first buffer layer 210 includes multiple first sub-buffer layers 211. The contact angles of the first sub-buffer layers 211 with water increase progressively as they move away from the silicon carbide substrate 100. As the contact angle of the first buffer layer increases from θ1 to θ2, the surface energy of the first buffer layer decreases. This gradual change enables each first sub-buffer layer to more effectively seal surface defects on the silicon carbide substrate, such as dislocations and micropipes. This gradual increase in contact angle repairs and seals defects layer by layer, rather than significantly changing the surface energy all at once, thereby more effectively preventing the spread and amplification of defects.

[0069] According to some specific embodiments of the present invention, Figure 2 The contact angles of the multiple first sub-buffer layers 211 with water increase gradually or linearly as they move away from the silicon carbide substrate 100. As the contact angles of the first buffer layers increase gradually or linearly from θ1 to θ2, the surface energy of the first buffer layers decreases gradually or linearly. This gradient or linear change enables each first sub-buffer layer to more effectively seal defects on the silicon carbide substrate surface, such as dislocations and micropipes. This gradient or linear increase in contact angle repairs and seals defects layer by layer, rather than significantly changing the surface energy all at once, thereby more effectively preventing the spread and amplification of defects.

[0070] According to some further specific embodiments of the present invention, referring to the attached Figure 2 , the second buffer layer 220 includes a plurality of second sub-buffer layers 221. Along the direction away from the silicon carbide substrate 100, the contact angles of the plurality of second sub-buffer layers 221 with water gradually decrease in sequence. When the contact angle of the second buffer layer gradually decreases from θ2 to θ3, the surface energy of the second buffer layer gradually increases, which can ensure the uniform adsorption of gas-phase precursor molecules on its surface, guarantee the stability of the chemical vapor deposition (CVD) process, and avoid the discontinuity of the growth interface caused by the sudden change of the surface energy. This stability helps to ensure the high-quality growth of the epitaxial layer and reduce defects and non-uniformities during the growth process.

[0071] According to some further specific embodiments of the present invention, referring to the attached Figure 2 , along the direction away from the silicon carbide substrate 100, the contact angles of the plurality of second sub-buffer layers 221 with water decrease in a gradient or linearly. When the contact angle of the second buffer layer decreases in a gradient or linearly from θ2 to θ3, the surface energy of the second buffer layer increases in a gradient or linearly, which can further ensure the uniform adsorption of gas-phase precursor molecules on its surface, further guarantee the stability of the chemical vapor deposition (CVD) process, avoid the discontinuity of the growth interface caused by the sudden change of the surface energy, and thus further help to ensure the high-quality growth of the epitaxial layer and reduce defects and non-uniformities in thickness during the growth process.

[0072] According to some further specific embodiments of the present invention, both the silicon carbide substrate and the buffer layer include doping elements. The doping concentration of the silicon carbide substrate is n1, the doping concentration of the first buffer layer is n2, and the doping concentration of the second buffer layer is n3, satisfying n1 < n2 and n2 > n3. Thus, by adjusting the doping concentrations of the silicon carbide substrate, the first buffer layer and the second buffer layer, it can be further ensured that the contact angle θ1 of the silicon carbide substrate with water is less than the contact angle θ2 of the first buffer layer with water, and the contact angle θ2 of the first buffer layer with water is greater than the contact angle θ3 of the second buffer layer with water, which is beneficial to obtaining a buffer layer with high crystal quality, and further beneficial to obtaining a silicon carbide epitaxial wafer with low defect density and high crystal quality.

[0073] It should be noted that the specific types of the doping elements in the above-mentioned silicon carbide substrate and buffer layer are not particularly limited. If it is an N-type silicon carbide epitaxial wafer, the doping element can be selected as nitrogen; if it is a P-type silicon carbide epitaxial wafer, the doping element can be selected as aluminum or boron, etc.

[0074] According to some further specific embodiments of the present invention, satisfying 1E16 cm -3 ≤n1≤2E18 cm -3 (for example, n1 can be 1E16 cm -3 , 1E17 cm -3 , 5E17 cm -3、1E18 cm -3 、2E18 cm -3 etc., or any range within this range, for example, 2E16 cm -3 ≤n1≤1E18 cm -3 、1E18 cm -3 ≤n1≤2E18 cm -3 、5E17 cm -3 ≤n1≤1E18 cm -3 、3E17 cm -3 ≤n1≤2E18 cm -3 etc.), 2E18 cm -3 <n2≤6E19 cm -3 (For example, n2 can be 2E18 cm -3 、3E18cm -3 、1E19 cm -3 、2E19 cm -3 、3E19 cm -3 、4E19 cm -3 、5E19 cm -3 、6E19 cm -3 etc., or any range within this range, for example, 2E18 cm -3 <n2≤3E19 cm -3 、4E18 cm -3 ≤n2≤6E19 cm -3 、3E18 cm -3 ≤n2≤4E19 cm -3 etc.), 1E16 cm -3 ≤n3≤2E18 cm -3 (For example, n3 can be 1E16 cm -3 、2E16 cm -3 、4E16 cm -3 、1E17 cm -3 、5E17 cm -3 、1E18 cm -3 、1.5E18 cm -3 、2E18 cm -3 etc., or any range within this range, for example, 1E16 cm -3 ≤n3≤1E18 cm -3 、1E18 cm -3 ≤n3≤2E18 cm -3 、5E16 cm -3 ≤n3≤1.5E18cm -3Thus, by regulating the doping concentrations of the silicon carbide substrate, the first buffer layer, and the second buffer layer, it is possible to further ensure that the contact angle θ1 between the silicon carbide substrate and water is smaller than the contact angle θ2 between the first buffer layer and water, and that the contact angle θ2 between the first buffer layer and water is larger than the contact angle θ3 between the second buffer layer and water. This is beneficial for obtaining a buffer layer with high crystal quality, and further beneficial for obtaining a silicon carbide epitaxial wafer with low defect density and high crystal quality.

[0075] According to some further specific embodiments of the present invention, the first buffer layer includes multiple first sub-buffer layers, and the doping concentrations of the multiple first sub-buffer layers increase successively in the direction away from the silicon carbide substrate. Thus, it can be further ensured that the contact angles of the multiple first sub-buffer layers with water increase successively, so that each layer of the first sub-buffer layer can more effectively seal the defects on the surface of the silicon carbide substrate, further ensuring that the diffusion and amplification of the defects are more effectively avoided.

[0076] According to further embodiments of the present invention, the doping concentrations of the multiple first sub-buffer layers increase gradually or linearly away from the silicon carbide substrate. This further ensures that the contact angles of the multiple first sub-buffer layers with water increase gradually or linearly. This gradient or linear change enables each first sub-buffer layer to more effectively seal defects on the silicon carbide substrate surface. This gradual or linear increase in contact angle repairs and seals defects layer by layer, rather than significantly changing the surface energy all at once, thereby more effectively preventing the spread and amplification of defects.

[0077] According to some further specific embodiments of the present invention, the second buffer layer includes a plurality of second sub-buffer layers, and the doping concentrations of the plurality of second sub-buffer layers decrease successively in the direction away from the silicon carbide substrate. Thus, it can further ensure that the contact angles of the plurality of second sub-buffer layers with water decrease successively, thereby further ensuring the uniform adsorption of gas-phase precursor molecules on their surfaces, further ensuring the stability of the chemical vapor deposition (CVD) process, and further helping to ensure the high-quality growth of the epitaxial layer and reduce defects and unevenness in the growth process.

[0078] According to some further specific embodiments of the present invention, the doping concentrations of the multiple second sub-buffer layers decrease in a gradient or linearly, thereby further ensuring that the contact angles of the multiple second sub-buffer layers with water decrease in a gradient or linearly, thereby further ensuring the uniform adsorption of gas-phase precursor molecules on their surfaces, further ensuring the stability of the chemical vapor deposition (CVD) process, and further helping to ensure high-quality growth of the epitaxial layer and reduce defects and unevenness in the growth process.

[0079] According to some further specific embodiments of the present invention, the thickness of the first buffer layer is 0.14 μm~3.2 μm, for example, it can be 0.14 μm, 0.2 μm, 0.5 μm, 1 μm, 1.5 μm, 2 μm, 2.5 μm, 3 μm, 3.2 μm, etc., which can further help to fully suppress the evolution of silicon carbide substrate defects into epitaxial defects, and ultimately ensure the test yield of the device.

[0080] According to some further specific embodiments of the present invention, the thickness of the second buffer layer is 0.14 μm~3.2 μm, for example, it can be 0.14 μm, 0.2 μm, 0.5 μm, 1 μm, 1.5 μm, 2 μm, 2.5 μm, 3 μm, 3.2 μm, etc., which can further help ensure that the chemical vapor deposition process of the silicon carbide epitaxial layer is carried out continuously and stably, and is conducive to obtaining a silicon carbide epitaxial layer with high crystal quality.

[0081] According to some other specific embodiments of the present invention, the total thickness of the buffer layer is 0.28 μm~6.4 μm, for example, it can be 0.28 μm, 0.4 μm, 0.5 μm, 1 μm, 1.5 μm, 2 μm, 2.5 μm, 3 μm, 3.5 μm, 4 μm, 4.5 μm, 5 μm, 5.5 μm, 6 μm, 6.4 μm, etc., thereby further ensuring the crystal quality of the silicon carbide buffer layer, thereby further ensuring the crystal quality of the silicon carbide epitaxial wafer.

[0082] According to some further specific embodiments of the present invention, the thickness of the silicon carbide epitaxial layer is 5 μm to 20 μm, for example, 5 μm, 7 μm, 10 μm, 12 μm, 15 μm, 18 μm, 20 μm, etc., thereby further ensuring the crystal quality of the silicon carbide epitaxial wafer.

[0083] According to some further specific embodiments of the present invention, the doping concentration of the silicon carbide epitaxial layer may be 4E14 cm -3 ~1E17cm -3 .

[0084] The silicon carbide substrate used in the present invention may be a silicon carbide single crystal substrate or a silicon carbide composite substrate (eg, composed of a 350 μm thick polycrystalline layer and a 1 μm thick single crystal layer).

[0085] A second aspect of the present invention provides a method for preparing the silicon carbide epitaxial wafer of the above embodiment. According to an embodiment of the present invention, the method includes:

[0086] S100: forming a first buffer layer on one side surface of the silicon carbide substrate;

[0087] According to some specific embodiments of the present invention, before forming the first buffer layer on one side surface of the silicon carbide substrate, the method further includes:

[0088] One side of the silicon carbide substrate is etched to remove the surface damage layer, providing a smoother and purer surface for subsequent epitaxial growth. At the same time, etching can adjust the micromorphology of the silicon carbide substrate surface, making it more conducive to the growth of the epitaxial layer. In addition, defects on the silicon carbide substrate surface will be replicated and amplified during the epitaxial growth process, thereby affecting the performance of the epitaxial layer. Etching can reduce the defect density on the silicon carbide substrate surface and reduce the impact of these defects on the epitaxial layer.

[0089] As some specific embodiments, the etching conditions include at least one of the following conditions: a) the etching temperature is 1500 o C-1600 o C (for example, it can be 1500 o C. 1520 o C. 1540 o C. 1560 o C. 1580 o C. 1600 o C, etc.), b) the etching time is 5 min-10 min (for example, 5 min, 6 min, 7 min, 8 min, 9 min, 10 min, etc.), c) the hydrogen flow rate is 80 slm-200 slm (for example, 80 slm, 100 slm, 120 slm, 140 slm, 160 slm, 180 slm, 200 slm, etc.), and d) the reaction pressure is 100 mbar-150 mbar (for example, 100 mbar, 110 mbar, 120 mbar, 130 mbar, 140 mbar, 150 mbar, etc.), thereby further ensuring the etching effect and further ensuring that the contact angle θ1 between the surface of the silicon carbide substrate and water after etching satisfies 20°≤θ1≤30°.

[0090] According to some further specific embodiments of the present invention, when forming the first buffer layer, the reaction pressure is 70 mbar-90 mbar (for example, 70 mbar, 75 mbar, 80 mbar, 85 mbar, 90 mbar, etc.), the central doping source flow rate is 300 sccm-400 sccm (for example, 300 sccm, 320 sccm, 340 sccm, 360 sccm, 380 sccm, 400 sccm, etc.), the carbon source flow rate is 10 sccm-15 sccm (for example, 10 sccm, 11 sccm, 12 sccm, 13 sccm, 14 sccm, 15 sccm, etc.), the silicon source flow rate is 50 sccm-70 sccm (for example, 50 sccm, 55 sccm, 60 sccm, 65 sccm, 70 sccm, etc.), and the temperature is 1600 o C-1700 o C (for example, it can be 1600 o C. 1620 o C. 1640 o C. 1660 o C. 1680 o C. 1700 o C, etc.), and the reaction time is 1 min-5 min (for example, 1 min, 2 min, 3 min, 4 min, 5 min, etc.), thereby ensuring that the contact angle θ2 of the formed first buffer layer with water satisfies 35°≤θ2≤60°.

[0091] According to some further specific embodiments of the present invention, when forming the first buffer layer, the reaction pressure is stepped or linearly reduced from 100 mbar-150 mbar (for example, 100 mbar, 110 mbar, 120 mbar, 130 mbar, 140 mbar, 150 mbar, etc.) to 70 mbar-90 mbar (for example, 70 mbar, 75 mbar, 80 mbar, 85 mbar, 90 mbar, etc.), the central doping source flow rate is stepped or linearly increased from 50 sccm-100 sccm (for example, 50 sccm, 60 sccm, 70 sccm, 80 sccm, 90 sccm, 100 sccm, etc.) to 300 sccm-400 sccm (for example, 300 sccm, 320 sccm, 340 sccm, 360 sccm, 380 sccm, 400 sccm, etc.), and the carbon source flow rate is stepped or linearly increased from 15 sccm-30sccm (for example, 15 sccm, 17 sccm, 20 sccm, 22 sccm, 25 sccm, 28 sccm, 30 sccm, etc.) is stepped or linearly reduced to 10 sccm-15 sccm (for example, 10 sccm, 11 sccm, 12 sccm, 13 sccm, 14 sccm, 15 sccm, etc.), the silicon source flow rate is stepped or linearly increased from 10 sccm-15 sccm (for example, 10 sccm, 11 sccm, 12 sccm, 13 sccm, 14 sccm, 15 sccm, etc.) to 50 sccm-70 sccm (for example, 50 sccm, 55 sccm, 60 sccm, 65 sccm, 70 sccm, etc.), the temperature is increased from 1450 o C-1550 o C (for example, it can be 1450 o C. 1470 o C. 1500 o C. 1520 o C. 1550 o C, etc.) stepwise or linear increase to 1600 o C-1700 o C (for example, it can be 1600 o C. 1620 o C. 1640 o C. 1660 o C. 1680 o C. 1700 oC, etc.), and the reaction time is 1 min to 5 min (for example, 1 min, 2 min, 3 min, 4 min, 5 min, etc.). This ensures that the contact angle θ2 between the formed first buffer layer and water satisfies 35°≤θ2≤60°. Furthermore, the formed first buffer layer can include multiple first sub-buffer layers, and the contact angles between the multiple first sub-buffer layers and water increase gradually or linearly as they move away from the silicon carbide substrate.

[0092] S200: forming a second buffer layer on a surface of the first buffer layer away from the silicon carbide substrate;

[0093] In this step, a second buffer layer is formed on a surface of the first buffer layer away from the silicon carbide substrate, and the first buffer layer and the second buffer layer together form a buffer layer.

[0094] According to some further specific embodiments of the present invention, when forming the second buffer layer, the reaction pressure is increased from 70 mbar-90 mbar (for example, 70 mbar, 75 mbar, 80 mbar, 85 mbar, 90 mbar, etc.) to 110 mbar-170 mbar (for example, 110 sccm, 120 mbar, 130 mbar, 140 mbar, 150 mbar, 160 mbar, 170 mbar, etc.) in a step-by-step, linear, or direct manner, and the central doping source flow rate is reduced from 300 sccm-400 sccm (for example, 300 sccm, 320 sccm, 340 sccm, 360 sccm, 380 sccm, 400 sccm, etc.) to 40 sccm-105 sccm (for example, 40 sccm, 50 sccm, 60 sccm, 70 sccm, 80 sccm, 90 sccm, 100 sccm, 105 sccm, etc.), the carbon source flow rate is increased from 10 sccm-15 sccm (for example, 10 sccm, 11 sccm, 12 sccm, 13 sccm, 14 sccm, 15 sccm, etc.) in a step-by-step, linear or direct manner to 25 sccm-40 sccm (for example, 25 sccm, 30 sccm, 32 sccm, 34 sccm, 36 sccm, 38 sccm, 40 sccm, etc.), and the silicon source flow rate is decreased from 50 sccm-70 sccm (for example, 50 sccm, 55 sccm, 60 sccm, 65 sccm, 70 sccm, etc.) in a step-by-step, linear or direct manner to 20 sccm-50 sccm (for example, 20 sccm, 25 sccm, 30 sccm, 35 sccm, 40 sccm, 45 sccm, 50 sccm, etc.), the temperature is from 1600 o C-1700 o C (for example, it can be 1600 o C. 1620 o C. 1640 o C. 1660 o C. 1680 o C. 1700 o C etc.) stepwise, linear or directly reduced to 1450 o C-1600 o C (for example, it can be 1450 o C. 1500 o C. 1550 o C. 1600 oC, etc.), with a reaction time of 1 min to 5 min (e.g., 1 min, 2 min, 3 min, 4 min, 5 min, etc.). This ensures that the contact angle θ3 of the formed second buffer layer with water satisfies 0° < θ3 ≤ 30°, thereby satisfying θ1 < θ2, and θ2 > θ3. Furthermore, it ensures that the formed second buffer layer includes multiple second sub-buffer layers, and that the contact angles of the multiple second sub-buffer layers with water increase gradually or linearly as they move away from the silicon carbide substrate.

[0095] In an embodiment of the present invention, the specific type of the above-mentioned doping source is not particularly limited. If it is an N-type silicon carbide epitaxial wafer, the doping element can be nitrogen, and the doping source can be nitrogen, ammonia, etc.; if it is a P-type silicon carbide epitaxial wafer, the doping element can be aluminum or boron, etc., and the doping source can be trimethylaluminum, etc.

[0096] In the embodiments of the present invention, the specific type of the carbon source is not particularly limited. In some specific embodiments, the carbon source includes at least one of ethylene, methane and propane.

[0097] In the embodiments of the present invention, the specific type of the silicon source is not particularly limited. In some specific embodiments, the silicon source includes at least one of trichlorosilane, silane and dichlorosilane.

[0098] S300: forming a silicon carbide epitaxial layer on a surface of the second buffer layer away from the silicon carbide substrate;

[0099] According to some further specific embodiments of the present invention, during the formation of the silicon carbide epitaxial layer, the carbon source flow rate is controlled to be 150 sccm-300 sccm (for example, 150 sccm, 170 sccm, 200 sccm, 220 sccm, 250 sccm, 270 sccm, 300 sccm, etc.), the silicon source flow rate is controlled to be 350 sccm-600 sccm (for example, 350 sccm, 400 sccm, 450 sccm, 500 sccm, 550 sccm, 600 sccm, etc.), and the duration is 5 min-30 min (for example, 5 min, 7 min, 9 min, 10 min, 12 min, 15 min, 20 min, 25 min, 30 min, etc.). This further ensures the formation of a silicon carbide epitaxial layer of high crystal quality.

[0100] The method for preparing silicon carbide epitaxial wafers according to the above embodiment of the present invention is beneficial for obtaining a buffer layer with high crystal quality, and further beneficial for obtaining silicon carbide epitaxial wafers with low defect density and high crystal quality, by precisely controlling the distribution of the contact angle of the buffer layer, that is, the contact angle θ1 between the silicon carbide substrate and water is smaller than the contact angle θ2 between the first buffer layer and water, and the contact angle θ2 between the first buffer layer and water is larger than the contact angle θ3 between the second buffer layer and water.

[0101] A third aspect of the present invention provides a power device. According to an embodiment of the present invention, the power device comprises a silicon carbide epitaxial wafer according to the first aspect or a silicon carbide epitaxial wafer produced by the method according to the second aspect. This helps improve the yield of the power device. It should be noted that the features and advantages described above for the silicon carbide epitaxial wafer also apply to this power device and will not be repeated here.

[0102] Specifically, the silicon carbide epitaxial wafer of the present invention can be used for various power devices, such as metal oxide semiconductor field effect transistor MOSFET, Schottky barrier diode SBD, insulated gate bipolar transistor IGBT, bipolar junction transistor BJT, etc.

[0103] The following embodiments of the present invention are described in detail. It should be noted that the following embodiments are illustrative and are intended only to explain the present invention and are not to be construed as limiting the present invention. In addition, unless otherwise expressly stated, all reagents used in the following embodiments are commercially available or can be synthesized according to methods described herein or known methods. Reaction conditions not listed are also readily available to those skilled in the art.

[0104] Example 1

[0105] This embodiment includes the following steps:

[0106] 1. Place the silicon carbide substrate in the epitaxial equipment for etching. Set the reaction chamber pressure to 120 mbar, the hydrogen flow rate to 180 slm, and increase the temperature from 900 to 1000 °C within 20 minutes. o C increased to 1500 o C; at 1500 o C for 5 min.

[0107] 2. Buffer layer growth using chemical vapor deposition.

[0108] (1) Set the reaction pressure to 100 mbar, the central nitrogen flow rate to 100 sccm, the ethylene flow rate to 15 sccm, the silicon source flow rate to 15 sccm, and the temperature to 1550 o C, hold for 2 min to form the first sub-buffer layer.

[0109] (2) Set the reaction pressure to 95 mbar, the central nitrogen flow rate to 200 sccm, the ethylene flow rate to 20 sccm, the silicon source flow rate to 20 sccm, and the temperature to 1600 o C, hold for 1 min to form the second first sub-buffer layer.

[0110] (3) Set the reaction pressure to 70 mbar, the central nitrogen flow rate to 400 sccm, the ethylene flow rate to 10 sccm, the silicon source flow rate to 70 sccm, and the temperature to 1700 o C, hold for 3 min to form the third first sub-buffer layer, and the three first sub-buffer layers together form the first buffer layer.

[0111] (4) Adjust the reaction pressure from 70 mbar to 100 mbar, the central nitrogen flow rate from 400 sccm to 100 sccm, the ethylene flow rate from 10 sccm to 25 sccm, the silicon source flow rate from 70 sccm to 55 sccm, and the temperature from 1700 o C is adjusted to 1650 o C, hold for 4 min to form the first second sub-buffer layer.

[0112] (5) Set the reaction pressure to 170 mbar, the central nitrogen flow rate to 40 sccm, the ethylene flow rate to 40 sccm, the silicon source flow rate to 20 sccm, and the temperature to 1600 o C, hold for 5 min to form a second second sub-buffer layer, and the two second sub-buffer layers together form the second buffer layer.

[0113] 3. Use chemical vapor deposition to grow an epitaxial layer. Set the ethylene, trichlorosilane, center nitrogen, and edge nitrogen flow rates to 160 sccm, 400 sccm, 200 sccm, and 300 sccm, respectively. Adjust the reaction chamber gas flow rates within 1 minute. Continue for 10 minutes to grow an epitaxial layer to a thickness of 10 μm.

[0114] 4. Cool down to 900 o After C, the silicon carbide epitaxial wafer is taken out to obtain the epitaxial wafer of this embodiment.

[0115] 5. Test the yield of metal oxide semiconductor field effect transistors (MOSFETs) made from silicon carbide epitaxial wafers.

[0116] Example 2-Example 6

[0117] The preparation methods of Examples 2 to 6 are basically the same as those of Example 1, with the only difference being the growth of the buffer layer:

[0118] The buffer layer process of Example 1 has five layers, while the buffer layer processes of Examples 2 to 6 do not have steps (1), (2) and (4), but only steps (3) and (5). The corresponding buffer layer has only two layers. Step (3) forms the first buffer layer, and step (5) forms the second buffer layer. The parameters are shown in Table 1.

[0119] Example 7

[0120] The preparation method of this embodiment is basically the same as that of Example 1, except that:

[0121] 2. Buffer layer growth using chemical vapor deposition.

[0122] (3) The reaction pressure was linearly reduced from 100 mbar to 70 mbar, the central nitrogen flow rate was linearly increased from 100 sccm to 400 sccm, the ethylene flow rate was linearly reduced from 15 sccm to 10 sccm, the silicon source flow rate was linearly increased from 15 sccm to 70 sccm, and the temperature was linearly increased from 1550 o C linearly increases to 1700 o C, linear change time is 3 min, followed by 3 min of maintenance.

[0123] (5) The reaction pressure was linearly increased from 70 mbar to 170 mbar, the central nitrogen flow rate was linearly decreased from 400 sccm to 50 sccm, the ethylene flow rate was linearly increased from 10 sccm to 40 sccm, the silicon source flow rate was linearly decreased from 70 sccm to 20 sccm, and the temperature was linearly increased from 1700 o C decreases linearly to 1600 o C, linear change time is 4 min, followed by 5 min of maintenance.

[0124] Comparative Example 1

[0125] The preparation method of this comparative example is basically the same as that of Example 1, with the only difference being the growth of the buffer layer:

[0126] In the buffer layer process of this comparative example, there are no steps (2) to (5), only step (1), and the corresponding buffer layer has only one layer. The parameters are shown in Table 1.

[0127] Comparative Example 2

[0128] The preparation method of this comparative example is basically the same as that of Example 1, with the only difference being the growth of the buffer layer:

[0129] The buffer layer process of Example 1 has five layers, while the buffer layer process of Comparative Example 2 does not include steps (1), (2) and (4), but only steps (3) and (5). The corresponding buffer layer has only two layers, and step (3) forms the first buffer layer, while step (5) forms the second buffer layer. The parameters are shown in Table 1. The difference between this comparative example and Example 1 lies in the parameters in Table 1.

[0130] Table 1

[0131]

[0132] Test method:

[0133] The present invention uses SIMS (secondary ion mass spectrometry) to test the thickness and doping concentration of the silicon carbide epitaxial wafer buffer layer. SIMS testing uses a high-energy ion beam to bombard the sample surface, sputtering atoms or molecules from the sample surface. The sputtered atoms or molecules collide with surrounding atoms or molecules, generating new secondary ions. These secondary ions are introduced into a mass spectrometer, where magnetic and electric fields separate and detect them based on their mass-to-charge ratio. Analysis of the secondary ion mass and concentration reveals the chemical composition and content at different depths of the sample. The step size for this test was 7 nm. The results are shown in Table 1.

[0134] The present invention first polished a silicon carbide epitaxial wafer to a certain thickness using a single-sided polisher. Contact angle measurements were then performed on the silicon carbide wafers according to the GBT30447-2013 standard. Five test points were selected for each wafer and the average value was calculated. Polishing was then continued to a certain thickness, and contact angle measurements were continued until the contact angle of each buffer layer was measured. The results are shown in Table 1.

[0135] The present invention conducted a rocking curve test on silicon carbide epitaxial wafers according to the GB / T 42676-2023 standard, with an omega scan axis, a 0.1° scan range, a 0.0005° step size, 0.1 s per step, and a single scan time of 20 s. The results are shown in Table 2.

[0136] Table 2

[0137]

[0138] From Table 1, Table 2 and Figure 3It can be seen that the doping concentration of the buffer layer of Example 1 first increases gradually to the target value as the thickness of the buffer layer increases, and maintains a certain thickness. This is to allow the contact angle to first increase gradually to the target value, and the corresponding surface energy decreases, which is beneficial to suppress the evolution of substrate defects into epitaxial defects; secondly, the doping concentration decreases as the thickness of the buffer layer increases, and maintains a certain thickness, which is beneficial to reducing the contact angle to the target value, and the corresponding surface energy increases, which is beneficial to the adsorption of the vapor precursor on the surface of the buffer layer, chemical reaction occurs, and is beneficial to the stable progress of the chemical vapor deposition process. At the same time, changing other reaction parameters can make the contact angle change as follows Figure 4 As shown in Figure 2, increasing temperature, decreasing pressure, and lowering the carbon-silicon ratio all contribute to silicon-enriched wafer surfaces, thereby reducing surface energy and increasing the contact angle; the opposite actions decrease the contact angle. Consequently, the rocking curve half-width of the prepared silicon carbide epitaxial wafer is 17 s, indicating high crystal quality. After fabrication into MOSFETs, the device yield reaches 95%.

[0139] As can be seen from Table 1 and Table 2, the number of buffer layers corresponding to Example 2 and Example 3 is only two, but the specific values ​​are different, but both are within the specified range of the present invention. Figure 5 、 Figure 6 As shown in the figure, the change trend of the buffer layer doping concentration and contact angle of Example 2 is consistent with that of Example 1. The doping concentration first increases and then decreases, and the corresponding contact angle of the buffer layer first increases and then decreases. Therefore, the corresponding silicon carbide epitaxial wafer crystal quality is good, and the test yield after manufacturing MOSFET is high, which is 93%. Figure 7 、 Figure 8 As shown, the trends in the buffer layer doping concentration and contact angle in Example 3 are consistent with those in Example 1. The corresponding silicon carbide epitaxial wafers exhibit superior crystal quality, resulting in a high test yield of 91% for the fabricated MOSFETs. Compared to Example 3, Example 2 exhibits a larger θ2, which effectively prevents substrate defects from extending into the epitaxial layer. Furthermore, Example 2 exhibits a smaller θ3, which facilitates stable mass transport during chemical vapor deposition (CVD). Consequently, Example 2 exhibits a higher device yield.

[0140] From Table 1, Table 2 and Figures 9-12 It can be seen that in Examples 4 and 5, by controlling the nitrogen flow rate and other epitaxial process parameters, the doping concentration n2 of the buffer layer (n2 of Examples 4 and 5 is 6E19 cm -3 、9E18 cm -3 ), contact angle θ2 (θ2 of Example 4 and Example 5 are 61° and 34° respectively), and buffer layer thickness (5.1 μm and 0.3 μm respectively for Example 4 and Example 5) are all beyond the preferred range of the present invention (1E19 cm -3 <n2≤5E19 cm -3, 35°≤θ2≤60°, 0.4 μm≤d≤5 μm). A high contact angle θ2 (Example 4) disrupts the step flow growth of the buffer layer, increasing the density of epitaxial defects and reducing the crystal quality of the epitaxial wafer. A low contact angle θ2 (Example 5) fails to fully suppress substrate defects and easily evolves into epitaxial defects, similarly reducing the crystal quality of the epitaxial wafer. The half-width at half-maximum of the rocking curve of the prepared silicon carbide epitaxial wafer is 25 s and 24 s. Therefore, compared with Examples 1-3, the corresponding MOSFET test yields of Examples 4 and 5 are relatively low, at 85% and 86%, respectively.

[0141] From Table 1, Table 2 and Figure 13-14 As can be seen from the graph, the buffer layer contact angle θ3 (31°) in Example 6 exceeds the preferred range of the present invention (0 < θ3 ≤ 30°). This high contact angle disrupts the step flow growth of the buffer layer, increasing the epitaxial defect density. The resulting rocking curve width at half maximum of the silicon carbide epitaxial wafer is 23 s, reducing the crystal quality of the epitaxial wafer. Therefore, compared to Examples 1-3, the MOSFET test yield corresponding to Example 6 is lower, at 87%.

[0142] From Table 1, Table 2 and Figure 15-16 It can be seen that compared with Example 1, the device yield corresponding to the epitaxial wafer prepared in Example 7 is higher. This is because the contact angle between the buffer layers in Example 1 changes gradually, while the contact angle between the buffer layers in Example 7 changes linearly (as shown in FIG. Figure 16 ). This is because increasing the number of sub-buffer layers helps reduce the surface energy of the first buffer layer, thereby more effectively suppressing the extension of substrate surface defects. At the same time, increasing the number of sub-buffer layers helps gradually increase the surface energy of the second buffer layer, thereby promoting a more stable chemical vapor deposition process. The linear change in the contact angle is equivalent to having countless sub-buffer layers. Therefore, the silicon carbide buffer layer prepared in Example 7 is of higher quality, and thus the crystal quality of the silicon carbide epitaxial layer is higher, which increases the device yield.

[0143] From Table 1, Table 2 and Figure 17-18 As can be seen in the figure, the buffer layer doping concentration and contact angle of Comparative Example 1 remain unchanged, indicating that the buffer layer is a single layer. The lack of an initial increase in the contact angle in this comparative example results in substrate defects easily extending to the epitaxial layer, increasing the defect density of the epitaxial wafer. The resulting silicon carbide epitaxial wafer exhibits a rocking curve full width at half maximum of 35 s, indicating poor crystal quality. This results in a low MOSFET test yield of only 80%. Therefore, designing specific variations in the buffer layer contact angle is crucial for improving the crystal quality of the buffer layer, thereby reducing the epitaxial defect density and improving device yield.

[0144] It can be seen from Table 1 and Table 2 that Comparative Example 2 does not satisfy θ1<θ2 and θ2>θ3。 During the growth of the first sub-buffer layer, the contact angle is small, resulting in a high surface energy on the wafer surface, which exacerbates the extension and expansion of substrate defects. During the growth of the second sub-buffer layer, the surface energy on the wafer is also low, which is detrimental to the stability of the epitaxial growth process. Ultimately, this leads to reduced crystal quality of the prepared silicon carbide epitaxial wafers, with the half-maximum width of the rocking curve reaching as high as 40 s. As a result, the test yield of the fabricated MOSFET is also low, as low as 70%.

[0145] In the description of this specification, the reference terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" mean that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art can combine and combine different embodiments or examples described in this specification and features of different embodiments or examples without contradiction.

[0146] Although the embodiments of the present invention have been shown and described above, it will be understood that the above embodiments are illustrative and are not to be construed as limitations on the present invention. A person skilled in the art may change, modify, replace and modify the above embodiments within the scope of the present invention.

Claims

1. A silicon carbide epitaxial wafer, characterized in that: Comprising: A silicon carbide substrate; A buffer layer, the buffer layer comprising a first buffer layer and a second buffer layer, the first buffer layer being disposed on one surface of the silicon carbide substrate, and the second buffer layer being disposed on a surface of the first buffer layer remote from the silicon carbide substrate; A silicon carbide epitaxial layer, the silicon carbide epitaxial layer being disposed on a surface of the second buffer layer remote from the silicon carbide substrate; Wherein, the contact angle between the silicon carbide substrate and water is θ1, the contact angle between the first buffer layer and water is θ2, and the contact angle between the second buffer layer and water is θ3, satisfying θ1 < θ2 and θ2 > θ3.

2. The silicon carbide epitaxial wafer according to claim 1, characterized in that Satisfying 20° ≤ θ1 ≤ 30°, 30° < θ2 ≤ 63°, 0° < θ3 ≤ 33°; Alternatively, satisfying 20° ≤ θ1 ≤ 30°, 31° ≤ θ2 ≤ 60°, 0° < θ3 ≤ 30°.

3. The silicon carbide epitaxial wafer according to claim 1, characterized in that: The first buffer layer comprises a plurality of first sub-buffer layers, and along the direction away from the silicon carbide substrate, the contact angles between the plurality of first sub-buffer layers and water increase in sequence.

4. The silicon carbide epitaxial wafer according to claim 3, characterized in that: Along the direction away from the silicon carbide substrate, the contact angles between the plurality of first sub-buffer layers and water increase gradiently or linearly.

5. The silicon carbide epitaxial wafer according to claim 1, characterized in that: The second buffer layer comprises a plurality of second sub-buffer layers, and along the direction away from the silicon carbide substrate, the contact angles between the plurality of second sub-buffer layers and water decrease in sequence.

6. The silicon carbide epitaxial wafer according to claim 5, characterized in that: Along the direction away from the silicon carbide substrate, the contact angles between the plurality of second sub-buffer layers and water decrease gradiently or linearly.

7. The silicon carbide epitaxial wafer according to any one of claims 1 to 6, characterized in that: Both the silicon carbide substrate and the buffer layer comprise doping elements, the doping concentration of the silicon carbide substrate is n1, the doping concentration of the first buffer layer is n2, and the doping concentration of the second buffer layer is n3, satisfying n1 < n2 and n2 > n3.

8. The silicon carbide epitaxial wafer according to claim 7, characterized in that: Meets 1E16 cm -3 ≤n1≤2E18 cm -3 , 2E18 cm -3 <n2≤6E19 cm -3 , 1E16 cm -3 ≤n3≤2E18 cm -3 .

9. The silicon carbide epitaxial wafer according to claim 7, characterized in that: The first buffer layer comprises a plurality of first sub-buffer layers, and along the direction away from the silicon carbide substrate, the doping concentrations of the plurality of first sub-buffer layers increase in sequence; And / or, the second buffer layer comprises a plurality of second sub-buffer layers, and along the direction away from the silicon carbide substrate, the doping concentrations of the plurality of second sub-buffer layers decrease in sequence.

10. The silicon carbide epitaxial wafer according to claim 9, characterized in that: Along the direction away from the silicon carbide substrate, the doping concentrations of the plurality of first sub-buffer layers increase gradiently or linearly; And / or, along the direction away from the silicon carbide substrate, the doping concentrations of the plurality of second sub-buffer layers decrease gradiently or linearly.

11. The silicon carbide epitaxial wafer according to any one of claims 1 to 6, characterized in that: The thickness of the first buffer layer is 0.14 μm to 3.2 μm; And / or, the thickness of the second buffer layer is 0.14 μm to 3.2 μm; And / or, the total thickness of the buffer layer is 0.28 μm to 6.4 μm.

12. The silicon carbide epitaxial wafer according to any one of claims 1 to 6, characterized in that: The thickness of the silicon carbide epitaxial layer is 5 μm to 20 μm.

13. A method for preparing the silicon carbide epitaxial wafer according to any one of claims 1 to 12, characterized in that: Comprising: Forming a first buffer layer on one surface of a silicon carbide substrate; Forming a second buffer layer on a surface of the first buffer layer remote from the silicon carbide substrate, the first buffer layer and the second buffer layer together forming a buffer layer; Forming a silicon carbide epitaxial layer on a surface of the second buffer layer remote from the silicon carbide substrate; The contact angle between the silicon carbide substrate and water is θ1, the contact angle between the first buffer layer and water is θ2, and the contact angle between the second buffer layer and water is θ3, satisfying θ1<θ2, and θ2>θ3.

14. The method according to claim 13, wherein: Before forming the first buffer layer on one side surface of the silicon carbide substrate, the method further includes: Etching one side surface of the silicon carbide substrate, wherein the etching conditions include at least one of the following conditions: a) Etching temperature is 1500 o C-1600 o C, b) etching time is 5 min-10 min, c) hydrogen flow rate is 80 slm-200 slm, d) reaction pressure is 100 mbar-150 mbar.

15. The method according to claim 13, characterized in that When forming the first buffer layer, the reaction pressure is 70 mbar-90 mbar, the center doping source flow rate is 300 sccm-400 sccm, the carbon source flow rate is 10 sccm-15 sccm, the silicon source flow rate is 50 sccm-70 sccm, and the temperature is 1600 o C-1700 o C, reaction time is 1 min-5 min; Alternatively, when forming the first buffer layer, the reaction pressure is reduced from 100 mbar-150 mbar in a stepwise or linear manner to 70 mbar-90 mbar, the center doping source flow rate is increased from 50 sccm-100 sccm in a stepwise or linear manner to 300 sccm-400 sccm, the carbon source flow rate is reduced from 15 sccm-30 sccm in a stepwise or linear manner to 10 sccm-15 sccm, the silicon source flow rate is increased from 10 sccm-15 sccm in a stepwise or linear manner to 50 sccm-70 sccm, and the temperature is increased from 1450 o C-1550 o C increases in steps or linearly to 1600 o C-1700 o C, reaction time is 1 min-5 min.

16. The method according to claim 15, characterized in that When forming the second buffer layer, the reaction pressure is increased from 70 mbar-90 mbar in a stepwise, linear or direct manner to 110 mbar-170 mbar, the center doping source flow rate is decreased from 300 sccm-400 sccm in a stepwise, linear or direct manner to 40 sccm-105 sccm, the carbon source flow rate is increased from 10 sccm-15 sccm in a stepwise, linear or direct manner to 25 sccm-40 sccm, the silicon source flow rate is decreased from 50 sccm-70 sccm in a stepwise, linear or direct manner to 20 sccm-50 sccm, and the temperature is increased from 1600 o C-1700 o C is reduced stepwise, linearly or directly to 1450℃-1600℃, and the reaction time is 1 min-5 min.

17. The method according to claim 16, characterized in that The doping source includes one of nitrogen, ammonia and trimethylaluminum; and / or, the carbon source comprises at least one of ethylene, methane and propane; And / or, the silicon source includes at least one of trichlorosilane, silane and dichlorosilane.

18. The method according to any one of claims 13 to 17, characterized in that During the process of forming the silicon carbide epitaxial layer, the flow rate of the carbon source is controlled to be 150 sccm-300 sccm, the flow rate of the silicon source is controlled to be 350 sccm-600 sccm, and the duration is 5 min-30 min.

19. A power device, characterized in that: The invention comprises the silicon carbide epitaxial wafer according to any one of claims 1 to 12 or the silicon carbide epitaxial wafer prepared by the method according to any one of claims 13 to 18.

Images