ROM (Read Only Memory) storage method and system and storage medium

Abstract

The invention discloses an ROM storage method and system and a storage medium, and belongs to the technical field of solid state disks. The method comprises the steps that ROM firmware is loaded from an ROM assembly, and the ROM firmware issues an eFlash controller assembly read ROM patch area command; the eFlash controller component writes read-out ROM patch data into an on-chip storage designated area, ROM firmware reads the position of an ROM frame header stored on a chip, the read-out ROM frame header is all 1 at the moment, and the ROM firmware judges that no ROM patch exists; the CPU component issues a programming command to the eFlash controller component and initiates a request for writing the ROM patch into the eFlash component, and the eFlash controller component writes the ROM patch into the eFlash component; and the eFash controller component returns a programming command execution result to the CPU component, the CPU component verifies the programming command execution result, and the ROM patch update is completed if the verification is passed. According to the invention, the eFlash is adopted to store and load the ROM patch data, so that the required ROM capacity is greatly reduced, the chip area is saved, and the potential high ROM ECO cost is saved.

Description

Technical Field

[0001] The present invention relates to the technical field of solid state drives, and particularly to a ROM storage method, system and storage medium. Background Art

[0002] In traditional chip design, ROM (Read-Only Memory) is used as the storage medium for firmware code, and its capacity directly affects the chip area and manufacturing cost. The existing technology generally uses a large-capacity ROM to store the complete firmware program, which not only increases the silicon area of the chip, but also significantly increases the production cost. When there are design errors or functional defects in the ROM firmware, it is often necessary to physically modify the chip through an Engineering Change Order (ECO). This late-stage repair method not only incurs high engineering costs, but also extends the product launch cycle.

[0003] Although the SPI interface external NOR Flash patch solution that emerged in recent years can avoid ECO modification, it still has obvious defects: First, it requires additional configuration of an SPI controller and a storage chip, resulting in an increase in system complexity and BOM cost; Second, the external storage device is vulnerable to physical attacks, and there is a security risk that the firmware code can be illegally stolen or tampered with; Third, transmitting patch data through an external bus introduces timing uncertainty and affects the reliability of system startup. In addition, traditional patch loading mechanisms often need to reserve redundant ROM space for patch storage, which actually reduces the storage resource utilization rate. Summary of the Invention

[0004] The purpose of the present invention is to overcome the deficiencies of the prior art and provide a ROM storage method, system and storage medium.

[0005] The purpose of the present invention is achieved through the following technical solutions: In the first aspect of the present invention, there is provided: A ROM storage method for a solid state drive controller, including the following steps: Load the ROM firmware from the ROM component, and the ROM firmware issues a command to the eFlash controller component to read the ROM patch area; The eFlash controller component writes the read ROM patch data to a specified area of on-chip storage. The ROM firmware reads the position of the ROM frame header stored on the chip. At this time, the read ROM frame header is all 1, and the ROM firmware determines that there is no ROM patch; The CPU component issues a programming command to the eFlash controller component, initiating a request to write the ROM patch into the eFlash component. The eFlash controller component writes the ROM patch into the eFlash component; The eFash controller component returns the execution result of the programming command to the CPU component. The CPU component verifies the execution result of the programming command. If the verification passes, the ROM patch update is completed.

[0006] Preferably, when loading the ROM patch, the following steps are included: After the ROM patch update is completed, power on again to implement the power-on firmware loading method of ROM + eFlash; Load the ROM firmware from the ROM component, and the ROM firmware issues a command to the eFlash controller component to read the ROM patch area; The eFlash controller component writes the read ROM patch data into the on-chip storage area. After the ROM firmware correctly reads the ROM frame header in the on-chip storage area, the ROM firmware jumps to the first address after the on-chip storage frame header position to execute the ROM firmware until the ROM patch is executed completely.

[0007] Preferably, the solid-state drive controller includes a CPU component, and the CPU component is connected to the ROM component and the eFlash controller component; the eFlash controller component is connected to the eFlash component; the eFlash component is used to provide a firmware variable storage area and ROM data storage; the eFlash controller component is used to control the read-write-erase of the eFlash component and the read management of the firmware variable storage area and ROM data storage; the CPU component is used to issue read-write commands to the eFlash controller and the ROM component.

[0008] The second aspect of the present invention provides: A ROM storage system for implementing any one of the above ROM storage methods, including: A loading module for loading the ROM firmware from the ROM component, and the ROM firmware issues a command to the eFlash controller component to read the ROM patch area; A reading module for using the eFlash controller component to write the read ROM patch data into a specified area of the on-chip storage. The ROM firmware reads the ROM frame header position in the on-chip storage. At this time, the read ROM frame header is all 1, and the ROM firmware determines that there is no ROM patch; A writing module for using the CPU component to issue a programming command to the eFlash controller component, initiating a request to write the ROM patch into the eFlash component, and the eFlash controller component writes the ROM patch into the eFlash component; A verification module for using the eFash controller component to return the execution result of the programming command to the CPU component, and the CPU component verifies the execution result of the programming command. If the verification passes, the ROM patch update is completed.

[0009] The third aspect of the present invention provides: A computer-readable storage medium, characterized in that: computer-executable instructions are stored in the computer-readable storage medium, and when the computer-executable instructions are loaded and executed by a processor, any one of the above ROM storage methods is implemented.

[0010] The fourth aspect of the present invention provides: a computer program product containing instructions, which, when running on a terminal, causes the terminal to execute any one of the above ROM storage methods.

[0011] The beneficial effects of the present invention are as follows: 1) By using eFlash to store and load ROM patch data, the required ROM capacity is greatly reduced, saving chip area.

[0012] 2) When there is an error in the ROM firmware, the ROM patch can be updated conveniently without performing an ECO on the chip, greatly saving the chip ECO cost.

[0013] 3) Compared with the traditional method of loading ROM patches through SPI, the SPI NOR Flash storage device is saved, reducing the cost of the disk. Since the ROM patch is still within the main control chip, this solution has higher security. Description of the Drawings

[0014] Figure 1 It is a flowchart of the ROM storage method; Figure 2 It is a block diagram of a solid-state drive controller. Detailed Embodiments

[0015] Next, the technical solutions of the present invention will be described clearly and completely in conjunction with the embodiments. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative efforts belong to the scope of protection of the present invention.

[0016] Refer to Figure 1 - Figure 2 , the first aspect of the present invention provides: a ROM storage method for a solid-state drive controller, including the following steps: Load the ROM firmware from the ROM component, and the ROM firmware issues a command to the eFlash controller component to read the ROM patch area; The eFlash controller component writes the read ROM patch data to a specified area of the on-chip storage. The ROM firmware reads the position of the ROM frame header stored on the chip. At this time, the read ROM frame header is all 1, and the ROM firmware determines that there is no ROM patch; The CPU component issues a programming command to the eFlash controller component, initiating a request to write the ROM patch into the eFlash component, and the eFlash controller component writes the ROM patch into the eFlash component; The eFash controller component returns the programming command execution result to the CPU component, and the CPU component verifies the programming command execution result. If the verification passes, the ROM patch update is completed.

[0017] In this embodiment, since the ROM needs to be read out when powered on, the present invention still requires a small ROM, and the typical size of the embodiment 1 is 32KB (if there is subsequent technological progress, the required ROM size will continue to decrease, which still falls within the scope of protection of the present invention). Figure 1 As shown, after power-on, the original ROM firmware is loaded from the original ROM, and the ROM firmware sends the eFlash controller component to read the ROM patch area command. The eFlash controller reads the ROM patch data (empty data at this time) from the eFlash and writes it to the specified area of the on-chip storage. The ROM firmware reads the ROM frame header position stored on the chip. Since the ROM frame header read out at this time is all 1, the ROM firmware determines that there is no ROM patch, and the ROM startup is completed. The CPU sends a programming command to the eFlash controller component and initiates a request to write the firmware patch into the eFlash. The eFlash controller component receives the programming operation command and writes the ROM patch data into the eFlash. After the eFlash programming is completed, the eFlash controller component returns the execution result of the programming command to the CPU. The CPU confirms the returned programming result, and the ROM patch is updated.

[0018] In some embodiments, when loading a ROM patch, the following steps are included: After the ROM patch update is completed, power on again to implement the ROM+eFlash power-on firmware loading method; Load the ROM firmware from the ROM component, and the ROM firmware sends a command to the eFlash controller component to read the ROM patch area; The eFlash controller component writes the read ROM patch data to the on-chip storage area. After the ROM firmware correctly reads the ROM frame header in the on-chip storage area, the ROM firmware jumps to the first address after the on-chip storage frame header position to execute the ROM firmware until the ROM patch is executed.

[0019] In this embodiment, after power-on again, the ROM+eFlash power-on firmware loading method is implemented. After power-on, the original ROM firmware is loaded from the original ROM. The ROM firmware sends the eFlash controller component to read the ROM patch area command. The eFlash controller reads the ROM patch data (empty data at this time) from the eFlash and writes it to the specified area of the on-chip storage. The ROM firmware reads the on-chip stored ROM frame header position, determines that the read ROM frame header is correct, and determines that there is a ROM patch. It jumps to the first address after the on-chip stored ROM frame header to execute the ROM firmware until the ROM patch is executed.

[0020] In some embodiments, the solid-state hard disk controller includes a CPU component, the CPU component is connected to the ROM component and the eFlash controller component; the eFlash controller component is connected to the eFlash component; the eFlash component is used to provide a firmware variable storage area and a ROM data storage; the eFlash controller component is used to control the reading, writing and erasing of the eFlash component, and the reading management of the firmware variable storage area and the ROM data storage; the CPU component is used to issue read and write commands to the eFlash controller and the ROM component.

[0021] In this embodiment, if Figure 2 As shown, only the components related to the present invention in the solid-state hard disk controller are drawn. The solid-state hard disk controller includes a CPU component, a ROM component, an eFlash controller component, and an eFlash component. The functions and roles of each component are described in detail below: eFlash component: eFlash is embedded Flash. As the name implies, the flash memory is embedded in the chip. The capacity of the eFlash component is relatively small in the application of the solid-state hard disk controller, usually in the MB order. The reason is that the area of the eFlash is large. Considering the application requirements, the capacity of the MB order has met the requirements. The role of eFlash in the application of the solid-state hard disk controller is to provide a key update area, a digital certificate storage area, a firmware variable storage area, a ROM data storage area, etc. eFlash controller component: The eFlash controller component is used for specific control of operations such as reading, writing, and erasing of the eFlash. In addition to this basic function, the eFlash controller component also undertakes the CPU read management of the key update area and the digital certificate storage area. The ROM storage area is used for storage of the on-chip ROM. CPU component: This component is used to issue read and write commands of the eFlash controller and read and write commands of the ROM component, etc. CPU functions not related to the present invention are not described here.

[0022] A second aspect of the present invention provides: a ROM storage system, used to implement any of the above ROM storage methods, comprising: A loading module, configured to load ROM firmware from a ROM component, and the ROM firmware issues a command to an eFlash controller component to read a ROM patch area; A reading module, configured to use the eFlash controller component to write the read ROM patch data into a specified area of on-chip storage. The ROM firmware reads the position of the ROM frame header stored on the chip. At this time, the read ROM frame header is all 1, and the ROM firmware determines that there is no ROM patch; A writing module, configured to issue a programming command to the eFlash controller component using a CPU component, initiate a request to write a ROM patch into the eFlash component, and the eFlash controller component writes the ROM patch into the eFlash component; A verification module, configured to use the eFash controller component to return the execution result of the programming command to the CPU component, and the CPU component verifies the execution result of the programming command. If the verification passes, the ROM patch update is completed.

[0023] A third aspect of the present invention provides: A computer-readable storage medium, characterized in that: computer-executable instructions are stored in the computer-readable storage medium, and when the computer-executable instructions are loaded and executed by a processor, any of the above ROM storage methods is implemented.

[0024] A fourth aspect of the present invention provides: A computer program product containing instructions, when the computer program product runs on a terminal, the terminal is caused to execute any of the above ROM storage methods.

[0025] The above are only the preferred embodiments of the present invention. It should be understood that the present invention is not limited to the forms disclosed herein, should not be regarded as excluding other embodiments, but can be used in various other combinations, modifications and environments, and can be within the scope of the concept described herein, modified by the above teachings or the techniques or knowledge in related fields. And the modifications and changes made by those skilled in the art without departing from the spirit and scope of the present invention should all be within the protection scope of the appended claims of the present invention.

Claims

1. A ROM storage method, characterized in that: For a solid state drive controller, the following steps are included: Load the ROM firmware from the ROM component, and the ROM firmware sends a command to the eFlash controller component to read the ROM patch area; The eFlash controller component writes the read ROM patch data to the specified area of the on-chip storage. The ROM firmware reads the ROM frame header position stored on the chip. At this time, the read ROM frame header is all 1, and the ROM firmware determines that there is no ROM patch. The CPU component sends a programming command to the eFlash controller component, initiating a request to write the ROM patch into the eFlash component. The eFlash controller component writes the ROM patch into the eFlash component. The eFash controller component returns the programming command execution result to the CPU component, and the CPU component verifies the programming command execution result. If the verification passes, the ROM patch update is completed.

2. The ROM storage method according to claim 1, characterized in that: The following steps are involved when loading a ROM patch: After the ROM patch update is completed, power on again to implement the ROM+eFlash power-on firmware loading method; Load the ROM firmware from the ROM component, and the ROM firmware sends a command to the eFlash controller component to read the ROM patch area; The eFlash controller component writes the read ROM patch data to the on-chip storage area. After the ROM firmware correctly reads the ROM frame header in the on-chip storage area, the ROM firmware jumps to the first address after the on-chip storage frame header position to execute the ROM firmware until the ROM patch is executed.

3. The ROM storage method according to claim 1 or 2, characterized in that: The solid-state hard disk controller includes a CPU component, which is connected to a ROM component and an eFlash controller component; the eFlash controller component is connected to an eFlash component; the eFlash component is used to provide a firmware variable storage area and a ROM data storage; the eFlash controller component is used to control the reading, writing and erasing of the eFlash component, and the reading management of the firmware variable storage area and the ROM data storage; the CPU component is used to issue read and write commands to the eFlash controller and the ROM component.

4. A ROM storage system, characterized in that: Used to implement the ROM storage method according to any one of claims 1 to 3, comprising: The loading module is used to load the ROM firmware from the ROM component. The ROM firmware sends the eFlash controller component a command to read the ROM patch area. The read module is used to use the eFlash controller component to write the read ROM patch data to the specified area of the on-chip storage. The ROM firmware reads the ROM frame header position stored on the chip. At this time, the read ROM frame header is all 1, and the ROM firmware determines that there is no ROM patch; The writing module is used to use the CPU component to send a programming command to the eFlash controller component, initiate a request to write the ROM patch into the eFlash component, and the eFlash controller component writes the ROM patch into the eFlash component; The verification module is used to use the eFash controller component to return the programming command execution result to the CPU component. The CPU component verifies the programming command execution result. If the verification passes, the ROM patch update is completed.

5. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer-executable instructions, which, when loaded and executed by a processor, implement the ROM storage method described in any one of claims 1-3.

6. A computer program product containing instructions, characterized in that: When the computer program product runs on a terminal, the terminal is caused to execute the ROM storage method described in any one of claims 1-3.

Images