Graphic processor simulation method, simulator, device, equipment and storage medium

Abstract

The invention discloses a graphics processor simulation method, a simulator, a device, electronic equipment and a storage medium, and belongs to the technical field of simulation. Loading a target system call simulator for simulating the target graphics processor; the target system call simulator comprises a user space simulation layer, a graphics processor simulation layer and a graphics drive simulation layer connected with the graphics processor simulation layer and the user space simulation layer; and running a target program in the user space simulation layer, and directly sending a graphic system call generated in the running process of the target program to the graphic drive simulation layer, so that the graphic drive simulation layer transmits a corresponding GPU instruction set to the graphic processor simulation layer based on the graphic system call, and executes the GPU instruction set through the graphic drive simulation layer. Therefore, the software and hardware of the corresponding graphics processor can be simulated by calling the simulator through the lightweight target system, and the simulation precision of the graphics processor can be improved under the condition of ensuring relatively high simulation efficiency.

Description

Technical Field

[0001] The present invention belongs to the technical field of simulation, and particularly relates to a graphics processing unit simulation method, simulator, device, electronic device and storage medium. Background Art

[0002] As the design scale of the graphics processing unit becomes larger and larger, during the design stage of the graphics processing unit, it is necessary to continuously verify and evaluate the hardware design of the graphics processing unit. In order to meet the development requirements of the graphics processing unit, software simulation of the graphics processing unit is required.

[0003] In related technologies, usually according to the graphics processing unit to be simulated, a corresponding simulator for the graphics processing unit (such as GPGPU-Sim) is designed and established to simulate the core hardware behavior of the graphics processing unit. After deploying the simulator, the prepared instruction stream is input into the simulator to implement the simulation of the graphics processing unit.

[0004] However, the actual operating environment of the graphics processing unit is more complex than the environment simulated by the above-mentioned simulator. For example, the graphics processing unit also involves cooperation with other necessary hardware and software in the actual working environment. The above simulation of the graphics processing unit can only simulate some functions of the graphics processing unit, resulting in poor simulation accuracy of the graphics processing unit. Summary of the Invention

[0005] The purpose of the embodiments of the present invention is to provide a graphics processing unit simulation method, simulator, device, electronic device and storage medium, which can solve the problem of poor simulation accuracy of the graphics processing unit in the prior art and improve the simulation accuracy of the graphics processing unit.

[0006] In a first aspect, an embodiment of the present invention provides a graphics processing unit simulation method, which includes:

[0007] Loading a target system call simulator for simulating a target graphics processing unit; wherein, the target system call simulator includes a user space simulation layer, a graphics processing unit simulation layer, and a graphics driver simulation layer connecting the graphics processing unit simulation layer and the user space simulation layer;

[0008] Running a target program in the user space simulation layer, and directly sending the graphics system calls generated during the running of the target program to the graphics driver simulation layer, so that the graphics driver simulation layer transfers a corresponding GPU instruction set to the graphics processing unit simulation layer based on the graphics system calls, so as to execute the GPU instruction set through the graphics driver simulation layer.

[0009] In a second aspect, an embodiment of the present invention provides a simulator, which includes: a user space emulation layer, a graphics processor emulation layer, and a graphics driver emulation layer connecting the graphics processor emulation layer and the user space emulation layer;

[0010] The user space emulation layer is used to run a target program to generate a graphics system call corresponding to the target program. The graphics driver emulation layer is used to transfer a corresponding GPU instruction set to the graphics processor emulation layer according to the graphics system call. The graphics processor emulation layer is used to execute the GPU instruction set.

[0011] In a third aspect, an embodiment of the present invention provides a graphics processor emulation device, which includes:

[0012] A loading module, configured to load a target system call simulator for emulating a target graphics processor; wherein, the target system call simulator includes a user space emulation layer, a graphics processor emulation layer, and a graphics driver emulation layer connecting the graphics processor emulation layer and the user space emulation layer;

[0013] An emulation module, configured to run a target program in the user space emulation layer, directly send a graphics system call generated during the running of the target program to the graphics driver emulation layer, so that the graphics driver emulation layer transfers a corresponding GPU instruction set to the graphics processor emulation layer based on the graphics system call, and execute the GPU instruction set through the graphics driver emulation layer.

[0014] In a fourth aspect, an embodiment of the present invention provides an electronic device, which includes a processor and a memory. The memory stores a program or instruction that can run on the processor. When the program or instruction is executed by the processor, the above-mentioned graphics processor emulation method is implemented.

[0015] In a fifth aspect, an embodiment of the present invention provides a readable storage medium, on which a program or instruction is stored. When the program or instruction is executed by a processor, the above-mentioned graphics processor emulation method is implemented.

[0016] In an embodiment of the present invention, a method for simulating a graphics processing unit is provided, including loading a target system call simulator for simulating a target graphics processing unit; wherein, the target system call simulator includes a user space simulation layer, a graphics processing unit simulation layer, and a graphics driver simulation layer connecting the graphics processing unit simulation layer and the user space simulation layer; running a target program in the user space simulation layer, and directly sending a graphics system call generated during the running of the target program to the graphics driver simulation layer, so that the graphics driver simulation layer transfers a corresponding GPU instruction set to the graphics processing unit simulation layer based on the graphics system call, so as to execute the GPU instruction set through the graphics driver simulation layer. It is possible to generate a graphics system call for the GPU by running the target program through the user space simulation layer in the target system call simulator, and convert the graphics system call into a GPU instruction set through the setting of the graphics driver simulation layer and provide it to the graphics processing unit simulation layer for processing, so that the software and hardware of the corresponding target graphics processing unit can be simulated by the lightweight target system call simulator, which helps to improve the simulation accuracy of the graphics processing unit while ensuring a high simulation efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 is a flowchart of steps of a method for simulating a graphics processing unit provided by an embodiment of the present invention;

[0018] Figure 2 is an architecture diagram of the operation of an emulator provided by an embodiment of the present invention;

[0019] Figure 3 is an example diagram of the structure of a computing simulation unit provided by an embodiment of the present invention;

[0020] Figure 4 is a schematic diagram of a target system call simulator provided by an embodiment of the present invention;

[0021] Figure 5 is a schematic diagram of the processing of other system calls provided by an embodiment of the present invention;

[0022] Figure 6 is a flowchart of the generation of GPU instruction set simulation code provided by an embodiment of the present invention;

[0023] Figure 7 is a block diagram of a graphics processing unit simulation device provided by an embodiment of the present invention;

[0024] Figure 8 is an electronic device provided by an embodiment of the present invention;

[0025] Figure 9 is a schematic diagram of the hardware structure of an electronic device provided by an embodiment of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0026] The following will, in conjunction with the accompanying drawings, explain in detail the graphics processor simulation method provided by the embodiments of the present invention through specific embodiments and their application scenarios.

[0027] Refer to Figure 1 , Figure 1 which shows a flowchart of the steps of a graphics processor simulation method provided by an embodiment of the present invention. As Figure 1 shown, it specifically includes the following steps:

[0028] Step 101, load a target system call simulator for simulating a target graphics processor; wherein, the target system call simulator includes a user space simulation layer, a graphics processor simulation layer, and a graphics driver simulation layer connecting the graphics processor simulation layer and the user space simulation layer.

[0029] In an embodiment of the present invention, the target system call simulator can be loaded in the host system. The host system can refer to the system carried by the host (physical machine) for loading the target system call simulator, and specifically can include but is not limited to Linux, Android, Windows, etc. The embodiments of the present invention do not make specific limitations, and the graphics processor simulation method in the embodiments of the present invention can be applied to the above host.

[0030] The target system call simulator can simulate a target graphics processing unit (GPU). It should be noted that the above graphics processor can also be referred to as a general-purpose graphics processing unit (General-purpose computing on graphics processing units, GPGPU). The target system call simulator can be implemented based on a basic system call simulator built under simulator architectures such as gem5 (Generalized Execution-driven Microarchitecture Simulator), QEMU (Quick Emulator), etc. The embodiments of the present invention do not make specific limitations. Exemplarily, the target system call simulator can be implemented by operating on the gem5 simulator, such as configuration, parameter adjustment, module addition, etc. Among them, the system call simulator is a simulation environment that does not need to simulate the complete operating system and the entire hardware system, and has a high simulation efficiency.

[0031] In an embodiment of the present invention, the target graphics processor may represent a graphics processor with Direct Rendering capabilities. In the Direct Rendering mode of operation, the program sends graphics system calls to the graphics processor. It should be noted that graphics system calls not only include calls related to rendering, but may also include all system calls that need to be responded to by the graphics processor.

[0032] In an embodiment of the present invention, the target system call simulator may have a user space emulation layer. The user space emulation layer can provide a running environment for the target program to support the target program in making system calls. This running environment may include at least one of the necessary components to support the running of the target program, such as a Direct Rendering manager, a graphics library, etc. In some cases, the user space emulation layer may also be referred to as the user space software stack. The user space emulation layer can load the target program and execute the target program. During the execution process, it encapsulates and generates graphics system calls for the graphics processor through APIs such as libdrm, without the need to simulate the entire operating system to support the running of the target program.

[0033] The graphics driver emulation layer can be used to process the graphics system calls received from the user space emulation layer, parse the graphics system calls, and prepare a corresponding set of GPU instructions for the graphics processor emulation layer. It should be noted that the graphics driver emulation layer corresponds to the target graphics processor simulated by the graphics processor emulation layer. Different graphics processors can be set with different graphics driver emulation layers to meet the running requirements of specific graphics processors. The graphics processor emulation layer can be used to simulate the hardware and firmware of the target graphics processor, and can process the set of GPU instructions generated by the graphics driver emulation layer and return the instruction processing results.

[0034] Refer to Figure 2 , Figure 2 shows an architecture diagram of the simulator operation provided by an embodiment of the present invention. As Figure 2 shown, the bottom layer is the physical machine hardware layer. The physical machine operating system runs on top of the physical machine hardware layer. The target system call simulator can be deployed on top of the physical machine operating system. The target system call simulator may have a user space emulation layer, a graphics driver emulation layer, and a graphics processor emulation layer. The target programs (Program 1, Program 2, and Program 3) can run in the user space emulation layer.

[0035] It should be noted that the ways for the physical machine system to load the target system call simulator may include, but are not limited to: compiling and running the project code of the target system call simulator in the physical machine system, running the executable file corresponding to the target system call simulator in the physical machine system, etc.

[0036] Step 102: Run the target program in the user space emulation layer, and directly send the graphics system calls generated during the running of the target program to the graphics driver emulation layer, so that the graphics driver emulation layer transfers the corresponding GPU instruction set to the graphics processor emulation layer based on the graphics system calls, so as to execute the GPU instruction set through the graphics driver emulation layer.

[0037] In the embodiment of the present invention, the target program can be run in the user space emulation layer of the deployed target system call simulator. The specific running method can be to import the target program into the user space emulation layer through the corresponding interface provided by the user space emulation layer and run it, or to add the target program at the corresponding position in the executable file / code of the target system call simulator, and directly deploy the target system call simulator and run the target program by running the above executable file / code. The above target program can be in the form of a binary file.

[0038] When the user space emulation layer executes the target program, it can transfer the graphics system calls that the target program needs to execute to the graphics driver emulation layer. The graphics driver emulation layer generates the corresponding GPU instruction set according to the graphics system calls and executes the above GPU instruction set through the graphics processor emulation layer. Among them, the above graphics system calls can be transferred through the ioctl (input / output control) interface or other standard interfaces. The above GPU instruction set can be encapsulated in the form of an instruction packet (Packet, pkt). For example, the GPU instruction set can be encapsulated as a PM4 (Packetized Mode 4) instruction packet in the PM4 format for transfer.

[0039] In the embodiment of the present invention, the graphics driver emulation layer can transfer the GPU instruction set to the graphics processor emulation layer in the form of an instruction packet. The graphics processor emulation layer can parse the GPU instruction set to obtain the GPU instructions therein, and then execute these GPU instructions, and can write the execution results into the emulation storage space (such as emulation video memory) of the target system call simulator for the target program to obtain the execution results through the graphics system calls.

[0040] It should be noted that the target system call simulator in the embodiments of the present invention supports the operation of the target program by simulating the user space, without simulating the entire operating system. The target program runs through the simulated user space to provide graphics system calls for the software and hardware of the simulated target graphics processor, without simulating and emulating the entire operating system, thereby achieving event-level software and hardware simulation of the target graphics processor in a lightweight manner. In the embodiments of the present invention, the target system call simulator can be a simulator for simulating system calls, so as to run the target program only by simulating the user space. For example, the target system call simulator can be a simulator built based on the basic gem5 simulator in the System Call Emulation mode.

[0041] In summary, a graphics processor simulation method provided by the embodiments of the present invention includes loading a target system call simulator for simulating a target graphics processor. The target system call simulator includes a user space simulation layer, a graphics processor simulation layer, and a graphics driver simulation layer connecting the graphics processor simulation layer and the user space simulation layer. The target program runs in the user space simulation layer, and the graphics system calls generated during the running of the target program are directly sent to the graphics driver simulation layer, so that the graphics driver simulation layer transfers the corresponding GPU instruction set to the graphics processor simulation layer based on the graphics system calls, so as to execute the GPU instruction set through the graphics driver simulation layer. The target program can be run through the user space simulation layer in the target system call simulator to generate graphics system calls for the GPU. By setting the graphics driver simulation layer, the graphics system calls are converted into a GPU instruction set and provided to the graphics processor simulation layer for processing, so that the software and hardware of the corresponding target graphics processor can be simulated by the lightweight target system call simulator. The complete process of calling the graphics processor through the graphics system calls can be simulated, and the support for the direct rendering system in the graphics processor simulation can be realized. Thus, not only the process of the graphics processor processing GPU instructions can be simulated, but also the actual operation mode and running process of the graphics processor can be simulated more comprehensively and accurately, which helps to improve the simulation accuracy of the graphics processor while ensuring a high simulation efficiency.

[0042] Optionally, in some embodiments, the graphics driver simulation layer may include a system call parser and a buffer manager. The system call parser is used to parse the graphics system calls to obtain the GPU instruction set corresponding to the graphics system calls, and transfer the GPU instruction set to the buffer manager. The buffer manager is used to store the GPU instruction set in a circular buffer, so that the graphics processor simulation layer can obtain the GPU instruction set from the circular buffer.

[0043] In the embodiments of the present invention, the graphics driver simulation layer may include a system call parser and a buffer manager (Ring Buffer Manager). During the execution of the target system call simulator, the user space simulation layer may execute the target program and generate graphics system calls corresponding to the target program. These graphics system calls may be transmitted to the system call parser through the simulated memory of the target system call simulator or other means. The system call parser may parse these graphics system calls to obtain GPU instructions corresponding to the graphics system calls that can be recognized and processed by the graphics processor simulation layer. When these GPU instructions are executed by the graphics processor simulation layer, the corresponding graphics system calls can be implemented. It should be noted that the system call parser has a corresponding relationship with the target graphics processor to be simulated, and the target system call simulators for simulating different target graphics processors may have different system call parsers.

[0044] The system call parser may parse the graphics system calls through the call interface corresponding to the graphics system calls to determine the call type of the graphics system calls, and then determine the GPU instructions corresponding to the graphics system calls by querying the corresponding relationship between each call type and the GPU instructions. Exemplarily, in the case where the graphics system calls are implemented through ioctl (input / output control), the system call parser may be configured with an ioctl interface to obtain and parse the graphics system calls through the ioctl interface and determine the set or packet of GPU instructions for implementing the graphics system calls. In the embodiments of the present invention, after the system call parser determines the set of GPU instructions corresponding to the image system calls, it may transmit the set of GPU instructions to the buffer manager, and the buffer manager may write the set of GPU instructions corresponding to each graphics system call into the ring buffer (Ring Buffer) it manages. The ring buffer is a command ring that can store GPU instructions. The buffer manager may arrange the set of GPU instructions to be executed according to a preset rule and put them into the ring buffer to ensure that there is no conflict when the set of GPU instructions in the ring buffer is executed sequentially.

[0045] In the embodiments of the present invention, the graphics processor simulation layer may sequentially obtain the set of GPU instructions stored therein from the ring buffer and process them.

[0046] In the embodiments of the present invention, the system call parser and the buffer manager may be set in the target system call simulator. The graphics system calls are parsed through the system call parser, and the set of GPU instructions obtained by parsing is transmitted to the graphics processor simulation layer through the buffer manager, so as to realize the simulation of the graphics driver (Driver) supporting the target graphics processor, which helps to improve the simulation accuracy of the target graphics processor.

[0047] Optionally, in some embodiments, the graphics processor emulation layer may include a command processor emulation unit and a computing emulation unit; the command processor emulation unit is configured to obtain the GPU instruction set from the graphics driver emulation layer and allocate the GPU instructions in the GPU instruction set to the computing emulation unit; the computing emulation unit is configured to execute the GPU instructions allocated by the command processor emulation unit.

[0048] In an embodiment of the present invention, the graphics processor emulation layer may be used to simulate the functions related to the GPU hardware. Specifically, the graphics processor emulation layer may be composed of a command processor emulation unit and a computing emulation unit. Among them, the command processor emulation unit is used to simulate the command processor (CP) of the target graphics processor, and the computing emulation unit may be used to simulate the compute unit (CU) of the target graphics processor.

[0049] The command processor emulation unit may read the GPU instruction set from the circular buffer of the graphics processor emulation layer, and then allocate the GPU instructions extracted from the GPU instruction set, and allocate the GPU instructions to the appropriate computing emulation unit for execution and processing, so as to realize the simulation of the target graphics processor. The number of computing emulation units may correspond to the number of compute units included in the actual target graphics processor. Each computing emulation unit may simulate a corresponding compute unit, and the command processing unit may allocate GPU instructions to each computing emulation unit, and the GPU instructions are executed by the corresponding computing emulation unit.

[0050] In an embodiment of the present invention, by setting a command processor emulation unit and a computing emulation unit in the target system call simulator, it is possible to accurately simulate the GPU command allocation process and the processing operation process of the target graphics processor, which helps to improve the simulation accuracy of the target system call simulator for the target graphics processor.

[0051] Referring to Figure 3 , Figure 3 shows an example diagram of the structure of a computing emulation unit provided by an embodiment of the present invention, as Figure 3As shown, the computing simulation unit may include simulation modules corresponding to an instruction fetch module (Instruction Fetch), a single instruction multiple data program counter SIMD PC, an instruction arbitration module (Instruction Arbitration), a message and branch unit (Message&BranchUnit), an export / global data storage decoder (Export / GDSDecode), a vector memory decoder (Vector MemDecode), a scalar decoder (Scalar Decode), a vector decoder (Vector Decode), a local data storage decoder (LDSDecode), and an execution unit (Execute). Among them, the execution unit may include, but is not limited to, a scalar computing unit (scalar unite), a scalar register file (scalar Register file), a vector register file (vector Register file), a vector computing unit (VALU), and a local data storage memory (Local DataShare Mem). The instruction fetch module is used to fetch GPU instructions; the single instruction multiple data program counter is used to record the execution position of each SIMD; the instruction arbitration module is used to parse GPU instructions into control signals; the message and branch unit is used to process branches and thread communication; the export / global data storage decoder is used to process global data storage and export operations; the vector memory decoder is used to decode vector memory operation instructions; the scalar decoder is used to decode scalar instructions; the vector decoder is used to decode vector instructions; the local data storage decoder is used to decode local data storage operation instructions; the execution unit is used to execute GPU instructions for computing; the scalar computing unit is used to compute scalar data; the scalar register file is used to save scalar data; the vector register file is used to save vector data; the vector computing unit VALU is used to compute vector data.

[0052] Optionally, in some embodiments, the command processor simulation unit may include a hardware queue scheduling simulation module, an instruction packet processing simulation module, and an instruction scheduling simulation module; the hardware queue scheduling simulation module is used to allocate an instruction packet corresponding to a set of GPU instructions to a hardware queue; the instruction packet processing simulation module is used to allocate GPU instructions to the instruction scheduling simulation module according to the instruction packet in the hardware queue; the instruction scheduling simulation module is used to call the corresponding computing simulation unit to execute the GPU instructions.

[0053] In an embodiment of the present invention, the command processor simulation unit may be composed of a hardware queue scheduling simulation module, an instruction packet processing simulation module, and an instruction scheduling simulation module. Among them, the hardware queue scheduling simulation module may simulate the hardware queue scheduler (HW Queue Scheduler) in the target graphics processing unit. The hardware queue scheduling simulation module may be used to allocate the corresponding GPU instruction set generated by the graphics driver simulation layer according to the graphics system call to a suitable hardware queue. The GPU instruction set entering the hardware queue queues up in the hardware queue and waits to be processed by the computing simulation unit. It should be noted that the hardware queue scheduling simulation module may manage multiple hardware queues simulated by the target system call simulator. The above GPU instruction set may be obtained and allocated by the hardware queue scheduling simulation module in the form of an instruction packet. For example, the above GPU instruction set may be represented as a PM4 instruction packet.

[0054] The instruction packet processing simulation module may simulate the instruction packet processor (packetprocessor) of the target graphics processing unit. The instruction packet processing simulation module may parse the instruction packet in the hardware queue to obtain the GPU instruction in the instruction packet and pass it to the instruction scheduling simulation module. It should be noted that since the instruction packets adopted by different graphics processing units may have different formats, the instruction packet processors adopted by different graphics processing units may be different. For example, in the case where the target graphics processing unit adopts a PM4 instruction packet, the instruction packet processor carried by it may be a PM4 packet processor. Therefore, the instruction packet processing simulation module corresponding to the target image processing unit may identify and parse the PM4 instruction packet.

[0055] The instruction scheduling simulation module may simulate the instruction scheduler (Dispatcher) of the target graphics processing unit. The instruction scheduling simulation module may allocate the GPU instruction parsed by the instruction packet processing simulation module to the corresponding computing simulation unit, so as to call the corresponding computing simulation unit to execute the GPU instruction.

[0056] Further, in an embodiment of the present invention, a simulation HSA queue for simulating the HSA queue (HSA Queue) in the target graphics processing unit may also be set in the instruction scheduling simulation module. The instruction packet processing simulation module may transmit the GPU instruction to the instruction scheduling simulation module through the simulation HSA queue, so as to further improve the simulation accuracy of the target system call simulator for the target graphics processing unit.

[0057] In an embodiment of the present invention, by configuring the hardware queue scheduling simulation module, the instruction packet processing simulation module, and the instruction scheduling simulation module in the target system call simulator, the complete GPU instruction allocation process of the target graphics processing unit can be simulated, which helps to improve the simulation accuracy of the target graphics processing unit.

[0058] Optionally, in some embodiments, the target system call simulator further includes a central processing unit emulation layer; the central processing unit emulation layer is used to run and manage the GPU firmware program of the command processor emulation unit.

[0059] In the embodiments of the present invention, in order to further improve the software and hardware emulation accuracy of the target graphics processing unit, a central processing unit emulation layer can also be configured in the target system call simulator, and the GPU firmware program of the target graphics processing unit is run through the central processing unit emulation layer, so as to control the above command processor emulation unit through the GPU firmware program running in the central processing unit emulation layer, thereby accurately simulating the software and hardware interaction process of the target graphics processing unit.

[0060] The above central processing unit emulation layer is designed according to the central processing unit architecture supported by the target graphics processing unit, and is used to perform emulation and simulation on the central processing unit (CPU) supported by the target image processing unit. The architecture of the above central processing unit can include but is not limited to the X86 architecture, ARM architecture, LoongArch architecture, etc. The form of the above central processing unit can include a single-core processor and a multi-core processor, and the embodiments of the present invention do not make specific limitations.

[0061] It should be noted that the above central processing unit emulation layer can directly adopt the preset central processing unit emulator provided in the basic emulator, such as the multi-core X86 architecture CPU emulator provided in the basic gem5 emulator. The above central processing unit emulation layer can also be customized according to the GPU firmware program of the target graphics processing unit, so that the above central processing unit emulation layer only implements the necessary CPU functions required to execute the GPU firmware program of the target graphics processing unit, thereby improving the running efficiency of the target system call simulator.

[0062] Optionally, in some embodiments, the target system call simulator may also include a memory subsystem (such as Ruby), and memory simulation can be performed through the memory subsystem. The memory subsystem is usually responsible for memory access between the CPU and the GPU, cache coherence, and simulation of the interconnection network, and can provide a simulated memory channel for information transfer between the central processing unit emulation layer and the graphics processing unit emulation layer in the target system call simulator.

[0063] Optionally, in some embodiments, the graphics driver emulation layer of the target system call simulator may further include a memory manager, and the memory manager is used to simulate the management process of the video memory and shared main memory by the target graphics processing unit, further improving the simulation accuracy for the target graphics processing unit.

[0064] Refer to Figure 4 , Figure 4Shows a schematic diagram of a target system call simulator provided by an embodiment of the present invention, as Figure 4 shown, the target system call simulator may include a central processing unit emulation layer, a user space emulation layer, a graphics processing unit emulation layer, and a graphics driver emulation layer. The graphics driver emulation layer may include a system call parser, a buffer manager, and a memory manager. The graphics processing unit emulation layer may include a command processor emulation unit and a computing emulation unit. The command processor emulation unit may include a hardware queue scheduling emulation module, an instruction packet processing emulation module, and an instruction scheduling emulation module. The central processing unit emulation layer may simulate a multi-core X86 architecture CPU. A memory subsystem may be provided between the central processing unit emulation layer and the graphics processing unit emulation layer for memory emulation. The above central processing unit emulation layer, graphics processing unit emulation layer, and memory subsystem may constitute the hardware model of the target system call simulator.

[0065] Optionally, in some embodiments, the following steps may also be used to process other system calls of the target program running in the target system call simulator:

[0066] Step A1, by loading the host system of the target system call simulator, execute the host system call of the target system call simulator to obtain a call result; wherein, the host system call is determined by the target system call simulator based on other system calls of the target program.

[0067] In the embodiment of the present invention, for the target program running in the target system call simulator, in addition to issuing graphics system calls through the user space emulation layer, it may also issue other system calls for non-GPU through the user space emulation layer. To process these other system calls, a system call forwarding module may be set in the target system call simulator. Through the system call forwarding module, other system calls may be converted into the corresponding host system calls of the host (physical machine) of the target system call simulator, and the host system calls are forwarded to the host. The host directly processes the host system call, and the call result of the host system call obtained by the host is used as the call result of the corresponding other system call and fed back to the target program.

[0068] In the embodiments of the present invention, the conversion process from other system calls to host system calls can be performed according to the differences between the kernel functions simulated by the user-space emulation layer and the host system kernel. The corresponding relationships between other system calls corresponding to the user-space emulation layer and the host system kernel can be pre-configured in the target system call simulator, and other system calls can be converted into host system calls for the host according to the corresponding relationships. It should be noted that when the kernel functions simulated by the user-space emulation layer are the same as the host system kernel, that is, when other system calls issued by the user-space emulation layer are applicable to the host, other system calls can be directly used as host system calls for the host.

[0069] Specifically, in one implementation, after the target program issues other system calls, the other system calls can be intercepted to determine the host system calls corresponding to the other system calls, and then the call encoding of the host system call is written into the corresponding call encoding register of the host (such as the eax register in the x86 architecture). The host determines the system call to be processed according to the call encoding in the call encoding register and executes it.

[0070] In another implementation, to improve the simulation accuracy, the call encoding register and the call result register can be simulated in the target system call simulator. Other system calls of the target program can be first written into the simulated encoding register in the target system call simulator, and then the target system call simulator determines the host system calls for the host system according to the call encoding of the other system calls in the simulated encoding register, and writes the call encoding of the host system call into the call encoding register of the host. After the host system executes the host system call according to the call encoding stored in the call encoding register of the host, the call result is written into the call result register of the host, and then the target system call simulator reads the call result register, copies and stores the read call result into the simulated call result register in the target system call simulator to complete the response to other system calls.

[0071] Referring to Figure 5 , Figure 5 shows a schematic diagram of the processing of other system calls provided by the embodiments of the present invention, as Figure 5As shown, the target program issues other system calls through user space, writes the call encoding of the other system calls into the simulation registers of the simulator (i.e., the computer simulated by the target system call simulator), the simulator writes the call encoding of the host system call into the host registers according to the other system calls, the host writes the call result into the host registers after executing the host system call, and the simulator copies the call result in the host registers to the simulation registers of the simulator, so as to respond to the other system calls of the target program through the call result in the simulation registers.

[0072] Step A2: Transmit the call result to the target system call simulator, so that the target system call simulator responds to the other system calls based on the call result.

[0073] In the embodiment of the present invention, after the host executes the above host system call, the call result can be written into the call result register of the host. The call result can be read from the call result register and sent to the target system call simulator, or the target system call simulator can directly read the call result register of the host, so as to transmit the call result to the target system call simulator. The embodiment of the present invention does not make specific limitations. After obtaining the call result of the host system call, the target system call simulator can respond to the other system calls issued by the corresponding target program according to the call result.

[0074] In the embodiment of the present invention, by responding to the host system call sent by the target system call simulator, the host where the target system call simulator is deployed executes the host system call to obtain the call result; wherein, the host system call is determined by the target system call simulator based on the other system calls of the target program; the call result is transmitted to the target system call simulator, so that the target system call simulator responds to the other system calls based on the call result. The other system calls of the target program can be processed by the host, so as to accurately respond to the system calls issued by the target program for all hardware in the case of actually simulating part of the hardware, which helps to reduce the deployment difficulty of the target system call simulator and improve the operation efficiency of the target system call simulator.

[0075] In addition, the target system call simulator can not only respond to the graphics system calls of the target program, but also respond to other system calls except the graphics system calls, so as to support the stable operation of various different target programs. By supporting the kernel DRM system, the robustness of the simulation of the graphics processor by the target system call simulator can be improved to a certain extent.

[0076] In an embodiment of the present invention, GPU-related hardware and software such as the above system call parser, buffer manager, circular buffer, and graphics processor emulation layer can all be simulated by a target system call simulator, and can be implemented as processes or a set of processes generated during the operation of the target system call simulator.

[0077] Optionally, the target system call simulator can be obtained by adding a graphics driver emulation layer to a basic system call simulator. The basic system call simulator refers to a simulator that runs a program in user space and simulates the system call processing process of a user program. It should be noted that the basic system call simulator does not include the simulation of the entire operating system, but only includes the necessary components and modules for generating and processing system calls. The above basic system call simulator can include, but is not limited to, the gem5 simulator in the System Call Emulation mode, the QEMU simulator in user mode, etc., and the embodiments of the present invention do not make specific limitations.

[0078] Optionally, in some embodiments, the step of loading a target system call simulator for simulating a target graphics processor may specifically include:

[0079] Step B1, obtaining a target code file corresponding to the target system call simulator; wherein, the target code file includes target code blocks corresponding to the user space emulation layer, the graphics processor emulation layer, and the graphics driver emulation layer respectively, as well as a simulator configuration file.

[0080] In an embodiment of the present invention, the target system call simulator can be loaded through a target code file corresponding to the target system call simulator. The target code file can include target code blocks corresponding to the user space emulation layer, the graphics processor emulation layer, and the graphics driver emulation layer respectively, as well as a simulator configuration file. Among them, the target code block can represent functions, classes, or code files for implementing the corresponding emulation layer. For example, the target code block can be encapsulated by a.cc file. The simulator configuration file can record the code block identifiers corresponding to the target code blocks that need to be executed for loading the target system call simulator, such as function names, class names, code file names, etc., and the embodiments of the present invention do not make specific limitations.

[0081] Step B2, parsing the simulator configuration file to determine the code block identifiers corresponding to each target code block.

[0082] In an embodiment of the present invention, the simulator configuration file can be parsed first to determine the code block identifiers corresponding to each target code block that needs to be executed. Among them, the code block identifier is used to locate the target code block to be loaded in the target code file.

[0083] Exemplarily, when the basic system call simulator is the gem5 simulator, a code source file containing the target code block of the graphics driver simulation layer can be added to the GPU / COUMPUT directory of the code file of the gem5 simulator, such as the GPU_DRIVE.CC file. The path of this file (e.g., GPU / COUMPUT / GPU_DRIVE.CC) can be written as the code block identifier into the simulator configuration file in the gem5 simulator code file. By parsing this simulator configuration file, the execution path of the target code block of the graphics driver simulation layer can be obtained.

[0084] Step B3, execute the corresponding target code block based on each code block identifier to load the target system call simulator.

[0085] In the embodiment of the present invention, the corresponding target code block can be executed through the code block identifier, so as to run the target system call simulator including the space simulation layer, the graphics processor simulation layer, and the graphics driver simulation layer in the physical machine, and realize the loading operation of the target system call simulator.

[0086] By obtaining the target code file corresponding to the target system call simulator; wherein, the target code file includes the target code blocks corresponding to the user space simulation layer, the graphics processor simulation layer, and the graphics driver simulation layer respectively, and the simulator configuration file; parsing the simulator configuration file to determine the code block identifier corresponding to each target code block; and executing the corresponding target code block based on each code block identifier to load the target system call simulator. It is possible to implement a target system call simulator capable of simulating graphics system calls in a physical machine, which helps to improve the simulation accuracy of the corresponding target graphics processor.

[0087] Specifically, the code of the basic system call simulator can be modified to implement the graphics driver simulation layer therein. The graphics driver simulation layer responds to the graphics system calls of the target program in the user space and converts the graphics system calls into a GPU instruction set that can be recognized and processed by the graphics processor simulation layer. In addition, a graphics processor simulation layer for the target graphics processor to be simulated can be added to the above basic system call simulator, or the initial graphics processor simulation layer in the basic system call simulator can be modified to enable it to simulate the target graphics processor, so as to obtain the target system call simulator.

[0088] Exemplarily, the target system call simulator can be implemented based on the basic gem5 simulator, and the code of the basic gem5 simulator can be modified to implement the target system call simulator. The modification methods of the basic gem5 simulator may include but are not limited to the following:

[0089] Modify the execution logic (such as the Execute part of the gem5 simulator) of the basic system call simulator (such as the gem5 simulator) according to the hardware architecture of the target graphics processor to be simulated; define a configuration framework (such as the python interface class of the gem5 simulator) for the basic system call simulator to connect the user configuration and the underlying code implementation of the simulator according to the hardware architecture of the target graphics processor; modify or design the lightweight hardware module configuration of the basic system call simulator (such as the simple object class of the gem5 simulator) according to the hardware parameters of the target graphics processor; make partial modifications or re-design related components such as the instruction acquisition method configuration (such as InstructionFetch of the gem5 simulator), wavefront configuration (such as wavefront of the gem5 simulator) for describing the parallel instruction processing method, and instruction arbitration configuration (such as Instruction Arvitration of the gem5 simulator) of the basic system call simulator according to the instruction set of the target graphics processor, so as to write the simulation of GPU instructions by the target system call simulator. It is also possible to add code files for implementing system call parsers (such as gpu_render_driver.cc), code files for implementing buffer managers (such as gpu_buffer_Manager.cc), etc. corresponding to new functions in the project code of the basic system call simulator. The embodiments of the present invention do not make specific limitations.

[0090] Optionally, in some embodiments, the code for simulating the GPU instruction set in the target system call simulator can be generated based on the ISA description of the target graphics processor. The ISA description language can extract the commonalities between the GPU instructions to be processed and the preset instruction templates, and automatically generate the instruction code for simulating the GPU instructions through the ISA parser. This helps to improve the efficiency of developing the target system call simulator.

[0091] Refer to Figure 6 , Figure 6 shows a flowchart for generating GPU instruction set simulation code provided by an embodiment of the present invention, as Figure 6As shown, the ISA description file of the target graphics processor can be defined first. The description file may include decoding functions, instruction templates, instruction function codes, and template replacement logic set for GPU instructions. The ISA description file is input into the ISA parser corresponding to the simulator architecture. The ISA parser performs lexical and syntactic analysis on the ISA description file, and adjusts and replaces the code of the instruction template according to the template replacement logic and other contents in the ISA description file, and outputs a code source file (such as a C++ file) for simulating the GPU instruction set. The code source file may include declarations and definitions of decoding functions and instruction classes adapted to the GPU instruction set. Among them, the template replacement logic defines how to replace the template code to automatically generate the rule logic for generating a code source file (such as a C++ file) corresponding to the GPU instruction set of the target graphics processor. For example, in the template replacement logic, it can be defined that for instruction A in the GPU instruction set, decoding function 1 is used to replace decoding function 2 of instruction B in the instruction template to obtain the instruction code of instruction A; it can also be defined that for instruction A in the GPU instruction set, the instruction code of instruction C in the instruction template is directly used as the instruction code of this instruction A. The embodiments of the present invention do not make specific limitations.

[0092] An embodiment of the present invention provides a simulator, including: a user space simulation layer, a graphics processor simulation layer, and a graphics driver simulation layer connecting the graphics processor simulation layer and the user space simulation layer;

[0093] The user space simulation layer is used to run a target program to generate a graphics system call corresponding to the target program. The graphics driver simulation layer is used to transfer a corresponding GPU instruction set to the graphics processor simulation layer according to the graphics system call. The graphics processor simulation layer is used to execute the GPU instruction set.

[0094] Other features of the above simulator can refer to the description and limitations of the target system call simulator in the embodiments of the above graphics processor simulation method, and the embodiments of the present invention will not be elaborated herein.

[0095] The simulator provided by the embodiments of the present invention can generate a graphics system call for the GPU by running a target program through the user space simulation layer, and convert the graphics system call into a GPU instruction set through the setting of the graphics driver simulation layer and provide it to the graphics processor simulation layer for processing. Therefore, it is possible to simulate the software and hardware of the corresponding target graphics processor through a lightweight target system call simulator, which helps to improve the simulation accuracy of the graphics processor while ensuring a high simulation efficiency.

[0096] The graphics processor simulation method provided by the embodiments of the present invention may be executed by a graphics processor simulation device. In the embodiments of the present invention, taking the graphics processor simulation device executing the graphics processor simulation method as an example, the graphics processor simulation device provided by the embodiments of the present invention is described.

[0097] Refer to Figure 7 , Figure 7 which is a block diagram of a graphics processor simulation device provided by the embodiments of the present invention. As Figure 7 shown, the graphics processor simulation device 700 includes:

[0098] A loading module 701, configured to load a target system call simulator for simulating a target graphics processor; wherein, the target system call simulator includes a user space simulation layer, a graphics processor simulation layer, and a graphics driver simulation layer connecting the graphics processor simulation layer and the user space simulation layer;

[0099] A simulation module 702, configured to run a target program in the user space simulation layer, directly send a graphics system call generated during the running of the target program to the graphics driver simulation layer, so that the graphics driver simulation layer transmits a corresponding GPU instruction set to the graphics processor simulation layer based on the graphics system call, so as to execute the GPU instruction set through the graphics driver simulation layer.

[0100] Optionally, the graphics driver simulation layer includes a system call parser and a buffer manager; the system call parser is configured to parse the graphics system call to obtain a GPU instruction set corresponding to the graphics system call, and transmit the GPU instruction set to the buffer manager; the buffer manager is configured to store the GPU instruction set in a circular buffer, so that the graphics processor simulation layer obtains the GPU instruction set from the circular buffer.

[0101] Optionally, the graphics processor simulation layer includes a command processor simulation unit and a computing simulation unit; the command processor simulation unit is configured to obtain the GPU instruction set from the graphics driver simulation layer and allocate the GPU instructions in the GPU instruction set to the computing simulation unit; the computing simulation unit is configured to execute the GPU instructions allocated by the command processor simulation unit.

[0102] Optionally, the command processor emulation unit includes a hardware queue scheduling emulation module, an instruction packet processing emulation module, and an instruction scheduling emulation module; the hardware queue scheduling emulation module is used to allocate instruction packets corresponding to the GPU instruction set to the hardware queue; the instruction packet processing emulation module is used to allocate GPU instructions to the instruction scheduling emulation module according to the instruction packets in the hardware queue; the instruction scheduling emulation module is used to call the corresponding computing emulation unit to execute the GPU instructions.

[0103] Optionally, the target system call simulator further includes a central processing unit emulation layer; the central processing unit emulation layer is used to run and manage the GPU firmware program of the command processor emulation unit.

[0104] Optionally, the target system call simulator is obtained by adding the graphics driver emulation layer to the basic system call simulator.

[0105] Optionally, the loading module includes:

[0106] An acquisition sub-module, configured to acquire a target code file corresponding to the target system call simulator; wherein, the target code file includes target code blocks corresponding to the user space emulation layer, the graphics processor emulation layer, and the graphics driver emulation layer respectively, and a simulator configuration file;

[0107] A parsing sub-module, configured to parse the simulator configuration file to determine the code block identifiers corresponding to the respective target code blocks;

[0108] A loading sub-module, configured to execute the corresponding target code blocks based on the respective code block identifiers to load the target system call simulator.

[0109] Optionally, the apparatus further includes:

[0110] A call result module, configured to execute the host system call of the target system call simulator through the host system that loads the target system call simulator to obtain a call result; wherein, the host system call is determined by the target system call simulator based on other system calls of the target program;

[0111] A call response module, configured to transfer the call result to the target system call simulator, so that the target system call simulator responds to the other system calls based on the call result.

[0112] In summary, a graphics processor simulation device provided by an embodiment of the present invention includes a loading module for loading a target system call simulator for simulating a target graphics processor. The target system call simulator includes a user space simulation layer, a graphics processor simulation layer, and a graphics driver simulation layer connecting the graphics processor simulation layer and the user space simulation layer. A simulation module is used to run a target program in the user space simulation layer, directly send the graphics system calls generated during the running of the target program to the graphics driver simulation layer, so that the graphics driver simulation layer transfers a corresponding GPU instruction set to the graphics processor simulation layer based on the graphics system calls, so as to execute the GPU instruction set through the graphics driver simulation layer. It is possible to generate graphics system calls for the GPU by running the target program in the user space simulation layer of the target system call simulator, and convert the graphics system calls into a GPU instruction set through the setting of the graphics driver simulation layer and provide it to the graphics processor simulation layer for processing, so that the software and hardware of the corresponding target graphics processor can be simulated by the lightweight target system call simulator, which helps to improve the simulation accuracy of the graphics processor while ensuring a high simulation efficiency.

[0113] The graphics processor simulation device provided by the embodiment of the present invention can implement Figures 1 to 6 each process implemented by the method embodiment. To avoid repetition, it will not be elaborated here.

[0114] Optionally, as Figure 8 shown, the embodiment of the present invention further provides an electronic device M00, including a processor M01 and a memory M02. A program or instruction that can run on the processor M01 is stored on the memory M02. When the program or instruction is executed by the processor M01, it implements each step of the above-mentioned graphics processor simulation method embodiment and can achieve the same technical effect. To avoid repetition, it will not be elaborated here.

[0115] It should be noted that the electronic device in the embodiment of the present invention includes the above-mentioned mobile electronic device and non-mobile electronic device.

[0116] Figure 9 It is a schematic diagram of the hardware structure of an electronic device for implementing an embodiment of the present invention.

[0117] The electronic device 1000 includes, but is not limited to: a radio frequency unit 1001, a network module 1002, an audio output unit 1003, an input unit 1004, a sensor 1005, a display unit 1006, a user input unit 1007, an interface unit 1008, a memory 1009, and a processor 1010, etc.

[0118] Those skilled in the art can understand that the electronic device 1000 may further include a power source (such as a battery) for powering each component. The power source can be logically connected to the processor 1010 through a power management system, so as to manage functions such as charging, discharging, and power consumption management through the power management system. Figure 9 The structure of the electronic device shown in Figure 9 does not limit the electronic device. The electronic device may include more or fewer components than shown in the figure, or combine certain components, or have different component arrangements, which will not be elaborated here.

[0119] Among them, the processor 1010 is used to load a target system call simulator for simulating a target graphics processor. The target system call simulator includes a user space simulation layer, a graphics processor simulation layer, and a graphics driver simulation layer connecting the graphics processor simulation layer and the user space simulation layer. A target program is run in the user space simulation layer, and the graphics system calls generated during the running of the target program are directly sent to the graphics driver simulation layer, so that the graphics driver simulation layer transfers a corresponding set of GPU instructions to the graphics processor simulation layer based on the graphics system calls, so as to execute the set of GPU instructions through the graphics driver simulation layer.

[0120] In summary, the present invention can generate graphics system calls for the GPU by running a target program in the user space simulation layer of the target system call simulator, and convert the graphics system calls into a set of GPU instructions through the set graphics driver simulation layer and provide them to the graphics processor simulation layer for processing. Therefore, the present invention can simulate the software and hardware of the corresponding target graphics processor through a lightweight target system call simulator, which helps to improve the simulation accuracy of the graphics processor while ensuring a high simulation efficiency.

[0121] It should be understood that in the embodiments of the present invention, the input unit 1004 may include a Graphics Processing Unit (GPU) 10041 and a microphone 10042. The GPU 10041 processes the image data of static pictures or videos obtained by an image capturing device (such as a camera) in a video capture mode or an image capture mode. The display unit 1006 may include a display panel 10061, and the display panel 10061 may be configured in the form of a liquid crystal display, an organic light emitting diode, etc. The user input unit 1007 includes at least one of a touch panel 10071 and other input devices 10072. The touch panel 10071 is also called a touch screen. The touch panel 10071 may include two parts: a touch detection device and a touch controller. The other input devices 10072 may include, but are not limited to, a physical keyboard, function keys (such as volume control keys, power on / off keys, etc.), a trackball, a mouse, a joystick, which will not be elaborated here.

[0122] The memory 1009 can be used to store software programs and various data. The memory 1009 may mainly include a first storage area for storing programs or instructions and a second storage area for storing data. Among them, the first storage area can store an operating system, application programs or instructions required for at least one function (such as a sound playback function, an image playback function, etc.). In addition, the memory 1009 can include a volatile memory or a non-volatile memory, or the memory 1009 can include both a volatile and a non-volatile memory. Among them, the non-volatile memory can be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory can be a random access memory (RAM), a static random access memory (SRAM), a dynamic random access memory (DRAM), a synchronous dynamic random access memory (SDRAM), a double data rate synchronous dynamic random access memory (DDR SDRAM), an enhanced synchronous dynamic random access memory (ESDRAM), a synch link dynamic random access memory (SLDRAM), and a direct rambus random access memory (DRRAM). The memory 1009 in the embodiments of the present invention includes but is not limited to these and any other suitable types of memories.

[0123] The processor 1010 may include one or more processing units; optionally, the processor 1010 integrates an application processor and a modem processor. Among them, the application processor mainly processes operations related to the operating system, user interface, and application programs, etc., and the modem processor mainly processes wireless communication signals, such as a baseband processor. It can be understood that the above modem processor may not be integrated into the processor 1010 either.

[0124] The embodiments of the present invention also provide a readable storage medium, on which a program or instruction is stored. When the program or instruction is executed by a processor, it implements each process of the above-mentioned embodiment of the graphics processor emulation method and can achieve the same technical effect. To avoid repetition, it will not be elaborated here.

[0125] Among them, the processor is the processor in the electronic device described in the above embodiment. The readable storage medium includes computer-readable storage media such as computer read-only memory ROM, random access memory RAM, magnetic disks, or optical discs, etc.

[0126] Another embodiment of the present invention provides a chip, which includes a processor and a communication interface. The communication interface is coupled to the processor. The processor is used to run programs or instructions to implement each process of the above embodiment of the graphics processor emulation method, and can achieve the same technical effect. To avoid repetition, it will not be elaborated here.

[0127] It should be understood that the chip mentioned in the embodiment of the present invention can also be referred to as a system-on-chip, system chip, chip system, or system-on-chip, etc.

[0128] The embodiment of the present invention provides a computer program product. The program product is stored in a storage medium. The program product is executed by at least one processor to implement each process of the above embodiment of the graphics processor emulation method, and can achieve the same technical effect. To avoid repetition, it will not be elaborated here.

Claims

1. A method for simulating a graphics processor, characterized in that, The method includes: Loading a target system call simulator for simulating a target graphics processor; wherein, the target system call simulator includes a user space simulation layer, a graphics processor simulation layer, and a graphics driver simulation layer connecting the graphics processor simulation layer and the user space simulation layer; Running a target program in the user space simulation layer, and directly sending a graphics system call generated during the running of the target program to the graphics driver simulation layer, so that the graphics driver simulation layer transfers a corresponding GPU instruction set to the graphics processor simulation layer based on the graphics system call, so as to execute the GPU instruction set through the graphics driver simulation layer.

2. The graphic processor simulation method according to claim 1, wherein The graphics driver simulation layer includes a system call parser and a buffer manager; the system call parser is used for parsing the graphics system call to obtain a GPU instruction set corresponding to the graphics system call, and transferring the GPU instruction set to the buffer manager; the buffer manager is used for storing the GPU instruction set into a circular buffer, so that the graphics processor simulation layer obtains the GPU instruction set from the circular buffer.

3. The graphics processor emulation method according to claim 1, characterized in that The graphics processor simulation layer includes a command processor simulation unit and a computing simulation unit; the command processor simulation unit is used for obtaining the GPU instruction set from the graphics driver simulation layer and allocating the GPU instructions in the GPU instruction set to the computing simulation unit; the computing simulation unit is used for executing the GPU instructions allocated by the command processor simulation unit.

4. The graphic processor simulation method according to claim 3, wherein The command processor simulation unit includes a hardware queue scheduling simulation module, an instruction packet processing simulation module, and an instruction scheduling simulation module; the hardware queue scheduling simulation module is used for allocating an instruction packet corresponding to the GPU instruction set to a hardware queue; the instruction packet processing simulation module is used for allocating GPU instructions to the instruction scheduling simulation module according to the instruction packet in the hardware queue; The instruction scheduling simulation module is used for calling a corresponding computing simulation unit to execute the GPU instruction.

5. The graphics processor emulation method according to claim 3, characterized in that, The target system call simulator further includes a central processing unit simulation layer; the central processing unit simulation layer is used for running and managing a GPU firmware program of the command processor simulation unit.

6. The graphics processor emulation method according to claim 1, wherein The target system call simulator is obtained by adding the graphics driver simulation layer to a basic system call simulator.

7. The graphics processor emulation method according to claim 1, wherein The loading of the target system call simulator for simulating a target graphics processor includes: Obtaining a target code file corresponding to the target system call simulator; wherein, the target code file includes target code blocks corresponding to the user space simulation layer, the graphics processor simulation layer, and the graphics driver simulation layer respectively, and a simulator configuration file; Parsing the simulator configuration file to determine code block identifiers corresponding to the respective target code blocks; Executing the corresponding target code blocks based on the respective code block identifiers to load the target system call simulator.

8. The graphics processor emulation method according to any one of claims 1 to 7, characterized in that The method further includes: By loading the host system of the target system call simulator and executing the host system call of the target system call simulator, a call result is obtained; wherein, the host system call is determined by the target system call simulator based on other system calls of the target program. The call result is passed to the target system call simulator, so that the target system call simulator responds to the other system calls based on the call result.

9. An emulator, characterized in that, The simulator includes: a user space emulation layer, a graphics processor emulation layer, and a graphics driver emulation layer connecting the graphics processor emulation layer and the user space emulation layer. The user space emulation layer is used to run a target program to generate graphics system calls corresponding to the target program. The graphics driver emulation layer is used to transmit a corresponding set of GPU instructions to the graphics processor emulation layer according to the graphics system calls. The graphics processor emulation layer is used to execute the set of GPU instructions.

10. A graphics processor emulation device, characterized in that, The device includes: A loading module, configured to load a target system call simulator for emulating a target graphics processor; wherein, the target system call simulator includes a user space emulation layer, a graphics processor emulation layer, and a graphics driver emulation layer connecting the graphics processor emulation layer and the user space emulation layer. An emulation module, configured to run a target program in the user space emulation layer, directly send graphics system calls generated during the running of the target program to the graphics driver emulation layer, so that the graphics driver emulation layer transmits a corresponding set of GPU instructions to the graphics processor emulation layer based on the graphics system calls, so as to execute the set of GPU instructions through the graphics driver emulation layer.

11. An electronic device, characterized in that, The electronic device includes a processor and a memory. The memory stores a program or instructions that can be run on the processor. When the program or instructions are executed by the processor, the graphics processor emulation method according to any one of claims 1 to 8 is implemented.

12. A readable storage medium, characterized in that, A program or instructions are stored on the readable storage medium. When the program or instructions are executed by a processor, the graphics processor emulation method according to any one of claims 1 to 8 is implemented.

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