Analog circuit formal verification method based on Coq theorem prover

Abstract

The invention discloses an analog circuit formalized verification method based on a Coq theorem prover, and belongs to the field of formalized verification. An analog circuit graph page developed by the invention supports drawing of a basic analog circuit composed of a power supply, a resistor and a capacitor, and interacts with a rear end by using a jsofocaml technology; the back end calls an Ocaml function to convert the analog circuit diagram information into circuit text description, and general description of an analog circuit is generated; automatically generating a template based on a predefined Coq code, and further generating Coq description from the circuit description; and introducing a circuit theorem into Coq, and carrying out circuit correctness and equivalence proving. The method supports symbolic analysis of the property of the analog circuit, ensures that the behavior of the circuit design meets the expectation, helps a user to find and eliminate potential defects in the design as early as possible, and also supports simplification of the circuit design by proving the equivalence of the circuit.

Description

Technical Field

[0001] The present invention relates to the technical field of formal verification of analog circuits, and particularly to a method for formal verification of analog circuits based on the Coq theorem prover. Background Art

[0002] An analog circuit refers to a circuit that processes continuous signals (analog signals). Developers of analog circuits perform mathematical modeling on the working principles and their interrelationships of each component (such as resistors, capacitors, etc.) in the circuit, design analog circuits through an interactive graphical editing tool, and use tools such as SPICE for circuit analysis to determine whether the circuit design meets the expected functions.

[0003] Circuit analysis is crucial for the analog circuit-related industries. It not only helps designers understand the working principles and behaviors of circuits, but also can improve the performance of circuits, reduce design and debugging costs, ensure the stability, effectiveness, and reliability of systems. Engineers can discover potential problems in actual applications and make timely adjustments to ensure that the circuit can work reliably in complex environments.

[0004] During the design process of analog circuits, circuit analysis helps designers understand the distribution of current and voltage and how each component interacts. For example, by using methods such as Kirchhoff's voltage law (KVL), Kirchhoff's current law (KCL), and Ohm's law, parameters such as voltage and current in the circuit can be deduced, thereby understanding the working state and behavior of the circuit. By analyzing the working states and their interrelationships of each component (resistors, capacitors, etc.) in the circuit, engineers can locate abnormalities in the circuit.

[0005] With the development of analog circuit design technology, most companies tend to use circuit editors for the drawing design of printed circuit boards. Electronic design automation editors are used to design printed circuit boards and help electronic engineers complete tasks from circuit diagram design to printed circuit board layout. The template-based automatic code generation technology automatically generates code by using predefined templates. This process usually includes using reusable code snippets (templates) and input parameters to generate code for specific applications. The template defines the code structure and pattern, and designers only need to provide the necessary parameters, and the system can automatically generate the corresponding Coq code, reducing the workload of manual code writing and the possibility of errors.

[0006] The EDA editor page provides strong support for electronic design automation work to varying degrees. However, there are some deficiencies in existing tools for circuit analysis:

[0007] First, the core functions of mainstream circuit analysis technologies represented by SPICE focus on obtaining simulation calculation and numerical solution results of circuit parameters, and do not support the text description of the intermediate process of the circuit. Numerical simulation can only obtain the response conclusions of a circuit with specific parameters under specific working conditions, and cannot deduce the parametric general properties of the circuit structure. The text description of the circuit is crucial for analyzing the equivalence of the circuit at the logical level. It can obtain general analysis results of the circuit, thereby obtaining conclusions on the equivalence of the circuit based on symbolic variables, in order to simplify the circuit.

[0008] Second, the mainstream analog circuit simulation analysis technologies represented by SPICE do not support the formal verification of circuits. Current analog circuit design tools mainly adopt signal-based simulation methods, which support obtaining circuit function results, but cannot provide strict formal verification of aspects such as circuit logic, timing, and stability. This leads to potential problems that may be difficult to discover not being fully exposed in the simulation during analog circuit design. Summary of the Invention

[0009] The present invention provides a formal verification method for analog circuits based on the Coq theorem prover, which can verify the correctness of circuit logic at a higher level, support covering all possible input states, and thus detect potential problems within a wider range.

[0010] An embodiment of the present invention provides a formal verification method for analog circuits based on the Coq theorem prover, including the following steps:

[0011] S1, generate analog circuit netlist information according to the user's analog circuit diagram, and convert the analog circuit netlist information into a circuit text description;

[0012] S2, automatically generate a template based on predefined Coq code, and generate a Coq description from the circuit text description;

[0013] S3, introduce circuit theorems in Coq and conduct circuit proofs.

[0014] Optionally, in an embodiment of the present invention, before generating the analog circuit netlist information according to the user's analog circuit diagram, it further includes:

[0015] S0, design a user interface for interactive graphical design of analog circuits including a standardized circuit character library and corresponding data structures, and the user inputs the analog circuit diagram through the user interface.

[0016] Optionally, in an embodiment of the present invention, step S0 further includes:

[0017] S01, design the page layout and interaction design, define interaction events using Listener and design the responses;

[0018] S02. Design a standardized circuit character library to ensure the unity and standardization of components, define the data structure of circuit components, set specific attributes and behaviors for each component, set the storage format of circuit diagram information, and the stored circuit diagram information includes the input and output port information of electrical components, the connection relationship of electrical components, the circuit hierarchy, the circuit type field, and the circuit attributes.

[0019] Optionally, in an embodiment of the present invention, step S1 further includes:

[0020] S11. Combine JavaScript with the Ocmal language through the js_oc_Ocmal technology. The front end calls the Ocmal function through the JavaScript language to transfer the simulated circuit diagram information to the back end for processing, and the back end uses the Ocmal language to parse the simulated circuit diagram information to generate simulated circuit netlist information;

[0021] S12. Process the circuit topology structure of the simulated circuit netlist information, generate the circuit loop path through the depth-first traversal algorithm, abstract the simulated circuit diagram information into a mathematical expression according to the circuit theorem, and generate the circuit text description;

[0022] S13. Perform circuit equivalence verification based on the circuit text description: express each component of the simulated circuit in a standardized text description form to generate a circuit model, use the text description to construct a mathematical expression of the circuit, and compare the text descriptions of different circuits one by one to check whether the text descriptions are equal to verify the equivalence of different circuits.

[0023] Optionally, in an embodiment of the present invention, in step S2, the simulated circuit characteristics are transformed into a mathematical object that can be formally verified. According to the characteristics of current, voltage, and components in the simulated circuit, a record type Record is established for electrical components, and a Definition that can be formally verified is assigned.

[0024] Optionally, in an embodiment of the present invention, step S2 further includes:

[0025] S21. Pre-define a template for automatically generating Coq code based on a template, define the general structure of the template and allow the insertion of specific dynamic content, perform dynamic filling for fixed content and parts that need to be filled, design the text input format, set a parser to transform the input circuit text description into an operable data structure, inherit the template engine to combine the template with the data, and the template engine fills the placeholders in the template according to the input variable values to generate specific code;

[0026] S22. Abstract the physical structure and behavior of the analog circuit into a mathematical model, represent the electrical behavior of electrical components through mathematical equations, consider the time-domain behavior of the analog circuit, and describe the dynamic response of the analog circuit by solving differential equations.

[0027] S23. Convert the abstracted analog circuit behavior into a Coq formal specification or theorem, and generate a Coq description.

[0028] Optionally, in an embodiment of the present invention, in step S3, formalize the performance and stability issues of the circuit, construct corresponding theorems, use the proof assistant function of Coq to prove the relevant theorems of the circuit, and use the proof strategies, induction method, and proof by contradiction of Coq to verify whether the behavior of the analog circuit under specific conditions meets the expectations.

[0029] Optionally, in an embodiment of the present invention, step S11 includes: using the js_of_Ocmal compiler to compile the.ml file written in the Ocmal language at the backend. Through the compilation process, generate an intermediate representation, and then convert the intermediate representation into equivalent.js code, so that the circuit processing logic written based on the backend can be executed on the browser side. After embedding the generated.js code into the html web page, the front end can interact with the backend through HTTP requests, thereby realizing the dynamic interaction and circuit verification functions between the front end and the backend.

[0030] Optionally, in an embodiment of the present invention, step S12 includes: abstract the circuit topology into a node-based connection, and use an adjacency matrix to represent the connection relationship between electrical components. Construct a graph structure through the port connection information of the circuit diagram, store the connection information of the circuit using the adjacency matrix, intuitively represent the connection relationship between each node in the circuit, use the find_cycles function to detect loops. The find_cycles function realizes this by marking the visited nodes, tracking the current path, and traversing the adjacent nodes, used to check whether a loop is formed, and save the loop information when a loop is found, while avoiding repeated recording of the same loop. Use the normalize_start_point function to normalize the starting point of the loop and output all detected loop information.

[0031] Optionally, in an embodiment of the present invention, in step S12, abstracting the analog circuit diagram information into a mathematical expression according to circuit theorems includes: representing the voltage relationship between nodes in the circuit through Kirchhoff's voltage law, and the voltage relationship between each pair of nodes in the circuit is represented as a set of algebraic equations; representing the relationship of branch currents in the circuit through Kirchhoff's current law, providing a theoretical basis for the calculation and optimization of currents; representing the relationship of electrical component attributes through Ohm's law.

[0032] The formal verification method of analog circuits based on the Coq theorem prover in the embodiments of the present invention. As a powerful tool, formal verification can rigorously check the correctness of a design through mathematical methods to ensure its stable operation under all expected inputs. The present invention provides a systematic method that can verify the correctness of circuit logic at a higher level, support covering all possible input states, and thus detect potential problems within a wider range. Secondly, by verifying the equivalence of different circuit structures through circuit text descriptions, the verification process of the circuit can be simplified. Especially in the case of multiple possible implementations, by verifying the equivalence, the need to repeatedly verify the behavior of each structure can be avoided. Verifying the functional consistency of circuits with different implementation methods is very important for optimizing circuit design.

[0033] Additional aspects and advantages of the present invention will be given in part in the following description, become apparent in part from the following description, or be learned through the practice of the present invention. Brief Description of the Drawings

[0034] The above and / or additional aspects and advantages of the present invention will become apparent and be readily understood from the following description of the embodiments in conjunction with the drawings, where:

[0035] Figure 1 is a flowchart of a formal verification method of an analog circuit based on the Coq theorem prover according to an embodiment of the present invention;

[0036] Figure 2 is the case circuit diagram of the embodiment of the present invention;

[0037] Figure 3 is the node diagram of the case circuit diagram of the embodiment of the present invention;

[0038] Figure 4 is the illustration diagram of the equivalence of the example circuit of the present invention;

[0039] Figure 5 is the corresponding equivalent circuit diagram of the illustration diagram of the equivalence of the example circuit of the present invention. Detailed Description of the Embodiments

[0040] The embodiments of the present invention will be described in detail below. The examples of the embodiments are shown in the drawings, where the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the drawings are exemplary and are intended to explain the present invention and should not be construed as limiting the present invention.

[0041] To support the symbolic mathematical analysis of analog circuits, the present invention proposes a front-end EDA drawing software for analog circuit design. It supports users to input a basic analog circuit diagram containing power supplies, resistors, and capacitors, and converts it into a text description of the circuit diagram. Using this as an intermediate language, an automatic generation template based on the predefined code of the present invention is used to automatically generate a formal description of the circuit based on the Coq language. Further, a method for symbolic mathematical analysis and equivalence verification of the properties of this type of circuit using the Coq theorem prover is demonstrated, showing the role of this technology in the formal analysis of circuits.

[0042] Figure 1 It is a flowchart of a method for formal verification of analog circuits based on the Coq theorem prover according to an embodiment of the present invention.

[0043] As Figure 1 shown, for the method for formal verification of analog circuits based on the Coq theorem prover, the software front-end is developed using the JavaScript language to support users in interactively drawing analog circuit diagrams, and the back-end uses the Ocaml language to process circuit data, including the following steps:

[0044] S1, generate analog circuit netlist information according to the user's analog circuit diagram, and convert the analog circuit netlist information into a circuit text description.

[0045] In an embodiment of the present invention, before generating analog circuit netlist information according to the user's analog circuit diagram, it further includes: S0, design a user interface for interactive graphical design of analog circuits including a standardized circuit character library and corresponding data structures, and the user inputs an analog circuit diagram through the user interface.

[0046] In an embodiment of the present invention, step S0 further includes:

[0047] S01, design the page layout and interaction design, define interaction events using Listener and design responses;

[0048] S02, design a standardized circuit character library to ensure the unity and standardization of components, define the data structure of circuit components, set specific attributes and behaviors for each component, set the format for saving circuit diagram information, and the saved circuit diagram information includes electrical component input and output port information, electrical component connection relationships, circuit hierarchy, circuit type fields, and circuit attributes.

[0049] Specifically, it includes the following steps:

[0050] (1) Design the page layout including modules such as a sidebar, a main canvas, a property panel, and a toolbar, and the interaction design that supports actions such as clicking, dragging and dropping, and right-clicking, to meet the diverse functional requirements of engineers and designers in the electrical design process.

[0051] (2) Determine the standard description of the circuit. Specify basic component symbols, power supply symbols, and connection symbols to distinguish circuit character types; establish symbol design specifications, specifying characters and shapes, dimensions and structures

[0052] (3) According to the circuit character description specification, establish a corresponding standardized circuit character library. The standardized circuit character library is the layout basis for circuit design, specifying the detailed design standards for each component symbol, providing a unified rule for the storage and call of symbols. The standardized circuit character library tries to cover common analog circuit electrical components, including the naming specification and symbol classification hierarchical structure of component symbols, the connection rules and interface definitions of symbols.

[0053] (4) According to the circuit character description specification, design the circuit data description format. Define the basic components in the circuit (such as resistors, capacitors, diodes, transistors, etc.), and their attributes (such as resistance value, current, voltage, power, etc.);

[0054] (5) Save the circuit diagram data in JSON format locally, including information such as components, connections, layouts, and attributes. Each circuit component is connected to other components through a node by an identifier (ID) to clarify the connection relationship between circuit components; divide the hierarchical structure of components to clarify sub-circuit modules. To improve the scalability and maintainability of the design; reference the data of the electrical component library; mark different types of components through the "type" field, and define extensible attribute fields for each component type.

[0055] In an embodiment of the present invention, designing a standardized circuit character library ensures that components include: defining a data structure for inclusion relationships, an electrical component entity allows to contain pin sub-entities with their own independent data, defining the name of the electrical component assembly, defining the component package type, setting the number and position of the electrical component pins, and numbering the pins, specifying the input and output nature of the pins, and indicating the position coordinates of the pins in the graphical interface.

[0056] In an embodiment of the present invention, step S1 further includes:

[0057] S11, combine JavaScript with the Ocmal language through the js_oc_Ocmal technology. The front end calls the Ocmal function through the JavaScript language to transfer the analog circuit diagram information to the back end for processing, and the back end uses the Ocmal language to parse the analog circuit diagram information to generate analog circuit netlist information;

[0058] S12. Use the Ocmal function to process the circuit topology of the analog circuit netlist information, generate the circuit loop path through the depth-first traversal algorithm, abstract the analog circuit diagram information into a mathematical expression according to circuit theorems, generate the circuit text description, and provide data basis for further circuit analysis and verification, circuit simulation and debugging;

[0059] S13. Perform circuit equivalence verification based on the circuit text description: Express each component of the analog circuit (such as power supply, resistor, capacitor, etc.) in a standardized text description form to generate a circuit model, use the text description to construct the mathematical expression of the circuit, and compare the text descriptions of different circuits one by one to check whether the text description formulas are equal to verify the equivalence of different circuits.

[0060] In an embodiment of the present invention, step S11 includes: Using the js_of_Ocmal compiler to compile the.ml file written in the Ocmal language at the backend. Through the compilation process, generate an intermediate representation, and then convert the intermediate representation into equivalent.js code, so that the circuit processing logic written based on the backend can be executed on the browser side. After embedding the generated.js code into the html web page, the front end can interact with the backend through HTTP requests, thereby realizing the dynamic interaction and circuit verification functions between the front and back ends.

[0061] In an embodiment of the present invention, step S12 includes: Abstract the circuit topology into a node-based connection, and use an adjacency matrix to represent the connection relationship between electrical components. Build a graph structure through the port connection information of the circuit diagram, use the adjacency matrix to store the connection information of the circuit, intuitively represent the connection relationship between each node in the circuit, use the find_cycles function to perform loop detection. The find_cycles function realizes this by marking the visited nodes, tracking the current path and traversing the adjacent nodes, used to check whether a loop is formed, and save the loop information when a loop is found, while avoiding repeated recording of the same loop. Use the normalize_start_point function to normalize the starting point of the loop and output all detected loop information.

[0062] In step S12, abstracting the analog circuit diagram information into a mathematical expression according to circuit theorems includes: Representing the voltage relationship between nodes in the circuit through Kirchhoff's voltage law, and the voltage relationship between each node in the circuit is represented as a set of algebraic equations; Representing the relationship of branch currents in the circuit through Kirchhoff's current law, providing a theoretical basis for the calculation and optimization of currents; Expressing the attribute relationship of electrical components through Ohm's law.

[0063] Specifically, in an embodiment of the present invention, the following steps are included:

[0064] (1) Use the js_oc_Ocaml tool to connect the data between the front and back ends. Use JavaScript to display the graphical interface of the circuit netlist, receive the circuit netlist data input by the user, and send it to Ocaml for analysis. The back end processes the circuit netlist data, performs circuit analysis (such as solving for current, voltage, analyzing network connections, etc.), and then returns the analysis results to the front end.

[0065] (2) The back end uses the Ocaml language to create a data structure to represent the connection relationship between nodes and components in the analog circuit. First, parse the input netlist data to extract the basic information of the circuit, including the type of each component (such as resistors, wires, sources, etc.) and their connections (i.e., the topology of the circuit). Then, use the graph data structure to represent nodes and edges, where each edge represents a component and the nodes represent the connected potential points.

[0066] (3) Use the depth-first search (DFS) algorithm to find the circuit loop path. Start from a certain node in the circuit diagram in sequence and select this node as the starting point of the DFS. Use a recursive structure for depth-first traversal. Each time a node is traversed, mark the node as the visited state. Along the connection relationship of the circuit, start from the current node and gradually visit the adjacent unvisited nodes. When reaching a node, if the node is already on the current path (i.e., forming a loop), record the loop path. Continue to backtrack to explore other possible paths. When all possible paths have been traversed, or the expected loop has been found, the DFS terminates.

[0067] (4) Generate the text description of the circuit according to the circuit theorem: The text description of the circuit expresses the working state of the circuit through the mathematical relationships of current, voltage, and components. Use Ohm's law to describe the relationship between the voltage and current at both ends of an electrical component, extend the Ohm's law formula to the case of multiple resistors in series or parallel, list the formulas through voltage drops, total current, etc., use Kirchhoff's current law to describe the flow direction and magnitude of the current at the circuit nodes, and use Kirchhoff's voltage law to describe the voltage relationship of the circuit loop. Represent the voltage rise and drop relationship of the circuit through the text description of the voltage values of the electrical components.

[0068] (5) Based on multiple text descriptions generated for different circuits, check whether the text descriptions are equal to verify the equivalence of different circuits.

[0069] S2, automatically generate a template based on the predefined Coq code, and generate the Coq description from the circuit text description.

[0070] In an embodiment of the present invention, the content applicable to Coq formal verification is extracted from the circuit text description, the characteristics of the analog circuit are transformed into mathematical objects that can be formally verified, and according to the characteristics of current, voltage, and components in the analog circuit, a record type Record is established for electrical components, and a Definition that can be formally verified is assigned a value.

[0071] In an embodiment of the present invention, step S2 further includes:

[0072] S21, predefine a template for automatic generation of Coq code based on a template, define the general structure of the template and allow the insertion of specific dynamic content, perform dynamic filling for fixed content and parts that need to be filled, design the text input format, set up a parser to convert the input circuit text description into an operable data structure, inherit a template engine to combine the template with the data, and the template engine fills the placeholders in the template according to the input variable values to generate specific code.

[0073] S22, abstract the physical structure and behavior of the analog circuit into a mathematical model, represent the electrical behavior of electrical components through mathematical equations. For resistive components, the linear relationship between current and voltage is described based on Ohm's law. For capacitive components, it is represented through the integral form of capacitance. For inductive components, it is described through the derivative form of inductance. Considering the time-domain behavior of the analog circuit, the dynamic response of the analog circuit is described by solving differential equations. When multiple components and connections in the circuit form a complex system, through mesh analysis, the circuit is transformed into a system of linear algebraic equations. The voltage at each node or the current in each loop is regarded as an unknown, and the overall behavior of the circuit is represented by constructing a system of equations, and the coefficient matrix is used to represent the impedance, admittance, or other electrical characteristics of the circuit components.

[0074] S23, transform the abstracted analog circuit behavior into a Coq formal specification or theorem to generate a Coq description. This includes the mathematical description of circuit performance, timing, stability, and other characteristics, and transforms them into propositions or definitions that can be processed in Coq: define the basic components of the circuit and their behaviors in Coq. For each component, define its input-output relationship, timing characteristics, and response method; based on the mathematical model, establish mathematical descriptions for current, resistance, and voltage, and establish some basic properties or constraints for these basic physical quantities; formally define Ohm's law and Kirchhoff's law as Coq axioms, introduce functions or relationships to describe the mapping between current, voltage, and resistance; provide basic attributes or axioms for circuit components to ensure that they conform to physical laws. Each mathematical relationship regarding circuit behavior (such as Ohm's law, Kirchhoff's law, current-voltage relationship, etc.) needs to be expressed as a proposition in Coq.

[0075] S3. Introduce circuit theorems in Coq and conduct circuit proofs. This step requires transforming the behavior and specifications of the circuit into theorems and using formal reasoning tools for proof.

[0076] Formalize issues such as the performance and stability of the circuit, and construct corresponding theorems. Use the proof assistant function of Coq to prove relevant circuit theorems; use techniques such as Coq's proof strategies, induction, and proof by contradiction to verify whether the behavior of the circuit under specific conditions meets expectations.

[0077] Pre-define a template for automatic generation of Coq code based on templates. Use the simulation of circuit text description as an intermediate language to automatically generate Coq description code for the circuit based on the template for circuit correctness verification. The template is the basic structure for generating Coq code, containing placeholders and specific syntax structures. The Ocaml program parses the input system of equations and fills them into the pre-defined template to generate the corresponding Coq code. The role of the placeholder is to flexibly extract variables, constants, and symbols in the mathematical equations and fill them into the template as needed. Model the circuit behavior and specifications, define the circuit behavior as Definition, and express the previous circuit behavior and specifications as explicit Lemma. Define the basic properties of circuit components in Coq, and use the continuous mathematics library provided by Coq (such as Reals) to define variables and equations in the circuit to ensure that the behavior of the circuit meets the expected performance indicators under given inputs, so as to ensure that the design and performance of the circuit meet the requirements theoretically and avoid potential problems.

[0078] Transform the characteristics of the analog circuit into mathematical objects that can be formally verified, including: mathematically modeling the components, connection methods, and electrical characteristics of the circuit, defining basic types for electrical components such as current, voltage, resistance, capacitance, transistors, etc., defining node information and using list to store node information, and defining functions to define circuit behavior models such as Ohm's law and capacitor charging equations.

[0079] In an embodiment of the present invention, in step S3, formalize the performance and stability issues of the circuit, construct corresponding theorems, use the proof assistant function of Coq to prove relevant circuit theorems, and use Coq's proof strategies, induction, and proof by contradiction to verify whether the behavior of the analog circuit under specific conditions meets expectations.

[0080] The formal verification method of analog circuits based on the Coq theorem prover in the embodiments of the present invention converts the information of the basic analog circuit diagrams composed of power supplies, resistors, and capacitors into text descriptions, and provides a template-based code automatic generation method, aiming to further automatically generate the Coq formal descriptions of this type of circuits, providing the necessary information for using Coq to verify the circuit properties. Further, through the formal descriptions of this type of basic analog circuits, the equivalence proof of the circuits is carried out in Coq. The present invention can ensure that there are consistent functional and performance requirements among the various modules of the analog design. This technology can support the symbolic analysis of the properties of this type of circuits, ensure that the behavior of the circuit design meets the expectations, help users discover and eliminate potential defects in the design as early as possible, and also support the simplification of this type of circuit design by proving the circuit equivalence.

[0081] The following uses a specific embodiment to elaborate in detail on the formal verification method of analog circuits based on the Coq theorem prover of the present invention.

[0082] Step 1: Set the front-end circuit diagram data structure.

[0083] Electrical component library format: The data structure of the electrical component library details the hierarchical structure of an electrical component (such as a resistor), including type, package, numbering rule, and port information, including the number, direction, input / output property, name of each port, and its position in the electrical drawing. Through this data, design software or hardware tools can accurately generate circuit diagrams, layout diagrams, and perform circuit analysis. The following shows an example format of the resistor electrical component library:

[0084]

[0085]

[0086] Wire data structure: Since the wire is represented by a polyline in the circuit diagram drawing, the starting point, midpoint, and bending points of the wire are defined. Among them, the wire point with the extraInfo value of "a", the intermediate bending point of the wire with the value of "b", and the end point of the wire with the value of "c".

[0087]

[0088] Electrical component data structure: Taking the resistor electrical component as an example, the data structure definition is shown. The data structure defines the name, drawing coordinates, ID, picture library path of the component, and defines its special parameters (such as the resistance value unique to the resistor component).

[0089]

[0090] Example of Local Storage Structure Format: Circuit information is stored locally in JSON format. These information structures are mainly used to represent the layout of components and nodes in a circuit diagram, as well as the connection relationships between them. The data contains two main parts: node information and component information. Each part contains different types of key-value pairs. The data stores the wire node information and component information of an analog circuit. Each node contains planar coordinates (x and y), additional information (extraInfo), connected nodes (connect), and connection numbers (connectNum); each component includes its position, size, rotation angle, type identifier, image path, pin information, resistance value, etc.

[0091]

[0092]

[0093]

[0094] Step 2: Design of the front-end drawing software that supports the above data structure.

[0095] (1) User Graphical Interface (UI) and User Experience (UX) Design

[0096] The interface design includes a canvas, a toolbar, a component property panel, a status bar, and a menu bar. The specific content of each module is as follows:

[0097] Canvas: Design a scalable and pannable working area for drawing circuit diagrams. Users can drag, connect, and edit various circuit components (such as power supplies, resistors, capacitors, transistors, switches, etc.) on this area. The canvas supports interactive operations such as zooming, panning, dragging, and selecting. Use the listener element.addEventListener() to capture user operations. Taking the capture of a button mouse click as an example, when the user clicks on the canvas, obtain the mouse coordinate information:

[0098]

[0099] Toolbar: Provide common operation buttons such as component selection, connection tools, and drawing tools. Usually, it contains icons of various circuit components, such as batteries, wires, switches, components, etc. Users can select and drag them onto the canvas.

[0100] Component Property Panel: Display the properties of the currently selected component and allow users to modify these properties. For example, the resistance value of a resistor, the voltage of a power supply, the state of a switch, etc. When the user modifies the properties, the UI will pass the changes to the backend to update the corresponding circuit component data. Taking the modification of the electrical component value as an example:

[0101]

[0102]

[0103] Status bar: Displays prompts, status information, coordinates, zoom ratios, etc. for the current operation. It includes connection line information, and the connection lines are used to connect different circuit elements. Users form electrical connections between components by dragging the endpoints of the connection lines. The UI will track the connection relationship in real time and dynamically draw the connection lines on the canvas, store the canvas information in data format, and transmit it to the backend for circuit analysis operations. The following takes drawing a polyline as an example:

[0104]

[0105] Menu bar: Provides independent panels or pop-up boxes for parameter settings, simulation control, component properties, etc. It includes file operations (such as new, open, save, export), editing operations (such as undo, redo, copy, paste), and other functions.

[0106] By interacting with the graphic page, it supports drawing sample simulation circuit diagrams as shown in Figure 2 the following example.

[0107] (2) Circuit Editing and Drawing

[0108] Component library management: Creates and maintains a rich circuit component library, including common passive components (resistors, capacitors, inductors, etc.), active components (transistors, operational amplifiers, diodes, etc.), power supplies, switches, etc. The following shows an example description of a resistor in the component library;

[0109]

[0110]

[0111] Step 3: Set the backend data structure

[0112] Electrical component parameter definition: Since the subsequent work requires generating character descriptions of the circuit and performing specific numerical calculations, electrical component parameters are supported to be represented in two formats: floating-point numbers and strings.

[0113] type voltage=

[0114] |Float of float

[0115] |String of string

[0116] Electrical component definition:

[0117]

[0118]

[0119] Take the creation of a resistive electrical component as an example. Its name is "Resistor1"; the voltage value uses the floating-point format and is 12V; the resistance value uses a character representation and is "I1"; the resistance value is 24.0Ω.

[0120]

[0121] Step 4: Node the netlist topology information according to the netlist information of the simulation circuit diagram

[0122] Netlist topology information node: In circuit analysis, nodeing the circuit is an important step, which can be achieved by abstracting the circuit diagram into the form of an undirected graph. Each electrical component (such as a resistor, capacitor, and inductor) corresponds to an edge in the graph, and the connection points (nodes) in the circuit become the vertices in the graph. This representation extracts the necessary circuit information, and this method helps to more intuitively analyze the current and voltage distribution in the circuit. The nodeed graph after abstracting the circuit diagram is as Figure 3 shown.

[0123] For this reason, a data structure can be designed to store this graph. In this project, an adjacency list is used to represent the undirected graph, where each node contains a list that lists the other nodes connected to it and the corresponding electrical component parameters. The adjacency matrix corresponding to the example diagram is as follows:

[0124] let adjacency_matrix=

[0125] (*1 2 3 4 5 6 7 8 9 10 11 12 13*) [0; 0; 0; 0; 0; 0; 1; 0; 0; 1; 0; 0; 0]; [0; 0; 0; 0; 0; 0; 0; 0; 0; 1; 0; 1; 0]; [0; 0; 0; 0; 0; 0; 0; 0; 0; 1; 0; 0; 1]; [0; 0; 0; 0; 0; 0; 0; 1; 1; 0; 0; 0; 0]; [0; 0; 0; 0; 0; 0; 0; 0; 0; 0; 1; 1; 0]; [0; 0; 0; 0; 0; 0; 0; 0; 0; 0; 1; 0; 1]; [1; 0; 0; 0; 0; 0; 0; 0; 0; 0; 1; 0; 0]; [0; 0; 0; 1; 0; 0; 0; 0; 0; 0; 0; 0; 1]; [0; 0; 0; 1; 0; 0; 0; 0; 0; 0; 0; 1; 0]; [1; 1; 1; 0; 0; 0; 0; 0; 0; 0; 0; 0; 0; 0]; [0; 0; 0; 0; 1; 1; 1; 0; 0; 0; 0; 0; 0]; [0; 1; 0; 0; 1; 0; 0; 0; 1; 0; 0; 0; 0]; [0; 0; 1; 0; 0; 1; 0; 1; 0; 0; 0; 0; 0];

[0140] This step involves converting circuit components and connection relationships into a data structure for subsequent calculations and operations. Through an in-depth understanding of the circuit topology, we can generate a description matrix that systematically represents the components in the circuit and their interrelationships, laying the foundation for the mathematical analysis of the circuit.

[0141] Step 5: Design the circuit loop algorithm

[0142] Traverse the nodes in depth-first order to generate loops:

[0143] (*Normalize the loop to its minimum representation, i.e., find all rotations of this loop and return the one with the smallest lexicographical order.*)

[0144]

[0145]

[0146] By processing the description matrix, the circuit loop paths are generated. Identifying these paths is crucial as they are directly related to the current distribution and voltage changes in the circuit. Based on this, applying Ohm's law and Kirchhoff's laws can generate a character description of the circuit. These character descriptions, as an intermediate language, not only concisely express the basic characteristics of the circuit but also provide the necessary support for subsequent processing and analysis.

[0147] For the example circuit diagram above, design a program to perform a depth-first traversal. The expected independent loop paths are shown in the following figure:

[0148] 1 -> 10 -> 3 -> 13 -> 6 -> 11 -> 7 -> 1

[0149] 1 -> 10 -> 2 -> 12 -> 9 -> 4 -> 8 -> 13 -> 6 -> 11 -> 7 -> 1

[0150] 4 -> 9 -> 12 -> 5 -> 11 -> 6 -> 13 -> 8 -> 4

[0151] Step 5: Generate the corresponding circuit text description according to the circuit principle

[0152] ​According to the circuit loop path and based on circuit theory, it is expected to further generate the character description of the circuit as follows:

[0153] I1 = U1 / R1

[0154] I2 = U2 / R2

[0155] I3 = U3 / R3

[0156] I4 = U4 / R4

[0157] I5 = U5 / R5

[0158] U1 - U7 - U5 - U2 = 0

[0159] U3 - U8 - U4 - U9 + U5 - U7 - U1 = 0

[0160] U5 + U6 - U8 - U4 - U9 = 0

[0161] I1 + I3 - I2 = 0

[0162] I1 + I4 - I5 = 0

[0163] I2 + I6 - I5 = 0

[0164] I3 - I4 - I6 = 0

[0165] The character description of circuit parameters not only provides the basic information of components but also reflects their roles and performance characteristics in the circuit. This is of great significance for circuit analysis, design, and troubleshooting.

[0166] Step 6: Prove the circuit equivalence according to the circuit text description

[0167] As Figure 4 shown, the circuit diagram contains three resistors R1, R2, and R3, where A is the input port and B is the output port. For Figure 4 , the present invention generates the circuit text description:

[0168] R 总1＝ (R1 + R2) / R1R2 + R3

[0169] R1 and R2 are connected in series and in parallel with R3. The equivalent total resistance R of the circuit 总1 can be calculated by the above formula.

[0170] Figure 5 As shown, this circuit also consists of three resistors R1, R2, and R3, where A is the input port and B is the output port, and adopts a different circuit connection method from Figure 4 . For Figure 5 , the present invention generates the circuit text description:

[0171] R 总2 = R3 + (R1 + R2) / R1R2

[0172] In Figure 5 the circuit, R1 and R2 are also connected in parallel, with different relative orientations in the circuit diagram and different ways of being connected in parallel with R3. Although Figure 5 and Figure 4 adopt different connection methods, the present invention derives through mathematical deduction that Figure 4 and Figure 5 have the same resistance calculation formula. Therefore Figure 4 and Figure 5 circuits have circuit equivalence. This shows that different circuit structures can sometimes achieve the same electrical effects through reasonable component combinations.

[0173] Step 7: Pre-define the template for automatic generation of Coq code

[0174] Write a program for generating Ocaml template code. The template is the basic structure for generating Coq code, containing placeholders and specific syntax structures. As a powerful programming language, Ocaml provides efficient string processing and template engine capabilities, enabling rapid implementation of the placeholder replacement mechanism and generation of the required Coq code. As a powerful programming language, Ocaml provides efficient string processing and template engine capabilities, enabling rapid implementation of the placeholder replacement mechanism and generation of the required Coq code. Specifically, the Ocaml program parses the input system of equations and fills them into the pre-defined template, thereby generating the corresponding Coq code.

[0175] The role of the placeholder is to flexibly extract variables, constants, and symbols in the mathematical equation and fill them into the template as needed. This program will use placeholders to replace the symbols in the equation and automatically generate the corresponding Coq code. In Coq syntax, Definition is used to define the name and behavior of constants, functions, or data types. By using Definition, an expression or a calculation can be bound to a name, making it convenient to reference in subsequent code.

[0176] The following takes the KCL text description of the analog circuit as an example to elaborate on the template format of the Coq code automatic generation technology:

[0177]

[0178]

[0179] Step 8: Import the intermediate language into the Coq code automatic generation template to generate the formal description of the circuit

[0180] Through the formal description of the circuit, CoqIde is further used to prove the correctness of the circuit. After converting the formal description of the circuit into definitions and theorems that Coq can understand, we utilize the powerful capabilities of Coq to gradually construct the proof process, ensuring that the circuit meets the predetermined functions and properties, such as validity and equivalence of multiple circuits.

[0181] The formal description expected to be generated by the example circuit is as follows:

[0182] Definition ohm_1: I1 = U1 / R1.

[0183] Definition ohm_2: I2 = U2 / R2.

[0184] Definition ohm_3: I3 = U3 / R3.

[0185] Definition ohm_4: I4 = U4 / R4.

[0186] Definition ohm_5: I5 = U5 / R5.

[0187] Definition Kcl_1: I1 + I3 - I2 = 0

[0188] Definition Kcl_2: I1 + I4 - I5 = 0

[0189] Definition Kcl_3: I2 + I6 - I5 = 0

[0190] Definition Kcl_4: I3 - I4 - I6 = 0

[0191] Definition Kvl_1: U1 - U7 - U5 - U2 = 0

[0192] Definition Kvl_2: U3 - U8 - U4 - U9 + U5 - U7 - U1 = 0

[0193] Definition Kvl_3: U5 + U6 - U8 - U4 - U9 = 0

[0194] Definition is used to define the names and behaviors of constants, functions, or data types. By using Definition, an expression or a calculation can be bound to a name, making it convenient to reference in subsequent code, laying the foundation for subsequent formal verification work.

[0195] For the proof of the circuit, corresponding circuit theorems need to be designed. The basic components of the circuit are defined through type definitions and records as follows. When automatically generating the formal description of the circuit, the following content is added by default:

[0196]

[0197]

[0198] Step 9: Formal verification of the circuit

[0199] Assume that it is known that U1 = 10V, U7 = 2V, and U5 = 4V. Below, the Coq language will be used to prove that the voltage value of U2 is 4V:

[0200] First, define the data structure of the voltage source, including the name and value. The voltage source name is in string format, and the voltage value is of natural number type

[0201]

[0202] Secondly, based on the known voltage source values, create voltage source instances. And give their values:

[0203] (*Given the known voltage source instances*)

[0204] Definition U1 := {|name := "U1"; value := 10%N|}.(*U1 = 10V*)

[0205] Definition U7 := {|name := "U7"; value := 2%N|}.(*U7 = 2V*)

[0206] Definition U5 := {|name := "U5"; value := 4%N|}.(*U5 = 4V*)

[0207] Assume U2 -= 4V, representing the voltage value to be proved:

[0208] Definition U2 := {|name := "U2"; value := 4%N|}.(*U2 = 4V*)

[0209] Secondly, based on the known Definition Kvl_1 above as a reference, use a new data structure to further define the KVL equation of the circuit:

[0210] Definition Kvl_1 : N := (value U1) - (value U7) - (value U5) - (value U2).

[0211] Secondly, prove that the KVL equation holds:

[0212] Lemma kvl_equation: Kvl_1 = 0%N.

[0213] Proof.

[0214] (*Directly calculate the value of the KVL equation*)

[0215] unfold Kvl_1. (*Expand the KVL equation*)

[0216] simpl. (*Simplify the expression*)

[0217] (*Calculate the value of each term*)

[0218] compute. (*Automatically calculate each term*)

[0219] (*Result: 10 - 2 - 4 - 4 = 0*)

[0220] reflexivity. (*Prove that both sides of the equation are equal*)

[0221] Qed.

[0222] Define the value of voltage source U2 and prove that it is 4V:

[0223] Lemma verify_U2_voltage: value U2 = 4%N.

[0224] Proof.

[0225] (*By definition, the voltage of U2 is 4V*)

[0226] reflexivity.

[0227] Qed.

[0228] Secondly, derive U2 = 4V from the KVL equation:

[0229] (*Use the KVL equation for verification and derive U2 = 4V*)

[0230] Lemma verify_U2_voltage_by_KVL: value U2 = 4%N.

[0231] Proof.

[0232] (*First calculate the left side of the KVL equation*)

[0233] simpl.

[0234] (*Expand the KVL equation*)

[0235] compute.

[0236] (*Obtain the result through the KVL equation and verify that the voltage of U2 is 4V*)

[0237] reflexivity.

[0238] Qed.

[0239] The formal verification method of analog circuits based on the Coq theorem prover proposed in the embodiments of the present invention includes developing an analog circuit graphic page, supporting interaction with the backend through the js_of_ocaml technology, and generating analog circuit netlist information; the backend calls Ocaml functions to convert the circuit diagram information into a circuit text description; based on a predefined Coq code automatic generation template, the circuit text description is generated into a Coq description; circuit theorems are introduced in Coq for circuit proof. The present invention can ensure that there are consistent functional and performance requirements among the various modules of the analog design. This technology can support symbolic analysis of the properties of this type of circuit, ensure that the behavior of the circuit design meets expectations, help users discover and eliminate potential defects in the design as early as possible, and also support simplifying this type of circuit design by proving circuit equivalence.

[0240] In the description of this specification, the descriptions referring to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples", etc. mean that the specific features, structures, materials, or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described can be combined in a suitable manner in any one or N embodiments or examples. In addition, without contradiction, those skilled in the art can combine and combine the different embodiments or examples described in this specification and the features of different embodiments or examples.

[0241] In addition, the terms "first" and "second" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, the features defined with "first" and "second" can explicitly or implicitly include at least one of the features. In the description of the present invention, the meaning of "N" is at least two, such as two, three, etc., unless otherwise specifically defined.

[0242] Any process or method description, whether in a flowchart or otherwise described herein, can be understood to represent a module, segment, or portion of code including one or N executable instructions for implementing a customized logical function or process. The scope of the preferred embodiments of the present invention includes additional implementations, where the functions may be performed in a substantially simultaneous manner or in an order opposite to that shown or discussed, depending on the functions involved, without being limited to the order shown or discussed, and this should be understood by those skilled in the art to which the embodiments of the present invention pertain.

Claims

1. A formal verification method for analog circuits based on the Coq theorem prover, characterized in that Including the following steps: S1. Generate analog circuit netlist information according to the user's analog circuit diagram, and convert the analog circuit netlist information into a circuit text description; S2. Automatically generate a template based on predefined Coq code, and generate a Coq description from the circuit text description; S3. Introduce circuit theorems in Coq to conduct circuit proof.

2. The method according to claim 1, characterized in that, Before generating the analog circuit netlist information according to the user's analog circuit diagram, it further includes: S0. Design a user interface for interactive graphical design of analog circuits that includes a standardized circuit character library and corresponding data structures, and the user inputs the analog circuit diagram through the user interface.

3. The method according to claim 2, wherein Step S0 further includes: S01. Design the page layout and interaction design, use Listeners to define interaction events and design responses; S02. Design a standardized circuit character library to ensure the unity and standardization of components, define the data structure of circuit components, set specific attributes and behaviors for each component, set the saving format of circuit diagram information, and the saved circuit diagram information includes electrical component input and output port information, electrical component connection relationships, circuit hierarchy, circuit type fields, and circuit attributes.

4. The method according to claim 1, characterized in that, Step S1 further includes: S11. Combine JavaScript with the Ocmal language through the js_oc_Ocmal technology. The front end uses the JavaScript language to call Ocmal functions to transfer the analog circuit diagram information to the back end for processing, and the back end uses the Ocmal language to parse the analog circuit diagram information to generate analog circuit netlist information; S12. Use Ocmal functions to process the circuit topology structure of the analog circuit netlist information, generate circuit loop paths through the depth-first traversal algorithm, abstract the analog circuit diagram information into a mathematical expression according to circuit theorems, and generate a circuit text description; S13. Conduct circuit equivalence verification based on the circuit text description: express each component of the analog circuit in a standardized text description form to generate a circuit model, construct a mathematical expression of the circuit using the text description, and compare the text descriptions of different circuits one by one to check whether the text descriptions are equal to verify the equivalence of different circuits.

5. The method according to claim 1, characterized in that In step S2, the characteristics of the analog circuit are transformed into mathematical objects that can be formally verified. According to the characteristics of current, voltage, and components in the analog circuit, a record type Record is established for electrical components, and a Definition that can be formally verified is assigned a value.

6. The method according to claim 1, wherein Step S2 further includes: S21. Predefine a template for automatically generating Coq code based on a template, define the general structure of the template and allow the insertion of specific dynamic content, dynamically fill in the fixed content and the parts that need to be filled, design the text input format, set up a parser to convert the input circuit text description into an operable data structure, inherit the template engine to combine the template with the data, and the template engine fills in the placeholders in the template according to the input variable values to generate specific code; S22 abstracts the physical structure and behavior of the analog circuit into a mathematical model, represents the electrical behavior of electrical components through mathematical equations, considers the time-domain behavior of the analog circuit, and describes the dynamic response of the analog circuit by solving differential equations; S23 transforms the abstracted analog circuit behavior into a Coq formal specification or theorem to generate a Coq description.

7. The method according to claim 1, wherein In step S3, formalize the performance and stability issues of the circuit, construct corresponding theorems, use the proof assistant function of Coq to prove the relevant theorems of the circuit, and use the proof strategies, induction method, and proof by contradiction of Coq to verify whether the behavior of the analog circuit under specific conditions meets the expectations.

8. The method according to claim 4, wherein Step S11 includes: using the js_of_Ocmal compiler to compile the.ml file written in the Ocmal language at the backend. Through the compilation process, generate an intermediate representation, and then convert the intermediate representation into equivalent.js code, enabling the circuit processing logic written based on the backend to be executed on the browser side. After embedding the generated.js code into the html web page, the front end can interact with the backend through HTTP requests, thereby realizing the dynamic interaction and circuit verification functions between the front and back ends.

9. The method according to claim 4, wherein Step S12 includes: abstracting the circuit topology into a nodal connection, using an adjacency matrix to represent the connection relationship between electrical components, constructing a graph structure through the port connection information of the circuit diagram, storing the connection information of the circuit using the adjacency matrix, intuitively representing the connection relationship between each node in the circuit, using the find_cycles function to perform loop detection. The find_cycles function is implemented by marking the visited nodes, tracing the current path, and traversing the adjacent nodes, used to check whether a loop is formed, and save the loop information when a loop is found, while avoiding duplicate recording of the same loop, and using the normalize_start_point function to normalize the starting point of the loop and output all detected loop information.

10. The method according to claim 4, wherein In step S12, abstracting the analog circuit diagram information into a mathematical expression according to circuit theorems includes: representing the voltage relationship between nodes in the circuit through Kirchhoff's voltage law, and the voltage relationship between each node in the circuit is represented as a set of algebraic equations; representing the relationship of branch currents in the circuit through Kirchhoff's current law, providing a theoretical basis for the calculation and optimization of currents; expressing the relationship of electrical component attributes through Ohm's law.

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