Power semiconductor element testing device

Abstract

The invention relates to a power semiconductor element testing device. A resistance circuit (125) is connected to a gate terminal of a tested semiconductor element (117). An ON voltage or an OFF voltage from the gate driver circuit (113) is applied to the gate terminal (g). The power supply circuit (132) generates a test current. A switching circuit (124a) is mounted on the switching circuit board (201a), and a test current is supplied to the semiconductor element (117) by being turned on by the switching circuit (124a). A switching circuit (124b) is mounted on the switching circuit board (201b), and the switching circuit (124b) is turned on to short-circuit the output terminals of the power supply circuit (132) and discharge the charge. A voltage output circuit (116) outputs a voltage between a terminal (c) and a terminal (e) of the semiconductor element (117).

Description

[0001] This divisional application of the present invention is filed based on the international application with PCT application number PCT / JP2020 / 020629 and the theme of "Semiconductor Element Testing Apparatus and Semiconductor Element Testing Method" entering the Chinese national phase. The application number of the Chinese invention application is 202080040749.2, and the filing date is May 25, 2020. Technical Field

[0002] The present invention relates to semiconductor elements, electrical component testing apparatuses for testing electrical components, and testing methods for electrical components, etc. Background Art

[0003] In the life test of electrical components such as semiconductor elements, the conduction and cutoff of the energized current are performed. In particular, the current applied to a power semiconductor element is as large as several hundred amperes. There are many types of tests for electrical components, and it is necessary to change the connection of the connection wiring corresponding to the type of test.

[0004] Prior Art Documents

[0005] Patent Documents

[0006] Patent Document 1: Japanese Unexamined Patent Application Publication No. 2017 - 17822 Summary of the Invention

[0007] Technical Problems to be Solved by the Invention

[0008] In order to test semiconductor elements such as transistors, a constant current of several hundred A or more is applied, so thick wires with low resistance are required for the connection wiring.

[0009] The thick connection wiring is hard and has no flexibility. Changing the connection of the thick wire connection wiring corresponding to the test item takes a long time.

[0010] Solutions to Solve the Above Technical Problems

[0011] The semiconductor element testing apparatus of the present invention separates the space inside the semiconductor element testing apparatus where semiconductor elements such as transistors 117 to be tested are arranged from the location where the circuit board that generates the control signals for the transistors 117 etc. is arranged by a partition wall 214.

[0012] In the connection with the circuit board etc., a fork - shaped plug is used. The connection and connection change are performed by inserting the fork - shaped plug 205 through the opening 216 provided in the partition wall 214 to make the fork - shaped plug 215 in electrical contact with the conductor plate 204 provided on the circuit board.

[0013] Advantages of the Invention

[0014] By changing the position of the fork-shaped plug 205 inserted into the insertion opening 216, the connection between the semiconductor element 117 and the test circuit can be easily changed. The connection operation of the connection wiring 211 for each test item, or the connection change, is performed by changing the position of the fork-shaped plug 205, so that the time for connection change can be significantly shortened. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 is a block diagram and an explanatory diagram of the semiconductor element test device of the present invention.

[0016] Figure 2 is a configuration diagram of the semiconductor element test device of the present invention.

[0017] Figure 3 is an explanatory diagram and an equivalent circuit diagram of the semiconductor element to be tested.

[0018] Figure 4 is a block diagram and an explanatory diagram of the semiconductor element test device of the present invention.

[0019] Figure 5 is an explanatory diagram and a configuration diagram of the semiconductor element test device of the present invention.

[0020] Figure 6 is an explanatory diagram and a configuration diagram of the semiconductor element test device of the present invention.

[0021] Figure 7 is an explanatory diagram and a configuration diagram of the heat pipe part of the present invention.

[0022] Figure 8 is an explanatory diagram and a configuration diagram of the heat pipe part of the present invention.

[0023] Figure 9 is an explanatory diagram and a configuration diagram of the mounting part of the semiconductor element of the present invention.

[0024] Figure 10 is an explanatory diagram and a configuration diagram of the mounting part of the semiconductor element of the present invention.

[0025] Figure 11 is an explanatory diagram and a configuration diagram of the mounting part of the semiconductor element of the present invention.

[0026] Figure 12 is an explanatory diagram and a configuration diagram of the mounting part of the semiconductor element of the present invention.

[0027] Figure 13 is an explanatory diagram of the electrical connection part of the semiconductor element test device of the present invention.

[0028] Figure 14 is an explanatory diagram and a configuration diagram of the electrical connection part of the semiconductor element test device of the present invention.

[0029] Figure 15 These are the explanatory diagram and the configuration diagram of the electrical connection part of the semiconductor element test device of the present invention.

[0030] Figure 16 These are the explanatory diagram and the configuration diagram of the electrical connection part of the semiconductor element test device of the present invention.

[0031] Figure 17 These are the explanatory diagram and the block diagram of the semiconductor element test device of the present invention.

[0032] Figure 18 These are the explanatory diagram and the configuration diagram of the semiconductor element test device of the present invention.

[0033] Figure 19 These are the timing diagrams of the test method of the semiconductor element of the present invention.

[0034] Figure 20 These are the explanatory diagrams of the circuit part of the semiconductor element test device of the present invention.

[0035] Figure 21 These are the explanatory diagrams of the circuit part of the semiconductor element test device of the present invention.

[0036] Figure 22 These are the explanatory diagrams of the test method of the semiconductor element of the present invention.

[0037] Figure 23 These are the explanatory diagrams of the test method of the semiconductor element of the present invention.

[0038] Figure 24 These are the explanatory diagrams of the test method of the semiconductor element of the present invention.

[0039] Figure 25 These are the explanatory diagrams of the test method of the semiconductor element of the present invention.

[0040] Figure 26 These are the explanatory diagrams of the test method of the semiconductor element of the present invention.

[0041] Figure 27 These are the block diagram and the timing diagrams of the semiconductor element device of the present invention. Detailed implementation manners

[0042] Hereinafter, with reference to the accompanying drawings, the test device and the test method of the electrical components in the embodiments of the present invention will be described.

[0043] In the embodiments described in the specification, among the power semiconductor elements as electrical components, IGBT is mainly taken as an example for description.

[0044] The present invention is not limited to IGBTs and can be applied to various semiconductor elements such as SiC transistors, MOSFETs, JFETs, thyristors, diodes, thermistors, and resettors.

[0045] In addition, the present invention is not limited to semiconductor elements. Of course, the present invention can also be applied to electrical elements other than semiconductor elements such as resistive elements, capacitors, coils, crystal elements, and ZNRs.

[0046] Embodiments of the present invention can be combined with a part or all of the respective embodiments and can be changed and combined.

[0047] Figure 2 are a configuration diagram and an explanatory diagram of a semiconductor element test apparatus of the present invention. As Figure 2 shown in (a) thereof, the semiconductor element test apparatus of the present invention includes a housing 210, a cooler (cooling / warming device) 136, a heating / cooling plate 134, and a circulation water pipe 135 that circulates between the heating / cooling plate 134 and the cooler 136. On the heating / cooling plate 134, a transistor 117 or the like for performing a test is disposed in close contact with the heating / cooling plate 134.

[0048] As Figure 2 shown in (b) thereof, an opening 216 of a connection structure 218 described in Figure 7 , Figure 9 , Figure 11 etc. is disposed in a partition wall 217. A hole for inserting a power supply wiring 212 is disposed in a partition wall 215.

[0049] The control rack 131 includes: a power supply device 132 that supplies a test current and a test voltage to the semiconductor element 117; and a control circuit 133 that controls the semiconductor element 117 or the like or sets test conditions.

[0050] The control circuit 133 sets test conditions and performs a test by changing the current Id, the gate voltage Vg, and the voltage Vce in such a manner that the temperature information Tj of the semiconductor element 117 reaches a specified value.

[0051] The control circuit 133 controls the power supply device 132, and the power supply device 132 supplies a test voltage or current to the semiconductor element 117 being tested.

[0052] When the temperature information Tj changes or reaches a specified value, it is determined that the semiconductor element 117 has deteriorated or its characteristics have changed, and the test of the semiconductor element 117 is stopped, or the test method or control method is changed.

[0053] By heating or cooling the circulating water of the cooler 136, the temperature of the semiconductor element 117 is maintained at a predetermined value or a specified value. In addition, the temperature of the semiconductor element or the like is periodically changed corresponding to the test conditions, and further, cooling or heating is performed in a constant manner.

[0054] As an example, the semiconductor element test apparatus and the semiconductor element test method of the present invention can cope with Figure 3 a wide variety of semiconductor elements 117 and semiconductor modules 117 as shown. Figure 3 The semiconductor element 117 or the like has terminal P electrode terminals, O electrode terminals, and N electrode terminals to which a large current is applied or output.

[0055] Figure 3 are a schematic diagram and an equivalent circuit diagram of the semiconductor element. Figure 3 (a1) and (a2) in are configurations having one transistor 117 and diode Di.

[0056] Figure 3 (b1) and (b2) in are configurations having transistors 117 (transistor 117m, transistor 117s) and diodes Di (diode Dim, diode Dis).

[0057] Figure 3 (c1) and (c2) in are configurations for testing by connecting terminals of semiconductor elements having transistors 117 (transistor 117m or transistor 117s) and diodes Di (diode Dim or diode Dis) to connect multiple transistors.

[0058] Figure 3 (d1) and (d2) in are configurations having transistors 117 (transistor 117m, transistor 117s) and diodes D (diode Ds, diode Dm) having terminals independent of the terminals of the transistors.

[0059] Figure 3 (e1) and (e2) in are configurations for performing a test by connecting terminals of semiconductor elements having transistors 117 (transistor 117m or transistor 117s) and diodes D (diode Dm or diode Ds) having terminals independent of the terminals of the transistors to connect multiple transistors.

[0060] In the following embodiments, the semiconductor element 117 shown in Figure 3 is mainly illustrated and described.

[0061] Figure 1 are a block diagram and an explanatory diagram of the semiconductor element test apparatus of the present invention.

[0062] The power supply device 132 outputs a constant current of a large current for testing the transistor 117. The power supply device 132 supplies power (current, voltage) synchronously with a control signal from the control circuit board (controller) 111. The power supply device 132 can set the maximum voltage value of the output.

[0063] The switch circuit 122 (SWa) has a function of turning on (supplying, applying) or off (blocking, opening) the supply of the constant current output by the power supply device 132.

[0064] In the semiconductor element testing device of the present invention, the power supply device 132 is not limited to one unit. Two or more power supply devices 132 may also be provided.

[0065] In an embodiment of the present invention, as the connection plug 205, a fork-shaped plug is exemplified for description. Fork-shaped plugs 205 are connected to one end of each connection wiring 211 and each power supply wiring 212, such as the fork-shaped plug 205e connected to the collector terminal of the transistor 117 and the fork-shaped plug 205d connected to one terminal of the power supply device 132, and are connected to the conductor plate 204.

[0066] It should be noted that, although described as the conductor plate 204 in this specification and the drawings, it is not limited to a plate and may also be rod-shaped. It may also be composed of a plurality of structures. As long as it can be joined to structures such as the fork-shaped plug 205, it can be of any shape, etc. For example, it may also be a socket, a connector or other structures. In addition, the conductor plate 204 may be set in the shape of a fork-shaped plug, and the fork-shaped plug 205 may be connected to the said fork-shaped plug.

[0067] The present invention may have any configuration as long as a fork-shaped plug 205 or the like is formed or arranged at at least one terminal of the transistor 117 to be tested and is electrically connected to a connection object such as the fork-shaped plug 205 and the conductor plate 204.

[0068] The fork-shaped plug 205 is described as a fork-shaped plug inserted into a structure or object in a separated space such as the partition wall 214. However, it is not limited thereto. For example, the fork-shaped plug 205c may be connected to the conductor plate 204b and inserted from the partition wall 214 to be electrically connected to one terminal (emitter terminal e) of the transistor 117.

[0069] The partition walls 214, 215, and 217 of the semiconductor element testing device of the present invention may be any partition walls as long as they divide or separate a space or region. A variety of configurations or structures such as wall-shaped, plate-shaped, mesh-shaped, film-shaped, and foil-shaped are applicable.

[0070] The fork-shaped plug 205 can be any one of the structures, configurations, methods, forms, or ways that can be electrically connected to an object such as the conductor plate 204 by means of pressing, crimping, inserting, fitting, clamping, engaging, etc.

[0071] The power supply device 132 is operated to supply the test current Id flowing through the transistor 117. The power supply device 132 performs on / off (conductive / cutoff) control according to a signal from the control circuit board (controller) 111. In addition, the output and non-output of the current Id can be switched. The device control circuit board 209 is controlled by the control circuit board (controller) 111.

[0072] In Figure 1 the example of the transistor 117 for which the test is performed is Figure 3 the transistor having the diode Di shown in (a) of the figure is described. The emitter terminal e of the transistor 117 is grounded for the description. The gate driver circuit 113 is connected to the gate terminal g of the transistor 117.

[0073] In the sample connection circuit 203, the gate driver circuit 113, the variable resistance circuit 125, the constant current circuit 118, and the operational amplifier (buffer circuit) 116 are arranged or formed.

[0074] The sample connection circuit 203 is separated from the device control circuit board 209 in such a manner that it can be arranged close to the transistor 117 for which the test is performed, and is electrically connected through the connector 208.

[0075] The sample connection circuit 203 is connected to the transistor 117 through the connection pin 206 of the connector 202. The gate driver circuit 113 is arranged at a short distance of 30 mm or less from the gate terminal g of the transistor 117. If the distance between the gate driver circuit 113 and the gate terminal g of the transistor 117 is long, noise etc. overlaps the gate terminal g, causing the transistor 117 to malfunction due to noise.

[0076] As Figure 1 shown, a test signal is applied from the gate driver circuit 113 to the gate terminal g of the transistor 117. The gate driver circuit 113 has an operational amplifier circuit.

[0077] As Figure 5 shown, the device control circuit board 209 is arranged in the B chamber of the housing 210 of the semiconductor element test device. The housing 210 is assembled with the power supply device 132, the drive circuit system, the heating / cooling plate 134, etc.

[0078] The sample connection circuit 203 is arranged close to the transistor 117 being tested, and is thus arranged in Chamber C1 of the housing 210 of the semiconductor device test apparatus. The sample connection circuit 203 is connected to the connector 208 arranged on the side surface of the housing 210. The wiring connected to the connection pin 206 of the connector 208 is connected to the device control circuit board 209 in Chamber B.

[0079] The sample connection circuit 203 is connected to the device control circuit board 209 through the connection pin 206 of the connector 208. The sample connection circuits 203 are arranged individually corresponding to the respective transistors 117 being tested, and the sample connection circuit 203 is configured to be easily removable through the connector 202 or the like.

[0080] The constant current circuit 118 supplies a constant current Ic to the diode Di arranged or formed between the channels of the transistor 117. The operational amplifier circuit 116 buffers (reduces the output impedance) the terminal voltage of the diode Di, and outputs it as the Vi voltage. The Vi voltage is subjected to analog-to-digital conversion by the temperature measurement circuit 115.

[0081] The temperature measurement circuit 115 obtains the temperature information Tj of the transistor 117 from the terminal voltage Vi, and transmits it to the control circuit board 111. The temperature information is output from the connector 213 of the device control circuit board 209 to the mother board 207, and is sent to the control circuit board 111.

[0082] The gate driver circuit 113 applies a set frequency (on-off cycle) and a set on-voltage to the gate terminal of the transistor 117. As an example, as shown in (b) of Figure 27 the on-off cycle of the transistor 117 is tcycle, and the on-time is ton.

[0083] Based on the Vg signal voltage output from the gate driver circuit 113, the transistor 117 operates / does not operate (conducts / cuts off), and during the period when the transistor 117 is conducting, the current Id flows between the channels of the transistor 117.

[0084] The gate driver circuit 113 has a variable resistance circuit 125. The resistance value Vr of the variable resistance circuit 125 is configured to be able to be set to a constant voltage or a voltage that changes with time between 0 (Ω) and 500 (Ω).

[0085] The gate driver circuit 113 can set the slope (rise time Tr) of the rising edge waveform and the slope (fall time Td) of the falling edge waveform of the gate electrical signal applied to the gate terminal g of the transistor 117.

[0086] In Figure 1Among others, the resistance value Vr of the variable resistance circuit 125 of the gate driver circuit 113 is variable, but it is not limited thereto. For example, the variable resistance circuit 125 may be an external resistor.

[0087] The constant current circuit 118 causes a prescribed constant current Ic to flow. The constant current Ic is applied to the diode Di. By monitoring the terminal voltage of the diode Di, the temperature change of the transistor 117 can be measured or observed.

[0088] To prevent the transistor 117 from heating due to the constant current Ic, the constant current Ic is set to a current value sufficiently smaller than the constant current Id flowing through the channel of the transistor 117.

[0089] Specifically, the constant current Ic is set to be 1 / 1000 or less of the current Id flowing through the transistor 117 during the test. Preferably, the current Ic flowing through the transistor 117 is 1×10 6 to the power of 1 or more and 1×10 4 to the power of 1 or less. The constant current Ic is 0.1 mA or more and 100 mA or less.

[0090] The channel current Id is changed, the diode Di voltage (the voltage between the collector and emitter terminals of the transistor 117) is measured, and the temperature coefficient K is obtained. The obtained temperature coefficient K is stored in the temperature measurement circuit 115.

[0091] As the temperature coefficient K, the transistor 117 is brought to a prescribed temperature by heating and cooling the plate 134, the constant current Ic is caused to flow through the diode Di, and the terminal voltage is measured. By changing the prescribed temperature and measuring the terminal voltage of the diode Di, the terminal voltage of the diode Di with respect to the temperature of the transistor 117 can be obtained. Therefore, the temperature coefficient K of the transistor 117 can be obtained based on the terminal voltage of the diode Di with respect to the temperature.

[0092] The constant current Ic flows through the diode Di when the channel current Id does not flow. That is, when the transistor 117 is not conducting, the constant current Ic flows to measure the terminal voltage between the terminals of the diode Di.

[0093] The operational amplifier circuit (buffer circuit) 116 outputs the terminal voltage Vi (terminal c - terminal e) of the diode Di.

[0094] In addition, the operational amplifier circuit 116 is not limited to being composed of an operational amplifier element. Any circuit may be used as long as its output impedance is lower than its input impedance.

[0095] The obtained temperature information Tj is sent to the control circuit board (controller) 111. When the temperature information Tj reaches or exceeds a specified set value, the control circuit board (controller) 111 determines that the transistor 117 is in a specified stress state or degradation state, and performs control changes of the test, stops the test, etc.

[0096] In Figure 1 In embodiments such as

[0097] Figure 4 FIG. is an equivalent circuit diagram and explanatory diagram of the semiconductor element test apparatus in the first embodiment of the present invention. In this embodiment, as Figure 4 As shown in FIG. (b), power MOSFETs 124 are used for switching circuits such as the switching circuit Ssa124a and the switching circuit Sab124b. Since the voltage (Vsd) between the channels of the MOSFET is small, it is preferred.

[0098] The channel voltage (Vsdb) when the power MOSFET 124b is turned on is selected to be equal to or lower than the channel voltage (Vsda) when the power MOSFET 124a is turned on. That is, the channel voltage (Vsdb) when the power MOSFET 124b is turned on is smaller than the channel voltage (Vsda) when the power MOSFET 124a is turned on. This is to ensure that the current Im flows stably when the switching circuit 124b is turned on and the terminals of the power supply device 132 are short-circuited.

[0099] The switching circuit 124 is mounted or formed on the switching circuit board 201. The switching circuit 124 is connected to the conductor plate 204. As an example, the conductor plate 204 is a copper plate with a thickness of 5 mm and a width of 50 mm. As an example, the length of the conductor plate 204 is 250 mm.

[0100] Figure 5 、 Figure 13 FIG. shows the fork-shaped plug 205 and the connection (contact) state between the fork-shaped plug 205 and the conductor plate 204.

[0101] Figure 13 FIG. (a) schematically shows from above the state in which the conductor plate 204 is mounted on the switching circuit board (printed circuit board) 201 on which a switching circuit or the like is formed, and the fork-shaped plug 205 is connected to the conductor plate 204. Figure 13 FIG. (b) is an explanatory diagram of the state in which one end of the conductor plate 204 is clamped by the fork-shaped plug 205.

[0102] As Figure 1As shown, two conductor plates 204 are mounted on the switch circuit board 201. The conductor plates 204 and the switch circuit board 201 are fixed by screws.

[0103] Electrical connection is achieved by mechanically fitting the fork-shaped plug 205 with the conductor plate 204. When the U-shaped part of the fork-shaped plug 205 is inserted into the conductor plate 204, the fork-shaped plug 205 engages well with the conductor plate 204.

[0104] As Figure 13 shown, a connecting bolt 219 is mounted on the fork-shaped plug 205. A connecting wiring 211 is connected to the connecting bolt 219.

[0105] Figure 13 (b) of Figure 13 shows a cross-section taken at AA' in (a) of . The conductor plate 204 contacts the fork-shaped plug 205 at the contact portions 220a and 220b formed on the fork-shaped plug 205. The contact portion 220 is made of phosphor bronze or nickel alloy and has spring characteristics. The surface of the contact portion 220 is gold-plated or silver-plated. The electroplating improves the electrical stability of the connecting portion 220.

[0106] As Figure 5 and Figure 6 shown, the fork-shaped plug 205 and the conductor plate 204 are electrically connected by inserting the fork-shaped plug 205 through the opening 216 of the partition wall 214.

[0107] Figure 5 shows the arrangement of the components of the semiconductor element test device of the present invention. The housing 210 of the semiconductor element test device has multiple parts. The lower part of the housing is separated into a chamber A and a chamber B. A power supply device 132 is arranged in the chamber A. The chamber A and the chamber B are separated by a partition wall 215. The chamber C1 and the chamber C2 are separated by a partition wall 217.

[0108] The power supply device 132, the switch circuit board 201, and the transistor 117 generate significant noise by repeatedly operating / non-operating. Due to the noise, malfunctions occur in the circuit board and the like. By performing electrostatic shielding and electromagnetic shielding on the partition walls of each chamber, malfunctions can be prevented.

[0109] The electrostatic shielding and electromagnetic shielding are achieved by mounting or forming a conductive plate, a metal plate, a metal film, or a metal wire mesh around each chamber or on the surface or inside of the partition wall.

[0110] In the chamber C1, there are arranged Figure 2 the heating and cooling plate 134, the circulating water pipe 135, etc. shown in . The transistor 117 to be tested is closely arranged on the heating and cooling plate 134.

[0111] A water leakage sensor (not shown) is disposed around the heating and cooling plate in Chamber C1. It is configured such that when circulating water (cooling medium) or the like leaks, the water leakage sensor operates to stop the semiconductor element test apparatus or issue an alarm.

[0112] A drain groove (not shown) is formed around the heating and cooling plate 134. It is configured such that when circulating water (cooling medium) leaks from the heating and cooling plate, the circulating water (cooling medium) flows into the drain groove and is discharged outside the semiconductor element test apparatus.

[0113] The heating and cooling plate 134 is mounted on a tray (not shown), and the tray is configured to be detachable from the partition wall 214.

[0114] As described above, the partition wall 214 is configured such that even if the circulating water pipe 135 or the like is damaged, circulating water (cooling medium) or the like will not leak into the lower Chambers A and B.

[0115] A partition wall 215 is formed between Chamber A where the power supply device 132 is disposed and Chamber B where the drive circuit system is disposed. An electrostatic shielding plate or an electromagnetic shielding plate is disposed on the partition wall 215 to shield the noise of the power supply device 132 so that the noise is not applied to the drive circuit system in Chamber B.

[0116] In an embodiment of the present invention, a fork-shaped plug 205 is inserted from Chamber C2 and connected to the conductor plate 204 in Chamber B. An opening 216 for inserting the fork-shaped plug 205 is formed in the partition wall 214.

[0117] In an embodiment of the present invention, the fork-shaped plug 205 is inserted from the upper side to the lower side. The present invention is not limited thereto. For example, the conductor plate 204 may be disposed in Chamber C2, and the fork-shaped plug 205 may be inserted from Chamber B and the fork-shaped plug 205 may be electrically connected to the conductor plate 204.

[0118] As Figure 13 As shown in (c) of [], a connector 213 is mounted on the mother substrate 207. A control circuit board 111, a device control circuit board 209, and a switch circuit board 201 are mounted on the connector 213 of the mother substrate 207. The switch circuit board 201 is prepared according to the number of transistors 117 to be tested. By changing the number of blocks of the switch circuit board 201 mounted on the mother substrate 207, the number of blocks of the switch circuit board 201 can be easily realized.

[0119] Temperature information Tj, voltage Vi, control signals of the variable resistance circuit 125, control signals of the constant current circuit 118, etc. are transmitted to the mother substrate 207. In addition, power supply wirings and ground wirings for each circuit are formed and supplied to each circuit board via the connector 213.

[0120] As Figure 13As shown in (c) thereof, the conductor plate 204 is arranged to protrude from the switch circuit substrate 201. A fork-shaped plug 205 is connected to the protruding portion.

[0121] The fork-shaped plug 205a is connected to the conductor plate 204a of the switch circuit substrate 201a. The power supply wiring 212 is connected to the switch circuit substrate 201a via the opening 216 of the partition wall 215.

[0122] As Figure 1 、 Figure 5 shown, the fork-shaped plug 205d is connected to the conductor plate 204c of the switch circuit substrate 201b. The power supply wiring 212 is connected to the switch circuit substrate 201b via the opening 216 of the partition wall 215. The fork-shaped plug 205b is connected to the conductor plate 204b of the switch circuit substrate 201a. The power supply wiring 212 is connected to the switch circuit substrate 201a via the opening 216 of the partition wall 215.

[0123] As Figure 1 、 Figure 4 shown, a switch circuit 124a is arranged between the conductor plate 204d and the conductor plate 204c of the switch circuit substrate 201b to electrically short-circuit between the conductor plate 204d and the conductor plate 204c. Through the short circuit, the current Id output from the power supply device 132 is supplied to the transistor 117 as the test current I d.

[0124] As Figure 4 shown, a switch circuit 124b is arranged between the conductor plate 204a and the conductor plate 204b of the switch circuit substrate 201a. By turning on the switch circuit 124b, a short circuit is formed between the conductor plate 204a and the conductor plate 204b. Through the short circuit, the current Id output from the power supply device 132 flows to the ground as the discharge current Im. Therefore, no voltage is applied between the channels of the transistor 117, and in addition, no current flows through the transistor 117, and no overvoltage or overcurrent is applied to electrical components such as the transistor 117.

[0125] A fork-shaped plug 205c is connected to the conductor plate 204b. A fork-shaped plug 205b is connected to the conductor plate 204a. In addition, a fork-shaped plug 205e is connected to the conductor plate 204d. A fork-shaped plug 205d is connected to the conductor plate 204c.

[0126] The material of the fork-shaped plug 205 is made of a metal such as aluminum. The fork-shaped plug 205 is nickel-treated on the plating substrate and silver-plated on the surface.

[0127] The fork-shaped plug 205 is formed with a threaded groove and is configured to be able to mount the connection wiring 211 to the fork-shaped plug 205 using the connection bolt 219.

[0128] Figure 5The figure shows two switch circuit substrates 201a and 201b. The switch circuit substrate 201 is connected to the connector 213 of the mother substrate 207.

[0129] As Figure 5 , Figure 6 shown, the fork-shaped plug 205c is inserted from the opening 216 of the partition wall 214 provided between the C2 chamber and the B chamber and is connected to the conductor plate 204b. The fork-shaped plug 205e is inserted from the opening 216 of the partition wall 214 provided between the C2 chamber and the B chamber and is connected to the conductor plate 204d.

[0130] The current flowing through the transistor 117 during the test is as large as several hundred amperes, so the connection wiring 211 used is also thick. Therefore, the thick connection wiring 211 and power supply wiring 212 are hard. Therefore, it is not easy to change the connection of the connection wiring 211 and power supply wiring 212.

[0131] In the semiconductor element test device of the present invention, the fork-shaped plug 205 is inserted from the C2 chamber into an arbitrary opening 216 of the partition wall 214. By changing the position of the opening 216 into which the fork-shaped plug 205 is inserted, it is possible to connect to an arbitrary switch circuit substrate 201. Therefore, to change the connection to the switch circuit substrate 201 used according to the test conditions of the transistor 117, it is not necessary to change the wiring of the connection wiring 211, and only the position of the opening 216 into which the fork-shaped plug 205 is inserted needs to be changed. In addition, as Figure 13 shown in (c), for the switch circuit substrate 201, it is only necessary to change the position of the connector 213 connected to the mother substrate 207.

[0132] As described above, according to the test content of the electrical component 117 such as a semiconductor element and the number of electrical components 117 to be tested, the switch circuit substrate 201 and the device control circuit substrate 209 connected to the mother substrate 207 are arranged. In addition, the connection switching with the switch circuit substrate 201 etc. is implemented by changing the position of the fork-shaped plug 205 inserted into the opening 216 of the partition wall 214.

[0133] As Figure 1 , Figure 4 , Figure 5 , Figure 6 shown, the connection wiring 211b connected to the transistor 117 is connected to the fork-shaped plug 205c. The connection wiring 211a connected to the transistor 117 is connected to the fork-shaped plug 205e. By detaching and attaching from the fork-shaped plug 205c, fork-shaped plug 205e and the conductor plate 204, the semiconductor element 117 to be tested can be detached and attached from the test circuit.

[0134] As Figure 4As shown, the number of switch circuit substrates 201b that short-circuit the output of the constant current circuit 121 can be the same as the number of constant current circuits 121. For example, when there is one constant current circuit 121 in the semiconductor device test apparatus, the switch circuit substrate 201b (switch circuit 124b) can be one.

[0135] The number of blocks of the switch circuit substrate 201b needs to correspond to the number of transistors 117 being tested. For example, if there are 12 transistors 117 being tested, it is preferable to prepare 12 switch circuit substrates 201b. Specifically, prepare the number of switch circuit substrates corresponding to the number of electrical components 117 being tested.

[0136] If the switch circuit substrate 201a for testing the electrical component 117 and the switch circuit substrate 201b for short-circuiting the output of the power supply device 132 have the same substrate specifications, it is advantageous in terms of cost. That is, the switch circuit substrate 201 has a common structure.

[0137] It is preferable to mount a plurality of transistors or the like as the switch circuit 124 on the switch circuit substrate 201. The more the number of switch circuits 124, the more the impedance for short-circuiting between the two conductor plates 204 can be reduced.

[0138] Figure 14 Figures (a) and (b) show the state where the fork-shaped plug 205 is inserted into the opening 216 of the partition wall 214. Figure 14 Figure (a) is a view observed from the front of the partition wall 214. Figure 14 Figure (b) is a view observed from the back of the partition wall 214.

[0139] As an example, on Figure 14 the conductor plate 204b, a fork-shaped plug 205b and a plurality of fork-shaped plugs 205c (fork-shaped plugs 205c1 to fork-shaped plug 205c5) are connected. On the conductor plate 204d1, a fork-shaped plug 205e1 is connected, on the conductor plate 204d2, a fork-shaped plug 205e2 is connected, on the conductor plate 204d3, a fork-shaped plug 205e3 is connected, on the conductor plate 204d4, a fork-shaped plug 205e4 is connected, and on the conductor plate 204d5, a fork-shaped plug 205e5 is connected.

[0140] When the switch circuit 124 of the switch circuit substrate 201 is turned on and off, a large amount of noise is generated. As a countermeasure, although not shown in Figure (c), a metal plate that functions as a shielding member is disposed between the two switch circuit substrates 201, and the metal plate is grounded. Figure 13

[0141] ​The heat generated by the switching circuit 124 is dissipated to the conductor plate 204. A heat sink (not shown) is installed on the switching circuit 124. The ground terminal of the switching circuit 124 is connected to the ground of the switching circuit board 201. The heat of the conductor plate 204 is also dissipated through the ground copper foil of the switching circuit board 201.

[0142] As Figure 1 , Figure 4 shown, a conductor plate 204a and a conductor plate 204b are installed on the switching circuit board 201b. The conductor plate 204a is connected to the fork-shaped plug 205a. The fork-shaped plug 205a is connected to the output terminal of the power supply device 132. The conductor plate 204b is connected to the fork-shaped plug 205b. The fork-shaped plug 205b is connected to the ground terminal of the power supply device 132.

[0143] When the switching circuit 124b is turned on (closed circuit), the output terminals of the power supply device 132 are short-circuited, and the short-circuit current Im flows to the ground. Therefore, the output current of the power supply device 132 is not supplied to the transistor 117. When the switching circuit 124b is open, the output current Id of the power supply device 132 is supplied to the transistor 117.

[0144] A conductor plate 204c and a conductor plate 204d are installed on the switching circuit board 201a. The conductor plate 204c is connected to the fork-shaped plug 205d. The fork-shaped plug 205d is connected to the output terminal of the power supply device 132. The conductor plate 204d is connected to the fork-shaped plug 205e. The fork-shaped plug 205e is connected to the collector terminal of the transistor 117 under test.

[0145] In Figure 14 this configuration, the connection wiring 211 attached to the fork-shaped plug 205 becomes complicated. In addition, it is difficult to insert the fork-shaped plug 205 into the opening 216 due to the obstruction of the connection wiring 211.

[0146] As Figure 15 shown, the present invention separates the column position of the fork-shaped plug 205 connected to the common conductor plate 204b and the column position of the fork-shaped plug 205 connected to one or more conductor plates 204a.

[0147] Figure 15 , Figure 16 are drawings for explaining the technical idea of the present invention. In Figure 15 , as an example, a conductor plate 204b for arranging and connecting three or more fork-shaped plugs 205b and fork-shaped plugs 205d is provided. A plurality of fork-shaped plugs 205b and a plurality of fork-shaped plugs 205d are installed on the conductor plate 204b.

[0148] Configure the conductor plates 204a1 to 204a6 that connect the fork-shaped plug 205a and the fork-shaped plug 205c, and the fork-shaped plug 205a and the fork-shaped plug 205c are installed on each of the conductor plates 204a1 to 204a6.

[0149] The conductor plates 204a1 to 204a6 are arranged in a straight line. In addition, each conductor plate 204 is arranged in a manner substantially parallel to the conductor plate 204b.

[0150] The terminal 226a of the transistor 117 is connected to the fork-shaped plug 205b via the connection wiring 211b. The terminal 226b of the transistor 117 is connected to the fork-shaped plug 205a via the connection wiring 211a.

[0151] The first terminal of the switch circuit board 201 is connected to the fork-shaped plug 205d via the connection wiring 211d. The second terminal of the switch circuit board 201 is connected to the fork-shaped plug 205c via the connection wiring 211c.

[0152] The fork-shaped plug 205a and the fork-shaped plug 205c are electrically shared through the conductor plate 204a, and the fork-shaped plug 205b and the fork-shaped plug 205d are electrically shared through the conductor plate 204b.

[0153] Each fork-shaped plug 205 is inserted into the linearly arranged opening 216. Therefore, the fork-shaped plugs 205 are arranged in a straight line, and thus each connection wiring 211 is arranged in parallel. The semiconductor elements 117 for testing are also arranged in a straight line on the heating and cooling plate 134.

[0154] As Figure 16 shown in (a) of, an opening 216b is formed in the fork-shaped plug insertion plate 241a, and an opening 216b is formed in the fork-shaped plug insertion plate 241b. The opening 216b of the fork-shaped plug insertion plate 241a is arranged along the conductor plate 204b. The opening 216b of the fork-shaped plug insertion plate 241a is arranged along the conductor plate 204a.

[0155] The connection wirings 211a, 211b, 211c, and 211d are connected to the respective fork-shaped plugs 205, and the connection wirings 211 are arranged in such a way that they are located in substantially parallel positions.

[0156] By arranging the connection wirings 211 in substantially parallel positions, as Figure 14 shown, the intersections with the connection wirings 211 and the like disappear, and it is easy to insert the fork-shaped plug 205 into the opening 216. Therefore, it is easy to switch which one of the transistors 117a to 117e is to be tested by inserting or not inserting the fork-shaped plug 205 into the opening 216.

[0157] AsFigure 16 As shown in (b) of

[0158] An opening 216b is formed in the fork plug insertion plate 241a and the fork plug insertion plate 241b. An opening 216a is formed in the partition wall 214. The fork plug 205 is inserted into the opening 216a and the opening 216b, and the fork plug 205 is supported by the opening 216a, the opening 216b, and the conductor plate 204. Therefore, the support of the fork plug 205 becomes firm.

[0159] As Figure 16 shown, the connection wirings 211b and 211d are arranged at the lower position, and the connection wirings 211a and 211c are arranged at the upper position. Therefore, the wiring position spaces of the connection wirings 211b, 211d and the connection wirings 211a, 211c are different in the vertical direction, and no crossing of the connection wirings 211 occurs. Therefore, the loading and unloading, pressing, etc. of the fork plug 205 inserted into the opening 216 become easy.

[0160] The above Figure 15 、 Figure 16 matters described, etc. can of course be applied to other embodiments of the present invention or combined with other embodiments.

[0161] For ease of illustration, Figure 6 one transistor 117 is illustrated. A connection structure 218a is inserted into the opening 216a of the partition wall 217, and a connection structure 218b is inserted into the opening 216b of the partition wall 217.

[0162] The semiconductor test device of the present invention tests by arranging a plurality of semiconductor elements 117 on the heating and cooling plate 134. Therefore, as Figure 2 shown in (b) of

[0163] Figure 2 (b), a plurality of openings 216 are formed in the partition wall 217. A connection structure 218a1 is inserted into the opening 216a1, and a connection structure 218b1 is inserted into the opening 216b1. A connection structure 218a2 is inserted into the opening 216a2, and a connection structure 218b2 is inserted into the opening 216b2. A connection structure 218an is inserted into the opening 216an, and a connection structure 218bn is inserted into the opening 216bn.

[0164] The connection structure 218a is connected to the component terminal 226a of the transistor 117, and the connection structure 218b is connected to the component terminal 226b of the transistor 117.

[0165] A connector 202 is connected to the terminal of the transistor 117, and the signal wiring 222 connected to the connector 202 is connected to the sample connection circuit 203. The signal wiring 235 of the sample connection circuit 203 is connected to the device control circuit board 209 via the connector 208.

[0166] The partition walls (partition walls 214, 215, 217) have the function of separating each chamber (chamber C1, chamber C2, chamber A, chamber B) and the function of preventing external air from flowing in. In particular, dew may form in chamber C1 during the test in a low-temperature state, so dry air is made to flow into chamber C1.

[0167] A fixing screw 221 is installed at the other end of the connection structure 218, and the connection wiring 211 is connected to the connection structure 218. A fork-shaped plug 205 as a connection component is installed at the other end of the connection wiring 211.

[0168] The fixing screw 221 is not limited to a screw, and any component can be used as long as it can electrically connect the connection wiring 211 to the connection structure 218.

[0169] The sample connection circuit 203 is connected to the device control circuit board 209 through the connection pin 206 of the connector 208. The sample connection circuits 203 are individually arranged corresponding to the respective transistors 117 for which tests are performed, and the sample connection circuit 203 is configured to be easily removable.

[0170] Figure 7 It is an explanatory diagram of the connection structure 218 which is an embodiment of the semiconductor element test apparatus of the present invention. Figure 7 (a) schematically shows the back side, Figure 7 and (b) schematically shows the side view.

[0171] A heat pipe 223 is fitted in the recess 234 of the connection structure 218. It is also possible to apply a thermally conductive grease or a heat dissipation silicone oil composite between the recess 234 of the connection structure 218 and the heat pipe.

[0172] The heat pipe 223 is arranged so as to be fitted into the recess 234. By arranging the heat pipe 223 in the recess on the back surface of the connection structure 218, the risk of damage to the heat pipe 223 is reduced. The heat pipe 223 can also be arranged on both sides of the connection structure 218.

[0173] The connection structure 218 is heated during the test. Accordingly, the heat pipe 223 and the heat pipe metal member 231 are also heated. Through heating, the heat pipe 223 and the heat pipe metal member 231 expand.

[0174] In the present invention, the heat pipe metal member 231 of the connection structure 218 is made of a material having a coefficient of linear expansion smaller than that of the heat pipe 223. Alternatively, the heat pipe 223 of the connection structure 218 is made of a material having a coefficient of linear expansion larger than that of the heat pipe metal member 231. The material of the heat pipe 223 expands and becomes larger within the recess 234, and the heat pipe 223 is firmly fitted through the recess 234. Accordingly, the heat pipe 223 does not come off.

[0175] Examples of the material of the heat pipe metal member 231 include copper (coefficient of linear expansion 16.8), brass (coefficient of linear expansion 19), iron (coefficient of linear expansion 12.1), and stainless steel (SUS304) (coefficient of linear expansion 17.3). Examples of the material of the heat pipe 223 include materials having a coefficient of linear expansion larger than that of the heat pipe metal member 231, such as aluminum (coefficient of linear expansion 23), tin (coefficient of linear expansion 26.9), and lead (coefficient of linear expansion 29.1). Among them, as the material of the heat pipe metal member 231, copper (coefficient of linear expansion 16.8) is preferably used, and as the material of the heat pipe 223, aluminum (coefficient of linear expansion 23) is preferably used. The heat pipe metal member 231 can also be made of carbon or the like other than metal.

[0176] The connection structure 218 mainly includes a heat pipe metal member 231, a connection pressure portion 232, and a connection holding portion 233. An element terminal 226 of a semiconductor element is inserted between the connection pressure portion 232 and the connection holding portion 233.

[0177] Figure 9 It is an explanatory diagram showing the connection state between the transistor 117 and the connection structure 218. The heat pipe 223 is disposed on the back surface of the connection structure 218.

[0178] The transistor 117 is hermetically fixed to the heat dissipation cooling plate 134a. The fixing is performed by pressing with a spring (not shown). As needed, a heat dissipation cooling plate is also disposed on the upper side of the transistor 117, and the transistor 117 can be set to a specified temperature condition.

[0179] Since it is necessary to closely fit and fix the transistor 117 to be tested to the heat dissipation cooling plate 134, it is difficult to easily remove it. In the installation operation of the transistor 117, a plurality of transistors 117 initially to be tested are fixed to the heat dissipation cooling plate 134. Then, the transistor 117 to be tested is selected, and the connection structure 218 is inserted from the opening 216 of the partition wall 217 and mounted on the element terminal 226 of the semiconductor element 117.

[0180] That is, the selected transistor 117 inserts the connection structure 218 from the C2 chamber side into the opening 216 where the selected transistor 117 is located, thereby making electrical connection with the element terminal 226.

[0181] For the electrical connection with the transistor 117, it is only necessary to select the position where the connection structure 218 is inserted, so it is relatively easy. In addition, by changing the signal applied to the connection wiring 211 connected to the connection structure 218, the test conditions and test contents of the transistor 117 can be easily changed.

[0182] A connection wiring 211 is connected to one end of the connection structure 218, and a constant current Id is applied to the transistor 117 from the connection wiring 211. A heat pipe 223 is arranged on the back side of the connection structure 218.

[0183] A current of several hundred amperes (A) flows through the element terminal 226. Even if there is a minute resistance at the contact portion 225, a large amount of heat is generated due to the current of several hundred amperes (A), causing the element terminal 226 portion to overheat. When the element terminal 226 overheats, the transistor 117 overheats, causing the transistor 117 to deteriorate or be damaged.

[0184] In the present invention, the heat generated by the element terminal 226 is transferred to the connection wiring 211 side of the connection structure 218 through the heat pipe 223. Therefore, the contact portion 225 does not overheat. A cooling fan 227 is arranged on the lower side of the connection structure 218 to dissipate the heat of the heat pipe 223.

[0185] As Figure 8 shown in (a) of [], heat dissipation fins 228 may also be formed or arranged in close contact with the heat pipe 223. As Figure 8 shown in (b) of [], a circulating water pipe 135 may also be formed or arranged in the connection structure 218 to cool the connection structure 218.

[0186] In Figure 9 , the element terminal 226 of the transistor 117 (semiconductor element 117) has two terminals, namely the element terminal 226a (P) and the element terminal 226b (N). As Figure 10 shown, even if the element terminal 226 of the transistor 117 has three terminals, namely the element terminal 226a (P), the element terminal 226b (N), and the element terminal 226c, the technical idea of the present invention can still be applied.

[0187] Figure 10 is a diagram showing Figure 3 the connection states of the semiconductor module 117 having three element terminals 226 (element terminal 226a (P), element terminal 226b (N), element terminal 226c (O)) and the connection structure 218 as shown in (b), (c), (d), (e), etc. of [].

[0188] In Figure 10 it, a heat pipe 223a is formed or arranged in the connection structure 218a, and a heat pipe 223b is formed or arranged in the connection structure 218b. In contrast, no heat pipe 223 is formed or arranged in the connection structure 218c. The connection structure 218c is connected to the element terminal 226c. A large current does not flow through the element terminal 226c(O) of the transistor 117. It is not necessary to form a heat pipe 223 in the connection structure 218c.

[0189] By forming the connection structure 218c to be thinner than the other connection structures 218 (the connection structure 218a and the connection structure 218b), the connection between the connection structure 218 and the element terminal 226 of the transistor 117 becomes easy. In addition, the space for arranging the transistor 117 can be made narrower, so that the number of transistors 117 that can be mounted on the heat dissipation cooling plate 134 can be increased.

[0190] As Figure 11 shown in (a) of

[0191] the connection structure 218 in another embodiment of the present invention mainly includes a heat pipe metal part 231, a connection receiving part 225, a connection pressure part 232, and a connection holding part 233. The element terminal 226 of the semiconductor element is inserted between the connection receiving part 225 and the connection holding part 233.

[0192] The spring 236 is a pressing unit, or a sliding unit, or a positioning unit. As an example, the spring 236 can be exemplified by a helical spring. In addition, leaf springs, scroll springs, and disc springs can be exemplified. The spring 236 is formed or constituted by a metal material. It can also be formed by a heat-resistant rubber, plastic, or ceramic material.

[0193] A helical spring 236 is arranged between the connection receiving part 225 and the connection pressure part 232. The connection pressure part 232 is connected by one or more fixing screws 224b. By tightening or installing the fixing screws 224b, pressure (pressing) is applied between the connection receiving part 225 and the connection holding part 233.

[0194] The element terminal 226 is clamped between the connection receiving part 225 and the connection holding part 233, and by the pressure of the spring 236, the element terminal 226 is clamped between the connection receiving part 225 and the connection holding part 233 with a specified pressure (specified pressing).

[0195] The pressure (pressing force) can be easily adjusted by changing the spring 236. Additionally, the pressure (pressing force) can be adjusted or set by the tightening degree of the fixing screw 224b. The heat pipe metal part 231 and the connection holding part 233 are fixed by one or more fixing screws 224a.

[0196] A connection receiving part 225 is disposed between the connection pressure part 232 and the connection holding part 233. As the constituent material or at least the surface material of the connection receiving part 225, platinum, gold, silver, tungsten, copper, nickel, molybdenum, or an alloy formed by combining them is used.

[0197] Similarly, on the surface where the connection holding part 233 is in contact with the component terminal 226, as the constituent material of the surface, platinum, gold, silver, tungsten, copper, nickel, molybdenum, or an alloy formed by combining them is used.

[0198] The connection holding part 233 is fixed to the heat pipe metal part 231 by the fixing screw 224a. The connection pressure part 232 is fixed to the connection holding part 233 by the fixing screw 224b. A connection wiring 211 is fixed to the left end of the heat pipe metal part 231 by the fixing screw 221.

[0199] Figure 11 of (a), Figure 11 Figure (d) is an explanatory diagram showing the combined state of the connection holding part 233, the connection receiving part 225, and the connection pressure part 232.

[0200] The connection holding part 233 connects and fixes the heat pipe 223 and the heat pipe metal part 231 by screws 224a (not shown) inserted into the threaded holes 238a1 and 238a2. The heat pipe 223 and the heat pipe metal part 231 are closely connected and fixed in a manner with good thermal conductivity and electrical conductivity. Additionally, the connection holding part 233 is connected and fixed to the connection pressure part 232 by screws 224b (not shown) inserted into the threaded holes 238b1 and 238b2.

[0201] The connection receiving part 225 has convex portions 251 formed at both ends, and the connection pressure part 232 has groove portions 252 formed at both ends. The convex portions 251 of the connection receiving part 225 are inserted into the groove portions 252 of the connection pressure part 232. The convex portions 251 of the connection receiving part 225 and the groove portions 252 of the connection pressure part 232 are configured to be in electrical contact.

[0202] To improve the contact between the component terminal 226 and the connection receiving part 225, as Figure 11 shown in Figure (c), it is preferable to form irregularities such as triangles on the surface of the connection receiving part 225.

[0203] Figure 11The structure is such that the component terminal 226 is clamped between the plane connecting the pressure portion 232 and the plane connecting the holding portion 233.

[0204] Figure 12 It is a structure in which the component terminal 226 is clamped between the pressing member mounting plate 313 and the connecting holding portion 233. The pressing members 311a and 311b are mounted on the pressing member mounting plate 313. The pressing member 311 can be exemplified by a leaf spring made of metal, for example. In addition, the pressing member 311 can also be formed of a non-conductive material such as a silicone resin material. The pressing member 311 is inserted into the pressing member mounting plate 313.

[0205] The component terminal 226 is clamped between the plane of the pressing member 311 and the connecting holding portion 233. By pressing the pressing member 311, the component terminal 226 is electrically connected to the connecting holding portion 233.

[0206] In Figure 11 In the embodiment of (a), the spring (pressure metal part) 236 is inserted into the spring hole 239 of the contact portion 225. When the spring (pressure metal part) 236, the contact portion 225, and the connecting pressure portion 232 are made of a conductive material, current sometimes flows in the component terminal 226 -> contact portion 225 -> spring (pressure metal part) 236 -> connecting pressure portion 232. In this case, when the resistance value of the spring (pressure metal part) 236 is large, current flows through the spring (pressure metal part) 236, causing the spring to heat up and burn out.

[0207] In Figure 12 In the embodiment of the present invention, the spring hole 239 is formed in the insulating plate 312. The pressing member 311 contacts the component terminal 226, and the spring 236 presses the pressing member mounting plate 313. The insulating plate 312 is disposed on the upper side of the pressing member mounting plate 313 to insulate between the pressing member mounting plate 313 and the spring 236. The spring hole 239 is formed in the insulating plate 312, and the spring 236 is inserted into the spring hole 239. Other structures are the same as Figure 11 and are thus omitted from the description.

[0208] In addition, the insulating plate 312 can also be an insulating film, an insulating membrane, or an insulating gas such as air.

[0209] Figure 12 (b) of is a view of the pressing member mounting plate 313 portion as viewed from the side. The pressing members 311a and 311b are disposed and inserted into the pressing member mounting plate 313. Figure 12 (c) of is a view as viewed from the Figure 12 A direction of (b).

[0210] Since the insulating plate 312 is made of an insulator, even if the pressing member mounting plate 313 is a conductive material such as metal, current will not flow through the spring (pressure metal member) 236. Therefore, no current path of component terminal 226 -> contact portion 225 -> spring (pressure metal member) 236 -> connection pressure portion 232 will be generated.

[0211] Figure 12 The embodiment of (a) is configured to be insulated by the insulating plate 312. As Figure 12 shown in (a), the insulation effect in the present invention is not limited to the configuration using the insulating plate 312. For example, the configuration shown in Figure 12 (d) can be exemplified.

[0212] Figure 12 In (d), an insulating portion 315 made of a resin material or the like is disposed around the threaded hole 238b of the connection pressure portion 232. Since the periphery of the threaded hole 238b is insulated by the insulating portion 315, current will not flow through the fixing screw 224b. Therefore, no current path of component terminal 226 -> contact portion 225 -> spring (pressure metal member) 236 -> connection pressure portion 232 will be generated, and the spring (pressure metal member) 236 will not burn out.

[0213] As described above, the present invention is configured to dispose the insulating plate 312 on the spring 236 side where pressing is applied, so that current does not flow through the pressing member mounting plate 313 and the contact portion 225 side.

[0214] When current flows, it flows through pressing components such as the spring 236 and the fixing screw 224b, causing the spring 236 and the fixing screw 224b to burn out. A test current is supplied to the component terminal 226 via the connection holding portion 233 side with few high-resistance portions such as the spring 236.

[0215] Figure 17 is the equivalent circuit diagram and explanatory diagram of the semiconductor element test device in the first embodiment of the present invention. The semiconductor module for testing is exemplified Figure 3 in (d), but is not limited thereto.

[0216] In Figure 17 , by turning on the switch circuit 124b, the output of the power supply device 132 is short-circuited, and the current Id output by the power supply device 132 flows to the ground as the current Im'. Alternatively, by turning on the switch circuit 124b, the charge charged between the terminals of the power supply device 132 is discharged.

[0217] By turning on the switch circuit 124c and the switch circuit 124d simultaneously, the current Im also flows, the output of the power supply device 132 is short-circuited, and the charge and the like of the power supply device 132 are discharged. In the case of this configuration or method, the switch circuit 124b is not required.

[0218] It is also effective to stagger the timing of turning on the switch circuits 124c and 124d. For example, the switch circuit 124c is turned on before the switch circuit 124d, thereby short-circuiting between the channels of the transistor 117s.

[0219] Next, by turning on the switch circuit 124d, the channels of the transistor 117m are short-circuited. Alternatively, the switch circuit 124d is turned on before the switch circuit 124c, thereby short-circuiting between the channels of the transistor 117m. Next, by turning on the switch circuit 124c, the channels of the transistor 117s are short-circuited.

[0220] As described above, by sequentially turning on the switch circuit 124, the generation of surge voltage and the like generated in the semiconductor element 117 can be further suppressed.

[0221] By turning on the switch circuit 124a, the current Id output from the power supply device 132 is supplied to the transistor 117.

[0222] The fork-shaped plug 205 is inserted from the opening 216 of the partition wall 214 and is electrically connected to the switch circuit board 201.

[0223] Figure 20 、 Figure 21 It is an explanatory diagram of the circuit part and an explanatory diagram of the circuit operation of the semiconductor test device of the present invention. As Figure 20 、 Figure 21 shown, the semiconductor element test device of the present invention includes an isolated DCDC converter circuit 138m and an isolated DCDC converter circuit 138s.

[0224] Figure 20 As an example of the semiconductor module to be tested, Figure 3 of (d), Figure 3 of (e). Figure 21 As an example of the semiconductor module to be tested, Figure 3 of (c), Figure 3 of (c). In the electrical component test device and the test method of electrical components of the present invention, it can of course also be applied to Figure 3 other than the examples shown.

[0225] The isolated DCDC converter circuit 138m generates two voltages (Vpm1 voltage based on the Vmm1 potential and Vpm2 voltage based on the Vmm2 potential) from the input voltage (Vc voltage of the circuit voltage). GND, Vmm1 voltage, and Vmm2 voltage are insulated. In addition, GND, Vpm1 voltage, and Vpm2 voltage are insulated.

[0226] The isolated DCDC converter circuit 138s generates two voltages (Vps1 voltage based on the Vms1 potential and Vps2 voltage based on the Vms2 potential) from the input voltage (Vc voltage). GND, Vms1 voltage, and Vms2 voltage are isolated. Additionally, GND, Vps1 voltage, and Vps2 voltage are isolated.

[0227] For Vmm1 voltage, Vmm2 voltage, Vms1 voltage, and Vms2 voltage, the ground voltage can also be considered as the reference voltage. Among them, this ground voltage is isolated from each voltage. Vmm1 voltage and Vmm2 voltage can also be set to a common potential without being isolated since the voltage is generated. Vms1 voltage and Vms2 voltage can also be set to a common potential without being isolated since the voltage is generated.

[0228] As needed, an isolated DCDC converter circuit for generating Vt1 voltage and Vt2 voltage is configured. Vt1 voltage and Vt2 voltage are isolated from the Vc voltage. Vt1 voltage becomes a negative - direction potential with respect to the Vmm1 voltage as the reference. Vt2 voltage becomes a negative - direction potential with respect to the Vms1 voltage as the reference.

[0229] Vt1 voltage can also be generated with respect to Vmm1 voltage or Vmm2 voltage as the reference. Vt2 voltage can also be generated with respect to Vms1 voltage or Vms2 voltage as the reference.

[0230] It is configured such that Vt1 voltage and Vmm1 voltage can be selectively applied to the gate terminal gm of the transistor 117m. It is configured such that Vt2 voltage and Vms1 voltage can be selectively applied to the gate terminal gs of the transistor 117s (Qs). The voltage selection circuit 302 uses an analog switch or the like.

[0231] The potential difference between the Vmm1 voltage and the Vpm1 voltage of the isolated DCDC converter circuit 138m becomes the conduction voltage Vg applied to the gate terminal gm of the transistor 117m (Qm). The isolated DCDC converter circuit 138m is configured such that the conduction voltage Vg can be variable.

[0232] The potential difference between the Vms1 voltage and the Vps1 voltage of the isolated DCDC converter circuit 138s becomes the conduction voltage Vg applied to the gate terminal gs of the transistor 117s (Qs). The isolated DCDC converter circuit 138s is configured such that the conduction voltage Vg can be variable.

[0233] Figure 20 、 Figure 21 The A module, B module, and C module of the isolated DCDC converter circuit 138m shown are isolated. Additionally, the A module, D module, and E module of the isolated DCDC converter circuit 138s are isolated.

[0234] Electric power is transmitted between module A and module B, between module A and module C, between module A and module D, and between module A and module E using coils or the like. In addition, control signals and the like between the modules are insulated and signals are transmitted and received using phototransistors or the like.

[0235] The circuit ground (GND), Vc voltage, Vpm1 voltage, Vmm1 voltage, Vpm2 voltage, and Vmm2 voltage are in an insulated state. That is, each voltage is in a floating state with respect to other voltages.

[0236] Floating means a state where there is no electrical connection with respect to other voltages or potentials, and a state where the voltage and potential are independent.

[0237] The present invention generates and uses a signal potential applied to a gate terminal and the like in a floating state. Therefore, it is not easily affected by noise.

[0238] The voltage generated by the isolated DCDC converter circuit 138 is set to be floating. The potential difference between the Vmm1 voltage and the Vpm1 voltage is set as Vm1, and the potential difference between the Vmm2 voltage and the Vpm2 voltage is set as Vm2.

[0239] For example, if the Vmm1 voltage is connected to the circuit ground (GND) and the Vpm1 voltage is short-circuited to the Vmm2 voltage, the Vpm2 voltage becomes a voltage obtained by adding the Vm2 voltage to the Vm1 voltage with respect to the circuit ground (GND). That is, by setting the potential with other voltages, the floating potential is determined. The potential level can be changed, moved, and set corresponding to the potential of other voltages.

[0240] In the semiconductor element test device of the present invention, the circuit ground (GND) is insulated from other power supply voltages. In addition, it is configured to be able to wire or connect the insulated power supply voltages. For example, the Vmm1 voltage and the Vmm2 voltage can be wired to have the same potential. The Vms1 voltage and the Vms2 voltage can be wired to have the same potential.

[0241] As Figure 17 shown, the sample connection circuit 203m1 includes a gate driver circuit 113m that generates a gate signal waveform applied to the gate terminal gm of the transistor 117m (Qm), a variable resistor circuit 125m that adjusts or sets the rising edge waveform and the falling edge waveform of the gate signal, a short-circuit circuit 137m, a voltage selection circuit 302m, and the like.

[0242] The sample connection circuit 203m2 includes a constant current setting circuit 130m that generates a constant current Icm applied to the diode Dm of the transistor 117m, and a voltage detection circuit 129m that measures or detects the terminal voltage of the diode Dm.

[0243] The sample connection circuit 203s1 includes a gate driver circuit 113s that generates a gate signal waveform applied to the gate terminal gs of the transistor 117s, a variable resistor circuit 125s that adjusts or sets the rising edge waveform and falling edge waveform of the gate signal, a short - circuit circuit 137s, a voltage selection circuit 302s, etc.

[0244] The sample connection circuit 203s2 includes a constant - current setting circuit 130s that generates a constant current Ics applied to the diode Ds of the transistor 117s, and a voltage detection circuit 129s that measures or detects the terminal voltage of the diode Ds.

[0245] Hereinafter, unless otherwise specified, the N - electrode terminal of the semiconductor element 117 is used as the reference potential (AGND, 0 (V)) for explanation.

[0246] When the N - electrode terminal of the semiconductor element 117 is used as the reference potential, the potential of the emitter terminal es of the transistor 117s becomes the channel - to - channel voltage Vcem of the transistor 117m. That is, it becomes the potential of the O - electrode terminal of the semiconductor element 117.

[0247] The potential of the P - electrode terminal of the semiconductor element 117 becomes the voltage obtained by adding the channel - to - channel voltage Vcem of the transistor 117m and the channel - to - channel voltage Vces of the transistor 117s. According to the magnitude of the current Id flowing through the transistor 117m and the transistor 117s, and the on - off state of the transistor 117m and the transistor 117s, the potential of the O - electrode terminal and the potential of the P - electrode terminal change. In particular, the potential of the emitter terminal es of the transistor 117s changes significantly.

[0248] Vms1, which is the potential of the emitter terminal es of the transistor 117s, is preferably configured to be able to change according to the change in the channel - to - channel voltage Vcem of the transistor 117m.

[0249] In the present invention, Vmm1, which is the potential of the emitter terminal em of the transistor 117m, floats with respect to Vms1, which is the potential of the emitter terminal es of the transistor 117s. Therefore, when the channel - to - channel voltage Vcem of the transistor 117m changes, the Vces voltage also changes in the same direction and at the same potential.

[0250] The power supply potential of the diode Dm of the transistor 117m is preferably based on the potential of the emitter terminal em of the transistor 117m. The diode Ds of the transistor 117s is preferably based on the potential of the emitter terminal es of the transistor 117s.

[0251] In the present invention, the Vc voltage, Vms1 voltage / Vps1 voltage, and Vms2 voltage / Vps2 voltage of the isolated DCDC converter circuit 138s are isolated. The Vc voltage, Vmm1 voltage / Vpm1 voltage, and Vmm2 voltage / Vpm2 voltage of the isolated DCDC converter circuit 138m are isolated. Each voltage is configured to be connectable to any voltage and wired.

[0252] Figure 22 It is an explanatory diagram showing the wiring of the power supply system of the semiconductor element test apparatus of the present invention. The N electrode terminal of the transistor 117 is connected to AGND. As an example, AGND is the ground potential.

[0253] As Figure 22 , Figure 23 , Figure 24 , Figure 25 shown, the present invention can arbitrarily connect and change the wiring. In addition, by the switch circuit 123 and the selector 127, the connection wiring and the applied voltage can be changed.

[0254] The emitter terminal em of the transistor 117m is electrically connected to the N electrode terminal, and the emitter terminal em is connected to the Vmm1 terminal. In addition, the emitter terminal em and the Vmm2 terminal are connected. The emitter terminal es of the transistor 117s is connected to the Vms1 terminal. In addition, the emitter terminal es and the Vms2 terminal are connected.

[0255] The potential of the emitter terminal es of the transistor 117s becomes the voltage obtained by adding the inter-channel voltage Vcem of the transistor 117m to the potential of the N electrode terminal. Therefore, the potential of the emitter terminal es of the transistor 117s varies depending on the on / off state of the transistor 117m and the magnitude of the constant current Id.

[0256] The gate signal Vsg applied to the gate terminal gm of the transistor 117m is based on the potential of the emitter terminal em. If the voltage that turns on the transistor 117m is set as Vg, the transistor 117m becomes in the on state when the Vg voltage is applied from the AGND potential of the N electrode terminal.

[0257] Figure 19 It is a timing chart showing the operation of the circuit section of the semiconductor test apparatus of the present invention. The Vt voltage applied during the tn2 period and the tn1 period in (a) of Figure 19 is set according to the semiconductor element 117 to be tested. As Figure 19 shown in (b), (c), and (i) of

[0258] During at least one or more of the periods of TCS, TCM, and TCC, the switch Si is turned on, and the voltage Ve across the two terminals of the variable resistance circuit 125 is measured.

[0259] Figure 19 St2 in (d) is a timing signal that causes the current Ic to flow through the diode D (diode Ds, diode Dm). When St2 is at the H level, the current flows through the diode D of the transistor 117. The voltage detection circuit 129 acquires the voltage across the terminals of the diode D, and the temperature measurement circuit converts the voltage across the terminals into temperature information Tj. The temperature information Tj is sent to the control circuit board 111 (controller 111). St1 and St2 are the times when the measurement current flows through the temperature measurement diode or the measurement times of the temperature.

[0260] Figure 19 Vce in (g) is the voltage between the channels of the transistor 117 (transistor 117m, transistor 117s), and the temperature information Tj shows the temperature change of the measured transistor 117 (transistor 117m, transistor 117s).

[0261] In Figure 19 In (a), the 0 (V) potential is the voltage that turns off the transistor 117m. In Figure 19 In (a) and the like, the Vt1 voltage diagram is shown as the Vt voltage. The Vt1 voltage is a voltage with a negative polarity compared to the 0 (V) potential. Based on the Vmm1 voltage, the negative-side Vt1 voltage is applied.

[0262] The current Icm flowing through the diode Dm generates the Vmm2 voltage and the Vpm2 voltage as power supplies. Since the Vmm2 voltage is common with the Vmm1 voltage, the voltage at the terminals of the diode Dm is in the range of Vmm1 and Vpm2, which is a voltage based on AGND.

[0263] The gate signal Vsg applied to the gate terminal gs of the transistor 117s is based on the potential of the emitter terminal es. The potential of the emitter terminal es becomes the voltage obtained by adding the channel voltage Vcem of the transistor 117m to the AGND potential at the N electrode terminal.

[0264] As Figure 19 As shown in (a), if the voltage that turns on the transistor 117s is set to Vg, the voltage that turns on the transistor 117s is based on the voltage obtained by adding the channel voltage Vcem of the transistor 117m to the AGND potential at the N electrode terminal. When the Vg voltage is applied, the transistor 117s becomes in the on state.

[0265] The Vms1 voltage is insulated from the Vmm1 voltage and is in a floating state. Therefore, even if the channel-to-channel voltage Vcem of transistor 117m changes, the potential of the emitter terminal es of transistor 117s will change according to the change in the channel-to-channel voltage Vcem of transistor 117m. The Vms1 voltage is based on the potential of the emitter terminal es to generate the Vps1 voltage.

[0266] The gate signal Vsg applied to the gate terminal gs of transistor 117s is based on the potential of the emitter terminal es. As Figure 19 shown in (a) of

[0267] if the voltage that turns on transistor 117s is set to Vg, then when a Vg voltage is applied from the potential of the emitter terminal es, transistor 117s becomes in an on state. Figure 19 In addition, in (a) of

[0268] the Vt2 voltage is shown as the Vt voltage. The Vt2 voltage is a voltage with a negative polarity compared to the 0 (V) potential. Based on the Vms1 voltage, a negative-side Vt2 voltage is applied.

[0269] The Vms1 voltage is insulated from the Vmm1 voltage and is in a floating state. In addition, the Vms1 voltage is connected to the collector terminal cm of transistor 117m. Therefore, even if the channel-to-channel voltage Vcem of transistor 117m changes, the voltage (Vg) that turns on transistor 117s and the voltage (0 (V)) that turns it off will not change. Therefore, the on / off control of transistor 117s can be performed well.

[0270] Figure 23 is an explanatory diagram showing the wiring of the power supply system in a semiconductor element test device of another invention. In the Figure 23 wiring, the N electrode terminal of transistor 117 is connected to AGND. As an example, AGND is the ground potential.

[0271] The emitter terminal em of transistor 117m is electrically connected to the N electrode terminal, and the emitter terminal em is connected to the Vmm1 terminal. The emitter terminal es of transistor 117s is connected to the Vms1 terminal. The Vmm2 terminal and the Vms2 terminal are insulated from other power supply terminals and are in a floating state.

[0272] The current Icm flowing through diode Dm generates the Vmm2 voltage and the Vpm2 voltage as power supplies. The voltage of the terminals of diode Dm is basically in the range of Vmm2 and Vpm2.

[0273] The current Ics flowing through the diode Ds generates the Vms2 voltage and the Vps2 voltage as power supplies. The voltage of the terminals of the diode Ds is basically in the range of Vms2 and Vps2.

[0274] The potential of the Vmm2 terminal is maintained at a potential with respect to AGND, and the potential of the Vms2 terminal is maintained at a potential with respect to the emitter terminal es of the transistor 117s.

[0275] Figure 24 It is an explanatory diagram showing the wiring of the power supply system in a semiconductor element test device of another invention. In Figure 24 the wiring, the N electrode terminal of the transistor 117 is connected to AGND.

[0276] The emitter terminal em and the N electrode terminal of the transistor 117m are electrically connected, and the emitter terminal em is connected to the Vmm1 terminal. In addition, the Vmm2 terminal is connected to the Vms2 terminal. The emitter terminal es of the transistor 117s is connected to the Vms1 terminal. The Vmm1 terminal and the Vmm2 terminal are not wired.

[0277] The current Icm flowing through the diode Dm generates the Vmm2 voltage and the Vpm2 voltage as power supplies. The voltage of the terminals of the diode Dm is basically in the range of Vmm2 and Vpm2. The current Ics flowing through the diode Ds generates the Vms2 voltage and the Vps2 voltage as power supplies. The voltage of the terminals of the diode Ds is basically in the range of Vms2 and Vps2. Since the Vmm2 voltage and the Vms2 voltage are common, the potentials of the diode Dm and the diode Ds operate within the common potential.

[0278] In Figure 24 , the switch circuit 123 is arranged in the middle of the power supply connection wiring. The switch circuit 123 can be switched to connect the Vms2 voltage to the Vpm2 voltage or to connect the Vms2 voltage to the Vmm2 voltage.

[0279] As Figure 24 shown, by arranging or setting the switch circuit 123, various tests can be handled. As the switch circuit 123, an analog switch, a relay circuit, a magnetic switch, etc. can be exemplified.

[0280] The switch circuit 123 is not limited to the Figure 24 embodiment. For example, it can also be configured to select the Vmm1 and Vpm1 voltages to connect to other potentials (for example, connect to the Vmm1 voltage). As described above, the feature of the present invention is configured to be able to change the wiring state of the potentials generated by an isolated DCDC converter circuit or the like.

[0281] Figure 25FIG. 1 is an explanatory diagram for explaining the wiring of a power supply system in a semiconductor device testing device according to another embodiment of the present invention. Figure 25 In the wiring, the N electrode terminal of the transistor 117 is connected to AGND.

[0282] The emitter terminal em of the transistor 117m is electrically connected to the N electrode terminal, and the emitter terminal em is connected to the Vmm1 terminal. The Vmm1 terminal is connected to the Vmm2 terminal, and the Vmm1 terminal is connected to the Vms1 terminal. The emitter terminal es of the transistor 117s is connected to the Vms1 terminal.

[0283] The Vmm2 terminal is connected to the Vms2 terminal. The current Icm flowing through the diode Dm generates the Vmm2 voltage and the Vpm2 voltage as power supply. The voltage of the terminal of the diode Dm is basically in the range of Vmm2 and Vpm2.

[0284] The current Ics flowing through the diode Ds generates the Vmm2 voltage and the Vps2 voltage as power supplies. The voltage at the terminal of the diode Ds is basically in the range of Vmm2 and Vps2. Since the Vmm2 voltage and the Vms2 voltage are common, the potential of the diode Dm and the potential of the diode Ds operate within the common potential.

[0285] When the potential of the Vmm1 voltage changes, the potential of the Vpm1 voltage also shifts. When the potential of the Vmm2 voltage changes, the potential of the Vpm2 voltage also shifts.

[0286] When the potential of the Vms1 voltage changes, the potential of the Vps1 voltage also shifts in conjunction with it. When the potential of the Vms2 voltage changes, the potential of the Vps2 voltage also shifts in conjunction with it.

[0287] The Vmm1 voltage and the Vms1 voltage are set to float. Therefore, when the inter-channel voltage Vcem of the transistor 117m changes, Vms1 changes in conjunction with the change in Vcem.

[0288] The gate signal (on / off signal) applied to the gate terminal gm of the transistor 117m is outputted with reference to the voltage Vmm1. The gate signal (on / off signal) applied to the gate terminal gs of the transistor 117s is outputted with reference to the voltage Vms1.

[0289] When the current Id flowing through the transistor 117m changes and the applied voltage of the gate terminal gm of the transistor 117m changes, even if the channel voltage Vcem of the transistor 117m changes, the Vms1 voltage changes in conjunction with the Vcem voltage because the Vms1 voltage is floating.

[0290] Even if the channel - to - channel voltage Vce of transistor 117m changes, since the Vms1 voltage is floating and the gate signal of transistor 117s is generated based on the Vms1 voltage, transistor 117s can also perform on - off control without problems.

[0291] The Vmm1 voltage and the Vms1 voltage of diode Ds are floating. Therefore, even if the Vmm1 voltage changes or the channel - to - channel voltage Vcem of transistor 117m changes, the temperature of transistor 117s can be measured without damage.

[0292] Figure 26 It is an explanatory diagram of the semiconductor element test device of the present invention and the test method or test state of semiconductor element components. By sequentially implementing or randomly implementing Figure 26 any one of the states or methods in, the test of semiconductor element 117 is carried out.

[0293] Figure 26 Figure (a) shows a method (state) of discharging charges by short - circuiting between the terminals (P - electrode terminal - N - electrode terminal) of transistor 117, so that no surge voltage or transient current flows through transistor 117.

[0294] A cut - off voltage is applied to the gate terminal gm of transistor 117m as the gate signal Vsgm, and transistor 117m becomes a cut - off state. A cut - off voltage is applied to the gate terminal gs of transistor 117s as the gate signal Vsgs, and transistor 117s becomes a cut - off state. The short - circuit circuit 137s and the short - circuit circuit 137m are cut off (open). The switch circuit 124c and the switch circuit 124d are turned on (closed).

[0295] Figure 26 Figure (b) shows a state in which the short - circuit circuit 137s is turned on to make transistor 117s in a diode - connected state, transistor 117m is turned on to make a constant current Id flow through the semiconductor element 117, and the semiconductor element 117 is tested.

[0296] A conduction voltage or a cut - off voltage is periodically or intermittently applied to the gate terminal gm of transistor 117m as the gate signal Vsgm, and transistor 117m is controlled to be in a conduction state or a cut - off state.

[0297] The short - circuit circuit 137s connected between the gate terminal gs and the emitter terminal es of transistor 117s is turned on, and transistor 117s becomes in a diode - connected state. The switch circuit 124c and the switch circuit 124d are cut off (open).

[0298] In the semiconductor element 117, a constant current Id flows between the P electrode terminal and the N electrode terminal. By applying a gate signal Vsgm to the gate terminal gm of the transistor 117m, the conduction and cutoff of the transistor 117m are controlled, and a test of the semiconductor element 117 is carried out.

[0299] Figure 26 (c) shows a state in which the transistor 117m is in a diode-connected state, the transistor 117s is turned on, and a constant current Id flows through the semiconductor element 117 to test the semiconductor element 117.

[0300] A conduction voltage or a cutoff voltage is periodically or intermittently applied to the gate terminal gs of the transistor 117s as a gate signal Vsgs, and the transistor 117s is controlled to be in a conduction state or a cutoff state.

[0301] The short-circuit circuit 137m connected between the gate terminal gm and the emitter terminal em of the transistor 117m is turned on, and the transistor 117m becomes in a diode-connected state. The switch circuit 124c and the switch circuit 124d are cutoff (open). In the semiconductor element 117, a constant current Id flows between the P electrode terminal and the N electrode terminal.

[0302] By applying a gate signal Vsgs to the gate terminal gs of the transistor 117s, the conduction and cutoff of the transistor 117s are controlled, and a test of the semiconductor element 117 is carried out.

[0303] Figure 26 In (d), the transistor 117s is turned on and the transistor 117m is turned off. A conduction voltage or a cutoff voltage is periodically or intermittently applied to the gate terminal gs of the transistor 117s as a gate signal Vsgs. The transistor 117m is controlled to be in a cutoff state.

[0304] The short-circuit circuit 137 connected between the gate terminal g and the emitter terminal e of the transistor 117m and the transistor 117s is cutoff (open). The switch circuit 124c is cutoff and the switch circuit 124d is turned on (closed).

[0305] In the semiconductor element 117, the current Id flows from the P electrode terminal through the channel of the transistor 117s, and the current Id flows through the switch circuit 124d. By applying a gate signal Vsgs to the gate terminal gs of the transistor 117s, the conduction and cutoff of the transistor 117s are controlled, and a test of the semiconductor element 117 is carried out.

[0306] Figure 26(e) Turns on transistor 117m and turns off transistor 117s. A conduction voltage or a cut-off voltage is periodically or intermittently applied to the gate terminal gm of transistor 117m as the gate signal Vsgm. Transistor 117s is controlled to be in the cut-off state.

[0307] Turns off (opens) the short-circuit circuit 137 connected between the gate terminal g and the emitter terminal e of transistor 117m and transistor 117s. Switching circuit 124d is turned off (opened), and switching circuit 124d is turned on (closed).

[0308] In semiconductor element 117, current Id flows from the P electrode terminal through switching circuit 124c, and current Id flows between the channels of transistor 117m. By applying the gate signal Vsgm to the gate terminal gm of transistor 117m, the on / off control of transistor 117m is performed, and the test of semiconductor element 117 is implemented.

[0309] Figure 26 (f) shows a state in which gate signals are applied to the gate terminals g (gate terminal gm, gate terminal gs) of transistor 117m and transistor 117s, a constant current Id flows through semiconductor element 117, and semiconductor element 117 is tested.

[0310] A conduction voltage or a cut-off voltage is periodically or intermittently applied to the gate terminal gs of transistor 117s and the gate terminal gm of transistor 117m. Transistor 117s and transistor 117m are controlled to be in the conduction state or the cut-off state.

[0311] Turns off the short-circuit circuit 137 connected between the gate terminal g and the emitter terminal e of transistor 117m and transistor 117s. Switching circuit 124c and switching circuit 124d are turned off (opened). In semiconductor element 117, a constant current Id flows between the P electrode terminal and the N electrode terminal.

[0312] By controlling in such a way that transistor 117m and transistor 117s are not turned on simultaneously, or by controlling in such a way that transistor 117m and transistor 117s are turned on only for a very short period, a surge voltage and a transient current can be made to flow through semiconductor element 117, and a more rigorous test can be implemented.

[0313] By selecting or combining Figure 19 the timing waveforms and Figure 26 the (a) to Figure 26 the (f) tests of Figure 26 the (a) to Figure 26 the (f) tests of Figure 26 the (a) toFigure 26 The situation of the test in (f).

[0314] Figure 27 It is an explanatory diagram of a semiconductor element test apparatus and a test method of a semiconductor element in another embodiment of the present invention. The test circuit module 301 can be exemplified Figure 3 etc. The test circuit module 301 is connected to Figure 27 the A, B, and C parts of (a). The test circuit module 301 is prepared corresponding to each semiconductor element 117. The test circuit module 301 can be exemplified, for example, Figure 26 , Figure 3 . The test circuit module 301 is connected to three switch circuit substrates 201 (switch circuit substrate 201b, switch circuit substrate 201c, switch circuit substrate 201d). As shown in Figure 27 (a), the switch circuit substrate 201b is prepared corresponding to the semiconductor element 117 to be tested. In Figure 27 (a), the switch circuit 124aa is arranged in the test circuit module 301a, the switch circuit 124ab is arranged in the test circuit module 301b, and the switch circuit 124ac is arranged in the test circuit module 301c.

[0315] Figure 27 (a) of is an embodiment for testing a plurality of semiconductor elements 117. The semiconductor element test apparatus of the present invention can test a plurality of test circuit modules 301 simultaneously or test the test circuit modules 301 sequentially by controlling the switch circuit 124a.

[0316] The test circuit module 301 is controlled by one control circuit board 111. Only one power supply device 132 needs to be prepared for the plurality of test circuit modules 301 (semiconductor elements 117) to be tested.

[0317] Figure 27 (b) is a timing chart for explaining the operation of the semiconductor element test apparatus of the present invention. By sequentially applying a conduction voltage Vsg to the transistors 117m of the module 301 of the test circuit, the transistors are made to operate for testing.

[0318] The matters or contents described in this specification and the drawings can of course be combined with each other.

[0319] Industrial Applicability

[0320] The present invention can provide a semiconductor element test apparatus and a semiconductor test method that can easily change the connection according to the test content of semiconductor elements such as transistors and the number of simultaneous tests of semiconductor elements.

[0321] Explanation of Reference Numerals

[0322] 111 Control circuit board (controller)

[0323] 112 Gate signal control circuit

[0324] 113 Gate driver circuit

[0325] 115 Temperature measurement circuit

[0326] 116 Operational amplifier (buffer amplifier)

[0327] 117 Power transistor

[0328] 118 Constant current circuit

[0329] 121 Constant current circuit

[0330] 122 Switching circuit

[0331] 124 Switching circuit

[0332] 125 Variable resistance circuit

[0333] 126 Variable resistance circuit

[0334] 127 Selector

[0335] 128 Current detection circuit

[0336] 129 Voltage detection circuit

[0337] 130 Constant current setting circuit

[0338] 131 Control rack

[0339] 132 Power supply device

[0340] 133 Control circuit

[0341] 134 Heating and cooling plate

[0342] 135 Circulating water pipe

[0343] 136 Cooler

[0344] 137 Short - circuit circuit

[0345] 138 Isolated DCDC converter circuit

[0346] 201 Switching circuit board

[0347] 202 Connector

[0348] 203 Sample connection circuit

[0349] 204 Conductor plate

[0350] 205 Forked plug

[0351] 206 connection pin

[0352] 207 female substrate

[0353] 208 connector

[0354] 209 device control circuit board

[0355] 210 housing

[0356] 211 connection wiring

[0357] 212 power supply wiring

[0358] 213 connector

[0359] 214 partition wall

[0360] 215 partition wall

[0361] 216 opening

[0362] 219 connection bolt

[0363] 220 contact part

[0364] 221 fixing screw

[0365] 222 signal wiring

[0366] 223 heat pipe

[0367] 224 fixing screw

[0368] 225 contact point part

[0369] 226 component terminal

[0370] 227 cooling fan

[0371] 228 heat dissipation fin

[0372] 231 heat pipe metal part

[0373] 232 connection pressure part

[0374] 233 connection holding part

[0375] 236 spring (pressure metal part)

[0376] 237 position fixing screw

[0377] 238 threaded hole

[0378] 239 spring hole

[0379] 240 positioning threaded hole

[0380] 241 fork plug insertion board

[0381] 251 convex part

[0382] 252 groove part

[0383] 301 test circuit module

[0384] 302 voltage selection circuit

[0385] 311 pressing part

[0386] 312 insulating plate

[0387] 313 pressing part mounting plate

[0388] 315 insulating part.

Claims

1. A power semiconductor device test apparatus is a power semiconductor device test apparatus for testing a semiconductor device having a first device terminal, a second device terminal, and a gate terminal, characterized in that Comprising: A power supply circuit having a first output terminal and a second output terminal for outputting a test current or a test voltage; A first switch circuit board on which or in which a first switch circuit is disposed, the first switch circuit having a first connection terminal and a second connection terminal; A voltage output circuit for outputting the voltage between the first element terminal and the second element terminal; A driver circuit for applying a conduction voltage or a cut-off voltage to the gate terminal, The first output terminal is connected to the second connection terminal, The first connection terminal is connected to the first element terminal, The second element terminal is connected to the second output terminal.

2. A power semiconductor device test apparatus is a power semiconductor device test apparatus for testing a semiconductor device having a first device terminal, a second device terminal, and a gate terminal, characterized in that, Comprising: A power supply circuit having a first output terminal and a second output terminal for outputting a test current or a test voltage; A first switch circuit board on which or in which a first switch circuit is disposed, the first switch circuit having a first connection terminal and a second connection terminal; A second switch circuit board on which or in which a second switch circuit is disposed, the second switch circuit having a third connection terminal and a fourth connection terminal; A voltage output circuit for outputting the voltage between the first element terminal and the second element terminal; A driver circuit for applying a conduction voltage or a cut-off voltage to the gate terminal, The first output terminal is connected to the second connection terminal, The first connection terminal is connected to the first element terminal, The second element terminal is connected to the second output terminal, The third connection terminal is connected to the first output terminal, The fourth connection terminal is connected to the second output terminal.

3. A power semiconductor device test apparatus is a power semiconductor device test apparatus for testing a semiconductor device having a first device terminal, a second device terminal, and a gate terminal, characterized in that, Comprising: A power supply circuit having a first output terminal and a second output terminal for outputting a test current or a test voltage; A first switch circuit board on which or in which a first switch circuit is disposed, the first switch circuit having a first connection terminal and a second connection terminal; A voltage output circuit for outputting the voltage between the first element terminal and the second element terminal; A driver circuit for applying a conduction voltage or a cut-off voltage to the gate terminal; A variable resistor circuit formed or disposed on the gate terminal, The first output terminal is connected to the second connection terminal, The first connection terminal is connected to the first element terminal, The second element terminal is connected to the second output terminal.

4. A power semiconductor device test apparatus is a power semiconductor device test apparatus for testing a semiconductor device having a first device terminal, a second device terminal, and a gate terminal, characterized in that, Comprising: A first heating and cooling plate disposed on the first surface of the semiconductor element; A second heating and cooling plate disposed on the second surface of the semiconductor element; A power supply circuit having a first output terminal and a second output terminal for outputting a test current or a test voltage; A first switch circuit board on which or in which a first switch circuit is disposed, the first switch circuit having a first connection terminal and a second connection terminal; A voltage output circuit for outputting the voltage between the first element terminal and the second element terminal; A driver circuit for applying a conduction voltage or a cut-off voltage to the gate terminal, The first output terminal is connected to the second connection terminal, The first connection terminal is connected to the first element terminal, The second element terminal is connected to the second output terminal.

5. The power semiconductor element test device according to any one of claims 1 to 4, characterized in that A connection member is connected to the first element terminal, A conductor plate or a conductor rod is disposed on the first switch circuit board. The conductor plate or the conductor rod has a first portion extending from the first switch circuit board. The first portion is fitted and connected to the connecting member. The test current or the test voltage is supplied to the first element terminal via the first switch circuit and the connecting member.

6. The power semiconductor device testing apparatus according to any one of claims 1 to 4, characterized in that it further includes a mother board. A plurality of the first switch circuit boards are connected to the mother board through connectors. A connecting member is connected to the first element terminal. A conductor plate or a conductor rod is disposed on the first switch circuit board. Arbitrarily select a first switch circuit board from the plurality of first switch circuit boards, and the conductor plate or the conductor rod of the selected first switch circuit board is fitted and connected to the connecting member.

7. The power semiconductor device testing apparatus according to any one of claims 1 to 4, characterized in that a connection structure body is connected to the first element terminal. The connection structure body has: a connection holding portion that contacts a first surface of the first element terminal; a connection receiving portion that is disposed with a space from the connection holding portion and contacts a second surface of the first element terminal; a screw; a connection pressure portion formed with a threaded hole for inserting the screw, the interval between the connection receiving portion and the connection pressure portion can be adjusted or set by the screw, the first element terminal is clamped between the connection holding portion and the connection receiving portion and is connected, the test current or the test voltage is supplied to the first element terminal via the connection structure body.

8. The power semiconductor device testing apparatus according to any one of claims 1 to 4, characterized in that a connection structure body is connected to the first element. A concave portion is formed in the connection structure body. A heat pipe is disposed in the concave portion. The linear expansion coefficient of the connection structure body is smaller than the linear expansion coefficient of the heat pipe.

9. The power semiconductor device testing apparatus according to any one of claims 1 to 4, characterized in that the semiconductor element is disposed in a first chamber. The first switch circuit board is disposed in a second chamber. Dry air is injected into the first chamber.

10. The power semiconductor device testing apparatus according to any one of claims 1 to 4, characterized in that the cut-off voltage has a first cut-off voltage and a second cut-off voltage lower than the first cut-off voltage. The conduction voltage, the first cut-off voltage and the second cut-off voltage are periodically applied to the gate terminal. When the second cut-off voltage is applied to the gate terminal, the test is stopped, or the control method is changed, or the test conditions are changed based on the voltage between the terminals output by the voltage output circuit.

11. The power semiconductor device testing apparatus according to any one of claims 1 to 4, characterized in that The semiconductor element is composed of a first transistor and a second transistor. The first transistor is connected to a first gate terminal, a second element terminal, and a third element terminal. The second transistor is connected to a second gate terminal, the first element terminal, and the third element terminal. The driver circuit is composed of a first driver circuit and a second driver circuit. The first driver circuit applies a conduction voltage or a cut-off voltage to the first gate terminal. The second driver circuit applies a conduction voltage or a cut-off voltage to the second gate terminal. The first driver circuit has a first voltage terminal to which a first voltage is applied and a second voltage terminal to which a second voltage is applied. The first driver circuit generates a conduction voltage and a cut-off voltage applied to the first gate terminal based on the first voltage and the second voltage. The second driver circuit has a third voltage terminal to which a third voltage is applied and a fourth voltage terminal to which a fourth voltage is applied. The second driver circuit generates a conduction voltage and a cut-off voltage applied to the second gate terminal based on the third voltage and the fourth voltage. The first voltage and the third voltage are floating.

12. The power semiconductor device test apparatus according to claim 2, wherein when starting to supply the test current or test voltage to the semiconductor element, the first switch circuit is turned on after tb2 when the second switch circuit is turned on, and the second switch circuit is turned off after tb1 when the first switch circuit is turned on. when stopping to supply the test current or test voltage to the semiconductor element, the first switch circuit is turned off after tas when the second switch circuit is turned on, and the second switch circuit is turned off after tam when the first switch circuit is turned off.

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