Interleaved parallel symmetrical half-bridge LLC converter based on variable inductor and current sharing control method thereof

Abstract

The invention discloses an interleaved parallel symmetrical half-bridge LLC converter based on a variable inductor, which is formed by connecting two symmetrical half-bridge LLC resonant circuits with the same parameters and structures in parallel at an input side and an output side, namely an A-phase LLC resonant circuit and a B-phase LLC resonant circuit, comprising a direct-current input power supply Vin, two groups of same primary side insulated gate transistors, two groups of transformers, two groups of resonance circuits, two groups of same secondary side full-bridge rectification circuits, an output capacitor Cf and a load RL, the resonant inductor L1 is a variable inductor, and the variable inductor structurally comprises a direct current bias control circuit. The invention further discloses a current sharing control method of the interleaved parallel symmetric half-bridge LLC converter based on the variable inductor. By means of the mode, output current ripples can be reduced, and same-frequency work and current sharing of the switching tubes of the parallel LLC are achieved.

Description

Technical Field

[0001] The present invention relates to the technical field of power electronic converters, and particularly to a staggered parallel symmetric half-bridge LLC converter based on a variable inductor and an equal current sharing control method therefor. Background Art

[0002] An LLC resonant converter can be formed into a large-capacity power supply system by combining multiple small-capacity modules in series or in parallel. In practical applications, especially in the case of a larger output current, the advantages of the LLC parallel structure are more prominent. However, when several converters are connected in parallel, due to slight deviations in the parameters of the resonant elements (such as inductors and capacitors) in each converter, the current distribution between phases is uneven. The junction capacitances of the switching tubes are inconsistent, which also leads to inconsistent switching speeds, slight differences in the actual duty cycles of the switching tubes, current sharing problems, and signal transmission delays of hardware devices such as optocouplers and logic chips, etc., which will also cause current sharing deviations, and the layout and wiring of the PCB, wire diameter size, etc. will all cause current sharing problems.

[0003] After traditional half-bridge LLCs are connected in parallel, due to the differences in hardware parameters, the current sharing effect is poor, the switching tubes and magnetic components heat unevenly, the stress on the switching tubes is high, the output ripple is large, it is easy to cause device damage, and the reliability of the system decreases. There is an urgent need to provide a novel staggered parallel symmetric half-bridge LLC converter based on a variable inductor and an equal current sharing control method therefor to solve the above problems. Summary of the Invention

[0004] The technical problem to be solved by the present invention is to provide a staggered parallel symmetric half-bridge LLC converter based on a variable inductor and an equal current sharing control method therefor, which can reduce the output current ripple and achieve the same-frequency operation and current sharing of the switching tubes of the parallel LLCs.

[0005] To solve the above technical problem, one technical solution adopted by the present invention is: to provide a staggered parallel symmetric half-bridge LLC converter based on a variable inductor, which is composed of two symmetric half-bridge LLC resonant circuits with the same parameters and structures connected in parallel on the input and output sides respectively, namely a phase A LLC resonant circuit and a phase B LLC resonant circuit, and includes a DC input power supply V in , two groups of identical primary-side insulated gate type transistors, two groups of transformers, two groups of resonant circuits, two groups of identical secondary-side full-bridge rectifier circuits, an output capacitor C f and a load R L ;

[0006] The phase A LLC resonant circuit includes field effect transistors Q1, Q2, a transformer T1, resonant capacitors C1, C2, a resonant inductor L1, and an exciting inductor L m1, rectifier diodes D1, D2, D3, D4, resonant capacitors C1, C2, resonant inductor L1, and exciting inductor L m1 constitute a resonant circuit. Rectifier diodes D1, D2, D3, D4 form a secondary full-bridge rectifier circuit. The source of switch Q1 is connected to the drain of Q2. One end of capacitor C1 is connected to the drain of switch Q1 and the other end is connected in series with one end of capacitor C2. The other end of capacitor C2 is connected to the source of switch Q2. One end of inductor L1 is connected to the source of switch Q1 and the other end is connected to one end of inductor L m1 ; inductor L m1 is connected in parallel with the primary side of transformer T1;

[0007] The resonant inductor L1 is a variable inductor. The variable inductor structure includes a DC bias control circuit, which is used to inject a controllable DC bias current into the bias winding of the variable inductor to control the inductance of the variable inductor;

[0008] The B-phase LLC resonant circuit includes field effect transistors Q3, Q4, transformer T2, resonant capacitors C3, C4, resonant inductor L2, and exciting inductor L m2 , rectifier diodes D5, D6, D7, D8, resonant capacitors C3, C4, resonant inductor L2, and exciting inductor L m2 constitute a resonant circuit. Rectifier diodes D5, D6, D7, D8 form a secondary full-bridge rectifier circuit;

[0009] Output capacitor C f is connected in parallel with load R L between the cathode of secondary diode D3 and the anode of secondary diode D4;

[0010] The A-phase LLC resonant circuit and the B-phase LLC resonant circuit are interleaved and paralleled for current sharing, and the phase difference is kept at 90°.

[0011] In a preferred embodiment of the present invention, the variable inductor structure further includes a DC bias power supply and a magnetic core. The magnetic core includes a magnetic core skeleton, a primary winding, a secondary winding, and an air gap is opened in the middle magnetic path. The primary winding includes four groups of bias windings, namely bias winding A, bias winding B, bias winding C, and bias winding D. The bias windings are wound on both sides of the "I"-shaped magnetic core with the same number of turns and the same direction. Bias winding B and bias winding C are connected by a wire, and bias winding A and bias winding D are connected by a wire; the magnitude of the bias current in bias winding A, bias winding B, bias winding C, and bias winding D is changed by the DC bias control circuit.

[0012] In a preferred embodiment of the present invention, the DC bias control circuit includes a Darlington tube circuit module, a push-pull circuit module, and a buck circuit module, and also includes a capacitor C7 and resistors R1 - R8. The input end is connected to the PWM signal output by the single-chip microcomputer, and the output end is connected to the variable inductor L1. The Darlington tube circuit module includes transistors Q8 and Q9, the push-pull circuit module includes transistors Q6 and Q7, and the buck circuit module includes a MOS tube Q5, a diode D9, an inductor L3, and capacitors C5 and C6.

[0013] To solve the above technical problems, another technical solution adopted by the present invention is: to provide a current sharing control method for an interleaved parallel symmetric half-bridge LLC converter based on a variable inductor as described above, adopting a double closed-loop control mode of a voltage outer loop and a current inner loop, including the following steps:

[0014] Set the target voltage that the system is expected to reach as the voltage reference value. The voltage reference value is subtracted from the voltage output by the symmetric half-bridge LLC as the input of the voltage loop. After being adjusted by the PI controller, the output value is limited within the effective range of the output current by the limiter. The output of the voltage loop is used as the reference value of the current inner loop and is subtracted from the output current of the symmetric half-bridge LLC as the input of the current loop. After being adjusted by the PI controller, the output is controlled within the operating frequency range, and through PFM control, it is converted into a drive signal and enters the LLC circuit;

[0015] Among them, the variable inductor in the LLC resonant circuit of phase A is used for current sharing control: collect the output currents of the LLC resonant circuit of phase A and the LLC resonant circuit of phase B and make a difference, and output a current error feedback value to enter the current sharing loop control. The current reference value is set to 0. After passing through the PI controller and the limiter, a drive signal is output and enters the DC bias control circuit. The output voltage is adjusted through the drive signal. At this time, the variable inductor adjusts its own inductance according to the magnitude of the output voltage, thereby controlling the magnitude of the current in the LLC resonant circuit of phase A to achieve the purpose of current sharing control.

[0016] The beneficial effects of the present invention are: the symmetric half-bridge LLC resonant topology of the present invention has the characteristics of small output ripple, good voltage stability, can provide stable output voltage and current, is suitable for application scenarios with high requirements for output quality, and at the same time has small electromagnetic interference. The symmetric structure helps to reduce electromagnetic interference and improve system stability. It uses fewer components, has a low failure rate, and has relatively high system reliability;

[0017] The current sharing control method can realize the same-frequency operation of the switching tubes of the parallel LLC through PI control of the variable resonant inductor, and can also realize current sharing control. Brief Description of the Drawings

[0018] Figure 1It is the topology diagram of a preferred embodiment of the variable-inductance interleaved parallel symmetric half-bridge LLC converter of the present invention;

[0019] Figure 2 It is the equivalent circuit diagram of Mode 1 of the variable-inductance interleaved parallel symmetric half-bridge LLC converter;

[0020] Figure 3 It is the equivalent circuit diagram of Mode 2 of the variable-inductance interleaved parallel symmetric half-bridge LLC converter;

[0021] Figure 4 It is the equivalent circuit diagram of Mode 3 of the variable-inductance interleaved parallel symmetric half-bridge LLC converter;

[0022] Figure 5 It is the equivalent circuit diagram of Mode 4 of the variable-inductance interleaved parallel symmetric half-bridge LLC converter;

[0023] Figure 6 It is the equivalent circuit diagram of Mode 5 of the variable-inductance interleaved parallel symmetric half-bridge LLC converter;

[0024] Figure 7 It is the equivalent circuit diagram of Mode 6 of the variable-inductance interleaved parallel symmetric half-bridge LLC converter;

[0025] Figure 8 It is the equivalent circuit diagram of Mode 7 of the variable-inductance interleaved parallel symmetric half-bridge LLC converter;

[0026] Figure 9 It is the equivalent circuit diagram of Mode 8 of the variable-inductance interleaved parallel symmetric half-bridge LLC converter;

[0027] Figure 10 It is the magnetic core structure diagram of the variable inductor;

[0028] Figure 11 It is the circuit diagram of the DC bias control circuit;

[0029] Figure 12 It is the framework diagram of the current sharing control of the variable-inductance interleaved parallel symmetric half-bridge LLC converter;

[0030] Figure 13 It is the method flow diagram of current sharing control for the variable inductor in the A-phase LLC resonant circuit. Detailed implementation manners

[0031] The following elaborates on the preferred embodiments of the present invention in conjunction with the accompanying drawings, so that the advantages and features of the present invention can be more easily understood by those skilled in the art, thereby making the protection scope of the present invention more clearly defined.

[0032] Please refer to Figure 1 , the embodiments of the present invention include:

[0033] A variable-inductance-based interleaved parallel symmetric half-bridge LLC converter is composed of two symmetric half-bridge LLC resonant circuits with the same parameters and structures connected in parallel on the input and output sides respectively, namely the phase-A LLC resonant circuit and the phase-B LLC resonant circuit, and includes a DC input power supply V in , two groups of identical primary-side insulated-gate transistors, two groups of transformers, two groups of resonant circuits, two groups of identical secondary-side full-bridge rectifier circuits, an output capacitor C f and a load R L .

[0034] The phase-A LLC resonant circuit includes field-effect transistors Q1, Q2, a transformer T1, resonant capacitors C1, C2, a resonant inductor L1, an exciting inductor L m1 , rectifier diodes D1, D2, D3, D4. The resonant capacitors C1, C2, the resonant inductor L1, and the exciting inductor L m1 form a resonant circuit, and the rectifier diodes D1, D2, D3, D4 form a secondary-side full-bridge rectifier circuit. The source electrode of the switching transistor Q1 is connected to the drain electrode of Q2. One end of the capacitor C1 is connected to the drain electrode of the switching transistor Q1 and the other end is connected in series with one end of the capacitor C2. The other end of the capacitor C2 is connected to the source electrode of the switching transistor Q2. One end of the inductor L1 is connected to the source electrode of the switching transistor Q1 and the other end is connected to one end of the inductor L m1 . The inductor L m1 is connected in parallel to the primary side of the transformer T1. Among them, the resonant inductor L1 is a variable inductor, and the variable inductor structure includes a DC bias control circuit. By controlling the inductance of the variable inductor through the DC bias control circuit, the gain of the output of one path of the symmetric half-bridge LLC can be changed, realizing current sharing of the two paths of symmetric half-bridge LLCs under the same frequency operation, reducing the load fluctuation and noise, making the heat dissipation distribution more uniform, and improving the reliability and stability of the power supply.

[0035] The phase-B LLC resonant circuit includes field-effect transistors Q3, Q4, a transformer T2, resonant capacitors C3, C4, a resonant inductor L2, an exciting inductor L m2 , rectifier diodes D5, D6, D7, D8. The resonant capacitors C3, C4, the resonant inductor L2, and the exciting inductor L m2 form a resonant circuit, and the rectifier diodes D5, D6, D7, D8 form a secondary-side full-bridge rectifier circuit. The connection relationship of each circuit component is as Figure 1 shown, which is the same as the connection relationship of the phase-A LLC resonant circuit.

[0036] The A-phase LLC resonant circuit and the B-phase LLC resonant circuit are connected in interleaved parallel conduction, achieving current sharing in the interleaved parallel connection of two LLC resonant converters, that is, the switching frequencies are the same, and the AB phase difference always remains 90°, effectively reducing the output current ripple.

[0037] Output capacitor C f is connected in parallel with the load R L between the cathode of the secondary diode D3 and the anode of the secondary diode D4.

[0038] Assume that the interleaved parallel LLC operates under ideal conditions, ignoring factors such as differences between devices, parasitic effects of the devices themselves, and conduction losses. The operating principle of the resonant converter in this operating mode will be elaborated in detail. In this period, the main operating timings are divided into 8 states, namely t0 to t8, and the following will be analyzed step by step according to different timing diagrams.

[0039] Mode 1:

[0040] Refer to Figure 2 , from t0 to t1, the upper switch Q1 of the A-phase LLC is turned on, the resonant current gradually decreases, flows clockwise, C1 discharges, and C2 charges. The primary side of the transformer is magnetized in the forward direction, and energy is exchanged between the primary and secondary sides through the transformer. Diodes D1 and D4 in the full-bridge rectifier are turned on and operate in the rectification state. At the moment t1, the resonant current drops to the magnetizing current, and this mode ends.

[0041] The upper switch Q3 of the B-phase LLC is turned on, the resonant current first increases and then decreases, flows clockwise, C3 discharges, and C4 charges, until the resonant current drops to the magnetizing current and this mode ends. The primary side of the transformer is magnetized in the forward direction, and energy is exchanged between the primary and secondary sides through the transformer. Diodes D5 and D8 in the full-bridge rectifier are turned on and operate in the rectification state.

[0042] Since the phase difference of the driving signals of the two-phase LLC resonant converter always remains 90°, the B-phase leads the A-phase by 90°, and the primary resonant currents also differ by 90°. The two output currents cancel each other's harmonics, effectively reducing the output current ripple.

[0043] Mode 2:

[0044] Refer to Figure 3 , from t1 to t2, the upper switch Q1 of the A-phase LLC is turned on, the resonant current flows clockwise, C1 discharges, and C2 charges. The resonant current is equal to the magnetizing current, and there is no energy exchange between the primary side and the secondary side. The currents of D1 and D4 on the secondary side are reduced to zero, and the diodes do not operate in the rectification state, preparing for the ZCS turn-on of the diodes in the next step. At the moment t2, the drive of the upper switch Q1 of LLC1 is turned off, and this mode ends.

[0045] When the upper switch Q3 of the B-phase LLC is turned on, the resonant current first increases and then decreases, flowing clockwise. C3 discharges and C4 charges until the resonant current drops to the exciting current and this mode ends. The primary side of the transformer is excited positively, and energy is exchanged between the primary and secondary sides through the transformer. Diodes D5 and D8 in the full-bridge rectifier are conducting and working in the rectification state.

[0046] Mode Three:

[0047] Refer to Figure 4 , from t2 to t3, the upper switch Q1 of the A-phase LLC is turned off. During this process, the junction capacitance of Q1 is always in the charging state. Correspondingly, the junction capacitance of Q2 is always in the discharging state, and there is no energy exchange between the primary side and the secondary side. At this time, the diodes are not working in the rectification state. It should be noted that the dead time of the LLC resonant converter must be greater than the duration of Mode Three so that the junction capacitances of the MOS transistors can be fully charged and discharged, preparing for the ZVS turn-on of Q2 next. At the moment t3, the junction capacitance of Q2 discharges to 0 and this mode ends.

[0048] When the upper switch Q3 of the B-phase LLC is turned on, the resonant current first increases and then decreases, flowing clockwise. C3 discharges and C4 charges until the resonant current drops to the exciting current and this mode ends. The primary side of the transformer is excited positively, and energy is exchanged between the primary and secondary sides through the transformer. Diodes D5 and D8 in the full-bridge rectifier are conducting and working in the rectification state.

[0049] Mode Four:

[0050] Refer to Figure 5 , from t3 to t4, the upper switch Q1 of the A-phase LLC is turned off. After the junction capacitance of Q1 is fully charged and the junction capacitance of Q2 is fully discharged, the resonant inductor current continues to flow clockwise and drops to 0. The resonant inductor current flows through the body diode of MOS transistor Q2, providing conditions for the ZVS turn-on of MOS transistor Q2. There is energy exchange between the primary side and the secondary side, and there is current in D2 and D3 on the secondary side. The diodes start to work in the rectification state. At the moment t4, when the lower switch Q2 is turned on, this mode ends.

[0051] When the upper switch Q3 of the B-phase LLC is turned on, the resonant current first increases and then decreases, flowing clockwise. C3 discharges and C4 charges until the resonant current drops to the exciting current and this mode ends. The primary side of the transformer is excited positively, and energy is exchanged between the primary and secondary sides through the transformer. Diodes D5 and D8 in the full-bridge rectifier are conducting and working in the rectification state.

[0052] Mode Five:

[0053] Refer to Figure 6, from t4 to t5, the lower switch Q2 of phase A LLC is turned on. The resonant current first increases and then decreases, flowing counterclockwise. C1 is charged and C2 is discharged until the resonant current drops to the exciting current and this mode ends. The primary side of the transformer is negatively excited, and energy is exchanged between the primary and secondary sides through the transformer. Diodes D2 and D3 in the full-bridge rectifier are conducting and working in the rectification state.

[0054] The upper switch Q3 of phase B LLC is turned on. The resonant current gradually decreases, flowing clockwise. C3 is discharged and C4 is charged. The primary side of the transformer is positively excited, and energy is exchanged between the primary and secondary sides through the transformer. Diodes D5 and D8 in the full-bridge rectifier are conducting and working in the rectification state. At time t5, the resonant current drops to the exciting current and this mode ends.

[0055] Mode six:

[0056] Refer to Figure 7 , from t5 to t6, the lower switch Q2 of phase A LLC is turned on. The resonant current first increases and then decreases, flowing counterclockwise. C1 is charged and C2 is discharged until the resonant current drops to the exciting current and this mode ends. The primary side of the transformer is negatively excited, and energy is exchanged between the primary and secondary sides through the transformer. Diodes D2 and D3 in the full-bridge rectifier are conducting and working in the rectification state.

[0057] The upper switch Q3 of phase B LLC is turned on. The resonant current flows clockwise. C3 is discharged and C4 is charged. The resonant current is equal to the exciting current, and there is no energy exchange between the primary side and the secondary side. The currents of D5 and D8 on the secondary side decrease to zero, and the diodes do not work in the rectification state, preparing for the ZCS turn-on of the diodes next. At time t6, the drive of the upper switch Q3 of phase B is turned off and this mode ends.

[0058] Mode seven:

[0059] Refer to Figure 8 , from t6 to t7, the lower switch Q2 of phase A LLC is turned on. The resonant current first increases and then decreases, flowing counterclockwise. C1 is charged and C2 is discharged until the resonant current drops to the exciting current and this mode ends. The primary side of the transformer is negatively excited, and energy is exchanged between the primary and secondary sides through the transformer. Diodes D2 and D3 in the full-bridge rectifier are conducting and working in the rectification state.

[0060] The upper switch Q3 of phase B LLC is turned off. During this process, the junction capacitance of Q3 is always in the charging state. Correspondingly, the junction capacitance of Q4 is always in the discharging state. There is no energy exchange between the primary side and the secondary side, and the diodes do not work in the rectification state at this time. It should be noted that the dead time of the LLC resonant converter must be greater than the duration of mode seven so that the junction capacitance of the MOSFET can be charged and discharged completely, preparing for the ZVS turn-on of Q4 next. At time t7, the junction capacitance of Q4 discharges to 0 and this mode ends.

[0061] Mode eight:

[0062] Refer to Figure 9 From t7 to t8, the lower switch Q2 of phase A LLC is turned on. The resonant current first increases and then decreases, flowing counterclockwise. C1 is charged and C2 is discharged until the resonant current drops to the exciting current and this mode ends. The primary side of the transformer is negatively excited, and energy is exchanged between the primary and secondary sides through the transformer. Diodes D2 and D3 in the full-bridge rectifier are conducting, working in the rectification state.

[0063] The upper switch Q3 of phase B LLC is turned off. After the charging of the junction capacitance of Q3 and the discharging of the junction capacitance of Q4 are completed, the resonant inductor current continues to flow clockwise and decreases to 0. The resonant inductor current flows through the body diode of MOS transistor Q4, providing conditions for the ZVS turn-on of MOS transistor Q4. There is energy exchange between the primary side and the secondary side, and there is current in D6 and D7 on the secondary side, and the diodes start to work in the rectification state. At time t8, when the lower switch Q4 is turned on, this mode ends.

[0064] Combined with Figure 10 The variable inductor uses an EEL19 phenolic resin bobbin. The magnetic core integrated structure of the variable inductor includes: a primary winding, a secondary winding, and an air gap in the middle magnetic circuit. The primary winding contains four bias windings and has the same number of turns, which are bias winding A, bias winding B, bias winding C, and bias winding D. The bias windings are wound around the two "I" - shaped magnetic cores on both sides with the same number of turns and the same direction. Bias winding B and bias winding C are connected by a wire, and bias winding A and bias winding D are connected by a wire. By changing the bias current magnitude in bias winding A, bias winding B, bias winding C, and bias winding D through a DC bias control circuit, the magnetic permeability of the magnetic core is changed, and thus the purpose of adjusting the inductance value is achieved. When the bias current increases, the magnetic permeability of the magnetic core will decrease. By controlling the magnitude of the bias current, the maximum change rate of the magnetic permeability is between 50% and 70%, which can avoid entering the non - linear region with high losses while ensuring the control accuracy, thereby realizing the stable and controllable adjustment of the inductance parameters. Moreover, this winding method can reduce the distributed capacitance, increase the heat dissipation area, and reduce the volume of the transformer.

[0065] Specifically, refer to Figure 11, the DC bias control circuit is used to inject a controllable DC bias current into bias windings A, B, C, and D. By adjusting the magnetization state of the magnetic element, its magnetic permeability is changed, thereby realizing the dynamic adjustment of the winding inductance. This circuit includes a Darlington tube circuit module, a push-pull circuit module, and a buck circuit module. The Darlington tube circuit module includes transistors Q8 and Q9, the push-pull circuit module includes transistors Q6 and Q7, and the buck circuit module includes MOS transistor Q5, diode D9, inductor L3, capacitors C5 and C6. The DC bias control circuit also includes capacitor C7 and resistors R1 - R8. The input end is connected to the PWM signal output by the single-chip microcomputer, and the output end is connected to the variable inductor L1. The connection relationships of each circuit component are as Figure 11 shown.

[0066] When the PWM signal output by the single-chip microcomputer passes through the Darlington tube circuit module, Q8 and Q9 invert the signal twice to increase the current gain. Then, it passes through the push-pull circuit module. When the high level is present, Q6 conducts and Q5 turns off. When the low level is present, Q6 turns off and Q5 conducts, realizing the functions of current amplification and voltage following. The subsequent circuit is the buck circuit module. When MOS transistor Q5 conducts, inductor L3 stores electrical energy, and capacitors C5 and C6 are charged. When MOS transistor Q5 turns off, inductor L3 and capacitors C5 and C6 discharge simultaneously to achieve a volt-second balance, thereby realizing a controllable constant current source circuit to adjust the variable inductance value. By controlling the variable inductance, the current sharing problem of the interleaved parallel symmetric half-bridge LLC is realized, and it can ensure that the switching transistors operate at the same frequency.

[0067] The present invention adopts an interleaved parallel LLC with a variable resonant inductor, which can reduce the current non-uniformity, reduce heat generation, improve efficiency and stability, and be compatible with the inconsistency of hardware parameters; it can improve the stress of the switching transistors, make the heat distribution uniform, and increase the reliability of the system. Adopting an interleaved parallel symmetric half-bridge LLC reduces the output current ripple, is beneficial to the EMC design, and reduces the volume of filtering devices.

[0068] Referring to Figure 12 , in the embodiment of the present invention, a current sharing control method for an interleaved parallel symmetric half-bridge LLC converter based on a variable inductor as described above is also provided. Adopting a double closed-loop control mode of a voltage outer loop and a current inner loop, it includes the following steps:

[0069] The voltage reference value is used to set the target voltage that the system is expected to reach. It serves as the input of the control algorithm to help the system adjust the output voltage and stabilize it near the reference value. The output voltage refers to the voltage output by the symmetric half-bridge LLC, that is, capacitor C fThe voltage at both ends. The difference between the voltage reference value and the output voltage is used as the input of the voltage loop. After being adjusted by the PI controller, the output value is limited within the effective range of the output current by the limiter. The output of the voltage loop is used as the reference value of the current inner loop and the difference between it and the output current of the symmetric half-bridge LLC is used as the input of the current loop. After being adjusted by the PI controller, the output is controlled within the working frequency range, and through PFM control, it is converted into a driving signal and enters the LLC circuit.

[0070] Among them, the variable inductor in the LLC resonant circuit of phase A is used for current sharing control. As Figure 13 shown, the specific method is as follows: Collect the output currents of the LLC resonant circuit of phase A and the LLC resonant circuit of phase B and make a difference, and output a current error feedback value to enter the current sharing loop control. The current reference value is set to 0. After passing through the PI controller and the limiter, a driving signal is output to enter the DC bias control circuit. The output voltage is adjusted through the driving signal. At this time, the variable inductor adjusts its own inductance according to the magnitude of the output voltage, and then controls the magnitude of the current in the LLC resonant circuit of phase A to achieve the purpose of current sharing control.

[0071] By controlling the variable resonant inductor through PI, the switching tubes of the parallel LLC can operate at the same frequency, and current sharing can also be achieved.

[0072] The above are only embodiments of the present invention, and do not limit the patent scope of the present invention accordingly. Any equivalent structure or equivalent process transformation made by using the description and drawings of the present invention, or directly or indirectly applied in other related technical fields, shall be equally included in the patent protection scope of the present invention.

Claims

1. An interleaved parallel symmetric half-bridge LLC converter based on variable inductance, characterized in that It is composed of two parameters and two symmetric half-bridge LLC resonant circuits with the same structure, which are respectively connected in parallel on the input and output sides, namely the A-phase LLC resonant circuit and the B-phase LLC resonant circuit, and includes a DC input power supply V in , two groups of identical primary-side insulated gate transistors, two groups of transformers, two groups of resonant circuits, two groups of identical secondary-side full-bridge rectifier circuits, an output capacitor C f and a load R L ; The A-phase LLC resonant circuit includes field effect transistors Q1, Q2, transformer T1, resonant capacitors C1, C2, resonant inductor L1, and exciting inductor L m1 , rectifier diodes D1, D2, D3, D4. The resonant capacitors C1, C2, resonant inductor L1, and exciting inductor L m1 form a resonant circuit, and the rectifier diodes D1, D2, D3, D4 form a secondary full-bridge rectifier circuit. The source of switch Q1 is connected to the drain of Q2. One end of capacitor C1 is connected to the drain of switch Q1 and the other end is connected in series with one end of capacitor C2. The other end of capacitor C2 is connected to the source of switch Q2. One end of inductor L1 is connected to the source of switch Q1 and the other end is connected to one end of inductor L m1 . Inductor L m1 is connected in parallel with the primary side of transformer T1; The resonant inductor L1 is a variable inductor. The variable inductor structure includes a DC bias control circuit, which is used to inject a controllable DC bias current into the bias winding of the variable inductor to control the inductance of the variable inductor. The B-phase LLC resonant circuit includes field effect transistors Q3, Q4, transformer T2, resonant capacitors C3, C4, resonant inductor L2, and exciting inductor L m2 , rectifier diodes D5, D6, D7, D8, resonant capacitors C3, C4, resonant inductor L2, and exciting inductor L m2 form a resonant circuit, and rectifier diodes D5, D6, D7, D8 form a full-bridge rectifier circuit on the secondary side; Output capacitor C f is connected in parallel with the load R L between the cathode of the secondary diode D3 and the anode of the secondary diode D4; The A-phase LLC resonant circuit and the B-phase LLC resonant circuit are interleaved and paralleled for current sharing, and the phase difference is maintained at 90°.

2. The interleaved parallel symmetric half-bridge LLC converter based on variable inductance according to claim 1, wherein The variable inductor structure further includes a DC bias power supply and a magnetic core. The magnetic core includes a magnetic core skeleton, a primary winding, a secondary winding, and an air gap in the middle magnetic path. The primary winding includes four bias windings, namely bias winding A, bias winding B, bias winding C, and bias winding D. The bias windings are wound on both sides of the "I"-shaped magnetic core with the same number of turns and the same direction. Bias winding B and bias winding C are connected by a wire, and bias winding A and bias winding D are connected by a wire. The magnitude of the bias current in bias winding A, bias winding B, bias winding C, and bias winding D is changed by the DC bias control circuit.

3. The interleaved parallel symmetric half-bridge LLC converter based on variable inductance according to claim 1, characterized in that, The DC bias control circuit includes a Darlington tube circuit module, a push-pull circuit module, and a buck circuit module, and also includes capacitor C7 and resistors R1 - R8. The input end is connected to the PWM signal output by the single-chip microcomputer, and the output end is connected to the variable inductor L1. The Darlington tube circuit module includes transistors Q8 and Q9, the push-pull circuit module includes transistors Q6 and Q7, and the buck circuit module includes MOS transistor Q5, diode D9, inductor L3, and capacitors C5 and C6.

4. A current sharing control method for an interleaved parallel symmetric half-bridge LLC converter based on variable inductance as described in any one of claims 1 to 3, characterized in that, A double closed-loop control method with a voltage outer loop and a current inner loop is adopted, including the following steps: Set the target voltage that the system is expected to reach as the voltage reference value. The voltage reference value is subtracted from the voltage output by the symmetric half-bridge LLC, which is used as the input of the voltage loop. After being adjusted by the PI controller, the output value is limited within the effective range of the output current by the limiter. The output of the voltage loop is used as the reference value of the current inner loop and is subtracted from the output current of the symmetric half-bridge LLC as the input of the current loop. After being adjusted by the PI controller, the output is controlled within the working frequency range and is converted into a drive signal through PFM control and then enters the LLC circuit. Among them, the variable inductor in the A-phase LLC resonant circuit is used for current sharing control: The output currents of the A-phase LLC resonant circuit and the B-phase LLC resonant circuit are collected and subtracted to output a current error feedback value, which enters the current sharing loop control. The current reference value is set to 0. After passing through the PI controller and the limiter, a drive signal is output and enters the DC bias control circuit. The output voltage is adjusted through the drive signal. At this time, the variable inductor adjusts its own inductance according to the magnitude of the output voltage, thereby controlling the magnitude of the current in the A-phase LLC resonant circuit and achieving the purpose of current sharing control.

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