Phase change material, low-resistance-drift multi-valued phase change memory and preparation method

Abstract

The invention relates to a phase change material, a low-resistance-drift multi-valued phase change memory and a preparation method, and belongs to the technical field of microelectronics. The phase change material is Cx [(GeTe) y (Sb2Te3) 100-y] 100-x, x is larger than or equal to 5 and smaller than or equal to 15, y is larger than 33 and smaller than or equal to 66, and x and y are integers. The phase change memory comprises a first metal electrode layer, an insulating layer, a phase change material layer and a second metal electrode layer, a stable carbon tetrahedral structure appears in the carbon-doped phase change material layer, so that the thermal stability and the data retention capability of the phase change material layer are effectively improved. A phase change memory unit based on the phase change material can generate progressive crystallization / non-crystallization under excitation of voltage pulses with different pulse waveforms, so that a multi-configuration and low-resistance-drift storage behavior is realized, and the brain-like computing application requirement of a storage and computation integrated framework can be met.

Description

Technical Field

[0001] This application belongs to the field of microelectronics technology. More specifically, it relates to a phase change material, a multi-valued phase change memory with low resistance drift, and a preparation method thereof. Background Art

[0002] In today's information age, the storage and processing of massive amounts of data are problems that urgently need to be solved. Due to the characteristic of separate memory and computing in the current traditional von Neumann computing architecture, both the data processing performance and energy efficiency are hindered, and it has already reached the bottleneck of application. Against this background, the emerging concept of the integrated memory and computing architecture is proposed. By integrating the storage unit and the computing unit into one, and completing the computing task in the storage unit, the repeated exchange of data can be avoided, and the data processing performance and efficiency of the system can be effectively improved. The biological brain is a typical integrated memory and computing architecture. The basic components of the brain are neurons and synapses. The brain contains billions of neurons, which are highly connected by trillions of synapses. An efficient integrated memory and computing architecture can be realized by simulating the human brain through neuromorphic electronic and optical devices. To simulate the functions of neurons and synapses, neuromorphic devices need to exhibit high stability, fast switching, adjustable storage weight performance, and the ability to be compatible with existing semiconductor processing lines. And innovation at the material level is the key to determining this information revolution. Chalcogenide phase change materials (PCM) are considered to be a very promising candidate. Ge2Sb2Te5 has been widely used due to its balanced properties, but Ge2Sb2Te5 still has problems such as resistance drift, resulting in poor data retention ability. Summary of the Invention

[0003] Aiming at the defects of the prior art, the purpose of this application is to provide a phase change material, a multi-valued phase change memory with low resistance drift, and a preparation method thereof. The phase change material of the present invention is obtained by doping C element into the Ge-Sb-Te system phase change material. The phase change memory in the present invention is a multi-configuration phase change storage device with high data retention ability, which can be used for brain-like computing and has high thermal stability and fast crystallization performance, thus solving the technical problems of resistance drift and inability to be used for brain-like computing existing in the phase change memory in the prior art.

[0004] According to the first aspect of the present invention, a phase change material is provided, and the chemical formula of the phase change material is C x [(GeTe) y (Sb2Te3) 100-y 100-x , and this phase change material is obtained by doping C element into the Ge-Sb-Te system phase change material, where x represents the atomic percentage of C element in the phase change material, and y represents the atomic percentage of GeTe in the sum of GeTe and Sb2Te3. Among them, 5 ≤ x ≤ 15, 33 < y ≤ 66, and both x and y are integers. ​

[0005] Preferably, the Ge-Sb-Te system phase change material is (GeTe) 34 (Sb2Te3) 66 、(GeTe) 40 (Sb2Te3) 60 or (GeTe) 50 (Sb2Te3) 50 。

[0006] Preferably, it includes: a first electrode layer, an insulating layer, a phase change material layer, and a second electrode layer; the material of the phase change material layer is the phase change material described above;

[0007] The insulating layer is disposed on the first electrode layer, and through holes are formed on the insulating layer;

[0008] The phase change material layer is disposed in the through holes and on the insulating layer; the second electrode layer is disposed on the phase change material layer;

[0009] The insulating layer is used for heat insulation, and the through holes are used to limit the contact size between the phase change material and the first electrode layer.

[0010] Preferably, the materials of the first electrode layer and the second electrode layer are independently selected from one or more of TiN, TaN, Pt, W, Ti, Au, and Ru.

[0011] Preferably, the material of the insulating layer is SiO2 or SiC.

[0012] Preferably, the thickness of the first metal electrode layer and the second metal electrode layer is 5nm to 200nm, the thickness of the phase change material layer is 20nm to 100nm, the thickness of the insulating layer is 5nm to 100nm, and the size of the through holes is 100nm to 800nm.

[0013] According to another aspect of the present invention, a method for manufacturing a phase change memory is provided, including the following steps:

[0014] (1) Form a first electrode layer on a substrate, and then deposit an insulating layer on the first electrode layer;

[0015] (2) Use an electron beam exposure and development process to form a photoresist mask with small holes on the insulating layer, and then etch the insulating layer under the small holes to obtain through holes;

[0016] (3) Grow a phase change material layer on the insulating layer and in the through holes described in step (2);

[0017] (4) Grow a second electrode layer on the phase change material layer, thus obtaining a phase change memory.

[0018] Generally speaking, compared with the prior art through the above technical solution conceived by the present invention, the following beneficial effects are achieved:

[0019] (1) In the phase change material layer after carbon doping in the present invention, a stable carbon tetrahedron structure appears, thereby effectively improving the thermal stability and data retention ability of the phase change material layer. Based on the phase change memory cell of this phase change material, under the excitation of voltage pulses with different pulse waveforms, progressive crystallization / amorphization can occur, realizing low resistance drift and multi-configuration storage behaviors, which can meet the application requirements of brain-like computing in the memory-computation integrated architecture.

[0020] (2) The present invention provides a phase change memory based on a phase change material, wherein the chemical general formula of the phase change material is C x [(GeTe) y (Sb2Te3) 100-y 100-x . Since C atoms form stable tetrahedron structures and carbon chains in the Ge-Sb-Te system phase change material, the octahedral configuration in the system becomes distorted, and the long-range movement of Ge and Sb atoms is effectively inhibited, thereby improving the data retention ability of the material and alleviating the problem of resistance drift of the phase change device. Compared with the undoped Ge-Sb-Te system phase change memory device, the phase change memory of the present invention realizes lower resistance drift in different configurations without excessively sacrificing the set speed.

[0021] (3) The present invention provides a phase change material obtained by doping C elements into the Ge-Sb-Te system phase change material. By doping element C atoms to form short and strong chemical bonds with Ge, Sb, and Te, the amorphous stability (crystallization temperature, ten-year data retention temperature) of the Ge-Sb-Te system phase change material is improved. Compared with the undoped Ge-Sb-Te phase change material, the amorphous stability is significantly improved, effectively solving the problem of insufficient amorphous stability of current Ge-Sb-Te. Description of the Drawings

[0022] Figure 1 is the R-T curve of the measured phase change thin film provided by the embodiment of the present application.

[0023] Figure 2 is the X-ray diffraction pattern of the measured Ge1Sb4Te7, C6(Ge1Sb4Te7) 94 、C 12 (Ge1Sb4Te7) 88 、C 18 (Ge1Sb4Te7) 82 phase change thin films provided by the embodiment of the present application.

[0024] Figure 3 ​The X-ray photoelectron spectroscopy diagrams of the measured Ge1Sb4Te7 and C6(Ge1Sb4Te7) provided by the embodiments of the present application 94 , C 12 (Ge1Sb4Te7) 88 , C 18 (Ge1Sb4Te7) 82 phase change thin films

[0025] Figure 4 The flow chart of the preparation method of the phase change memory device provided by the embodiments of the present application

[0026] Figure 5 The structure diagram of the phase change memory provided by the present embodiment

[0027] Figure 6 The C6(Ge1Sb4Te7) provided by the embodiments of the present application 94 phase change memory set performance test diagram

[0028] Figure 7 The C6(Ge1Sb4Te7) provided by the embodiments of the present application 94 phase change memory multi-configuration resistance drift test diagram

[0029] Figure 8 The correlation distribution diagrams of the Ge1Sb4Te7 and C6(Ge1Sb4Te7) systems provided by the embodiments of the present application 94

[0030] Figure 9 The bond angle distribution diagrams of the Ge1Sb4Te7 and C6(Ge1Sb4Te7) systems provided by the embodiments of the present application 94

[0031] Figure 10 The mean square displacement curves of the Ge1Sb4Te7 and C6(Ge1Sb4Te7) systems provided by the embodiments of the present application 94

[0032] The meanings of the reference numerals in the drawings are as follows:

[0033] 100 - semiconductor substrate; 101 - first electrode layer; 102 - phase change material layer; 103 - second electrode layer; 104 - insulating layer Detailed implementation manners

[0034] ​​​To make the objectives, technical solutions and advantages of the present invention more clear and understandable, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention. In addition, the technical features involved in the various embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0035] The present invention prepares C by using one of magnetron sputtering, chemical vapor deposition method, molecular beam epitaxy method, atomic layer deposition method or metal organic deposition method x [(GeTe) y (Sb2Te3) 100-y 100-x . This application provides a phase change material C x [(GeTe) y (Sb2Te3) 100-y 100-x . After C element is incorporated into the Ge-Sb-Te system phase change material, carbon atoms form short and strong chemical bonds with Ge, Sb, and Te, enhancing the stability of the Ge-Sb-Te system; since carbon atoms form stable tetrahedral structures and carbon chains in this system, the configuration of the octahedron in the system is changed, and the long-range movement of Ge and Sb atoms is effectively inhibited, thereby improving the data retention ability and reducing the resistance drift problem of the phase change device. Without significantly reducing the set speed, different configurations of the carbon-doped phase change memory have low resistance drift phenomena.

[0036] More specifically, the chemical general formula of the phase change material is C x [(GeTe) y (Sb2Te3) 100-y 100-x , which is obtained by incorporating C element into the Ge-Sb-Te system phase change material, where x represents the atomic percentage of C element in the phase change material, y represents the component ratio of GeTe in the Ge-Sb-Te phase change material, where 5 ≤ x ≤ 15, 33 < y ≤ 66, and both x and y are integers; the phase change material is used as the phase change material functional layer of the phase change memory.

[0037] Further preferably, the Ge-Sb-Te system phase change material is (GeTe) 34 (Sb2Te3) 66 , (GeTe) 40 (Sb2Te3) 60 , (GeTe) 50 (Sb2Te3) 50 or one or more of them.

[0038] ​​​Further preferably, the phase change material is in the form of a thin film, and the thickness of the thin film material is 20 nm - 100 nm.

[0039] In a second aspect, based on the phase change material provided above, the present invention provides a corresponding phase change memory, including: a first electrode layer, an insulating layer, a phase change material layer, and a second electrode layer;

[0040] The insulating layer is disposed on the first electrode layer, and through holes are formed in the insulating layer, such that the phase change material layer has a confined hole structure;

[0041] The phase change material layer is disposed in the through holes and on the insulating layer; the second electrode layer is disposed on the phase change material layer;

[0042] The insulating layer is used for heat insulation, and the through holes are used to limit the contact size between the phase change material and the first electrode layer; the phase change material functional layer is used to achieve the phase change storage function.

[0043] Further preferably, the materials of the first electrode layer and the second electrode layer are one or more of TiN, TaN, Pt, W, Ti, Au, and Ru.

[0044] Further preferably, the material of the insulating layer is SiO2 or SiC.

[0045] Further preferably, the thickness of the first metal electrode layer and the second metal electrode layer is 5 nm - 200 nm, the thickness of the phase change material layer is 20 nm - 100 nm, the thickness of the insulating layer is 5 nm - 100 nm, and the aperture of the through hole of the insulating layer is 100 nm - 800 nm.

[0046] To further illustrate the phase change material, phase change memory, and preparation method of the present invention, the following specific examples are used for detailed description.

[0047] Example 1

[0048] This example provides a preparation method for a C-doped Ge-Sb-Te phase change memory thin film material with high thermal stability, high latency, and high reliability, and its chemical formula is C x [(GeTe) y (Sb2Te3) 100-y 100-x , and the value range of x is adjusted by the sputtering power of the C target;

[0049] More specifically, in this example, C x [(GeTe) y (Sb2Te3) 100-y 100-x The chemical formula of the phase change material is C x [(GeTe) 33 ​​(Sb2Te3) 67 100-x , hereinafter referred to as C x (Ge1Sb4Te7) 100-x , and the phase change memory thin film material is prepared by magnetron sputtering. The specific process flow is as follows:

[0050] S1: Select a clean semiconductor substrate;

[0051] The semiconductor substrate 100 can be made of materials such as SiO2, Si, Al2O3, etc. The substrate is ultrasonically cleaned successively with acetone, alcohol and deionized water, and after the cleaning is completed, the residual reagent liquid on the surface of the substrate is blown dry with nitrogen for standby;

[0052] S2: Co-sputter using the C target and the Ge1Sb4Te7 target;

[0053] Specific implementation method: Grind the C target and the Ge1Sb4Te7 target to remove the surface oxide layer, and then place them in the DC sputtering target position and the AC sputtering target position respectively. Set the chamber vacuum degree to 2×10 -4 Pa, the gas flow rate is 80 sccm, the DC sputtering power is set to 30 W, the AC sputtering power is set to 30 W, the sputtering time is 450 s, and the tray rotation speed is 20 r / min. Subsequently, the substrate is fixed on the sputtering tray and sent into the loading chamber for magnetron sputtering. By changing the DC sputtering power, the co-sputtering process is repeated to obtain phase change thin film materials with doping concentrations of C6(Ge1Sb4Te7) 94 , C 12 (Ge1Sb4Te7) 88 , C 18 (Ge1Sb4Te7) 82 respectively.

[0054] Comparative Example 1

[0055] In the comparative example, a Ge1Sb4Te7 phase change thin film was prepared by magnetron sputtering. The preparation method of the Ge1Sb4Te7 phase change thin film in this comparative example is the same as the steps in Example 1, except that the AC sputtering power is 30 W and the DC sputtering power is 0 W, and a phase change material without carbon doping is obtained.

[0056] Example 2

[0057] To further illustrate the C x (Ge1Sb4Te7) 100-x phase change material, the crystallization temperature of the C x (Ge1Sb4Te7) 100-x and Ge1Sb4Te7 thin films obtained in Example 1 and the comparative example was tested, Figure 1 ​Relationship curve between in-situ resistivity and annealing temperature of Ge1Sb4Te7 phase change thin film materials with different carbon doping concentrations, where the heating rate is 10 °C / min. Figure 1 The decreasing part during heating is the reduction of resistance during the heating process, and the relatively flat part is that the resistance basically remains unchanged during the cooling process after the heating ends. From Figure 1 it can be seen that the resistance of as-deposited Ge1Sb4Te7 is 10 6 Ω. The temperature at which the resistance of the material suddenly decreases is considered the crystallization temperature, that is, Ge1Sb4Te7 undergoes the first phase change at about 120 °C, from the amorphous phase to the FCC phase, and undergoes a second phase change at about 210 °C, completing the transformation from the FCC phase to the HEX phase. As the carbon content increases, the crystallization temperature gradually increases, and the resistance mutation at the crystallization temperature is no longer obvious, especially for the second phase change from the FCC to the HEX phase. This indicates that the crystallization of the phase change material is inhibited after doping with carbon, and the thermal stability of the phase change material is improved.

[0058] Example 3

[0059] To further illustrate the C x (Ge1Sb4Te7) 100-x phase change material, X-ray diffraction tests were performed on the C x (Ge1Sb4Te7) 100-x and Ge1Sb4Te7 thin films obtained in Example 1 and Comparative Example 1. Before the test, four samples of each doping concentration were prepared and annealed at 150 °C, 200 °C, 250 °C, and 290 °C, respectively. Then, XRD tests were performed on the as-deposited (unannealed) and samples at each annealing temperature (150 °C, 200 °C, 250 °C, 290 °C).

[0060] As Figure 2 shown, the as-deposited samples did not show obvious diffraction peaks. When the temperature increased to 150 °C, a (200) diffraction peak appeared at 2θ = 29 for the Ge1Sb4Te7 sample, indicating that the thin film changed from the amorphous phase to the FCC phase at this time; when the temperature increased to above 200 °C, diffraction peaks at 2θ = 28.8, 39.1, and 43 appeared as (103), (106), and (210) respectively, indicating that the thin film completed the transformation from the FCC phase to the HEX phase, which also confirmed the results of the R-T curve; the C 12 (Ge1Sb4Te7) 88 thin film still maintained the FCC phase at 200 °C, and at 250 °C, the C 12 (Ge1Sb4Te7) 88The diffraction peak intensity of the HEX phase exhibited is significantly lower than that of Ge1Sb4Te7, indicating that carbon doping inhibits both phase transition processes of Ge1Sb4Te7. This shows that doping carbon increases the crystallization temperature of the two-phase transitions, enhances the thermal stability of the phase change material, and inhibits the crystallization of the phase change material.

[0061] Example 4

[0062] To further illustrate the C x (Ge1Sb4Te7) 100-x phase change material of the present invention, X-ray photoelectron spectroscopy tests were performed on the C x (Ge1Sb4Te7) 100-x and Ge1Sb4Te7 thin films obtained in Example 1 and Comparative Example 1. Figure 3 Shows the test results of Ge, Sb, and Te atoms in three thin film samples of Ge1Sb4Te7, C6(Ge1Sb4Te7) 94 , C 12 (Ge1Sb4Te7) 88 After carbon doping, the peak positions of Ge 2p, Sb 3d, and Te3d all shift to the left to varying degrees, indicating that the bond energy of the formed chemical bond is enhanced. Since the electronegativity of C is significantly higher than that of Ge, Sb, and Te, in Ge1Sb4Te7, it mainly gains electrons to form Ge-C, Sb-C, and Te-C chemical bonds, and the bond energies of Ge-C, Sb-C, and Te-C are larger than those of the chemical bonds in the original system. Therefore, the peak positions of Ge 2p, Sb 3d, and Te 3d shift towards higher energy directions. In summary, after carbon doping, carbon atoms form high-strength chemical bonds with Ge, Sb, and Te, making the system more stable.

[0063] Example 5

[0064] This example provides a preparation method of a phase change memory based on a C-doped Ge-Sb-Te phase change material with high thermal stability, low resistance drift, and high reliability. The phase change memory is fabricated on a substrate and includes a first electrode layer and a second electrode layer for applying electrical signals, a functional layer for realizing phase change storage, and an insulating layer for insulating isolation.

[0065] More specifically, Figure 4 For the preparation method of the phase change memory, it includes the following steps:

[0066] Step1: Prepare a SiO2 semiconductor substrate 100, ultrasonically clean the substrate successively with acetone, alcohol, and deionized water, with the cleaning time for each reagent being 10 min. After cleaning, use pure nitrogen to blow dry the residual liquid on the substrate and place it in a pollution-free environment for standby;

[0067] Step 2: Grow a TiN first electrode layer 101 on a clean SiO2 semiconductor. This first metal electrode layer uses a TiN electrode with a thickness of 100 nm.

[0068] Step 3: Deposit a SiO2 insulating layer 104 of about 100 nm on the lower electrode using plasma-enhanced chemical vapor deposition. The reaction temperature is 300 °C.

[0069] Step 4: Use electron beam exposure and development processes to form a photoresist mask with circular holes on the SiO2. The diameters are 200 nm, 400 nm, 600 nm, and 800 nm.

[0070] Step 5: Use a plasma etching process to etch the SiO2 insulating layer to form a through hole with a depth of 100 nm.

[0071] Step 6: Grow a phase change material layer 102 on the SiO2 insulating layer. The phase change material used is C6(Ge1Sb4Te7) 94 , with a thickness of 100 nm.

[0072] Step 7: Grow a second electrode layer 103 on the C6(Ge1Sb4Te7) 94 phase change material thin film layer. This metal electrode layer uses a W electrode with a thickness of 100 nm.

[0073] Example 6

[0074] To further illustrate the phase change memory based on C x (Ge1Sb4Te7) 100-x phase change material of the present invention, the phase change memory based on C6(Ge1Sb4Te7) 94 phase change material in Example 5 above is tested for electrical characteristics. The test results are as Figure 5 shown.

[0075] Before the test, the phase change material in the cell is in the amorphous state. First, the cell is scanned by applying a DC voltage. When the applied scanning voltage increases to a certain value, the material changes from the amorphous state to the crystalline state, and the resistance of the cell decreases rapidly. Based on C6(Ge1Sb4Te7) 94 phase change material thin film, the PCM cell can be programmed at a lower switching voltage and can maintain a switching range of one order of magnitude with a programming pulse of up to 70 ns at most. The switching voltages are 2.0 V and 1.7 V respectively. Thus, it can be seen that C6(Ge1Sb4Te7) 94 device has good storage performance.

[0076] From Figure 6It can be seen that during the unit RESET process, there are continuous resistance changes. Therefore, we applied a series of pulses with a pulse width of 500 ns and adjustable resistance to the low-resistance (crystalline) phase change memory cell to RESET it. The results show that a series of continuous and adjustable resistance values can be achieved by controlling the voltage magnitude of the pulses. Due to reasons such as spontaneous structural relaxation and mechanical stress relaxation, the resistance of the amorphous phase change material will slowly increase with time, that is, resistance drift. Through the formula: R(t) = R0(t / t0) v for fitting, where R(t) and R0 represent the resistances measured at times t and t0 respectively, and v is the drift coefficient, representing the rate of resistance evolution with time. For multi-value storage, the resistance drift will cause the adjacent configurations to overlap over time, resulting in errors in data reading. Therefore, resistance drift is a major obstacle to multi-level storage and neuromorphic computing. For C6(Ge1Sb4Te7) 94 the resistance drift test was carried out on the measured intermediate configurations, and the results are as Figure 7 shown. It can be seen that the various intermediate configurations of the C6(Ge1Sb4Te7) 94 phase change unit maintain good distinguishability, and the maximum drift coefficient is 0.032, which is lower than that of Ge2Sb2Te5 (v = 0.11), indicating that the phase change unit has good configuration stability and multi-value reliability.

[0077] Example 7

[0078] This example provides the simulation of the amorphous local structure of Ge1Sb4Te7 and C6(Ge1Sb4Te7) 94 phase change materials. Specifically, as shown in a of Figure 8 and b of Figure 8 , they are the pair correlation distribution function diagrams of the Ge1Sb4Te7 and C6(Ge1Sb4Te7) 94 systems. The ordinate represents the number of bonds, and the abscissa represents the bond length. It can be seen from the figure that shorter bonds are introduced after doping, indicating that after doping with C element, shorter and stronger bonds can be introduced, enhancing the thermal stability of the material system.

[0079] Specifically, as shown in Figure 9 , it is the bond angle distribution diagram of the Ge1Sb4Te7 and C6(Ge1Sb4Te7) 94 systems. The ordinate represents the number of bonds, and the abscissa represents the bond angle size. It can be seen from the figure that after doping carbon in Ge1Sb4Te7, the octahedral configuration centered on Ge becomes distorted and even moves towards the tetrahedral configuration. It is inferred from this that the incorporation of carbon can enhance the distortion of the octahedral clusters in the system and improve the stability of the GST system.

[0080] Specifically, this embodiment simulates Ge1Sb4Te7 and C6(Ge1Sb4Te7) 94 systems' kinetic properties, such as Figure 10 shown. The ordinate represents the root mean square displacement, and the abscissa represents the simulation time. The slope of the curve can represent the strength of atomic motion ability. The results show that after C doping, the atomic motion ability is weaker, which can effectively reduce atomic movement, inhibit the long-range movement of the system, and enhance the system stability.

[0081] Specifically, the above simulation results show that introducing the doping element C into the Ge-Sb-Te system can effectively improve the thermal stability and durability of the material, which is reflected in the phase change memory device as lower resistance drift and multi-value stability.

[0082] In summary, the phase change memory based on the C x [(GeTe) y (Sb2Te3) 100-y 100-x phase change material prepared in the embodiment of the present invention has high thermal stability, low resistance drift, and multi-value storage behavior, which can meet the application requirements of brain-like computing in the memory-computation integrated architecture.

[0083] It is easy for those skilled in the art to understand that the above are only the preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent replacements, and improvements made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.​

Claims

1. A phase change material, characterized in that, The chemical formula of the phase change material is C x [(GeTe) y (Sb2Te3) 100-y 100-x , and the phase change material is obtained by doping element C into the Ge-Sb-Te system phase change material, where x represents the atomic percentage of element C in the phase change material, and y represents the atomic percentage of GeTe in the sum of GeTe and Sb2Te3. Among them, 5 ≤ x ≤ 15, 33 < y ≤ 66, and both x and y are integers.​ 2. The phase change material according to claim 1, wherein The Ge-Sb-Te system phase change material is (GeTe) 34 (Sb2Te3) 66 、(GeTe) 40 (Sb2Te3) 60 or (GeTe) 50 (Sb2Te3) 50 .

3. A phase change memory, characterized in that, Comprising: A first electrode layer, an insulating layer, a phase change material layer, and a second electrode layer; the material of the phase change material layer is the phase change material described in claim 1 or 2; The insulating layer is disposed on the first electrode layer, and through holes are formed in the insulating layer; The phase change material layer is disposed in the through holes and on the insulating layer; the second electrode layer is disposed on the phase change material layer; The insulating layer is used for heat insulation, and the through holes are used to limit the contact size between the phase change material and the first electrode layer.

4. The phase change memory according to claim 3, wherein The materials of the first electrode layer and the second electrode layer are independently selected from one or more of TiN, TaN, Pt, W, Ti, Au, and Ru.

5. The phase change memory according to claim 3, wherein The material of the insulating layer is SiO2 or SiC.

6. The phase change memory according to claim 3, wherein The thickness of the first metal electrode layer and the second metal electrode layer is 5 nm to 200 nm, the thickness of the phase change material layer is 20 nm to 100 nm, the thickness of the insulating layer is 5 nm to 100 nm, and the size of the through holes is 100 nm to 800 nm.

7. The preparation method of the phase change memory according to any one of claims 3-6, characterized in that Including the following steps: (1) Form a first electrode layer on a substrate, and then deposit an insulating layer on the first electrode layer; (2) Use an electron beam exposure and development process to form a photoresist mask with small holes on the insulating layer, and then etch the insulating layer under the small holes to obtain through holes; (3) Grow a phase change material layer on the insulating layer and in the through holes described in step (2); (4) Grow a second electrode layer on the phase change material layer to obtain a phase change memory.

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