Plasma processing apparatus

Abstract

The plasma processing apparatus includes: a chamber; the first bias power supply and the second bias power supply are used for supplying first bias signals and second bias signals; a substrate support supporting the substrate and the edge ring within the chamber; an adjusting mechanism; and an electrical path. The substrate supporting device is provided with a first area and a second area, wherein the first area and the second area respectively support the substrate and the edge ring; first and second bias electrodes in the first and second regions; and a grounded adjustment electrode in the second region. The adjustment mechanism has: a first adjustment mechanism for controlling the first bias signal; an isolator blocking the second bias signal between the adjustment electrode and the first adjustment mechanism; and a second adjustment mechanism controlling the second bias signal. The isolator and the first adjusting mechanism are connected in parallel with the second adjusting mechanism and are connected with the adjusting electrode. An electrical path connects the first and second bias power sources with the first and second bias electrodes.

Description

Technical Field

[0001] The present disclosure relates to a plasma processing apparatus. Background Art

[0002] It is disclosed in Patent Document 1 that when a plasma sheath descends adjacent to an edge ring due to erosion of the edge ring, the capacitance of a variable capacitor is adjusted to be able to affect the RF amplitude near the edge of a substrate.

[0003] Prior Art Documents

[0004] Patent Documents

[0005] Patent Document 1: Japanese Unexamined Patent Application Publication No. 2017-130659. Summary of the Invention

[0006] Problems to be Solved by the Invention

[0007] The present disclosure provides a plasma processing apparatus capable of improving the controllability of a plurality of bias RF signals having different frequencies.

[0008] Technical Means for Solving the Problems

[0009] A plasma processing apparatus according to one aspect of the present disclosure includes: a chamber; a first bias power supply configured to be able to supply a first bias signal; a second bias power supply configured to be able to supply a second bias signal; a substrate support configured to support a substrate and an edge ring in the chamber; an impedance adjustment mechanism; and a circuit path. The substrate support is configured to have: a first region for supporting the substrate; a second region provided around the first region for supporting the edge ring; a first bias electrode provided in the first region; a second bias electrode provided in the second region; and an impedance adjustment electrode provided in the second region and grounded. The impedance adjustment mechanism is configured to have: a first impedance adjustment mechanism for controlling the first bias signal; an isolator connected between the impedance adjustment electrode and the first impedance adjustment mechanism for blocking the second bias signal; and a second impedance adjustment mechanism for controlling the second bias signal. The isolator and the first impedance adjustment mechanism are connected in parallel with the second impedance adjustment mechanism and connected to the impedance adjustment electrode. The circuit path is configured to be able to connect the first bias power supply and the second bias power supply to the first bias electrode and the second bias electrode.

[0010] Advantages of the Invention

[0011] According to the present disclosure, the controllability of a plurality of bias RF signals having different frequencies can be improved. Brief Description of the Drawings

[0012] Figure 1 It is a diagram showing an example of the structure of the plasma processing apparatus according to the first embodiment of the present disclosure.

[0013] Figure 2 It is a diagram showing an example of the relationship between the consumption of the edge ring and the tilt.

[0014] Figure 3 It is a diagram showing an example of the circuit structure of the impedance adjustment mechanism in the first embodiment.

[0015] Figure 4 It is a diagram showing another example of the circuit structure of the impedance adjustment mechanism in the first embodiment.

[0016] Figure 5 It is a graph showing an example of the relationship between the capacitance of a variable capacitor and the reactance.

[0017] Figure 6 It is a graph showing an example of the relationship between the capacitance of a variable capacitor and the reactance.

[0018] Figure 7 It is a graph showing an example of the influence between multiple variable capacitors.

[0019] Figure 8 It is a graph showing an example of the influence between multiple variable capacitors.

[0020] Figure 9 It is a diagram showing an example of the adjustment of multiple variable capacitors in the first embodiment.

[0021] Figure 10 It is a diagram showing an example of the edge ring consumption in the reference example.

[0022] Figure 11 It is a diagram showing an example of the edge ring consumption in Modification 1.

[0023] Figure 12 It is a diagram showing an example of the relationship between the sheath potential and the capacitance of the variable capacitor in Modification 1.

[0024] Figure 13 It is a diagram showing an example of the deviation of the etching rate.

[0025] Figure 14 It is a diagram showing an example of the arrangement of the conductive bars in Modification 2.

[0026] Figure 15 It is a diagram showing an example of the arrangement of the conductive bars in Modification 3.

[0027] Figure 16 It is a diagram showing an example of the arrangement of the conductive bars in Modification 4.

[0028] Figure 17 It is a diagram showing an example of the arrangement of the conductive bars in Modification 5.

[0029] Figure 18 This is a diagram showing an example of the structure of the circuit path in Modification 6.

[0030] Figure 19 This is a diagram showing an example of the structure of the plasma processing apparatus in the second embodiment.

[0031] Figure 20 This is a diagram showing an example of the independent controllability on the edge ring side in the second embodiment. Detailed Embodiment

[0032] Hereinafter, embodiments of the disclosed plasma processing apparatus will be described in detail with reference to the drawings. In addition, the disclosed technology is not limited by the following embodiments.

[0033] In a plasma processing apparatus, the thickness of the plasma sheath layer may vary depending on the potential difference between the substrate and the edge ring. For example, when the edge ring is consumed, the height of the plasma sheath layer above the edge ring may decrease (the sheath thickness increases). Therefore, at the peripheral portion of the substrate, the direction of the electric field is not perpendicular to the substrate, the trajectory of the ions is skewed, and sometimes an inclination (inner inclination) in which the etching holes are obliquely skewed occurs. In response to this, for example, controlling the potential on the edge ring side independently is considered. However, when, for example, two bias RF signals with different frequencies are used as the bias power supply, it may be possible to control the potential at one frequency but not at the other frequency. Therefore, improvement in controllability for a plurality of bias RF signals with different frequencies is expected.

[0034] (First Embodiment)

[0035] [Structure of Plasma Processing Apparatus 1]

[0036] Hereinafter, a structural example of the plasma processing system will be described. Figure 1FIG. 0 is a diagram showing an example of the structure of a plasma processing apparatus according to a first embodiment of the present disclosure. The plasma processing system includes an inductively coupled plasma processing apparatus 1 and a control unit 2. The inductively coupled plasma processing apparatus 1 includes a plasma processing chamber 10, a gas supply unit 20, a power supply 30, and an exhaust system 40. The plasma processing chamber 10 includes a dielectric window 101. In addition, the plasma processing apparatus 1 further includes a substrate support unit 11, a gas introduction unit, and an antenna 14. The substrate support unit 11 is disposed inside the plasma processing chamber 10. The antenna 14 is disposed on or above the plasma processing chamber 10 (i.e., on or above the dielectric window 101). The plasma processing chamber 10 has a plasma processing space 10s defined by the dielectric window 101, the side wall 102 of the plasma processing chamber 10, and the substrate support unit 11. In addition, the plasma processing chamber 10 has at least one gas supply port for supplying at least one processing gas to the plasma processing space 10s and at least one gas discharge port for discharging gas from the plasma processing space. The plasma processing chamber 10 is grounded.

[0037] The substrate support unit 11 includes a main body portion 111 and a ring assembly 112. The main body portion 111 has a central region 111a for supporting the substrate W and a ring-shaped region 111b for supporting the ring assembly 112. A wafer is an example of the substrate W. The ring-shaped region 111b of the main body portion 111 surrounds the central region 111a of the main body portion 111 in a plan view. The substrate W is disposed on the central region 111a of the main body portion 111, and the ring assembly 112 is disposed on the ring-shaped region 111b of the main body portion 111 so as to surround the substrate W on the central region 111a of the main body portion 111. Therefore, the central region 111a is also referred to as a substrate support surface for supporting the substrate W, and the ring-shaped region 111b is also referred to as a ring support surface for supporting the ring assembly 112. In addition, the substrate support unit 11 is an example of a substrate support, the central region 111a is an example of a first region, and the ring-shaped region 111b is an example of a second region. In addition, in the following description, the central region 111a is sometimes denoted as the substrate support surface 111a, and the ring-shaped region 111b is sometimes denoted as the ring support surface 111b.

[0038] In one embodiment, the main body portion 111 includes a base 1110, an electrostatic chuck 1111, and an adhesive layer 1112. The base 1110 includes a conductive member. The conductive member of the base 1110 can function as a part of a circuit path 38 connected to a first bias electrode 34 and a second bias electrode 35 described later. A power supply line 33a is connected to the bottom of the base 1110. In addition, the circuit path 38 also includes the power supply line 33a. The electrostatic chuck 1111 is disposed on the base 1110 via the adhesive layer 1112. The electrostatic chuck 1111 is disposed on the base 1110. The electrostatic chuck 1111 includes a ceramic member 1111a and an electrostatic electrode 1111b disposed within the ceramic member 1111a. The ceramic member 1111a has a central region 111a. In one embodiment, the ceramic member 1111a also has an annular region 111b. Among them, other components surrounding the electrostatic chuck 1111, such as an annular electrostatic chuck and an annular insulating member, may also have the annular region 111b. In this case, the ring assembly 112 may be disposed on the annular electrostatic chuck or the annular insulating member, or may be disposed on both the electrostatic chuck 1111 and the annular insulating member. In addition, at least one RF (Radio Frequency) / DC (Direct Current) electrode coupled to an RF power supply 31 and / or a DC power supply 32 described later may be disposed within the ceramic member 1111a. In this case, at least one RF / DC electrode functions as a bias electrode. That is, the first bias electrode 34 and the second bias electrode 35 described later are electrically connected to the RF power supply 31 and / or the DC power supply 32 via the circuit path 38. In addition, the conductive member of the base 1110 and at least one RF / DC electrode may also function as a plurality of bias electrodes. In addition, the electrostatic electrode 1111b may also function as a bias electrode, and the first bias electrode 34 may also function as an electrostatic electrode. Therefore, the substrate support portion 11 includes at least one bias electrode.

[0039] The ring assembly 112 includes one or more annular members. In one embodiment, the one or more annular members include one or more edge rings and at least one cover ring. The edge ring is formed of a conductive material or an insulating material, and the cover ring is formed of an insulating material.

[0040] In addition, the substrate support portion 11 may also include a temperature adjustment module configured to adjust at least one of the electrostatic chuck 1111, the ring assembly 112, and the substrate W to a target temperature. The temperature adjustment module may include a heater, a heat transfer medium, a flow path 1110a, or a combination thereof. A heat transfer fluid such as brine or gas flows in the flow path 1110a. In one embodiment, the flow path 1110a is formed in the base 1110, and one or more heaters are disposed in the ceramic member 1111a of the electrostatic chuck 1111. In addition, the substrate support portion 11 may also include a heat transfer gas supply portion configured to supply a heat transfer gas to the gap between the back surface of the substrate W and the central region 111a.

[0041] The electrostatic chuck 1111 includes an electrostatic electrode 1111b and a first bias electrode 34 inside in this order from the side of the substrate support surface 111a at the lower part of the substrate support surface 111a, and is formed of a dielectric such as ceramic. In addition, the electrostatic chuck 1111 includes an impedance adjustment electrode 50 and a second bias electrode 35 inside in this order from the side of the ring support surface 111b at the lower part of the ring support surface 111b. The first bias electrode 34 is connected to the bottom of the base 1110, for example, via a conductor 36b passing through the through hole 36a in the base 1110. In addition, an insulating sleeve (not shown) is provided inside the through hole 36a, and the base 1110 and the conductor 36b are electrically insulated in the through hole 36a. The second bias electrode 35 is connected to the bottom of the base 1110, for example, via a conductor 37b passing through the through hole 37a in the base 1110. In addition, an insulating sleeve (not shown) is provided inside the through hole 37a, and the base 1110 and the conductor 37b are electrically insulated in the through hole 37a.

[0042] That is, the first bias electrode 34 and the second bias electrode 35 are connected to a matching circuit 33 (described later) via conductors 36b, 37b, the base 1110, and a power supply line 33a to form a circuit path 38. In addition, the connection of the first bias electrode 34 and the second bias electrode 35 to the base 1110 is not limited to a conductive member. For example, as long as it is a method capable of supplying a bias RF signal such as magnetic resonance, capacitive coupling, and inductive coupling. That is, the circuit path 38 is configured to be able to connect a bias power supply (for example, a first bias RF generation unit 31b described later), the first bias electrode 34, and the second bias electrode 35. In addition, in the circuit path 38, the first bias RF generation unit 31b and the second bias RF generation unit 31c described later may not be connected to the base 1110, and the first bias RF generation unit 31b and the second bias RF generation unit 31c may be directly connected to the first bias electrode 34 and the second bias electrode 35. In addition, the second bias electrode 35 also has a function of suppressing abnormal discharge of the LF1 electric power supplied from the first bias RF generation unit 31b described later.

[0043] The impedance adjustment electrode 50 is grounded via the impedance adjustment mechanism 51. The impedance adjustment mechanism 51 adjusts the amount of a part of the RF signal (electrical bias) supplied from the second bias electrode 35 flowing toward the ground side. Through the impedance adjustment electrode 50, the amount of the RF signal flowing toward the ground side is adjusted, thereby adjusting the potential of the ring assembly 112 for the control of the tilt angle and / or the adjustment of the etching rate. At least one impedance adjustment electrode 50 is provided within the electrostatic chuck 1111. When a plurality of impedance adjustment electrodes 50 are provided, for example, two or more are provided in the circumferential direction of the substrate support portion 11, and the impedance adjustment mechanism 51 is also provided in a corresponding number to the impedance adjustment electrodes 50. In addition, two or more impedance adjustment electrodes 50 may be provided in the radial direction of the substrate support portion 11. Also, two or more impedance adjustment electrodes 50 may be provided respectively in the circumferential and radial directions of the substrate support portion 11. Further, the impedance adjustment electrode 50 is arranged parallel to the second bias electrode 35.

[0044] By making the first bias electrode 34 and the second bias electrode 35 as close as possible to the substrate W and the ring assembly 112, the impedance of the capacitor formed by the substrate W, the ring assembly 112, the ceramic of the electrostatic chuck 1111, and the electrodes is reduced. Thereby, the respective potential differences between the first bias electrode 34 and the second bias electrode 35 and the substrate W and the ring assembly 112 are reduced. Similarly, the impedances of the capacitors formed respectively by the first bias electrode 34 and the electrostatic electrode 1111b and by the second bias electrode 35 and the impedance adjustment electrode 50 also become smaller. Also, the impedances of the capacitors formed respectively by the electrostatic electrode 1111b and the substrate W and by the impedance adjustment electrode 50 and the ring assembly 112 become smaller.

[0045] In addition, an impedance adjustment electrode may be provided at the lower part of the substrate support surface 111a, and an impedance adjustment mechanism connected to the impedance adjustment electrode may be provided.

[0046] The gas introduction portion is configured to be able to introduce at least one processing gas from the gas supply portion 20 into the plasma processing space 10s. In one embodiment, the gas introduction portion includes a central gas injector (CGI) 13. The central gas injector 13 is disposed above the substrate support portion 11 and is installed in the central opening formed in the dielectric window 101. The central gas injector 13 has at least one gas supply port 13a, at least one gas flow path 13b, and at least one gas introduction port 13c. The processing gas supplied to the gas supply port 13a is introduced into the plasma processing space 10s from the gas introduction port 13c through the gas flow path 13b. In addition, the gas introduction portion may include one or more side gas injectors (SGIs) installed in one or more openings formed in the side wall 102 in addition to or instead of the central gas injector 13.

[0047] The gas supply unit 20 may also include at least one gas source 21 and at least one flow controller 22. In one embodiment, the gas supply unit 20 is configured to supply at least one processing gas from the respectively corresponding gas sources 21 to the gas introduction unit via the respectively corresponding flow controllers 22. Each flow controller 22 may also include, for example, a mass flow controller or a pressure-controlled flow controller. Further, the gas supply unit 20 may also include one or more flow modulation devices for modulating or pulsing the flow rate of at least one processing gas.

[0048] The power supply 30 includes an RF power supply 31 coupled to the plasma processing chamber 10 via at least one impedance matching circuit. The RF power supply 31 is configured to supply at least one RF signal (RF electric power) to at least one of the first bias electrode 34, the second bias electrode 35, and the antenna 14. Thereby, plasma is formed from at least one processing gas supplied to the plasma processing space 10s. Accordingly, the RF power supply 31 can function as at least a part of a plasma generation unit configured to generate plasma from one or more processing gases in the plasma processing chamber 10. Further, by supplying a bias RF signal to at least one of the first bias electrode 34 and the second bias electrode 35, a bias potential can be generated on the substrate W, and ions in the formed plasma can be introduced to the substrate W.

[0049] In one embodiment, the RF power supply 31 includes a source RF generation unit 31a, a first bias RF generation unit 31b, and a second bias RF generation unit 31c. The source RF generation unit 31a is coupled to the antenna 14 and is configured to generate a source RF signal (source RF electric power) for plasma generation via at least one impedance matching circuit. In one embodiment, the source RF signal has a frequency in the range of 10 MHz to 150 MHz. In one embodiment, the source RF generation unit 31a may be configured to generate a plurality of source RF signals having different frequencies. The generated one or more source RF signals are supplied to the antenna 14.

[0050] The first bias RF generation unit 31b is coupled to the first bias electrode 34 and the second bias electrode 35 via a matching circuit 33, a power supply line 33a, and a susceptor 1110, and is configured to generate a first bias RF signal (hereinafter, also referred to as LF1 electric power). The generated first bias RF signal is supplied to the first bias electrode 34 and the second bias electrode 35. In one embodiment, the first bias RF signal has a frequency lower than that of the source RF signal. In one embodiment, the first bias RF signal has a frequency in the range of 100 kHz to 5 MHz. The generated first bias RF signal is supplied to at least one of the first bias electrode 34 and the second bias electrode 35.

[0051] The second bias RF generation unit 31c is coupled to the first bias electrode 34 and the second bias electrode 35 via the matching circuit 33, the power supply line 33a, and the base 1110, and is configured to be able to generate a second bias RF signal (hereinafter, also referred to as LF2 electric power). The generated second bias RF signal is supplied to the first bias electrode 34 and the second bias electrode 35. The frequency of the second bias RF signal may be the same as or different from the frequency of the source RF signal. The frequency of the second bias RF signal has a frequency higher than the frequency of the first bias RF signal. In one embodiment, the second bias RF signal has a frequency in the range of 1 MHz to 60 MHz. The generated second bias RF signal is supplied to at least one of the first bias electrode 34 and the second bias electrode 35. In addition, in various embodiments, at least one of the source RF signal, the first bias RF signal, and the second bias RF signal may be pulsed. And at least one of the first bias RF signal and the second bias RF signal may have at least two power levels.

[0052] The matching circuit 33 is connected to the first bias RF generation unit 31b, the second bias RF generation unit 31c, and the substrate support unit 11 (base 1110). The matching circuit 33 can supply the first bias RF signal from the first bias RF generation unit 31b to the substrate support unit 11 via the matching circuit 33. In addition, the matching circuit 33 can supply the second bias RF signal from the second bias RF generation unit 31c to the substrate support unit 11 via the matching circuit 33.

[0053] In addition, the power supply 30 may also include a DC power supply 32 coupled to the plasma processing chamber 10. The DC power supply 32 includes a bias DC generation unit 32a. In one embodiment, the bias DC generation unit 32a is connected to at least one of the first bias electrode 34 and the second bias electrode 35 and is configured to be able to generate a bias DC signal. The generated bias DC signal is applied to at least one of the first bias electrode 34 and the second bias electrode 35.

[0054] In various embodiments, the bias DC signal can also be pulsed. In this case, a sequence of voltage pulses is applied to at least one of the first bias electrode 34 and the second bias electrode 35. The voltage pulses can have a pulse waveform that is rectangular, trapezoidal, triangular, or a combination thereof. In one embodiment, a waveform generator for generating a sequence of voltage pulses based on the DC signal is connected between the bias DC generator 32a and at least one of the first bias electrode 34 and the second bias electrode 35. Thus, the bias DC generator 32a and the waveform generator constitute a voltage pulse generator. The voltage pulses can have a positive polarity or a negative polarity. Additionally, the sequence of voltage pulses can also include one or more positive-polarity voltage pulses and one or more negative-polarity voltage pulses within one cycle. Furthermore, the bias DC generator 32a can be provided based on the RF power supply 31, or can be provided instead of at least one of the first bias RF generator 31b and the second bias RF generator 31c. Additionally, in the following description, the first bias signal sometimes includes the first bias RF signal and / or the bias DC signal, and the second bias signal sometimes includes the second bias RF signal and / or the bias DC signal.

[0055] The antenna 14 includes one or more coils. In one embodiment, the antenna 14 can also include an outer coil and an inner coil arranged coaxially. In this case, the RF power supply 31 can be connected to both the outer coil and the inner coil, or can be connected to either the outer coil or the inner coil. In the former case, the same RF generator can be connected to both the outer coil and the inner coil, and another RF generator can also be connected to the outer coil and the inner coil respectively.

[0056] The exhaust system 40 can be connected, for example, to a gas discharge port 10e provided at the bottom of the plasma processing chamber 10. The exhaust system 40 can also include a pressure regulating valve and a vacuum pump. The pressure in the plasma processing space 10s is regulated using the pressure regulating valve. The vacuum pump can also include a turbomolecular pump, a dry pump, or a combination thereof.

[0057] The control unit 2 processes computer-executable commands for causing the plasma processing apparatus 1 to execute various processes described in the present disclosure. The control unit 2 can be configured to control each element of the plasma processing apparatus 1 in such a manner as to execute the various processes described herein. In one embodiment, part or all of the control unit 2 may be included in the plasma processing apparatus 1. The control unit 2 may include a processing unit 2a1, a storage unit 2a2, and a communication interface 2a3. The control unit 2 is implemented by a computer 2a, for example. The processing unit 2a1 can be configured to execute various control actions by reading a program from the storage unit 2a2 and executing the read program. The program may be stored in the storage unit 2a2 in advance, or may be acquired via a medium when needed. The acquired program is stored in the storage unit 2a2, and is read and executed by the processing unit 2a1 from the storage unit 2a2. The medium may be various storage media readable by the computer 2a, or may be a communication line connected to the communication interface 2a3. The processing unit 2a1 may be a CPU (Central Processing Unit). The storage unit 2a2 may also include a RAM (Random Access Memory), a ROM (Read Only Memory), an HDD (Hard Disk Drive), an SSD (Solid State Drive), or a combination thereof. The communication interface 2a3 may communicate with the plasma processing apparatus 1 via a communication line such as a LAN (Local Area Network).

[0058] [Relationship between consumption of edge ring and tilt]

[0059] Next, use Figure 2 to describe the relationship between the consumption of the edge ring and the tilt. Figure 2 is a diagram showing an example of the relationship between the consumption of the edge ring and the tilt. Figure 2 The state 60 shown represents the state of the plasma sheath at the peripheral portion of the substrate W when the edge ring is not consumed. In addition, the state 61 represents the state in which the processing of the substrate W is performed for a predetermined period and the consumption of the edge ring progresses. The state 62 represents the state in which the processing of the substrate W is further performed for a predetermined period from the state 61 and the consumption of the edge ring further progresses.

[0060] In state 60, the height of the upper surface of the unconsumed edge ring 112a is at a position higher than the upper surface of the substrate W. Therefore, the plasma sheath layer 64a is in a state of being lifted from the peripheral portion of the substrate W to the upper surface of the edge ring 112a. At this time, the interval 65 is formed between the upper surface of the edge ring 112a and the plasma sheath layer 64a. In this case, at the peripheral portion of the substrate W, the orientation 66a of the electric field is inclined outward from the substrate W, and as shown by the hole 67a, an external inclination angle is generated in which the bottom of the hole is inclined outward from the substrate W. After that, the consumption of the edge ring 112a progresses, and the edge ring 112b shown in state 61 is formed.

[0061] In state 61, the height of the upper surface of the edge ring 112b is at a position substantially the same as the upper surface of the substrate W. When the bias electric power applied to the edge ring 112b is the same electric power as in state 60, the plasma sheath layer 64b is at substantially the same height as the peripheral portion of the substrate W. At this time, between the upper surface of the edge ring 112b and the plasma sheath layer 64b, since the bias electric power is unchanged, the interval 65 is formed in the same manner as in state 60. In this case, at the peripheral portion of the substrate W, the orientation 66b of the electric field is not inclined, and as shown by the hole 67b, no inclination occurs. After that, the consumption of the edge ring 112b progresses, and the edge ring 112c shown in state 62 is formed.

[0062] In state 62, the height of the upper surface of the edge ring 112c is at a position lower than the upper surface of the substrate W. Therefore, the plasma sheath layer 64c is in a state of descending from the peripheral portion of the substrate W to the upper surface of the edge ring 112c. At this time, between the upper surface of the edge ring 112c and the plasma sheath layer 64c, since the bias electric power is unchanged, the interval 65 is formed in the same manner as in state 60. In this case, at the peripheral portion of the substrate W, the orientation 66c of the electric field is inclined inward from the substrate W, and as shown by the hole 67c, an internal inclination is generated in which the bottom of the hole is inclined inward from the substrate W. In the present embodiment, the bias electric power applied to the ring assembly 112 is adjusted according to the consumption amount of the edge ring included in the ring assembly 112, thereby making the heights of the plasma sheath layers on the upper surfaces of the substrate W and the ring assembly 112 substantially the same. In the present embodiment, the bias electric power applied to the ring assembly 112 is the LF1 electric power and the LF2 electric power, and can be adjusted by the impedance adjustment mechanism 51 connected to the impedance adjustment electrode 50. In addition, in the following description, the edge ring included in the ring assembly 112 may sometimes be simply referred to as the ring assembly 112.

[0063] [Circuit Structure of Impedance Adjustment Mechanism]

[0064] Next, use Figure 3 to describe the circuit structure of the impedance adjustment mechanism 51. Figure 3 is a diagram showing an example of the circuit structure of the impedance adjustment mechanism in the first embodiment. AsFigure 3 As shown, the impedance adjustment mechanism 51 includes a first variable capacitor 52 that controls the first bias RF signal, a second variable capacitor 53 that controls the second bias RF signal, and an isolator 54. In addition, in the following description, 400 kHz is used as an example of the frequency of the first bias RF signal, and 12.88 MHz is used as an example of the frequency of the second bias RF signal.

[0065] The first variable capacitor 52 is configured to control the first bias RF signal (LF1 electric power) on the low-frequency side (400 kHz), and the variable range of the electrostatic capacitance is set to, for example, 200 pF to 2000 pF. The second variable capacitor 53 is configured to control the second bias RF signal (LF2 electric power) on the high-frequency side (12.88 MHz), and the variable range of the electrostatic capacitance is set to, for example, 10 pF to 475 pF. That is, the first variable capacitor 52 can control the high-capacitance range in the impedance adjustment mechanism 51, and the second variable capacitor 53 can control the low-capacitance range in the impedance adjustment mechanism 51. In addition, in the following description, the variable capacitor may be referred to as a variable capacitor (Variable Capacitor (VC)). For example, the first variable capacitor 52 may be referred to as the first variable capacitance 52, and the second variable capacitor 53 may be referred to as the second variable capacitance 53.

[0066] The isolator 54 is connected between the impedance adjustment electrode 50 and the first variable capacitor 52 to block the second bias RF signal. That is, the isolator 54 is connected in series with the first variable capacitor 52 on the side closer to the impedance adjustment electrode 50 than the first variable capacitor 52. In addition, in the impedance adjustment mechanism 51, the first variable capacitor 52 and the isolator 54 are connected in parallel with the second variable capacitor 53 and are connected to the impedance adjustment electrode 50.

[0067] The isolator 54 includes a capacitor 54a and a coil 54b. The capacitor 54a and the coil 54b form a parallel resonance circuit. By setting the frequency (12.88 MHz) of the second bias RF signal as the resonance frequency, the isolator 54 can block the second bias RF signal flowing from the impedance adjustment mechanism 51 side. In addition, the resonance frequency of the parallel resonance circuit of the isolator 54 may also be a frequency near the frequency of the second bias RF signal. For example, when the frequency of the second bias RF signal is 12.88 MHz, the resonance frequency of the parallel resonance circuit of the isolator 54 may also be 13 MHz. In addition, the isolator 54 may also be, for example, a low-pass filter formed by using a coil or the like that allows the first bias RF signal to pass through and blocks the second bias RF signal.

[0068] In addition, the first variable capacitor 52 and the second variable capacitor 53 may also be circuit structures of other types including other circuit constants. In this case, the first variable capacitor 52 and the second variable capacitor 53 can be respectively represented as the first impedance adjustment mechanism 52 and the second impedance adjustment mechanism 53. Use Figure 4 Explain a modified example of the circuit structure in the case where the first impedance adjustment mechanism 52 and the second impedance adjustment mechanism 53 are assumed.

[0069] Figure 4 FIG. is another example of the circuit structure of the impedance adjustment mechanism in the first embodiment. As Figure 4 shown, various structures such as circuits 170 to 174 can be considered for the first impedance adjustment mechanism 52 and the second impedance adjustment mechanism 53. Circuit 170 is an LC series circuit using an inductor and a variable capacitor. Circuit 171 is an RC series circuit using a resistor and a variable capacitor. Circuit 172 is an RR series circuit using a resistor and a variable resistor. Circuit 173 is a circuit that can switch between an LC series circuit for high frequency and an RR series circuit for low frequency by a switch SW. Circuit 174 is a circuit that can switch between an LC series circuit for high efficiency (inductor L1, variable capacitor C1) and an LC series circuit for low efficiency (inductor L2, variable capacitor C2) by a switch SW. Circuit 174 broadens the adjustment range by switching the switch SW as shown in the graph 175. In addition, although not illustrated in Figure 4 , the impedance adjustment mechanisms 52 and 53 may also be circuit structures using variable inductors.

[0070] Thus, in the first impedance adjustment mechanism 52 and the second impedance adjustment mechanism 53, variable resistors, variable capacitors, variable inductors, etc. can be used regardless of the type (R, L, C) of the circuit constant to be adjusted. In addition, the first impedance adjustment mechanism 52 and the second impedance adjustment mechanism 53 may also combine one or more variable mechanisms (variable resistors, variable capacitors, variable inductors, etc.) in accordance with the frequency of the bias RF signal, component size, and adjustment range. Furthermore, since the first impedance adjustment mechanism 52 and the second impedance adjustment mechanism 53 do not require a heater current to flow, variable resistors and variable capacitors can be used. Also, the first impedance adjustment mechanism 52 and the second impedance adjustment mechanism 53 may be constituted by at least one of a variable resistor, a variable capacitor, a variable inductor, and a DC power supply. For example, when the bias RF signal is high frequency, the impedance between the second bias electrode 35 and the impedance adjustment electrode 50 and the impedance between the impedance adjustment electrode 50 and the ring assembly 112 become small values. Therefore, by controlling the potential using a DC power supply, the potential can be controlled more effectively.

[0071] Here, use Figure 5 and Figure 6, the control range of the first variable capacitor 52 in the first bias RF signal and the second bias RF signal will be described. Figure 5 and Figure 6 is a graph showing an example of the relationship between the electrostatic capacitance and reactance of a variable capacitor. Figure 5 The graph 70 shown represents the relationship between the electrostatic capacitance C and the reactance X of the first variable capacitor 52 in the first bias RF signal (400 kHz). As shown in the graph 70, for the first bias RF signal (400 kHz), the control range 71 of the reactance X can take about 900 Ω. The electrostatic capacitance C corresponding to the control range 71 is about 350 pF to 3000 pF. In addition, if the lower limit of the electrostatic capacitance C is expanded to about 200 pF, the control range 71 of the reactance X can be expanded to about 1500 Ω. Therefore, as described above, the variable range of the first variable capacitor 52 can be made 200 pF to 2000 pF.

[0072] Figure 6 The graph 72 shown represents the relationship between the electrostatic capacitance C and the reactance X of the first variable capacitor 52 in the second bias RF signal (12.88 MHz). As shown in the graph 72, for the second bias RF signal (12.88 MHz), the control range 73 of the reactance X is about 50 Ω. The electrostatic capacitance C corresponding to the control range 73 is about 150 pF to 500 pF. That is, the first variable capacitor 52 is in a state where there is almost no control range with respect to the second bias RF signal (12.88 MHz). Considering this is the influence of parasitic capacitance. Therefore, for the second bias RF signal (12.88 MHz), the side of the first variable capacitor 52 is blocked by the isolator 54, and the second variable capacitor 53 is used to adjust the impedance.

[0073] Next, use Figure 7 and Figure 8 to describe the influence of the change in the electrostatic capacitance of the first variable capacitor 52 relative to the second variable capacitor 53 when supplying the second bias RF signal (12.88 MHz). Figure 7 and Figure 8 are graphs showing an example of the influence between multiple variable capacitors. In Figure 7In the shown graph 74, it shows the respective currents of the first variable capacitor 52, the second variable capacitor 53, and the plasma when the first variable capacitor 52 is set to 200 pF and the second bias RF signal is supplied, and the capacitance C of the second variable capacitor 53 changes. Graph 75 shows the current on the second variable capacitor 53 side. Graph 76 shows the current of the plasma. Graph 77 shows the current on the first variable capacitor 52 side. As shown in graphs 75 to 77, when the capacitance C of the second variable capacitor 53 is changed from 10 pF to 475 pF, the current of the plasma decreases, and the current on the second variable capacitor 53 side increases. On the other hand, almost no current flows on the first variable capacitor 52 side and it does not change.

[0074] In Figure 8 the shown graph 78, it shows the respective currents of the first variable capacitor 52, the second variable capacitor 53, and the plasma when the first variable capacitor 52 is set to 2000 pF and the second bias RF signal is supplied, and the capacitance C of the second variable capacitor 53 changes. Graph 75a shows the current on the second variable capacitor 53 side. Graph 76a shows the current of the plasma. Graph 77a shows the current on the first variable capacitor 52 side. As shown in graphs 75a to 77a, when the capacitance C of the second variable capacitor 53 is changed from 10 pF to 475 pF, the current of the plasma decreases, and the current on the second variable capacitor 53 side increases. On the other hand, almost no current flows on the first variable capacitor 52 side and it does not change. Thus, it can be known that in the impedance adjustment mechanism 51, the isolator 54 functions, and even if the capacitance C of the first variable capacitor 52 changes from 200 pF to 2000 pF, it does not affect the second bias RF signal. That is, it can be known that even if the capacitance C of the first variable capacitor 52 can be changed to a high capacitance, current will not flow into the first variable capacitor 52 side.

[0075] [Adjustment Example of Variable Capacitor]

[0076] Next, an adjustment example of the first variable capacitor 52 and the second variable capacitor 53 will be described using Figure 9 FIG. is a diagram showing an example of the adjustment of a plurality of variable capacitors in the first embodiment. In Figure 9 it, from the left side to the right side of the figure, an adjustment example of the capacitances of the first variable capacitor 52 and the second variable capacitor 53 corresponding to the consumption amount of the edge ring included in the ring assembly 112 is shown. In addition, in Figure 9 FIG., the first bias electrode 34, the second bias electrode 35, and the electrostatic electrode 1111b are omitted, and the flow of the LF1 electric power and the LF2 electric power is indicated by hollow arrows. In addition, the flow of the LF1 electric power and the LF2 electric power is Figure 9 FIG., Figure 9The relative performance in [it] is not limited thereto. In addition, the LF1 electric power and the LF2 electric power can be supplied simultaneously or can be switched for supply.

[0077] First, Figure 9 The case of the unconsumed edge ring 112d on the left side in [it] will be described. The electrostatic capacitances of the first variable capacitor 52 and the second variable capacitor 53 are adjusted so that the plasma sheath layer 64d has a certain height above the substrate W and above the edge ring 112d. For example, the first variable capacitor 52 is adjusted to 2000 pF, and the second variable capacitor 53 is adjusted to 475 pF. When the LF2 electric power (12.88 MHz) is supplied to the impedance adjustment electrode 50, the LF2 electric power flows more to the impedance adjustment mechanism 51 side than to the edge ring 112d side. That is, the LF2 electric power flows more to the second variable capacitor 53 side adjusted to 475 pF than to the edge ring 112d side. In addition, since the LF2 electric power is blocked by the isolator 54, it hardly flows to the first variable capacitor 52 side. That is, when the LF2 electric power is supplied to the impedance adjustment electrode 50, the impedance adjustment mechanism 51 appears as a capacitive load with an electrostatic capacitance of 475 pF.

[0078] When the LF1 electric power (400 kHz) is supplied to the impedance adjustment electrode 50, the LF1 electric power flows more to the impedance adjustment mechanism 51 side than to the edge ring 112d side. That is, the LF1 electric power flows more to the first variable capacitor 52 adjusted to 2000 pF and the second variable capacitor 53 adjusted to 475 pF than to the edge ring 112d side. In addition, the LF1 electric power is not blocked by the isolator 54 and flows more to the first variable capacitor 52 side than to the second variable capacitor 53 side. That is, when the LF1 electric power is supplied to the impedance adjustment electrode 50, the impedance adjustment mechanism 51 appears as a capacitive load with an electrostatic capacitance of 2475 pF.

[0079] Next, Figure 9The case of the central consumption-intensified edge ring 112e will be described. The electrostatic capacitances of the first variable capacitor 52 and the second variable capacitor 53 are adjusted so that the plasma sheath layer 64e has a certain height above the substrate W and above the edge ring 112e. For example, the first variable capacitor 52 is adjusted to 1000 pF, and the second variable capacitor 53 is adjusted to 200 pF. When LF2 electric power (12.88 MHz) is supplied to the impedance adjustment electrode 50, the LF2 electric power flows to the edge ring 112e side and the impedance adjustment mechanism 51 side to the same extent. That is, the LF2 electric power flows to the edge ring 112e side and the second variable capacitor 53 side adjusted to 200 pF to the same extent. In addition, since the LF2 electric power is blocked by the isolator 54, it hardly flows to the first variable capacitor 52 side. That is, when LF2 electric power is supplied to the impedance adjustment electrode 50, the impedance adjustment mechanism 51 appears to be a capacitive load with an electrostatic capacitance of 200 pF.

[0080] When LF1 electric power (400 kHz) is supplied to the impedance adjustment electrode 50, the LF1 electric power flows to the edge ring 112e side and the impedance adjustment mechanism 51 side to the same extent. That is, the LF1 electric power flows to the edge ring 112e side, the first variable capacitor 52 adjusted to 1000 pF, and the second variable capacitor 53 adjusted to 200 pF to the same extent. In addition, the LF1 electric power is not blocked by the isolator 54 and flows more to the first variable capacitor 52 side than to the second variable capacitor 53 side. That is, when LF1 electric power is supplied to the impedance adjustment electrode 50, the impedance adjustment mechanism 51 appears to be a capacitive load with an electrostatic capacitance of 1200 pF.

[0081] Next, the Figure 9 case of the further consumed edge ring 112f on the right side will be described. The electrostatic capacitances of the first variable capacitor 52 and the second variable capacitor 53 are adjusted so that the plasma sheath layer 64f has a certain height above the substrate W and above the edge ring 112f. For example, the first variable capacitor 52 is adjusted to 200 pF, and the second variable capacitor 53 is adjusted to 10 pF. When LF2 electric power (12.88 MHz) is supplied to the impedance adjustment electrode 50, the LF2 electric power flows more to the edge ring 112f side than to the impedance adjustment mechanism 51 side. That is, the LF2 electric power flows more to the edge ring 112f side than to the second variable capacitor 53 side adjusted to 10 pF. In addition, since the LF2 electric power is blocked by the isolator 54, it hardly flows to the first variable capacitor 52 side. That is, when LF2 electric power is supplied to the impedance adjustment electrode 50, the impedance adjustment mechanism 51 appears to be a capacitive load with an electrostatic capacitance of 10 pF.

[0082] When supplying LF1 electric power (400 kHz) to the impedance adjustment electrode 50, more LF1 electric power flows to the edge ring 112f side than to the impedance adjustment mechanism 51 side. That is, more LF1 electric power flows to the edge ring 112f side than to the side of the first variable capacitor 52 adjusted to 200 pF and the second variable capacitor 53 adjusted to 10 pF. In addition, the LF1 electric power is not blocked by the isolator 54 and flows more to the first variable capacitor 52 side than to the second variable capacitor 53 side. That is, when LF1 electric power is supplied to the impedance adjustment electrode 50, the impedance adjustment mechanism 51 appears as a capacitive load with a capacitance of 210 pF.

[0083] Thus, in Figure 9 the adjustment example, for the LF1 electric power, the variable range of the capacitance of the impedance adjustment mechanism 51 is 210 pF to 2475 pF. In addition, for the LF2 electric power, the variable range of the capacitance of the impedance adjustment mechanism 51 is 10 pF to 475 pF. That is, the plasma processing apparatus 1 of the present embodiment can improve the controllability of a plurality of bias RF signals having different frequencies.

[0084] (Modification Example 1)

[0085] Next, Figures 10 to 12 a modification example 1 of the first embodiment will be described. In modification example 1, a countermeasure example is shown regarding the fact that the height of the plasma sheath layer above the ring assembly 112 is likely to be lower than the height of the plasma sheath layer above the substrate W by providing the impedance adjustment electrode 50 and the impedance adjustment mechanism 51. In addition, for the impedance adjustment electrode 50, there is also a method of supplying bias electric power to the ring assembly 112 from a power source different from the first bias RF generation unit 31b and the second bias RF generation unit 31c, but the edge ring is likely to be consumed.

[0086] In Modification 1, the initial thickness of the edge ring of the ring assembly 112 is made thicker than that in the first embodiment. For example, in a state where it is assumed that the impedance adjustment mechanism 51 is not provided, the initial thickness of the edge ring is set such that the height of the plasma sheath layer above the ring assembly 112 is higher than the height of the plasma sheath layer above the substrate W. That is, the initial thickness of the edge ring that becomes outwardly inclined in a state where the impedance adjustment mechanism 51 is not provided is set. In Modification 1, in the initial state, by setting the impedance adjustment mechanism 51 to a low impedance (large electrostatic capacitance C), the height of the plasma sheath layer above the ring assembly 112 is made substantially the same as the height of the plasma sheath layer above the substrate W. That is, in the initial state, the inclination angle of the peripheral portion of the substrate W becomes a vertical state. Thereafter, according to the consumption amount of the edge ring, the impedance adjustment mechanism 51 is adjusted toward a high impedance (small electrostatic capacitance C) side, whereby the height of the plasma sheath layer above the ring assembly 112 is made substantially the same as the height of the plasma sheath layer above the substrate W. That is, according to the consumption amount of the edge ring, the impedance adjustment mechanism 51 is adjusted toward a high impedance (small electrostatic capacitance C) side to correct the inclination angle.

[0087] Here, Figure 10 and Figure 11 are used to describe the passage of time of the consumption amount of the edge ring and the bias electric power. Figure 10 is a diagram showing an example of the consumption amount of the edge ring in the reference example. Figure 10 The reference example of Figure 10 is a case where the impedance adjustment mechanism 51 is not provided in the edge ring. Figure 10 shown in the graph 80 represents the relationship between the bias electric power supplied to the edge ring and the use time in the reference example. In addition, the area 80a of the graph 80 represents the cumulative amount of the consumption amount of the edge ring with respect to the use time. As shown in the graph 80, in the reference example, regardless of the use time, a certain bias electric power (represented as 100% in Figure 10 ) is supplied to the edge ring, so the consumption amount of the edge ring also becomes constant regardless of the use time.

[0088] Figure 11 is a diagram showing an example of the consumption amount of the edge ring in Modification 1. Figure 11 In Modification 1 of Figure 11The graph 81 shown represents the relationship between the bias electric power supplied to the edge ring in Modification 1 and the usage time. In addition, the bias electric power includes the LF1 electric power and the LF2 electric power. Further, the area 81a of the graph 81 represents the accumulation of the consumption amount of the edge ring with respect to the usage time. As shown in the graph 81, in Modification 1, when the consumption amount of the edge ring is small, the impedance adjustment mechanism 51 is adjusted to a low impedance so that the bias electric power supplied to the edge ring side becomes less. In Modification 1, thereafter, according to the consumption amount of the edge ring, the impedance adjustment mechanism 51 is adjusted to a high impedance in stages. When comparing the area 80a of the reference example with the area 81a of Modification 1, the area 81a is smaller, and in Modification 1, the life of the edge ring of the ring assembly 112 can be extended.

[0089] Figure 12 is a diagram showing an example of the relationship between the sheath potential and the capacitance of the variable capacitor in Modification 1. As Figure 12 shown in the graph 82, when the impedance adjustment mechanism 51 in Modification 1 is at a low impedance, for example, when the electrostatic capacitance C is 2000 pF, the sheath potential of the upper part of the edge ring of the ring assembly 112 becomes smaller than the sheath potential of the upper part of the substrate W. Further, in the graph 82, the absolute value of the sheath potential is normalized within a specified range for representation. That is, the distance between the upper surface of the edge ring of the ring assembly 112 and the plasma sheath is smaller than the distance between the upper surface of the substrate W and the plasma sheath. Since the upper surface of the edge ring of the ring assembly 112 is initially higher than the upper surface of the substrate W in Modification 1, the difference in the distance between the plasma sheath and the substrate W is compensated by the thickness of the edge ring of the ring assembly 112. That is, considering the thickness of the edge ring of the ring assembly 112, the height of the plasma sheath above the ring assembly 112 and the height of the plasma sheath above the substrate W are adjusted to be substantially the same. Thereafter, according to the consumption amount of the edge ring of the ring assembly 112, the impedance adjustment mechanism 51 is adjusted to the high impedance (small electrostatic capacitance C) side. That is, according to the consumption amount of the edge ring of the ring assembly 112, the height of the plasma sheath above the ring assembly 112 and the height of the plasma sheath above the substrate W are adjusted to be substantially the same.

[0090] (Modification 2)

[0091] Next, Figure 13 and Figure 14 are used to describe Modification 2 of the first embodiment. In Modification 2, a countermeasure example for the deviation of the etching rate caused by the layout of the conductive strip connecting the impedance adjustment electrode 50 and the impedance adjustment mechanism 51 is shown.

[0092] First, Figure 13 is used to describe the deviation of the etching rate. Figure 13 is a diagram showing an example of the deviation of the etching rate.Figure 13 This shows an example of the deviation in the etching rate of the substrate W in the electrostatic chuck 1111 when viewed from above without adjustment based on the impedance adjustment mechanism 51. In addition, in Figure 13 , the difference in the etching rate is represented by the difference in the hatching. As Figure 13 shown, an introduction electrode 35a connected to the second bias electrode 35, an impedance adjustment mechanism 51, and an arc-shaped conductive bar 55 connected to the impedance adjustment mechanism 51 are disposed below the substrate support surface 111a. The introduction electrode 35a forms a part of the circuit path 38 and is connected to the first bias RF generation unit 31b and the second bias RF generation unit 31c. In addition, the conductive bar 55 is disposed along the inner peripheral side of the ring assembly 112 from the connection portion connected to the impedance adjustment mechanism 51 and is connected to the impedance adjustment electrode 50 near the introduction electrode 35a. The other end of the impedance adjustment mechanism 51 is electrically connected to the outside of the electrostatic chuck 1111 and grounded. As Figure 13 shown, the etching rate of the substrate W deviates in the 9 o'clock to 12 o'clock direction when viewed from above where the impedance adjustment mechanism 51 and the conductive bar 55 are located.

[0093] Figure 14 This is a diagram showing an example of the arrangement of the conductive bar in Modification 2. In Figure 14 the electrostatic chuck 1111c of Modification 2 shown, an introduction electrode 35a, an impedance adjustment mechanism 51, and an arc-shaped conductive bar 56 are disposed from the peripheral portion of the central region 111c to the lower portion of the ring assembly 112 (the annular region 111b). The introduction electrode 35a connected to the second bias electrode 35 forms a part of the circuit path 38 and is connected to the first bias RF generation unit 31b and the second bias RF generation unit 31c. In addition, the conductive bar 56 connected to the impedance adjustment mechanism 51 is disposed substantially over a full circumference along the inner peripheral side of the ring assembly 112 from the first connection portion 56a connected to the impedance adjustment mechanism 51. The conductive bar 56 is connected to the impedance adjustment electrode 50 through the second connection portion 56b connected to the impedance adjustment electrode 50 near the introduction electrode 35a. That is, the conductive bar 56 is disposed along the inner peripheral side of the annular region 111b (the second region) and has a first connection portion 56a connected to the impedance adjustment mechanism 51 and a second connection portion 56b connected to the impedance adjustment electrode 50. In addition, the first connection portion 56a and the second connection portion 56b of the conductive bar 56 are adjacent in the circumferential direction with a gap 56c therebetween, which is the unconnected portion in the circumferential direction between the first connection portion 56a and the second connection portion 56b. The other end of the impedance adjustment mechanism 51 is electrically connected to the outside of the electrostatic chuck 1111c and grounded. In the conductive bar 56, current flows in the direction of the arrow 56d, so that the deviation in the etching rate of the substrate W in the circumferential direction caused by the magnetic field generated by the current can be suppressed.

[0094] (Modification 3)

[0095] Next, Figure 15 a modification example 3 of the first embodiment will be described. In modification example 3, similar to modification example 2, a countermeasure example for the deviation of the etching rate caused by the layout of the conductive strips connecting the impedance adjustment electrode 50 and the impedance adjustment mechanism 51 is shown.

[0096] Figure 15 is a diagram showing an example of the configuration of the conductive strips in modification example 3. In Figure 15 the electrostatic chuck 1111d of modification example 3 shown, a plurality of introduction electrodes 35b connected to the second bias electrode 35 and the impedance adjustment mechanism 51a are arranged at the lower part of the central region 111d. In addition, an arc-shaped first conductive strip 57 connected to the impedance adjustment mechanism 51a and a plurality of second conductive strips 58 arranged toward the center of the central region 111d are arranged at the lower part of the central region 111d. The plurality of second conductive strips 58 have first connection portions 58a respectively connected to the impedance adjustment mechanism 51a. In addition, the other end of the impedance adjustment mechanism 51a is electrically connected to the outside of the electrostatic chuck 1111d and grounded.

[0097] The introduction electrodes 35b form a part of the circuit path 38 and are connected to the first bias RF generation unit 31b and the second bias RF generation unit 31c. The first conductive strip 57 is arranged to extend around along the inner peripheral side of the ring assembly 112. The first conductive strip 57 has a plurality of second connection portions 57b connected to the impedance adjustment electrode 50 at the connection portion 57a respectively connected to the plurality of second conductive strips 58. In addition, the impedance adjustment electrode 50 may be, for example, a plurality of impedance adjustment electrodes divided in the circumferential direction. In this case, the plurality of impedance adjustment electrodes are respectively the second connection portions 57b.

[0098] In other words, the electrostatic chuck 1111d has: a first conductive strip 57 arranged in the circumferential direction along the inner peripheral side of the annular region 111b (second region); and a plurality of second conductive strips 58 arranged from the first conductive strip 57 toward the center of the base 1110 of the substrate support portion 11. In addition, the plurality of second conductive strips 58 have first connection portions 58a respectively connected to the impedance adjustment mechanism 51a. In addition, the first conductive strip 57 has a plurality of second connection portions 57b connected to the plurality of impedance adjustment electrodes 50 at the connection portion 57a respectively connected to the plurality of second conductive strips 58. In this way, the first conductive strip 57 and the plurality of second conductive strips 58 have: with respect to the impedance adjustment mechanism 51a arranged at the center of the central region 111d, the plurality of introduction electrodes 35b connected to the impedance adjustment electrode 50 are arranged equally. Thus, the first conductive strip 57 and the plurality of second conductive strips 58 can suppress the deviation of the etching rate of the substrate W in the circumferential direction.

[0099] (Modification example 4)

[0100] Next, use Figure 16 to describe Modification Example 4 of the first embodiment. In Modification Example 4, similar to Modification Example 2, it shows a countermeasure example for the deviation of the etching rate caused by the layout of the conductive strips connecting the impedance adjustment electrode 50 and the impedance adjustment mechanism 51.

[0101] Figure 16 is a diagram showing an example of the configuration of the conductive strips in Modification Example 4. In Figure 16 the shown Modification Example 4, a conductive strip 59 is disposed below the base 1110 of the main body portion 111. The conductive strip 59 is arranged along the ring assembly 112, i.e., the annular region 111b (second region), in a manner having multiple turns. That is, the diameter of the conductive strip 59 can be set, for example, to be equal to or less than the diameter of the electrostatic chuck 1111 and equal to or more than 1 / 2 of the diameter of the central region 111a. One end of the conductive strip 59 is connected to the impedance adjustment electrode 50, and the other end is connected to the impedance adjustment mechanism 51. In addition, the other end of the impedance adjustment mechanism 51 is electrically connected to the outside of the plasma processing chamber 10 and grounded. In this way, in the conductive strip 59, the current flows in a coil shape along the ring assembly 112, so that the deviation of the etching rate of the substrate W in the circumferential direction can be suppressed.

[0102] In addition, in Modification Example 4, similar to the first embodiment, the LF1 electric power and the LF2 electric power supplied from the first bias RF generation unit 31b and the second bias RF generation unit 31c are supplied to the first bias electrode 34 and the second bias electrode 35 via the circuit path 38. That is, the LF1 electric power and the LF2 electric power are supplied to the first bias electrode 34 and the second bias electrode 35 via the circuit path 38 formed by the base 1110 and the conductors 36b, 37b.

[0103] (Modification Example 5)

[0104] Next, use Figure 17 to describe Modification Example 5 of the first embodiment. In Modification Example 5, it shows a countermeasure example for the deviation of the etching rate caused by the layout of the conductive strips connecting the impedance adjustment electrode 50 and the impedance adjustment mechanism 51 and the power loss caused by the spatial propagation of the RF electric power from the base 1110 to the conductive strips.

[0105] Figure 17 is a diagram showing an example of the configuration of the conductive strips in Modification Example 5. In Figure 17In the fifth modification shown, similarly to the fourth modification, a conductive bar 56e is disposed below the base 1110 of the main body 111. The conductive bar 56e is disposed so as to follow the ring assembly 112, i.e., the annular region 111b (second region). That is, the diameter of the conductive bar 56e can be set, for example, to be equal to or less than the diameter of the electrostatic chuck 1111 and equal to or more than 1 / 2 of the diameter of the central region 111a. One end 56g of the conductive bar 56e is connected to the impedance adjustment electrode 50, and the other end 56f is connected to the impedance adjustment mechanism 51. In addition, the other end of the impedance adjustment mechanism 51 is electrically connected to the outside of the plasma processing chamber 10 and grounded.

[0106] The conductive bar 56e has the same shape as the conductive bar 56 of the second modification. With a gap 56h, which is an unconnected portion in the circumferential direction between the end 56g and the end 56f, the end 56g and the end 56f are adjacent to each other in the circumferential direction. The conductive bar 56e is used as an open-loop resonator. This open-loop resonator is configured to have a resonance frequency that resonates with the LF2 electric power when the impedance adjustment mechanism 51 adjusts the LF1 electric power. That is, the resonance frequency of the open-loop resonator is the frequency of the second bias RF signal. The resonance frequency of the open-loop resonator can be the frequency of the RF signal (RF electric power) for generating plasma. Thus, by causing the conductive bar 56e to function as an open-loop resonator, the spatial propagation 83 of the RF electric power from the HOT portion such as the base 1110 to the conductive bar 56e can be suppressed, and thus the power loss of the RF electric power can be suppressed. In addition, since the current flows in a circumferential shape along the ring assembly 112 in the conductive bar 56e, the deviation in the etching rate of the substrate W in the circumferential direction can be suppressed.

[0107] (Sixth modification)

[0108] Next, Figure 18 , the sixth modification of the first embodiment will be described. The sixth modification is a case where the power of the electrical bias output from the first bias RF generation unit 31b, the second bias RF generation unit 31c, and / or the bias DC generation unit 32a is controlled. In Figure 18 , as an example, the first bias RF generation unit 31b and the second bias RF generation unit 31c are shown.

[0109] Figure 18 is a diagram showing an example of the structure of the circuit path in the sixth modification. As Figure 18 shown, in the plasma processing apparatus 1 of the sixth modification, in the circuit path 38, a measurement unit 46 is provided between the first bias RF generation unit 31b and the second bias RF generation unit 31c and the base 1110. In addition, in the plasma processing apparatus 1 of the sixth modification, a high-voltage probe 47 may be provided between the base 1110 and the ground (earth).

[0110] The measuring unit 46 is, for example, a VI probe, and is controlled to measure the voltage and current of the bias RF signal and / or the bias DC signal output from the first bias RF generation unit 31b, the second bias RF generation unit 31c, and / or the bias DC generation unit 32a. That is, the measuring unit 46 is controlled to measure the power of the bias RF signal and / or the bias DC signal. The measuring unit 46 outputs the measured voltage and current to the control unit 2. That is, the measuring unit 46 is configured to be able to measure the voltage and current of the bias RF signal and / or the bias DC signal output from the bias power supply.

[0111] The high-voltage probe 47 is controlled to measure the potential (Vpp) of the base 1110. In addition, for example, the relationship between the voltage of the bias RF signal and / or the bias DC signal measured by the measuring unit 46 and the potential (Vpp) of the base 1110 measured by the high-voltage probe 47 can be measured in advance, so that the high-voltage probe 47 can be removed during the process execution. In this case, the control unit 2 can estimate the potential (Vpp) of the base 1110 based on the relationship between the voltage of the bias RF signal and / or the bias DC signal measured in advance by the measuring unit 46 and the potential (Vpp) of the base 1110 measured in advance.

[0112] In Modification 6, when adjusting the impedance adjusting mechanism 51, the control unit 2 controls the first bias RF generation unit 31b, the second bias RF generation unit 31c, and / or the bias DC generation unit 32a based on the voltage and current input from the measuring unit 46. That is, the first bias RF generation unit 31b, the second bias RF generation unit 31c, and / or the bias DC generation unit 32a control (feedback control) the power of the bias RF signal and / or the bias DC signal based on the voltage and current measured by the measuring unit 46 so that the potentials of the first bias electrode 34 and the second bias electrode 35 become preset values. Here, the preset value is, for example, the value when the potential (Vpp) of the base 1110 measured by the high-voltage probe 47 becomes a desired potential. In addition, in Modification 6, it can be considered that the potentials of the first bias electrode 34 and the second bias electrode 35 are substantially equal to the potential (Vpp) of the base 1110 and the potential (Vdc) of the substrate W and the ring assembly 112.

[0113] That is, the plasma processing apparatus 1 further includes a measurement unit 46 configured to measure the voltage and current of a bias RF signal output from at least one of a first bias power source (first bias RF generation unit 31b) and a second bias power source (second bias RF generation unit 31c). The bias power source is configured to control the power of the bias RF signal based on the voltage and current measured by the measurement unit 46 when adjusting the impedance adjustment mechanism 51, so that the potentials of the first bias electrode 34 and the second bias electrode 35 become preset values. In addition, the plasma processing apparatus 1 further includes a measurement unit 46 configured to measure the voltage and current of a bias DC signal output from at least one of the first bias power source and the second bias power source (bias DC generation unit 32a). The bias power source is configured to control the power of the bias DC signal based on the voltage and current measured by the measurement unit 46 when adjusting the impedance adjustment mechanism 51, so that the power supplied to the first bias electrode 34 and the second bias electrode 35 becomes a preset value.

[0114] (Second Embodiment)

[0115] In the above-described first embodiment, the second bias electrode 35 is always connected to the susceptor 1110, but a switch may be provided to switch on / off according to the frequency of the bias RF signal. The embodiment in this case will be described as the second embodiment. In addition, the plasma processing apparatus in the second embodiment is the same as the above-described first embodiment except for the switch provided in the conductor 37b connecting the susceptor 1110 and the second bias electrode 35, so the description of its repeated structure and operation is omitted.

[0116] Figure 19 is a diagram showing an example of the structure of the plasma processing apparatus in the second embodiment. As Figure 19 shown, the plasma processing apparatus 1a in the second embodiment is provided with a switch 37c in the conductor 37b of the first embodiment.

[0117] The switch 37c is provided in the conductor 37b connecting the susceptor 1110 and the second bias electrode 35. The switch 37c is provided, for example, between the connection portion of the conductor 37b connected to the susceptor 1110 and the opening of the through hole 37a. When supplying LF1 electric power, the switch 37c is controlled to be turned on, and the LF1 electric power is supplied to the second bias electrode 35. On the other hand, when supplying LF2 electric power, the switch 37c is controlled to be turned off, and the LF2 electric power is not supplied to the second bias electrode 35. That is, the LF1 electric power is supplied to the first bias electrode 34 and the second bias electrode 35, and the LF2 electric power is supplied to the first bias electrode 34 but not to the second bias electrode 35.

[0118] Figure 20 This is a diagram showing an example of the independent controllability on the edge ring side in the second embodiment. Figure 20 Table 90 shown below summarizes the controllability of the sheath potential (indicated by "Vdc" in Table 90) when the switch 37c is turned on / off under the condition that the LF2 electric power of 12.88 MHz and 20 W is supplied. In Table 90, as shown in the connection example, the case where the impedance adjustment electrode 50 has the inner peripheral side adjustment electrode 50A and the outer peripheral side adjustment electrode 50B is studied. In addition, a switch 51b is provided between the adjustment electrode 50A and the impedance adjustment mechanism 51. In Table 90, the adjustment electrodes 50A and 50B are respectively represented as adjustment electrode A and adjustment electrode B, and the second bias electrode 35 is represented as the ER bias electrode. In Table 90, since no switch is provided on the adjustment electrode 50B, the adjustment electrode 50B is in a state of being connected to the impedance adjustment mechanism 51 (represented by "on" in Table 90). In Table 90, the first bias electrode 34 and the second bias electrode 35 have the same potential.

[0119] In Table 90, the sheath potential (Vdc) when both the switch 37c and the switch 51b are turned on (represented by "on" of the adjustment electrode A and the ER bias electrode in Table 90) is shown by the curve graph 91. In the curve graph 91, the sheath potential at the upper part of the substrate W is shown by the curve graph 92, and the sheath potential at the upper part of the edge ring of the ring assembly 112 is shown by the curve graph 93. By comparing the curve graph 92 and the curve graph 93, it can be seen that the shapes of the curve graphs are the same, and the sheath potential at the upper part of the substrate W also changes following the change of the sheath potential at the upper part of the edge ring of the ring assembly 112. It is considered that this is because, at the LF2 electric power of 12.88 MHz, the impedance between the second bias electrode 35 and the adjustment electrodes 50A and 50B is extremely small. That is, it can be known that at the LF2 electric power, even if the electrostatic capacitance C of the impedance adjustment mechanism 51 is changed to adjust the sheath potential at the upper part of the edge ring of the ring assembly 112, there is no independent controllability for the sheath potential at the upper part of the substrate W. In addition, when both the switch 37c and the switch 51b are turned on, when the LF1 electric power (400 kHz) is supplied, the impedance between the second bias electrode 35 and the adjustment electrodes 50A and 50B is high. Therefore, when the LF1 electric power is supplied, the sheath potential at the upper part of the edge ring of the ring assembly 112 can be independently controlled. In addition, the impedance adjustment mechanism 51 of the second embodiment only needs to include a variable capacitor. For example, as in the first embodiment, the first variable capacitor 52 may be connected in series with the isolator 54, and the second variable capacitor 53 may be connected in parallel. In addition, the impedance adjustment mechanism 51 of the second embodiment may be a single variable capacitor, or a combined circuit of a variable capacitor and a resistor, an inductor, etc.

[0120] In Table 90, the sheath potential (Vdc) is represented by a graph 94 when both the switch 37c and the switch 51b are open (in Table 90, the "open" of the adjustment electrode A and the ER bias electrode is indicated). In the graph 94, the sheath potential at the upper part of the substrate W is represented by a graph 95, and the sheath potential at the upper part of the edge ring of the ring assembly 112 is represented by a graph 96. By comparing the graph 95 and the graph 96, it can be seen that the slopes of the graph 95 and the graph 96 are different, and the sheath potential at the upper part of the edge ring of the ring assembly 112 can be independently controlled with respect to the sheath potential at the upper part of the substrate W. In addition, even when the switch 51b is closed, the sheath potential at the upper part of the edge ring of the ring assembly 112 can be independently controlled with respect to the sheath potential at the upper part of the substrate W. Further, the case where LF1 electric power (400 kHz) is supplied when both the switch 37c and the switch 51b are open is also studied. On the side of the ring assembly 112, the second bias electrode 35 becomes floating, so it is supplied from the base 1110. Therefore, the impedance between the base 1110 and the adjustment electrodes 50A and 50B is high. Therefore, it is considered that even when LF1 electric power is supplied, the sheath potential at the upper part of the edge ring of the ring assembly 112 can be independently controlled.

[0121] Thus, in the plasma processing apparatus 1a of the second embodiment, when the first bias RF signal (LF1 electric power) is supplied, the switch 37c is controlled to be closed, and when the second bias RF signal (LF2 electric power) is supplied, the switch 37c is controlled to be open. Thereby, the controllability of a plurality of bias RF signals having different frequencies can be improved.

[0122] In addition, the above-described embodiments and modification examples can be appropriately combined within a non-contradictory range. For example, the first embodiment and the second embodiment can be combined, or modification examples 1 to 6 of the first embodiment can be combined in the second embodiment.

[0123] As described above, according to the first embodiment, the plasma processing apparatus 1 includes: a chamber (plasma processing chamber 10); a first bias power supply (first bias RF generation unit 31b) configured to be able to supply a first bias signal; a second bias power supply (second bias RF generation unit 31c) configured to be able to supply a second bias signal; a substrate support (substrate support unit 11) that supports a substrate W and an edge ring (ring assembly 112) in the chamber; an impedance adjustment mechanism 51; and a circuit path 38. The substrate support is configured to have: a first region (central region 111a) that supports the substrate W; a second region (annular region 111b) that supports the edge ring provided around the first region; a first bias electrode 34 provided in the first region; a second bias electrode 35 provided in the second region; and an impedance adjustment electrode 50 provided in the second region and grounded. The impedance adjustment mechanism 51 has: a first impedance adjustment mechanism (first variable capacitor 52) that controls the first bias signal; an isolator 54 that is connected between the impedance adjustment electrode 50 and the first impedance adjustment mechanism and blocks the second bias signal; and a second impedance adjustment mechanism (second variable capacitor 53) that controls the second bias signal. The isolator 54, the first impedance adjustment mechanism, and the second impedance adjustment mechanism are connected in parallel and connected to the impedance adjustment electrode 50. The circuit path 38 is configured to be able to connect the first bias power supply and the second bias power supply to the first bias electrode 34 and the second bias electrode 35. As a result, the controllability of a plurality of bias signals (for example, bias RF signals) having different frequencies can be improved.

[0124] In addition, according to the second embodiment, the circuit path 38 is provided with a switch 37c between the first bias power supply and the second bias power supply and the second bias electrode 35. When the first bias signal is supplied, the switch 37c is controlled to be turned on, and when the second bias signal is supplied, the switch 37c is controlled to be turned off. As a result, the sheath potential of the upper part of the edge ring of the ring assembly 112 can be independently controlled with respect to the sheath potential of the upper part of the substrate W.

[0125] In addition, according to each embodiment, the first impedance adjustment mechanism is composed of at least one of a variable resistor, a variable capacitor, and a variable inductor. In addition, the second impedance adjustment mechanism is composed of at least one of a variable resistor, a variable capacitor, and a variable inductor. As a result, the potential of the impedance adjustment electrode can be adjusted.

[0126] In addition, according to the first embodiment, the frequency of the first bias signal is lower than that of the second bias signal. The first impedance adjustment mechanism is constituted by a first variable capacitor 52, and the second impedance adjustment mechanism is constituted by a second variable capacitor 53. The variable range of the capacitance of the first variable capacitor 52 is larger than that of the capacitance of the second variable capacitor 53. As a result, the controllability of the sheath potential on the side of the loop assembly 112 can be improved for either the first bias signal or the second bias signal.

[0127] In addition, according to the first embodiment, the isolator 54 includes a resonance circuit having a resonance frequency of the frequency of the second bias signal. As a result, the second bias signal can be blocked by the first variable capacitor 52.

[0128] In addition, according to the second embodiment, the plasma processing apparatus 1a includes: a chamber (plasma processing chamber 10); a first bias power supply (first bias RF generation unit 31b) configured to be able to supply a first bias signal; a second bias power supply (second bias RF generation unit 31c) configured to be able to supply a second bias signal; a substrate support (substrate support unit 11) that supports the substrate W and the edge ring (loop assembly 112) in the chamber; an impedance adjustment mechanism 51; and a circuit path 38. The substrate support is configured to have: a first region (central region 111a) that supports the substrate W; a second region (ring-shaped region 111b) that supports the edge ring provided around the first region; a first bias electrode 34 provided in the first region; a second bias electrode 35 provided in the second region; and an impedance adjustment electrode 50 provided in the second region and grounded. The impedance adjustment mechanism 51 is configured to be connected to the impedance adjustment electrode 50. The circuit path 38 is configured to be able to connect the first bias power supply and the second bias power supply to the first bias electrode 34 and the second bias electrode 35. A switch 37c is provided between the first bias power supply and the second bias power supply and the second bias electrode 35. When the first bias signal is supplied, the switch 37c is controlled to be turned on, and when the second bias signal is supplied, the switch 37c is controlled to be turned off. As a result, the sheath potential on the upper part of the edge ring of the loop assembly 112 can be independently controlled with respect to the sheath potential on the upper part of the substrate W.

[0129] In addition, according to the first embodiment, the impedance adjustment mechanism 51 has: a first impedance adjustment mechanism (first variable capacitor 52) that controls the first bias signal; an isolator 54 that is connected between the impedance adjustment electrode 50 and the first impedance adjustment mechanism and blocks the second bias signal; and a second impedance adjustment mechanism (second variable capacitor 53) that controls the second bias signal. The isolator 54 and the first impedance adjustment mechanism are connected in parallel with the second impedance adjustment mechanism. As a result, the controllability of a plurality of bias signals (for example, bias RF signals) having different frequencies can be improved.

[0130] In addition, according to each embodiment, the frequency of the first bias signal is lower than the frequency of the second bias signal. As a result, the controllability of the potential can be improved at the frequencies of both the first bias signal and the second bias signal (e.g., the first bias RF signal and the second bias RF signal).

[0131] In addition, according to the first embodiment and Modification 1, the impedance adjustment mechanism 51 is adjusted from a low impedance to a high impedance according to an increase in the consumption amount of the edge ring. As a result, the controllability of a plurality of bias signals (e.g., bias RF signals) having different frequencies can be improved, and the life of the edge ring can be extended.

[0132] In addition, according to Modification 2, the impedance adjustment mechanism 51 is connected to the impedance adjustment electrode 50 via the conductive bar 56. In addition, the conductive bar 56 is disposed along the inner peripheral side of the second region, and has a first connection portion 56a connected to the impedance adjustment mechanism 51 and a second connection portion 56b connected to the impedance adjustment electrode 50. The first connection portion 56a and the second connection portion 56b are adjacent to each other in the circumferential direction via an unconnected portion (gap 56c) in the circumferential direction between the first connection portion 56a and the second connection portion 56b. As a result, the deviation of the etching rate of the substrate W in the circumferential direction can be suppressed.

[0133] In addition, according to Modification 5, the conductive bar 56e is disposed below the base 1110 of the substrate support and functions as an open-loop resonator. As a result, the power loss of the RF electric power (and / or pulsed DC electric power) can be suppressed, and the deviation of the etching rate of the substrate W in the circumferential direction can be suppressed.

[0134] According to Modification 5, the resonance frequency of the open-loop resonator is the frequency of the second bias signal. As a result, the spatial propagation of the RF electric power (and / or pulsed DC power) to the conductive bar 56e can be suppressed.

[0135] In addition, according to Modification 3, the impedance adjustment mechanism 51a is connected to a plurality of impedance adjustment electrodes 50 via conductive bars (the first conductive bar 57 and the second conductive bar 58). The conductive bars include: the first conductive bar 57 disposed in the circumferential direction along the inner peripheral side of the second region; and a plurality of second conductive bars 58 disposed from the first conductive bar 57 toward the center of the base 1110 of the substrate support. The plurality of second conductive bars 58 have first connection portions 58a respectively connected to the impedance adjustment mechanism 51a. The first conductive bar 57 has a plurality of second connection portions 57b connected to the plurality of impedance adjustment electrodes 50 at connection portions 57a respectively connected to the plurality of second conductive bars 58. As a result, the deviation of the etching rate of the substrate W in the circumferential direction can be suppressed.

[0136] In addition, according to Modification Example 4, the impedance adjustment mechanism 51 is connected to the impedance adjustment electrode 50 via the conductive bar 59, and the conductive bar 59 is arranged along the second region in a multi-turn manner. As a result, the deviation of the etching rate of the substrate W in the circumferential direction can be suppressed.

[0137] In addition, according to Modification Example 6, the plasma processing apparatus 1 further includes a measurement unit 46 configured to be able to measure the voltage and current of the bias RF signal output from at least one of the first bias power supply (the first bias RF generation unit 31b) and the second bias power supply (the second bias RF generation unit 31c). The bias power supply is configured to control the power of the bias RF signal based on the voltage and current measured by the measurement unit 46 when adjusting the impedance adjustment mechanism 51, so that the potentials of the first bias electrode 34 and the second bias electrode 35 become a preset value. As a result, by controlling the bias RF electric power, the change in the etching rate when the value of VC changes can be suppressed.

[0138] In addition, according to Modification Example 6, the plasma processing apparatus 1 further includes a measurement unit 46 configured to be able to measure the voltage and current of the bias DC signal output from at least one of the first bias power supply and the second bias power supply (the bias DC generation unit 32a). The bias power supply is configured to control the power of the bias DC signal based on the voltage and current measured by the measurement unit 46 when adjusting the impedance adjustment mechanism 51, so that the power supplied to the first bias electrode 34 and the second bias electrode 35 becomes a preset value. As a result, by controlling the bias DC electric power, the change in the etching rate when the value of VC changes can be suppressed.

[0139] Each of the embodiments disclosed herein should be considered illustrative in all respects and not restrictive. The above-described embodiments can be omitted, replaced, or changed in various ways without departing from the appended claims and their gist.

[0140] In addition, in each of the above-described embodiments, the plasma processing apparatuses 1 and 1a that use inductively coupled plasma as a plasma source to etch the substrate W and perform other processes have been described as examples, but the disclosed technology is not limited thereto. As long as it is a device that uses plasma to process the substrate W, the plasma source is not limited to inductively coupled plasma, and for example, any plasma source such as capacitively coupled plasma, microwave plasma, and magnetron plasma can be used.

[0141] In addition, the present disclosure can also adopt the following structure.

[0142] (1) A plasma processing apparatus, comprising:

[0143] a chamber;

[0144] A first bias power supply configured to supply a first bias signal;

[0145] A second bias power supply configured to supply a second bias signal;

[0146] A substrate support for supporting a substrate and an edge ring in the chamber;

[0147] An impedance adjustment mechanism; and

[0148] A circuit path,

[0149] The substrate support is configured to have:

[0150] A first region for supporting the substrate;

[0151] A second region provided around the first region for supporting the edge ring;

[0152] A first bias electrode provided in the first region;

[0153] A second bias electrode provided in the second region; and

[0154] An impedance adjustment electrode provided in the second region and grounded,

[0155] The impedance adjustment mechanism is configured to have:

[0156] A first impedance adjustment mechanism for controlling the first bias signal;

[0157] An isolator connected between the impedance adjustment electrode and the first impedance adjustment mechanism to block the second bias signal; and

[0158] A second impedance adjustment mechanism for controlling the second bias signal,

[0159] The isolator and the first impedance adjustment mechanism are connected in parallel with the second impedance adjustment mechanism and connected to the impedance adjustment electrode,

[0160] The circuit path is configured to connect the first bias power supply and the second bias power supply to the first bias electrode and the second bias electrode.

[0161] (2) The plasma processing apparatus according to (1) above, wherein,

[0162] A switch is provided in the circuit path between the first bias power supply and the second bias power supply and the second bias electrode. When the first bias signal is supplied, the switch is controlled to be turned on, and when the second bias signal is supplied, the switch is controlled to be turned off.

[0163] (3) The plasma processing apparatus as described in (1) or (2) above, wherein,

[0164] The first impedance adjustment mechanism is composed of at least one of a variable resistor, a variable capacitor, and a variable inductor,

[0165] The second impedance adjustment mechanism is composed of at least one of a variable resistor, a variable capacitor, and a variable inductor.

[0166] (4) The plasma processing apparatus as described in (3) above, wherein,

[0167] The frequency of the first bias signal is lower than the frequency of the second bias signal,

[0168] The first impedance adjustment mechanism is composed of a first variable capacitor,

[0169] The second impedance adjustment mechanism is composed of a second variable capacitor,

[0170] The variable range of the capacitance of the first variable capacitor is larger than the variable range of the capacitance of the second variable capacitor.

[0171] (5) The plasma processing apparatus as described in any one of (1) to (4) above, wherein,

[0172] The isolator includes a resonant circuit, and the resonant frequency of this resonant circuit is the frequency of the second bias signal.

[0173] (6) A plasma processing apparatus, which includes:

[0174] A chamber;

[0175] A first bias power supply configured to be able to supply a first bias signal;

[0176] A second bias power supply configured to be able to supply a second bias signal;

[0177] A substrate support for supporting a substrate and an edge ring in the chamber;

[0178] An impedance adjustment mechanism; and

[0179] A circuit path,

[0180] The substrate support is configured to have:

[0181] A first region for supporting the substrate;

[0182] A second region provided around the first region for supporting the edge ring;

[0183] A first bias electrode provided in the first region;

[0184] A second bias electrode disposed within the second region; and

[0185] An impedance adjustment electrode disposed within the second region and grounded,

[0186] The impedance adjustment mechanism is configured to be connected to the impedance adjustment electrode,

[0187] The circuit path is configured to be able to connect the first bias power supply and the second bias power supply to the first bias electrode and the second bias electrode. A switch is provided between the first bias power supply and the second bias power supply and the second bias electrode. When the first bias signal is supplied, the switch is controlled to be turned on, and when the second bias signal is supplied, the switch is controlled to be turned off.

[0188] (7) The plasma processing apparatus according to (6) above, wherein,

[0189] The impedance adjustment mechanism has:

[0190] A first impedance adjustment mechanism for controlling the first bias signal;

[0191] An isolator connected between the impedance adjustment electrode and the first impedance adjustment mechanism to block the second bias signal; and

[0192] A second impedance adjustment mechanism for controlling the second bias signal,

[0193] The isolator and the first impedance adjustment mechanism are connected in parallel with the second impedance adjustment mechanism.

[0194] (8) The plasma processing apparatus according to (7) above, wherein,

[0195] The first impedance adjustment mechanism is constituted by at least one of a variable resistor, a variable capacitor, and a variable inductor,

[0196] The second impedance adjustment mechanism is constituted by at least one of a variable resistor, a variable capacitor, and a variable inductor.

[0197] (9) The plasma processing apparatus according to any one of (1) to (8) above, wherein,

[0198] The frequency of the first bias signal is lower than the frequency of the second bias signal.

[0199] (10) The plasma processing apparatus according to any one of (1) to (9) above, wherein,

[0200] The impedance adjustment mechanism is adjusted from a low impedance to a high impedance as the consumption amount of the edge ring increases.

[0201] (11) The plasma processing apparatus according to any one of (1) to (10) above, wherein,

[0202] The impedance adjustment mechanism is connected to the impedance adjustment electrode via a conductive bar,

[0203] The conductive bar is arranged along the inner peripheral side of the second region, has a first connection portion connected to the impedance adjustment mechanism and a second connection portion connected to the impedance adjustment electrode, and the first connection portion and the second connection portion are adjacent to each other in the circumferential direction with respect to the unconnected portion in the circumferential direction between the first connection portion and the second connection portion.

[0204] (12) The plasma processing apparatus according to (11) above, wherein,

[0205] The conductive bar is arranged at the lower part of the base of the substrate support and functions as an open-loop resonator.

[0206] (13) The plasma processing apparatus according to (12) above, wherein,

[0207] The resonance frequency of the open-loop resonator is the frequency of the second bias signal.

[0208] (14) The Doppler processing apparatus according to any one of (1) to (10) above, wherein,

[0209] The impedance adjustment mechanism is connected to a plurality of the impedance adjustment electrodes via a conductive bar,

[0210] The conductive bar has: a first conductive bar arranged circumferentially along the inner peripheral side of the second region; and a plurality of second conductive bars arranged in a manner of going from the first conductive bar to the center of the base of the substrate support,

[0211] Each of the plurality of second conductive bars has a first connection portion connected to the impedance adjustment mechanism,

[0212] The first conductive bar has a plurality of second connection portions connected to the plurality of impedance adjustment electrodes at the connection portions respectively connected to the plurality of second conductive bars.

[0213] (15) The plasma processing apparatus according to any one of (1) to (10) above, wherein,

[0214] The impedance adjustment mechanism is connected to the impedance adjustment electrode via a conductive bar,

[0215] The conductive bar is arranged along the second region in a manner having multiple turns.

[0216] (16) The plasma processing apparatus according to any one of (1) to (15) above, wherein,

[0217] It further includes a measurement unit configured to be able to measure the voltage and current of a bias RF signal output from at least one of the first bias power supply and the second bias power supply.

[0218] The bias power supply is configured to control the electric power of the bias RF signal based on the voltage and the current measured by the measurement unit when adjusting the impedance adjustment mechanism, so that the potentials of the first bias electrode and the second bias electrode become a preset value.

[0219] (17) The plasma processing apparatus according to any one of (1) to (15) above, wherein,

[0220] It further includes a measurement unit configured to be able to measure the voltage and current of a bias DC signal output from at least one of the first bias power supply and the second bias power supply.

[0221] The bias power supply is configured to control the electric power of the bias DC signal based on the voltage and the current measured by the measurement unit when adjusting the impedance adjustment mechanism, so that the electric power supplied to the first bias electrode and the second bias electrode becomes a preset value.

[0222] Description of reference numerals

[0223] 1, 1a Plasma processing apparatus

[0224] 10 Plasma processing chamber

[0225] 11 Substrate support part

[0226] 31a

[0227] 31b First bias RF generation part

[0228] 31c Second bias RF generation part

[0229] 34 First bias electrode

[0230] 35 Second bias electrode

[0231] 37c Switch

[0232] 38 Circuit path

[0233] 50 Impedance adjustment electrode

[0234] 51, 51a Impedance adjustment mechanism

[0235] 52 First variable capacitor (first impedance adjustment mechanism)

[0236] 53 Second variable capacitor (second impedance adjustment mechanism)

[0237] 54 Isolator

[0238] 56, 56e, 59 Conductive strips

[0239] 56a, 58a First connection part

[0240] 56b, 57b Second connection part

[0241] 56c Gap

[0242] 57 First conductive strip

[0243] 57a Connection part

[0244] 58 Second conductive strip

[0245] 112 Ring assembly

[0246] 111a, 111c, 111d Central region

[0247] 111b Annular region

[0248] 1110 Base

[0249] 1111, 1111c, 1111d Electrostatic chuck

[0250] W substrate.

Claims

1. A plasma processing apparatus, characterized in that, Comprising: A chamber; A first bias power supply configured to supply a first bias signal; A second bias power supply configured to supply a second bias signal; A substrate support that supports a substrate and an edge ring within the chamber; An impedance adjustment mechanism; and A circuit path, The substrate support is configured to have: A first region that supports the substrate; A second region disposed around the first region that supports the edge ring; A first bias electrode disposed within the first region; A second bias electrode disposed within the second region; And An impedance adjustment electrode disposed within the second region and grounded, The impedance adjustment mechanism is configured to have: A first impedance adjustment mechanism that controls the first bias signal; An isolator connected between the impedance adjustment electrode and the first impedance adjustment mechanism that blocks the second bias signal; And A second impedance adjustment mechanism that controls the second bias signal, The isolator and the first impedance adjustment mechanism are connected in parallel with the second impedance adjustment mechanism and connected to the impedance adjustment electrode, The circuit path is configured to connect the first bias power supply and the second bias power supply to the first bias electrode and the second bias electrode.

2. The plasma processing apparatus according to claim 1, wherein: A switch is provided between the first bias power supply and the second bias power supply and the second bias electrode in the circuit path. When the first bias signal is supplied, the switch is controlled to be turned on, and when the second bias signal is supplied, the switch is controlled to be turned off.

3. The plasma processing apparatus according to claim 1 or 2, wherein: The first impedance adjustment mechanism is constituted by at least one of a variable resistor, a variable capacitor, and a variable inductor, The second impedance adjustment mechanism is constituted by at least one of a variable resistor, a variable capacitor, and a variable inductor.

4. The plasma processing apparatus according to claim 3, wherein: The frequency of the first bias signal is lower than the frequency of the second bias signal, The first impedance adjustment mechanism is constituted by a first variable capacitor, The second impedance adjustment mechanism is constituted by a second variable capacitor, The variable range of the capacitance of the first variable capacitor is larger than the variable range of the capacitance of the second variable capacitor.

5. The plasma processing apparatus according to claim 1, wherein: The isolator includes a resonant circuit, and the resonant frequency of the resonant circuit is the frequency of the second bias signal.

6. A plasma processing apparatus, characterized in that, Comprising: A chamber; A first bias power supply configured to supply a first bias signal; A second bias power supply configured to supply a second bias signal; A substrate support that supports a substrate and an edge ring within the chamber; An impedance adjustment mechanism; and A circuit path, The substrate support is configured to have: A first region that supports the substrate; A second region disposed around the first region that supports the edge ring; A first bias electrode disposed within the first region; A second bias electrode disposed within the second region; And An impedance adjustment electrode disposed within the second region and grounded, The impedance adjustment mechanism is configured to be connected to the impedance adjustment electrode. The electrical path is configured to connect the first bias power supply and the second bias power supply to the first bias electrode and the second bias electrode. A switch is provided between the first bias power supply and the second bias power supply and the second bias electrode. When the first bias signal is supplied, the switch is controlled to be turned on, and when the second bias signal is supplied, the switch is controlled to be turned off.

7. The plasma processing apparatus according to claim 6, wherein: The impedance adjustment mechanism comprises: a first impedance adjustment mechanism for controlling the first bias signal; an isolator connected between the impedance adjustment electrode and the first impedance adjustment mechanism to block the second bias signal; and a second impedance adjustment mechanism controlling the second bias signal, The isolator and the first impedance adjustment mechanism are connected in parallel with the second impedance adjustment mechanism.

8. The plasma processing apparatus according to claim 7, wherein: The first impedance adjustment mechanism is composed of at least one of a variable resistor, a variable capacitor and a variable inductor. The second impedance adjustment mechanism is composed of at least one of a variable resistor, a variable capacitor, and a variable inductor.

9. The plasma processing device according to claim 1 or 6, characterized in that: The frequency of the first bias signal is lower than the frequency of the second bias signal.

10. The plasma processing device according to claim 1 or 6, characterized in that: The impedance adjustment mechanism is adjusted from low impedance to high impedance as the consumption of the edge ring increases.

11. The plasma processing device according to claim 1 or 6, characterized in that: The impedance adjustment mechanism is connected to the impedance adjustment electrode via a conductive strip. The conductive strip is arranged along the inner circumferential side of the second region, and has a first connecting portion connected to the impedance adjustment mechanism and a second connecting portion connected to the impedance adjustment electrode. The first connecting portion and the second connecting portion are adjacent to each other in the circumferential direction via an unconnected portion between the first connecting portion and the second connecting portion in the circumferential direction.

12. The plasma processing apparatus according to claim 11, wherein: The conductive strip is disposed at a lower portion of the base of the substrate support and functions as a split ring resonator.

13. The plasma processing apparatus according to claim 12, wherein: The resonant frequency of the split ring resonator is the frequency of the second bias signal.

14. The plasma processing device according to claim 1 or 6, characterized in that: The impedance adjustment mechanism is connected to the plurality of impedance adjustment electrodes via a conductive strip. The conductive strip includes: a first conductive strip arranged in a circumferential direction along the inner circumferential side of the second region; and a plurality of second conductive strips arranged in such a manner as to go from the first conductive strip to the center of the base of the substrate support, Each of the plurality of second conductive strips has a first connection portion connected to the impedance adjustment mechanism. The first conductive bar has a plurality of second connection portions connected to the plurality of impedance adjustment electrodes at connection portions respectively connected to the plurality of second conductive bars.

15. The plasma processing apparatus according to claim 1 or 6, wherein: The impedance adjustment mechanism is connected to the impedance adjustment electrode via a conductive bar, The conductive bar is arranged along the second region in a manner having multiple turns.

16. The plasma processing apparatus according to claim 1 or 6, wherein: It further includes a measurement unit configured to be able to measure the voltage and current of a bias RF signal output from at least one of the first bias power supply and the second bias power supply, The bias power supply is configured to control the electric power of the bias RF signal based on the voltage and the current measured by the measurement unit when adjusting the impedance adjustment mechanism, so that the potentials of the first bias electrode and the second bias electrode become preset set values.

17. The plasma processing apparatus according to claim 1 or 6, wherein: It further includes a measurement unit configured to be able to measure the voltage and current of a bias DC signal output from at least one of the first bias power supply and the second bias power supply, The bias power supply is configured to control the electric power of the bias DC signal based on the voltage and the current measured by the measurement unit when adjusting the impedance adjustment mechanism, so that the electric power supplied to the first bias electrode and the second bias electrode becomes a preset set value.

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