Junction barrier Schottky diode and manufacturing method thereof

Abstract

A junction barrier Schottky diode (1) is provided with: an n-type semiconductor layer (11) having a plurality of trenches (111); a plurality of p-type semiconductor parts (12) provided so as to be in contact with the inner surface of each of the plurality of trenches (111); and an anode electrode (13) provided so as to be in contact with the mesa-shaped portion (112) of the n-type semiconductor layer (11), each of the plurality of p-type semiconductor portions (12) having: a first portion (121) that covers the inner surface of the trench (111); and a second portion (122) that covers the edge of the opening of the trench (111) in the first surface (113) of the n-type semiconductor layer (11).

Description

Technical Field

[0001] The present invention relates to a junction barrier Schottky diode and a method for manufacturing the same. Background Art

[0002] Conventionally, a trench-type junction barrier Schottky (JBS) diode (see Patent Document 1) has been known, which includes: an n-type semiconductor layer formed on an n-type semiconductor substrate and having trenches opening on a surface opposite to the n-type semiconductor substrate; a p-type semiconductor layer buried in the trenches of the n-type semiconductor layer; an anode electrode formed on the n-type semiconductor layer in contact with the p-type semiconductor layer; and a cathode electrode formed on a surface of the n-type semiconductor substrate opposite to the n-type semiconductor layer.

[0003] According to the trench-type JBS diode described in Patent Document 1, when a reverse voltage is applied between the anode electrode and the cathode electrode, due to the Schottky barrier, current does not flow. At this time, the depletion layer expands from the p-type semiconductor layer, and the channels between adjacent p-type semiconductor layers are closed. Therefore, leakage current is effectively suppressed.

[0004] Prior Art Documents

[0005] Patent Documents

[0006] Patent Document 1: Japanese Unexamined Patent Application Publication No. 2019-36593 Summary of the Invention

[0007] Problems to be Solved by the Invention

[0008] According to the method for manufacturing a trench-type JBS diode described in Patent Document 1, in order to bury the p-type semiconductor layer in the trenches of the n-type semiconductor layer, it is necessary to deposit a p-type semiconductor film on the entire surface of the n-type semiconductor layer, and then remove the portions outside the trenches of the deposited p-type semiconductor film by a planarization process such as CMP (Chemical Mechanical Polishing).

[0009] However, there is a certain in-plane non-uniformity in the polishing rate of the planarization process such as CMP in principle. Therefore, it is possible to cause differences in the shape of the p-type semiconductor layer buried in the trenches, resulting in in-plane differences in the electrical characteristics of the trench-type JBS diode.

[0010] An object of the present invention is to provide a junction barrier Schottky diode and a method for manufacturing the same, which suppress differences in the shape of the p-type semiconductor portion formed in the trenches of the n-type semiconductor layer.

[0011] Solutions for Solving the Problems

[0012] To achieve the above object, one aspect of the present invention provides the following junction barrier Schottky diode and a method for manufacturing the junction barrier Schottky diode.

[0013] [1] A junction barrier Schottky diode includes: an n-type semiconductor layer including an n-type semiconductor and having a plurality of trenches opening on a first surface; a plurality of p-type semiconductor portions including a p-type semiconductor and provided in contact with inner surfaces of the respective trenches; an anode electrode provided on the first surface of the n-type semiconductor layer and on the plurality of p-type semiconductor portions and in contact with a mesa-shaped portion between the plurality of trenches of the n-type semiconductor layer; and a cathode electrode provided directly or with another layer interposed therebetween on a second surface of the n-type semiconductor layer opposite to the first surface, where the electron affinity χ p and work function of the p-type semiconductor and the electron affinity χ n and work function of the n-type semiconductor satisfy the condition represented by the formula Each of the plurality of p-type semiconductor portions has: a first portion covering the inner surface of the trench; and a second portion covering an edge of an opening of the trench in the first surface of the n-type semiconductor layer.

[0014] [2] The junction barrier Schottky diode according to the above [1], wherein the first portion of each of the plurality of p-type semiconductor portions fills the trench.

[0015] [3] The junction barrier Schottky diode according to the above [1], wherein a void on the p-type semiconductor portion in the plurality of trenches is filled with a part of the anode electrode.

[0016] [4] The junction barrier Schottky diode according to the above [1], wherein the n-type semiconductor layer and the p-type semiconductor portion include different semiconductors.

[0017] [5] The junction barrier Schottky diode according to the above [4], wherein the n-type semiconductor layer includes a gallium oxide-based semiconductor.

[0018] [6] The junction barrier Schottky diode according to the above [5], wherein the p-type semiconductor includes Cu2O, NiO, Ag2O, polycrystalline Si, single crystal Si, amorphous Si, SnO, Rh2O3, Ir2O3, or CuO.

[0019] [7]A method for manufacturing a junction barrier Schottky diode, comprising: a step of forming a plurality of trenches on a first surface of an n-type semiconductor layer including an n-type semiconductor; a step of forming a plurality of p-type semiconductor portions in contact with inner surfaces of the respective trenches by depositing a p-type semiconductor over the entire surface on the first surface side of the n-type semiconductor layer and patterning the p-type semiconductor; a step of forming an anode electrode on the first surface of the n-type semiconductor layer and the plurality of p-type semiconductor portions in contact with a mesa-shaped portion between the plurality of trenches of the n-type semiconductor layer; and a step of forming a cathode electrode directly or with other layers interposed therebetween on a second surface of the n-type semiconductor layer opposite to the first surface, where the electron affinity χ p and work function of the p-type semiconductor, and the electron affinity χ n and work function of the n-type semiconductor satisfy the condition represented by the formula . Each of the plurality of p-type semiconductor portions has: a first portion covering the inner surface of the trench; and a second portion covering an edge of an opening of the trench in the first surface of the n-type semiconductor layer.

[0020] [8]The method for manufacturing a junction barrier Schottky diode according to the above [7], wherein, in the step of forming the plurality of p-type semiconductor portions, the plurality of p-type semiconductor portions are formed by patterning a single p-type semiconductor film using lithography.

[0021] [9]The method for manufacturing a junction barrier Schottky diode according to the above [7], wherein, in the step of forming the plurality of p-type semiconductor portions, the plurality of p-type semiconductor portions are formed by patterning using lift-off.

[0022] Effects of the Invention

[0023] According to the present invention, it is possible to provide a junction barrier Schottky diode and a method for manufacturing the same that suppress differences in the shape of p-type semiconductor portions formed in trenches of an n-type semiconductor layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Figure 1 is a vertical cross-sectional view of a junction barrier Schottky (JBS) diode according to an embodiment of the present invention.

[0025] Figure 2A is a vertical cross-sectional view showing an example of a manufacturing process of the JBS diode according to an embodiment of the present invention.

[0026] Figure 2B is a vertical cross-sectional view showing an example of a manufacturing process of the JBS diode according to an embodiment of the present invention.

[0027] Figure 2C It is a vertical cross-sectional view showing an example of the manufacturing process of a JBS diode according to an embodiment of the present invention.

[0028] Figure 3A It is a vertical cross-sectional view showing an example of the manufacturing process of a JBS diode according to an embodiment of the present invention.

[0029] Figure 3B It is a vertical cross-sectional view showing an example of the manufacturing process of a JBS diode according to an embodiment of the present invention.

[0030] Figure 3C It is a vertical cross-sectional view showing an example of the manufacturing process of a JBS diode according to an embodiment of the present invention.

[0031] Figure 4A It is a vertical cross-sectional view showing another example of the manufacturing process of a JBS diode according to an embodiment of the present invention.

[0032] Figure 4B It is a vertical cross-sectional view showing another example of the manufacturing process of a JBS diode according to an embodiment of the present invention.

[0033] Figure 4C It is a vertical cross-sectional view showing another example of the manufacturing process of a JBS diode according to an embodiment of the present invention.

[0034] Figure 5 It is a vertical cross-sectional view of a modified example of a JBS diode according to an embodiment of the present invention.

[0035] Figure 6A It is a vertical cross-sectional view showing an example of the manufacturing process of a JBS diode in the case of forming a p-type semiconductor portion using a planarization process as a comparative example.

[0036] Figure 6B It is a vertical cross-sectional view showing an example of the manufacturing process of a JBS diode in the case of forming a p-type semiconductor portion using a planarization process as a comparative example.

[0037] Figure 6C It is a vertical cross-sectional view showing an example of the manufacturing process of a JBS diode in the case of forming a p-type semiconductor portion using a planarization process as a comparative example.

[0038] Figure 7A It is a vertical cross-sectional view showing an example of the manufacturing process of a JBS diode in the case of forming a p-type semiconductor portion using a resist mask filled in a trench as another comparative example.

[0039] Figure 7BIt is a vertical cross-sectional view showing an example of a manufacturing process of a JBS diode in the case of forming a p-type semiconductor portion using a resist mask filled in a trench as another comparative example.

[0040] Figure 7C It is a vertical cross-sectional view showing an example of a manufacturing process of a JBS diode in the case of forming a p-type semiconductor portion using a resist mask filled in a trench as another comparative example.

[0041] Figure 8A It is a vertical cross-sectional view showing an example of a manufacturing process of a JBS diode in the case of forming a p-type semiconductor portion using a resist mask filled in a trench as another comparative example.

[0042] Figure 8B It is a vertical cross-sectional view showing an example of a manufacturing process of a JBS diode in the case of forming a p-type semiconductor portion using a resist mask filled in a trench as another comparative example.

[0043] Figure 8C It is a vertical cross-sectional view showing an example of a manufacturing process of a JBS diode in the case of forming a p-type semiconductor portion using a resist mask filled in a trench as another comparative example. Detailed Description

[0044] 〔Embodiment〕

[0045] (Configuration of JBS Diode)

[0046] Figure 1 It is a vertical cross-sectional view of a junction barrier Schottky (JBS) diode 1 according to an embodiment of the present invention. The JBS diode 1 is a vertical JBS diode having a trench structure.

[0047] The JBS diode 1 includes: an n-type semiconductor layer 11 including an n-type semiconductor and having a plurality of trenches 111 opening on a first surface 113; a plurality of p-type semiconductor portions 12 including a p-type semiconductor and provided in contact with inner surfaces of the plurality of trenches 111; an anode electrode 13 provided on the first surface 113 of the n-type semiconductor layer 11 and on the plurality of p-type semiconductor portions 12 and in contact with a mesa-shaped portion 112 between the plurality of trenches 111 of the n-type semiconductor layer 11; and a cathode electrode 14 provided directly or with other layers interposed therebetween on a second surface 114 of the n-type semiconductor layer 11 opposite to the first surface 113.

[0048] Each of the plurality of p-type semiconductor portions 12 has: a first portion 121 covering the inner surface of the trench 111; and a second portion 122 covering an edge of an opening of the trench 111 in the first surface 113 of the n-type semiconductor layer 11.

[0049] Typically, as Figure 1 shown, the JBS diode 1 includes an n-type semiconductor substrate 10 that serves as a substrate for epitaxial growth of the n-type semiconductor layer 11, and the second surface 114 of the n-type semiconductor layer 11 is in contact with the n-type semiconductor substrate 10. In this case, the cathode electrode 14 is provided on the surface of the n-type semiconductor substrate 10 on the side opposite to the n-type semiconductor layer 11. That is, the cathode electrode 14 is provided on the second surface 114 of the n-type semiconductor layer 11 with the n-type semiconductor substrate 10 interposed therebetween.

[0050] The n-type semiconductor layer 11 forms a Schottky junction with the anode electrode 13, and the JBS diode 1 utilizes the rectifying property of this Schottky junction. In the JBS diode 1, by applying a forward voltage (the anode electrode 13 side is at a positive potential) between the anode electrode 13 and the cathode electrode 14, the potential barrier at the interface between the anode electrode 13 and the n-type semiconductor layer 11 as viewed from the n-type semiconductor layer 11 decreases, and current flows from the anode electrode 13 to the cathode electrode 14.

[0051] On the other hand, when a reverse voltage (the anode electrode 13 side is at a negative potential) is applied between the anode electrode 13 and the cathode electrode 14, current does not flow due to the Schottky barrier. At this time, the depletion layer expands from the p-type semiconductor portion 12 in the trench 111, and the channel is closed in the mesa-shaped portion 112 between adjacent trenches 111, so that the leakage current is effectively suppressed.

[0052] Since the JBS diode 1 of the present embodiment has a trench-type JBS structure, the resistance of the n-type semiconductor layer 11 is not increased and a high breakdown voltage can be obtained. That is, the JBS diode 1 is a Schottky barrier diode with high breakdown voltage and low loss.

[0053] The n-type semiconductor substrate 10 includes a single crystal of an n-type gallium oxide-based semiconductor containing Group IV elements such as Si and Sn as donors. The donor concentration of the n-type semiconductor substrate 10 is, for example, 1.0×10 16 cm -3 or more and 1.0×10 22 cm -3 or less, preferably 1.0×10 18 cm -3 or more and 1.0×10 22 cm -3 or less. The thickness of the n-type semiconductor substrate 10 is, for example, 5 μm or more and 650 μm or less.

[0054] Here, the gallium oxide-based semiconductor refers to Ga2O3 or Ga2O3 doped with one or both of Al and In, and has a structure composed of (Ga x Aly In (1-x-y) )2O3 (0 < x ≤ 1, 0 ≤ y < 1, 0 < x + y ≤ 1). When Al is added to Ga2O3, the bandgap becomes wider, and when In is added to Ga2O3, the bandgap becomes narrower. In addition, typically, the single crystal of the above-mentioned gallium oxide-based semiconductor has a β-type crystal structure. For example, the bandgap energy of Ga2O3, which is a typical example of the gallium oxide-based semiconductor, is 4.5 to 4.9 eV, and the dielectric breakdown electric field strength is about 8.0 MV / cm.

[0055] The n-type semiconductor layer 11 includes a single crystal of an n-type gallium oxide-based semiconductor containing Group IV elements such as Si and Sn as donors. The donor concentration of the n-type semiconductor layer 11 is lower than the donor concentration of the n-type semiconductor substrate 10. The n-type semiconductor layer 11 is, for example, an epitaxial layer epitaxially grown on the n-type semiconductor substrate 10.

[0056] In addition, a high donor concentration layer containing a high concentration of donors may be formed between the n-type semiconductor substrate 10 and the n-type semiconductor layer 11. This high donor concentration layer is used, for example, when the n-type semiconductor layer 11 is epitaxially grown on the n-type semiconductor substrate 10. In the initial stage of the growth of the n-type semiconductor layer 11, since the intake amount of the dopant is unstable or there is diffusion of acceptor impurities from the n-type semiconductor substrate 10, if the n-type semiconductor layer 11 is directly grown on the n-type semiconductor substrate 10, the region of the n-type semiconductor layer 11 near the interface with the n-type semiconductor substrate 10 may become highly resistive. To avoid such a problem, the high donor concentration layer is used. The donor concentration of the high donor concentration layer is, for example, set to be higher than the donor concentration of the n-type semiconductor layer 11, and more preferably set to be 10 times or more the donor concentration of the n-type semiconductor layer 11.

[0057] As the donor concentration of the n-type semiconductor layer 11 increases, the electric field strength of each part of the JBS diode 1 increases. The donor concentration of the n-type semiconductor layer 11 is, for example, 2 × 10 14 cm -3 or more and 4 × 10 17 cm -3 or less. And, in order for the JBS diode 1 to have a breakdown voltage of 400 V or more, the donor concentration of the n-type semiconductor layer 11 is preferably 4 × 10 17 cm -3 or less, and more preferably 8 × 10 15 cm -3 or more and 4 × 10 17 cm -3 or less.

[0058] In addition, in order for the JBS diode 1 to have a breakdown voltage of 600 V or more, the donor concentration of the n-type semiconductor layer 11 is preferably 2 × 1017 cm -3 Hereinafter, it is more preferably 4×10 15 cm -3 or more and 2×10 17 cm -3 or less. In order for the JBS diode 1 to obtain a breakdown voltage of 1200 V or more, the donor concentration of the n-type semiconductor layer 11 is preferably 1×10 17 cm -3 or less, and more preferably 2×10 15 cm -3 or more and 1×10 17 cm -3 or less.

[0059] In order for the JBS diode 1 to obtain a breakdown voltage of 2200 V or more, the donor concentration of the n-type semiconductor layer 11 is preferably 8×10 16 cm -3 or less, and more preferably 1.6×10 15 cm -3 or more and 8×10 16 cm -3 or less. In order for the JBS diode 1 to obtain a breakdown voltage of 3300 V or more, the donor concentration of the n-type semiconductor layer 11 is preferably 5×10 16 cm -3 or less, and more preferably 1×10 15 cm -3 or more and 5×10 16 cm -3 or less.

[0060] In order for the JBS diode 1 to obtain a breakdown voltage of 5000 V or more, the donor concentration of the n-type semiconductor layer 11 is preferably 3×10 16 cm -3 or less, and more preferably 6×10 14 cm -3 or more and 3×10 16 cm -3 or less. In order for the JBS diode 1 to obtain a breakdown voltage of 10000 V or more, the donor concentration of the n-type semiconductor layer 11 is preferably 1×10 16 cm -3 or less, and more preferably 2×10 14 cm -3 or more and 1×10 16 cm -3 or less.

[0061] When the thickness T of the n-type semiconductor layer 11 is designed such that the electric field generated in each part when a reverse voltage equal to the designed breakdown voltage is applied to the JBS diode 1 is less than the insulation breakdown electric field, the deeper the depth D of the trench 111, the more the electric field at the Schottky interface between the anode electrode 13 and the first surface 113 can be reduced when a reverse voltage is applied. On the other hand, if the depth D of the trench 111 is too deep, the resistance between the anode electrode 13 and the cathode electrode 14 of the JBS diode 1 will increase. Therefore, the depth D of the trench 111 is preferably 0.5 μm or more and 5 μm or less.

[0062] The thickness T of the n-type semiconductor layer 11 has, for example, a value obtained by adding 0.5 to 110 μm to the depth D of the trench 111 measured from the first surface 113. And, in order for the JBS diode 1 to obtain a breakdown voltage of 400 V or more, the thickness T of the n-type semiconductor layer 11 preferably has a value obtained by adding 0.6 to 9 μm to the depth D of the trench 111, and more preferably has a value obtained by adding 0.6 to 6 μm to the depth D of the trench 111.

[0063] In addition, in order for the JBS diode 1 to obtain a breakdown voltage of 600 V or more, the thickness T of the n-type semiconductor layer 11 preferably has a value obtained by adding 0.8 to 11 μm to the depth D of the trench 111, and more preferably has a value obtained by adding 0.8 to 7 μm to the depth D of the trench 111. In order for the JBS diode 1 to obtain a breakdown voltage of 1200 V or more, the thickness T of the n-type semiconductor layer 11 preferably has a value obtained by adding 1.5 to 20 μm to the depth D of the trench 111, and more preferably has a value obtained by adding 1.5 to 12 μm to the depth D of the trench 111.

[0064] In order for the JBS diode 1 to obtain a breakdown voltage of 2200 V or more, the thickness T of the n-type semiconductor layer 11 preferably has a value obtained by adding 4 to 40 μm to the depth D of the trench 111, and more preferably has a value obtained by adding 4 to 25 μm to the depth D of the trench 111. In order for the JBS diode 1 to obtain a breakdown voltage of 3300 V or more, the thickness T of the n-type semiconductor layer 11 preferably has a value obtained by adding 5 to 50 μm to the depth D of the trench 111, and more preferably has a value obtained by adding 5 to 30 μm to the depth D of the trench 111.

[0065] In order for the JBS diode 1 to obtain a breakdown voltage of 5000 V or more, the thickness T of the n-type semiconductor layer 11 preferably has a value obtained by adding 7 to 90 μm to the depth D of the trench 111, and more preferably has a value obtained by adding 7 to 55 μm to the depth D of the trench 111. In order for the JBS diode 1 to obtain a breakdown voltage of 10000 V or more, the thickness T of the n-type semiconductor layer 11 preferably has a value obtained by adding 12 to 180 μm to the depth D of the trench 111, and more preferably has a value obtained by adding 12 to 110 μm to the depth D of the trench 111.

[0066] Width W of the trench 111 t The narrower the width W of the trench 111, the lower the conduction loss can be reduced, but the manufacturing difficulty increases, which will cause the manufacturing yield to decrease. Therefore, the width W of the trench 111 t is preferably 0.3 μm or more and 5 μm or less.

[0067] Width W of the mesa-shaped portion 112 between adjacent trenches 111 of the n-type semiconductor layer 11 m The smaller the width W of the mesa-shaped portion 112, the lower the electric field strength directly below the anode electrode 13 in the mesa-shaped portion 112 and the electric field strength at the junction between the n-type semiconductor layer 11 and the p-type semiconductor portion 12. In order to effectively reduce these electric field strengths, the width W of the mesa-shaped portion 112 m is preferably 5 μm or less. On the other hand, the smaller the width W of the mesa-shaped portion 112 m the higher the manufacturing difficulty of the trench 111. Therefore, the width W of the mesa-shaped portion 112 m is preferably 0.25 μm or more.

[0068] In the anode electrode 13, the portion of the anode electrode 13 in contact with the n-type semiconductor layer 11 includes a material that forms a Schottky junction with the n-type semiconductor layer 11. That is, in the case where the anode electrode 13 has a single-layer structure, the whole includes a material that forms a Schottky junction with the n-type semiconductor layer 11. In the case where the anode electrode 13 has a multi-layer structure, at least the layer in contact with the n-type semiconductor layer 11 includes a material that forms a Schottky junction with the n-type semiconductor layer 11.

[0069] As the material of the portion of the anode electrode 13 in contact with the n-type semiconductor layer 11, for example, Pt, Ni, Au, Cu, Mo, W, Fe, Pd, or Cr that forms a Schottky junction with the n-type semiconductor layer 11 including a gallium oxide-based semiconductor can be used.

[0070] For example, when the n-type semiconductor layer 11 includes Ga2O3, if the material of the anode electrode 13 is Pt or Ni, the turn-on voltage of the JBS diode 1 becomes 0.7 V or more and 1.2 V or less. If the material of the anode electrode 13 is Mo, the turn-on voltage of the JBS diode 1 becomes 0.3 V or more and 0.8 V or less.

[0071] In the JBS diode 1, since a barrier is formed in the mesa-shaped portion 112, the turn-on voltage depends on the width W of the mesa-shaped portion 112 m , and the width W m the smaller the width W, the larger the turn-on voltage.

[0072] The electric field strength in the JBS diode 1 is affected by the width W of the mesa-shaped portion 112 between two adjacent trenches 111 as described abovem It is affected by the depth D of the trench 111 and the like, but is hardly affected by the planar pattern of the trench 111. Therefore, the planar pattern of the trench 111 of the n-type semiconductor layer 11 is not particularly limited. In addition, if the planar pattern of the trench 111 is a planar pattern forming the mesa-shaped portion 112 (for example, a grid pattern), a plurality of trenches 111 may also be included in one continuous trench.

[0073] When the cathode electrode 14 is provided in the JBS diode 1 with the n-type semiconductor substrate 10, it makes an ohmic contact with the n-type semiconductor substrate 10. The cathode electrode 14 includes a metal such as Ti. The cathode electrode 14 may also have a multilayer structure formed by laminating different metal films, for example, Ti / Au, Ti / Al, Ti / Ni / Au, or Ti / Al / Ni / Au. In order to make the cathode electrode 14 make a reliable ohmic contact with the n-type semiconductor substrate 10, the layer of the cathode electrode 14 in contact with the n-type semiconductor substrate 10 preferably includes Ti. In addition, when the JBS diode 1 does not have the n-type semiconductor substrate 10 and the cathode electrode 14 is directly connected to the n-type semiconductor layer 11, the cathode electrode 14 makes an ohmic contact with the n-type semiconductor layer 11.

[0074] The p-type semiconductor portion 12 is used to improve the surge tolerance of the JBS diode 1. The p-type semiconductor portion 12 is formed by deposition using a sputtering method, a CVD method, etc., and is not a region formed as a part of the n-type semiconductor layer 11 by impurity implantation into the inner surface of the trench 111 using an ion implantation method.

[0075] Generally, compared with a Schottky diode, a pn diode has a larger conduction voltage (forward turn-on voltage). Therefore, it is possible to design such that the voltage at which the JBS diode 1 becomes conductive does not cause the pn diode portion (the pn junction portion of the p-type semiconductor portion 12 and the n-type semiconductor layer 11) to conduct. For example, the conduction voltage of the JBS diode 1 can be set to about 1V, and the conduction voltage of the pn diode portion can be set to about 2V.

[0076] Thus, in the normal operation of the JBS diode 1, since the pn diode portion does not conduct, the Schottky diode can perform its original high-speed operation. On the other hand, when an impact current is generated, the voltage of the JBS diode 1 rises, reaching the voltage at which the pn diode portion conducts, and current is injected from the p-type semiconductor portion 12 into the n-type semiconductor layer 11.

[0077] At this time, although the resistance of the JBS diode 1 decreases and a large current such as an impact current flows through the JBS diode 1, since the rise in voltage is suppressed, the rise in temperature is suppressed, and damage to the JBS diode 1 caused by the impact current can be prevented.

[0078] The p-type semiconductor portion 12 includes a material that satisfies the condition represented by the following Equation 1 in order to form a barrier with the n-type semiconductor layer 11. χ in Equation 1 p and are respectively the electron affinity and work function of the p-type semiconductor that is the material of the p-type semiconductor portion 12, and χ n and are respectively the electron affinity and work function of the n-type semiconductor that is the material of the n-type semiconductor layer 11. In addition, the above work function is the energy of the Fermi level viewed from the vacuum level. For example, χ n of Ga2O3, which is a typical material of the n-type semiconductor layer 11, is approximately 4.0 eV, although it varies depending on the carrier concentration of the n-type semiconductor layer 11, it is approximately 4.3 - 4.0 eV in the range of carrier concentration of 1×10 14 cm -3 ~1×10 19 cm -3 .

[0079] [Mathematical formula 1]

[0080]

[0081] Materials that can be used as the material of the p-type semiconductor portion 12 and can satisfy the condition represented by the above Equation 1 are, for example, p-type semiconductors such as Cu2O, NiO, Ag2O, polycrystalline Si, single-crystalline Si, amorphous Si, SnO, Rh2O3, Ir2O3, CuO, etc. In addition, a mixture containing Cu2O, NiO, Ag2O, polycrystalline Si, single-crystalline Si, amorphous Si, SnO, Rh2O3, Ir2O3, CuO, etc. at a concentration sufficient to make the p-type semiconductor portion 12 p-type can also be used as the material of the p-type semiconductor portion 12.

[0082] That is, the p-type semiconductor that is the material of the p-type semiconductor portion 12 contains, for example, Cu2O, NiO, Ag2O, polycrystalline Si, single-crystalline Si, amorphous Si, SnO, Rh2O3, Ir2O3, or CuO. Cu2O, NiO, and SnO exhibit p-type conductivity even without adding dopants, but acceptor impurities such as Li and nitrogen (N) can also be contained. Polycrystalline Si, single-crystalline Si, and amorphous Si preferably contain acceptor impurities such as B and Al.

[0083] The carrier concentration of the p-type semiconductor portion 12 is preferably higher than the carrier concentration of the n-type semiconductor layer 11 so that when a reverse voltage is applied to the JBS diode 1, the thickness of the depletion layer generated at the interface with the n-type semiconductor layer 11 in the p-type semiconductor portion 12 does not reach the anode electrode 13.

[0084] As described above, the p-type semiconductor portion 12 not only has the first portion 121 covering the inner surface of the trench 111, but also has the second portion 122 covering the edge of the opening of the trench 111 in the first surface 113 of the n-type semiconductor layer 11. The second portion 122 is provided as a result of a process that suppresses the etching from reaching the first portion 121 due to the shift of the etching mask or the resist for lift-off during the manufacturing process of the JBS diode 1 described later when the p-type semiconductor portion 12 is formed by patterning. In addition, the first portion 121 fills the trench 111.

[0085] To obtain the desired breakdown voltage of the JBS diode 1, the thickness t1 of the p-type semiconductor portion 12 preferably satisfies the condition represented by the following Equation 2. V in Equation 2 BR is the desired breakdown voltage (designed breakdown voltage), N D is the carrier concentration of the n-type semiconductor layer 11, N A is the carrier concentration of the p-type semiconductor portion 12, ε n is the dielectric constant of the n-type semiconductor layer 11, and q is the elementary charge.

[0086] [Mathematical formula 2]

[0087]

[0088] In the JBS diode 1, by reducing the carrier concentration N A of the p-type semiconductor portion 12, the electric field generated at the interface between the n-type semiconductor layer 11 and the p-type semiconductor portion 12 when a reverse voltage is applied can be reduced. However, as shown in Equation 2, correspondingly, the thickness t1 of the p-type semiconductor portion 12 needs to be increased. In the JBS diode 1, by filling the p-type semiconductor portion 12 into the trench 111, the thickness t1 of the p-type semiconductor portion 12 can be made equal to or greater than the trench depth D. As a result, the carrier concentration N A can be made smaller, and the electric field generated at the interface between the n-type semiconductor layer 11 and the p-type semiconductor portion 12 when a reverse voltage is applied can be made smaller.

[0089] (Manufacturing method of JBS diode)

[0090] Figures 2A to 2C 、 Figures 3A to 3C is a vertical cross-sectional view showing an example of the manufacturing process of the JBS diode 1 according to an embodiment of the present invention. In this method, a plurality of p-type semiconductor portions 12 are formed by patterning a single film-like p-type semiconductor 120 using lithography.

[0091] First, as Figure 2AAs shown, on the n-type semiconductor substrate 10, a single crystal epitaxial growth of a gallium oxide-based semiconductor with a controlled donor concentration is performed by the HVPE method, CVD method, MBE method, etc., to form an n-type semiconductor layer 11.

[0092] Next, as Figure 2B shown, through photolithography and dry etching, etc., a plurality of trenches 111 are formed on the first surface 113 of the n-type semiconductor layer 11. The preferred conditions for the dry etching used for the formation of the trenches 111 are, for example, the etching gas is BCl3 (30 sccm), the pressure is 1.0 Pa, the antenna output is 160 W, the bias output is 17 W, and the time is 90 minutes.

[0093] Next, as Figure 2C shown, through the sputtering method, CVD method, etc., a p-type semiconductor 120 is deposited on the entire surface on the side of the first surface 113 of the n-type semiconductor layer 11 to form a film-like p-type semiconductor 120. The p-type semiconductor 120 covers the inner surface of the trenches 111 and the first surface 113 outside the trenches 111.

[0094] For example, in the case of using Cu2O as the material of the p-type semiconductor 120, the method described in the non-patent literature "Appl. Phys. Lett. 111, 093501 (2017), Fabrication and characterization of sputtered Fabrication and characterization of sputtered Cu2O:N / c-Si heterojunction diode" can be used. In addition, in the case of using NiO as the material of the p-type semiconductor 120, the method described in the non-patent literature "Appl. Phys. Lett. 117, 022104 (2020), A 1.86-kV double-layered NiO / β-Ga2O3-vertical pn heterojunction diode" can be used. In addition, in the case of using polycrystalline Si, amorphous Si, single crystal Si as the material of the p-type semiconductor 120, known film formation methods can be used respectively.

[0095] Next, as Figure 3A shown, a photoresist 15 is formed on the p-type semiconductor 120 through photolithography. The photoresist 15 is formed above the trenches 111 to have a width wider than that of the trenches 111.

[0096] Next, as Figure 3BAs shown, a photoresist 15 is used as a mask to etch a p-type semiconductor 120, and the pattern of the photoresist 15 is transferred to the p-type semiconductor 120 to form a p-type semiconductor portion 12. For example, when the p-type semiconductor 120 includes Cu2O, wet etching using an acidic solution such as buffered hydrofluoric acid solution, dilute hydrofluoric acid, dilute aqua regia, dilute sulfuric acid, or dry etching is used for the etching of the p-type semiconductor 120.

[0097] At this time, since the width of the photoresist 15 is wider than the width of the trench 111, even if a manufacturing process error occurs at the position where the photoresist 15 is formed, the etching will not spread to the p-type semiconductor 120 in the trench 111, and the difference in the shape of the first portion 121 formed in the trench 111 of the p-type semiconductor portion 12 is suppressed. Also, since the width of the photoresist 15 is wider than the width of the trench 111, the p-type semiconductor 120 in the portion near the edge of the opening of the trench 111 remains as the second portion 122 in the p-type semiconductor portion 12.

[0098] Considering the processing difference of the photoresist 15 caused by the alignment accuracy of the alignment exposure device used to form the photoresist 15, and the dimensional change or dimensional difference caused by the patterning process of the p-type semiconductor 120, the width W p (the lateral length from the edge of the trench 111) of the first surface 113 of the second portion 122 is designed to be set so as to always form the second portion 122 on the first surface 113 of the n-type semiconductor layer 11. On the other hand, the width W of the actually formed second portion 122 p is preferably as small as possible. As a result, the width W of the actually formed second portion 122 p becomes, for example, about 0.01 to 0.3 μm.

[0099] Next, as Figure 3C shown, the photoresist 15 on the p-type semiconductor portion 12 is removed. The removal of the photoresist 15 uses, for example, an organic agent such as NMP or acetone. Thereafter, an anode electrode 13 and a cathode electrode 14 are formed to obtain a JBS diode 1. The anode electrode 13 and the cathode electrode 14 are formed using, for example, an electron beam evaporation method.

[0100] Figures 4A to 4C is a vertical cross-sectional view showing another example of the manufacturing process of the JBS diode 1 according to the embodiment of the present invention. In this method, a plurality of p-type semiconductor portions 12 are formed by patterning using lift-off. First, as Figure 4A shown, the process is carried out in the same manner as the above method until Figure 2B the process of forming the trench 111 shown.

[0101] Next, asFigure 4B As shown, by photolithography or the like, a photoresist 16 for peeling is formed on the first surface 113 such as the upper surface of the mesa-shaped portion 112 of the n-type semiconductor layer 11. The photoresist 16 is formed so as not to contact the edge of the trench 111. Therefore, for example, the width of the photoresist 16 formed above the mesa-shaped portion 112 is smaller than the width of the mesa-shaped portion 112.

[0102] The photoresist 16 may be of a vertical type, but by forming an inverted conical photoresist 16 with inclined sidewalls as shown, Figure 4B it is possible to effectively suppress the adhesion of the p-type semiconductor 120 formed by a film-forming method such as sputtering method to the sidewalls in subsequent processes. As a result, in the subsequent peeling process, it is easy to remove the unnecessary portion of the p-type semiconductor 120 on the photoresist 16, and the processing accuracy of the p-type semiconductor portion 12 is improved.

[0103] Since the photoresist 16 is formed so as not to contact the edge of the trench 111, even if a manufacturing process error occurs at the position where the photoresist 16 is formed, a part of the photoresist 16 will not enter the trench 111.

[0104] Next, as shown, Figure 4C by a sputtering method, a CVD method, or the like, the p-type semiconductor 120 is deposited on the entire surface on the side of the first surface 113 of the n-type semiconductor layer 11. The p-type semiconductor 120 is deposited into the trench 111, on the photoresist 16, and on the region of the first surface 113 outside the trench 111 that is not covered by the photoresist 16.

[0105] At this time, since the photoresist 16 is formed so as not to contact the edge of the trench 111, the deposition of the p-type semiconductor 120 into the trench 111 is not hindered by the photoresist 16, and the difference in the shape of the first portion 121 formed in the trench 111 of the p-type semiconductor portion 12 is suppressed.

[0106] Next, by removing the photoresist 16 together with the p-type semiconductor 120 thereon, a state as shown is obtained, Figure 3C and the p-type semiconductor portion 12 is obtained. The photoresist 16 is removed using an organic-based chemical such as NMP or acetone, for example.

[0107] At this time, since the photoresist 16 is formed at a position not in contact with the edge of the trench 111, a part of the p-type semiconductor 120 near the edge of the opening of the trench 111 remains as the second portion 122 in the p-type semiconductor portion 12. Thereafter, the anode electrode 13 and the cathode electrode 14 are formed to obtain the JBS diode 1.

[0108] Considering the processing differences of the photoresist 16 caused by the alignment accuracy of the alignment exposure device used to form the photoresist 16, and the dimensional changes or dimensional differences caused by the patterning process of the p-type semiconductor 120 through the stripping process, the width W on the first surface 113 of the second part 122 p The design value of is set in such a way that the second part 122 is always formed on the first surface 113 of the n-type semiconductor layer 11. On the other hand, the width W of the actually formed second part 122 p is preferably as small as possible. As a result, the width W of the actually formed second part 122 p For example, it becomes about 0.01 to 0.3 μm.

[0109] (Modification example)

[0110] Figure 5 is a vertical cross-sectional view of a JBS diode 2 which is a modification example of the JBS diode 1. The JBS diode 2 is different from the JBS diode 1 in that the first part covering the inner surface of the trench 111 in the p-type semiconductor part does not fill the trench 111.

[0111] As Figure 5 shown, the first part 201 of the p-type semiconductor part 20 of the JBS diode 2 does not fill the trench 111. Therefore, there is a void on the p-type semiconductor part 20 in the trench 111, and a part of the anode electrode 13 is filled in the void. Since the p-type semiconductor part 20 is in a film shape, its resistance is smaller than that in the case of filling the trench 111. Therefore, the heat generation when a surge current occurs is small, and damage to the surrounding connection parts can be suppressed. In addition, since the resistance of the p-type semiconductor part 20 is small, the energy loss during the switching operation of the JBS diode 2 can be suppressed.

[0112] In addition, the thickness t2 of the film-shaped p-type semiconductor part 20 preferably satisfies the condition represented by the following formula 3 in order to obtain the desired breakdown voltage of the JBS diode 2. V in formula 3 BR is the desired breakdown voltage (designed breakdown voltage), N D is the carrier concentration of the n-type semiconductor layer 11, N A is the carrier concentration of the p-type semiconductor part 12, ε n is the dielectric constant of the n-type semiconductor layer 11, and q is the elementary charge.

[0113] [Mathematical formula 3]

[0114]

[0115] For example, when the carrier concentration of the n-type semiconductor layer 11 including a gallium oxide-based semiconductor is 1×10 16 cm -3, when the carrier concentration of the p-type semiconductor portion 20 is 1×10 19 cm -3 , if the thickness of the p-type semiconductor portion 20 is 200 nm or more, the breakdown voltage of the JBS diode 2 can be made 1200 V or more.

[0116] The p-type semiconductor portion 20 of the JBS diode 2 can be formed by the same process as the p-type semiconductor portion 12 of the JBS diode 1. For example, it is only necessary to set the thickness of the p-type semiconductor 120 deposited in the process shown in Figure 2C or Figure 4C so that the p-type semiconductor 120 does not fill the trench 111.

[0117] (Comparative Example)

[0118] Figures 6A to 6C FIG. is a vertical cross-sectional view showing an example of a manufacturing process of a JBS diode in the case of forming a p-type semiconductor portion using a planarization process as a comparative example. First, as shown in Figure 6A , the process is carried out in the same manner as the above method until the process of depositing the p-type semiconductor 120 shown in Figure 2C is completed.

[0119] Next, as shown in Figure 6B , by a planarization process such as CMP, the portion outside the trench 111 of the p-type semiconductor 120 is removed to form a p-type semiconductor portion 50 buried in the trench 111. At this time, since there is unevenness in the polishing rate of the planarization process, the shapes of the plurality of p-type semiconductor portions 50 are different, and in addition, the first surface 113 of the n-type semiconductor layer 11 is unevenly cut, so that the shape of the mesa-shaped portion between the trenches 111 is also different.

[0120] As a reason for the uneven polishing rate of the planarization process, for example, it can be cited that the polishing rate of the planarization process varies according to the pattern density of the trench 111; or when the JBS diode has a mesa shape as a whole, the polishing rate of the portion near the edge becomes higher.

[0121] Next, as shown in Figure 6C , the anode electrode 13 and the cathode electrode 14 are formed. The anode electrode 13 and the cathode electrode 14 are formed, for example, using an electron beam evaporation method.

[0122] Figures 7A to 7C , Figures 8A to 8C FIG. is a vertical cross-sectional view showing an example of a manufacturing process of a JBS diode in the case of forming a p-type semiconductor portion using a resist mask filled in the trench 111 as another comparative example.

[0123] First, as shown inFigure 7A As shown, a plurality of trenches 111 are formed on the first surface 113 of the n-type semiconductor layer 11. Then, by means of sputtering, CVD, etc., a film-like p-type semiconductor 120 is deposited on the entire surface on the side of the first surface 113 of the n-type semiconductor layer 11. The p-type semiconductor 120 is formed to have a thickness such that the trenches 111 are not filled, covering the inner surface of the trenches 111 and the first surface 113 outside the trenches 111.

[0124] Next, as Figure 7B shown, a photoresist 51 is deposited on the p-type semiconductor 120 by means of spin coating or the like so as to fill the voids in the trenches 111. At this time, the thickness of the deposited photoresist 51 varies depending on the surface shape of the n-type semiconductor layer 11, which changes according to the pattern or depth of the trenches 111, etc. Therefore, it differs for each part on the n-type semiconductor layer 11 and has a difference in the in-plane direction.

[0125] Next, as Figure 7C shown, the photoresist 51 is etched back to expose the p-type semiconductor 120 on the first surface 113. For the etching of the photoresist 51, a plasma ashing device using, for example, oxygen plasma or the like is used. At this time, due to the difference in the thickness of the photoresist 51 before the etch back, the shape of the photoresist 51 after the etch back is different.

[0126] Next, as Figure 8A shown, the p-type semiconductor 120 is etched until the first surface 113 of the n-type semiconductor layer 11 is exposed, and a p-type semiconductor portion 52 is formed in each trench 111. At this time, due to the difference in the shape of the photoresist 51 that functions as an etch mask, the shape of the p-type semiconductor portion 52 formed in the trench 111 is different.

[0127] Next, as Figure 8B shown, the photoresist 51 is removed. For the removal of the photoresist 51, organic agents such as NMP and acetone are used, for example.

[0128] Next, as Figure 8C shown, an anode electrode 13 and a cathode electrode 14 are formed. For the formation of the anode electrode 13 and the cathode electrode 14, an electron beam evaporation method is used, for example.

[0129] According to the methods of the above two comparative examples, there is a possibility that the shapes of the p-type semiconductor portions 50 and 52 formed in the trenches 111 of the n-type semiconductor layer 11 are different, resulting in a difference in the in-plane direction of the electrical characteristics of the JBS diode.

[0130] (Effect of the Embodiment)

[0131] According to the above-described embodiments of the present invention, by suppressing the difference in the shapes of the first portions 121 and 201 formed in the trenches 111 of the p-type semiconductor portions 12 and 20, it is possible to suppress the difference in the in-plane direction of the electrical characteristics of the JBS diodes 1 and 2.

[0132] As described above, the embodiments of the present invention have been described, but the present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the gist of the invention. For example, the n-type semiconductor layer 11 may also include a material other than the gallium oxide-based semiconductor. In this case, as long as the electron affinity χ n and work function of the material of the n-type semiconductor layer 11 p and work function of the material of the p-type semiconductor portion 12 satisfy the conditions represented by the above formula (1), the material of the p-type semiconductor portion 12 can be selected.

[0133] As described above, the p-type semiconductor portion 12 is not formed as a part of the n-type semiconductor layer 11 by ion implantation or the like. Therefore, even when the n-type semiconductor layer 11 includes a material that is difficult to be p-type, such as a gallium oxide-based semiconductor, the p-type semiconductor portion 12 can be formed using a material different from that of the n-type semiconductor layer 11.

[0134] If the dielectric breakdown electric field strength of the n-type semiconductor layer 11 is large, it is possible to suppress an increase in the on-resistance and obtain a large breakdown voltage. Therefore, for example, the n-type semiconductor layer 11 preferably includes a material having a dielectric breakdown electric field strength of 1 MV / cm or more or a bandgap energy of 1 or more.

[0135] As the material of the n-type semiconductor layer 11, in addition to the gallium oxide-based semiconductor, for example, SiC having a dielectric breakdown electric field strength of 2.5 MV / cm and a bandgap energy of 3.3 eV; GaN having a dielectric breakdown electric field strength of 3.3 MV / cm and a bandgap energy of 3.4 eV; Al having a dielectric breakdown electric field strength of 1.2 to 12 MV / cm and a bandgap energy of 0.6 to 6.2 eV x In y Ga 1-x-y N; or diamond having a dielectric breakdown electric field strength of about 8.0 MV / cm and a bandgap energy of 5.5 eV can be used.

[0136] In addition, the n-type semiconductor substrate 10 may also include a material other than the gallium oxide-based semiconductor. As the material of the n-type semiconductor substrate 10, the same materials as those of the n-type semiconductor layer 11 can be used.

[0137] In addition, the embodiments described above do not limit the invention claimed in the claims. In addition, it should be noted that not all combinations of the features described in the embodiments are necessary for the solution to the problem of the invention.

[0138] Industrial Applicability

[0139] Provided are a junction barrier Schottky diode and a manufacturing method thereof that suppress differences in the shape of a p-type semiconductor portion formed in a trench of an n-type semiconductor layer.

[0140] Explanation of Reference Numerals

[0141] 1...junction barrier Schottky diode, 10...n-type semiconductor substrate, 11...n-type semiconductor layer, 111...trench, 112...mesa-shaped portion, 113...first surface, 114...second surface, 12, 20...p-type semiconductor portion, 121, 201...first portion, 122, 202...second portion, 13...anode electrode, 14...cathode electrode, 120...p-type semiconductor, 15...photoresist, 16...photoresist.

Claims

1. A junction barrier Schottky diode, characterized in that, Comprising: An n-type semiconductor layer including an n-type semiconductor and having a plurality of grooves opening on a first surface; A plurality of p-type semiconductor portions including a p-type semiconductor and provided in contact with inner surfaces of respective ones of the plurality of grooves; An anode electrode provided on the first surface of the n-type semiconductor layer and on the plurality of p-type semiconductor portions and in contact with a mesa-shaped portion between the plurality of grooves of the n-type semiconductor layer; and A cathode electrode provided directly or with other layers interposed therebetween on a second surface of the n-type semiconductor layer opposite to the first surface, The electron affinity χ of the p-type semiconductor p and the work function and the electron affinity χ of the n-type semiconductor n and the work function satisfy the condition represented by the formula as shown Each of the plurality of p-type semiconductor portions having: a first portion covering the inner surface of the groove; and a second portion covering an edge of an opening of the groove in the first surface of the n-type semiconductor layer.

2. The junction barrier Schottky diode according to claim 1, wherein The first portion of each of the plurality of p-type semiconductor portions fills the groove.

3. The junction barrier Schottky diode according to claim 1, wherein A void on the p-type semiconductor portion in the plurality of grooves is filled with a part of the anode electrode.

4. The junction barrier Schottky diode according to claim 1, wherein The n-type semiconductor layer and the p-type semiconductor portion include different semiconductors.

5. The junction barrier Schottky diode according to claim 4, wherein The n-type semiconductor layer includes a gallium oxide-based semiconductor.

6. The junction barrier Schottky diode according to claim 5, wherein The p-type semiconductor includes Cu2O, NiO, Ag2O, polycrystalline Si, single crystal Si, amorphous Si, SnO, Rh2O3, Ir2O3, or CuO.

7. A manufacturing method of a junction barrier Schottky diode, characterized in that, Comprising: A step of forming a plurality of grooves on a first surface of an n-type semiconductor layer including an n-type semiconductor; A step of forming a plurality of p-type semiconductor portions in contact with inner surfaces of respective ones of the plurality of grooves by depositing a p-type semiconductor on the entire surface on the first surface side of the n-type semiconductor layer and patterning the p-type semiconductor; A step of forming an anode electrode on the first surface of the n-type semiconductor layer and on the plurality of p-type semiconductor portions in contact with a mesa-shaped portion between the plurality of grooves of the n-type semiconductor layer; and A step of forming a cathode electrode directly or with other layers interposed therebetween on a second surface of the n-type semiconductor layer opposite to the first surface, The electron affinity χ of the p-type semiconductor p and the work function and the electron affinity χ of the n-type semiconductor n and the work function satisfy the condition represented by the formula as shown Each of the plurality of p-type semiconductor portions having: a first portion covering the inner surface of the groove; and a second portion covering an edge of an opening of the groove in the first surface of the n-type semiconductor layer.

8. The method for manufacturing a junction barrier Schottky diode according to claim 7, wherein In the step of forming the plurality of p-type semiconductor portions, the plurality of p-type semiconductor portions are formed by patterning a single p-type semiconductor film using lithography.

9. The method for manufacturing a junction barrier Schottky diode according to claim 7, wherein In the step of forming the plurality of p-type semiconductor portions, the plurality of p-type semiconductor portions are formed by patterning using lift-off.

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