Photovoltaic grid-connected inverter circuit and electronic equipment

Abstract

The utility model relates to a photovoltaic grid-connected inverter circuit and electronic equipment, and belongs to the technical field of inverters, an MPPT boost circuit is connected with photovoltaic direct current, and the MPPT boost circuit comprises a boost inductor, a boost SiC MOSFET and a SiC Schottky diode; the H4 bridge inverter circuit comprises an inverter inductor and an inverter SiC MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor); the first silicon carbide driving circuit is used for confirming the driving frequency of the boost SiC MOSFET according to the inductance value of the boost inductor; the second silicon carbide driving circuit is used for confirming the driving frequency of the inversion SiC MOSFET according to the inductance value of the inversion inductor; the silicon carbide power device is used in cooperation with a corresponding PWM modulation mode, the hardware design of the photovoltaic grid-connected inverter circuit is simplified, the size and switching loss are reduced, efficiency is improved, and EMI interference is restrained.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of inverters, and particularly relates to a photovoltaic grid-connected inverter circuit and an electronic device. BACKGROUND

[0002] The photovoltaic grid-connected inverter circuit, as an interface device of a photovoltaic module and a power grid, converts the electric energy of the photovoltaic module into alternating current and transmits the alternating current to the power grid, and plays a crucial role in a photovoltaic grid-connected power generation system. The efficiency and performance of the photovoltaic grid-connected inverter circuit directly affect the efficiency, performance, service life and cost of the entire solar photovoltaic system.

[0003] The boost circuit and the inverter circuit in the related single-phase photovoltaic grid-connected inverter circuit usually use an insulate gate bipolar transistor (IGBT) as a switching device. However, the IGBT has a tail current in the process of turning off, and the IGBT body diode and the fast recovery diode have poor reverse recovery performance, resulting in large switching loss and low efficiency of the boost circuit and the inverter circuit, large required heat sink, and low switching frequency of the IGBT. The existing boost inductance and inverter inductance are designed according to the switching frequency of the IGBT, and the design volume is large, which increases the volume of the photovoltaic grid-connected inverter circuit and the electromagnetic interference (EMI) interference of the machine. UTILITY MODEL CONTENT

[0004] The application aims to provide a photovoltaic grid-connected inverter circuit and an electronic device, and aims to solve the problems of large volume, low efficiency and serious EMI interference of the existing photovoltaic grid-connected inverter circuit.

[0005] The application provides a photovoltaic grid-connected inverter circuit, which comprises:

[0006] An MPPT boost circuit is used for connecting photovoltaic direct current, and the MPPT boost circuit comprises a boost inductance, a boost SiC MOSFET and a SiC Schottky diode.

[0007] An H4 bridge inverter circuit is connected with the MPPT boost circuit and a power grid, and the H4 bridge inverter circuit comprises an inverter inductance and an inverter SiC MOSFET.

[0008] A first SiC driving circuit is connected with the boost inductance at one end and connected with the boost SiC MOSFET at the other end, and is used for confirming the driving frequency of the boost SiC MOSFET according to the inductance of the boost inductance.

[0009] A second silicon carbide drive circuit, one end of which is connected with the inverter inductor, and the other end of which is connected with the inverter SiC MOSFET, is used to confirm the drive frequency of the inverter SiC MOSFET according to the inductance of the inverter inductor.

[0010] In one of the embodiments, the photovoltaic grid-connected inverter circuit further comprises a control circuit connected with the first silicon carbide drive circuit and the second silicon carbide drive circuit respectively, and the control circuit is further used to store the inductance of the boost inductor and the inductance of the inverter inductor, so as to control the drive frequency of the first silicon carbide drive circuit and the second silicon carbide drive circuit.

[0011] In one of the embodiments, the photovoltaic grid-connected inverter circuit further comprises:

[0012] A first voltage sampling circuit, connected with the MPPT boost circuit and the H4 bridge inverter circuit, is used to sample the voltage of the first direct current output by the MPPT boost circuit, so as to output a first sampling voltage;

[0013] A second voltage sampling circuit, connected with the grid, is used to sample the voltage of the grid, so as to output a second sampling voltage;

[0014] A first current sampling circuit, connected with the H4 bridge inverter circuit and the grid, is used to sample the current of the power supply alternating current output by the H4 bridge inverter circuit, so as to output a first sampling current;

[0015] The control circuit is further connected with the first voltage sampling circuit, the second voltage sampling circuit and the first current sampling circuit, and is used to output a PWM signal according to the first sampling voltage, the second sampling voltage and the first sampling current, and control the drive frequency of the second silicon carbide drive circuit according to the PWM signal and the inductance of the inverter inductor.

[0016] In one of the embodiments, the first silicon carbide drive circuit outputs a boost drive signal according to the inductance of the boost inductor; the second silicon carbide drive circuit outputs an inverter drive signal according to the PWM signal and the inductance of the inverter inductor; the PWM signal comprises four sub-PWM signals, the second silicon carbide drive circuit comprises four sub-second silicon carbide drive circuits, and the inverter drive signal comprises four sub-inverter drive signals, wherein the first sub-inverter drive signal and the third sub-inverter drive signal are in phase, the second sub-inverter drive signal and the fourth sub-inverter drive signal are in phase, and the first sub-inverter drive signal and the second sub-inverter drive signal are in opposite phase;

[0017] The first sub-second silicon carbide drive circuit is connected with the control circuit and the H4 bridge inverter circuit, and is used for outputting the first sub-inverter drive signal according to the first sub-PWM signal in response to the first sub-PWM signal and the second sub-PWM signal being opposite phases; the first sub-inverter drive signal is in the same phase as the first sub-PWM signal;

[0018] The second sub-second silicon carbide drive circuit is connected with the control circuit and the H4 bridge inverter circuit, and is used for outputting the second sub-inverter drive signal according to the second sub-PWM signal in response to the first sub-PWM signal and the second sub-PWM signal being opposite phases; the second sub-inverter drive signal is in the same phase as the second sub-PWM signal;

[0019] The third sub-second silicon carbide drive circuit is connected with the control circuit and the H4 bridge inverter circuit, and is used for outputting the third sub-inverter drive signal according to the third sub-PWM signal in response to the third sub-PWM signal and the fourth sub-PWM signal being opposite phases; the third sub-inverter drive signal is in the same phase as the third sub-PWM signal;

[0020] The fourth sub-second silicon carbide drive circuit is connected with the control circuit and the H4 bridge inverter circuit, and is used for outputting the fourth sub-inverter drive signal according to the fourth sub-PWM signal in response to the third sub-PWM signal and the fourth sub-PWM signal being opposite phases; the fourth sub-inverter drive signal is in the same phase as the fourth sub-PWM signal.

[0021] In one of the embodiments, the inverter SiC MOSFET includes a first SiC MOSFET, a second SiC MOSFET, a third SiC MOSFET, and a fourth SiC MOSFET, and the inverter inductor includes a first inductor and a second inductor;

[0022] The gate of the first SiC MOSFET is used as a first sub-inverter drive signal input end of the H4 bridge inverter circuit, and is connected with the first sub-second silicon carbide drive circuit to input the first sub-inverter drive signal; the gate of the second SiC MOSFET is used as a second sub-inverter drive signal input end of the H4 bridge inverter circuit, and is connected with the second sub-second silicon carbide drive circuit to input the second sub-inverter drive signal; the gate of the third SiC MOSFET is used as a third sub-inverter drive signal input end of the H4 bridge inverter circuit, and is connected with the third sub-second silicon carbide drive circuit to input the third sub-inverter drive signal; the gate of the fourth SiC MOSFET is used as a fourth sub-inverter drive signal input end of the H4 bridge inverter circuit, and is connected with the fourth sub-second silicon carbide drive circuit to input the fourth sub-inverter drive signal; the drain of the first SiC MOSFET and the drain of the third SiC MOSFET are used as positive input ends of first direct current of the H4 bridge inverter circuit, and are connected with the MPPT boost circuit; the source of the second SiC MOSFET and the source of the fourth SiC MOSFET are used as negative input ends of the first direct current of the H4 bridge inverter circuit, and are connected with the MPPT boost circuit, and the positive input end of the first direct current of the H4 bridge inverter circuit and the negative input end of the first direct current of the H4 bridge inverter circuit are connected with the first direct current; the source of the first SiC MOSFET, the drain of the second SiC MOSFET and a first end of the first inductor are connected, the source of the third SiC MOSFET, the drain of the fourth SiC MOSFET and a first end of the second inductor are connected, and a second end of the first inductor and a second end of the second inductor are used as power supply alternating current output ends of the H4 bridge inverter circuit, and are connected with the power grid to output the power supply alternating current.

[0023] In one of the embodiments, the first sub-second silicon carbide drive circuit is connected with the control circuit and the first SiC MOSFET, and is further used for stopping output of the first sub-inverter drive signal according to the stop of the first sub-PWM signal, and clamping the gate voltage of the first SiC MOSFET in response to the gate voltage of the first SiC MOSFET being lower than a preset value.

[0024] The second sub-second silicon carbide drive circuit is connected with the control circuit and the second SiC MOSFET, and is further used for stopping output of the second sub-inverter drive signal according to the stop of the second sub-PWM signal, and clamping the gate voltage of the second SiC MOSFET in response to the gate voltage of the second SiC MOSFET being lower than a preset value.

[0025] The third sub-second silicon carbide drive circuit is connected with the control circuit and the third SiC MOSFET, and is further configured to stop outputting the third sub-inverter drive signal according to the stop of the third sub-PWM signal, and to clamp the gate voltage of the third SiC MOSFET in response to the gate voltage of the third SiC MOSFET being lower than a preset value.

[0026] The fourth sub-second silicon carbide drive circuit is connected with the control circuit and the fourth SiC MOSFET, and is further configured to stop outputting the fourth sub-inverter drive signal according to the stop of the fourth sub-PWM signal, and to clamp the gate voltage of the fourth SiC MOSFET in response to the gate voltage of the fourth SiC MOSFET being lower than a preset value.

[0027] In one of the embodiments, the photovoltaic grid-connected inverter circuit further comprises:

[0028] The first common-mode filter circuit is connected with the MPPT voltage-boosting circuit, and is configured to perform common-mode filtering on the photovoltaic direct current to output the photovoltaic direct current after common-mode filtering.

[0029] In one of the embodiments, the photovoltaic grid-connected inverter circuit further comprises:

[0030] The bus capacitor assembly is connected with the MPPT voltage-boosting circuit and the H4 bridge inverter circuit, and is configured to decouple the input instantaneous power and the output instantaneous power of the H4 bridge inverter circuit.

[0031] In one of the embodiments, the photovoltaic grid-connected inverter circuit further comprises:

[0032] The AC filter circuit is connected with the H4 bridge inverter circuit, and is configured to filter the power supply alternating current to output the power supply alternating current after filtering.

[0033] The AC protection switch circuit is connected with the AC filter circuit, and is configured to protect the power supply alternating current after filtering to output the power supply alternating current after protection.

[0034] The second common-mode filter circuit is connected with the AC protection switch circuit and the power grid, and is configured to perform common-mode filtering on the power supply alternating current after protection to output the power supply alternating current after common-mode filtering.

[0035] The embodiments of the present application further provide an electronic device comprising the photovoltaic grid-connected inverter circuit.

[0036] Compared with the prior art, the application has the beneficial effects that: the MPPT boost circuit includes a boost inductor, a boost SiC MOSFET and a SiC Schottky diode, the H4 bridge inverter circuit includes an inverter inductor and an inverter SiC MOSFET, wherein, the SiC MOSFET has no tail current in the turn-off process, and the switching loss is low, so the weight and size of the heat sink are small; and the SiC Schottky diode has good reverse recovery performance, which can prevent the reverse recovery current from increasing the loss of the diode and the switch tube, and reduce EMI interference.

[0037] In addition, by adding the first SiC driving circuit to drive the first SiC MOSFET and the second SiC driving circuit to drive the second SiC MOSFET, the SiC driving circuit can confirm the driving frequency according to the inductance, so that the inductance of the boost inductor and the inverter inductor can be reduced while ensuring the driving frequency of the MPPT boost circuit and the H4 bridge inverter circuit, thereby ensuring the normal operation of the photovoltaic grid-connected inverter circuit, and the reduction of the inductance of the boost inductor and the inverter inductor can greatly reduce the volume of the boost inductor and the inverter inductor, thereby reducing the volume of the photovoltaic grid-connected inverter circuit, so that the overall volume of the photovoltaic inverter is small, thereby effectively reducing the system cost and installation cost of the photovoltaic inverter. BRIEF DESCRIPTION OF DRAWINGS

[0038] In order to more clearly illustrate the technical application in the embodiments of the application, the drawings needed in the embodiment description will be briefly introduced. Obviously, the drawings in the following description are only some embodiments of the application, and other drawings can be obtained by those skilled in the art without creative labor.

[0039] Figure 1 A structural schematic diagram of a photovoltaic grid-connected inverter circuit provided by an embodiment of the application;

[0040] Figure 2 Another structural schematic diagram of a photovoltaic grid-connected inverter circuit provided by an embodiment of the application;

[0041] Figure 3 Another structural schematic diagram of a photovoltaic grid-connected inverter circuit provided by an embodiment of the application;

[0042] Figure 4 Another structural schematic diagram of a photovoltaic grid-connected inverter circuit provided by an embodiment of the application;

[0043] Figure 5 Another structural schematic diagram of a photovoltaic grid-connected inverter circuit provided by an embodiment of the application;

[0044] Figure 6Another structural schematic diagram of the photovoltaic grid-connected inverter circuit provided by an embodiment of the present application is shown.

[0045] Figure 7 Another structural schematic diagram of the photovoltaic grid-connected inverter circuit provided by an embodiment of the present application is shown.

[0046] Figure 8 A partial example circuit schematic diagram of the photovoltaic grid-connected inverter circuit provided by an embodiment of the present application is shown. DETAILED DESCRIPTION

[0047] In order to make the technical problems, technical solutions and beneficial effects of the present application clearer, the present application is further described in detail below in combination with the drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and do not limit the present application.

[0048] It should be noted that when an element is referred to as being "fixed to" or "disposed on" another element, it can be directly on the other element or indirectly on the other element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or indirectly connected to the other element.

[0049] It should be understood that the terms "length", "width", "upper", "lower", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer" and the like indicate the orientation or positional relationship shown in the drawings based on the orientation or positional relationship shown in the drawings, and are only used to facilitate the description of the present application and simplify the description, and therefore cannot be understood as indicating or implying that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as limiting the present application.

[0050] In addition, the terms "first", "second" are only for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the technical features indicated. Therefore, the features defined with "first", "second" can explicitly or implicitly include one or more of the features. In the description of the present application, the meaning of "multiple" is two or more, unless otherwise specifically limited.

[0051] Figure 1 A structural schematic diagram of the photovoltaic grid-connected inverter circuit provided by an embodiment of the present application is shown. For ease of description, only the parts related to the present embodiment are shown, and the details are as follows:

[0052] The above photovoltaic grid-connected inverter circuit is connected to the power grid and includes an MPPT boost circuit 10, an H4 bridge inverter circuit 20, a first silicon carbide drive circuit 30, and a second silicon carbide drive circuit 40.

[0053] The MPPT boost circuit 10 is used to access the photovoltaic direct current, and the MPPT boost circuit 10 comprises a boost inductor, a boost SiC MOSFET and a SiC Schottky diode.

[0054] The H4 bridge inverter circuit 20 is connected with the MPPT boost circuit 10 and the power grid, and the H4 bridge inverter circuit 20 comprises an inverter inductor and an inverter SiC MOSFET.

[0055] The first SiC drive circuit 30 is connected with the boost inductor at one end and connected with the boost SiC MOSFET at the other end, and is used to confirm the drive frequency of the boost SiC MOSFET according to the inductance of the boost inductor.

[0056] The second SiC drive circuit 40 is connected with the inverter inductor at one end and connected with the inverter SiC MOSFET at the other end, and is used to confirm the drive frequency of the inverter SiC MOSFET according to the inductance of the inverter inductor.

[0057] The photovoltaic direct current can be output by a photovoltaic panel.

[0058] The H4 bridge inverter circuit 20 can adopt a bipolar modulation mode, so as to further suppress common-mode current and improve output current harmonics while reducing loss by using the SiC MOSFET.

[0059] As an example but not limitation, as shown in Figure 2 The photovoltaic grid-connected inverter further comprises a control circuit 50 connected with the first SiC drive circuit 30 and the second SiC drive circuit 40 respectively, and the control circuit 50 is further used to store the inductance of the boost inductor and the inductance of the inverter inductor, so as to control the drive frequency of the first SiC drive circuit 30 and the second SiC drive circuit 40.

[0060] It should be noted that the drive frequency of the SiC drive circuit is increased by one time, and the inductance of the inductor is reduced by half.

[0061] The control circuit 50 controls the drive frequency of the drive circuit according to the inductance, which can ensure the drive frequency of the MPPT boost circuit 10 and the H4 bridge inverter circuit 20 while reducing the inductance of the boost inductor and the inverter inductor, so as to not only reduce the size of the photovoltaic grid-connected inverter, but also ensure the normal operation of the photovoltaic grid-connected inverter.

[0062] As an example but not limitation, as shown in Figure 3 The photovoltaic grid-connected inverter further comprises a first voltage sampling circuit 60, a second voltage sampling circuit 70 and a first current sampling circuit 80.

[0063] The first voltage sampling circuit 60 is connected with the MPPT boost circuit 10 and the H4 bridge inverter circuit 20, and is used for sampling the voltage of the first direct current output by the MPPT boost circuit 10 to output a first sampling voltage.

[0064] The second voltage sampling circuit 70 is connected with the power grid, and is used for sampling the voltage of the power grid to output a second sampling voltage.

[0065] The first current sampling circuit 80 is connected with the H4 bridge inverter circuit 20 and the power grid, and is used for sampling the current of the power supply alternating current output by the H4 bridge inverter circuit 20 to output a first sampling current.

[0066] The control circuit 50 is also connected with the first voltage sampling circuit 60, the second voltage sampling circuit 70 and the first current sampling circuit 80, and is used for outputting a PWM signal according to the first sampling voltage, the second sampling voltage and the first sampling current, and controlling the driving frequency of the second silicon carbide drive circuit 40 according to the PWM signal and the inductance of the inverter inductance. The control circuit 50 outputs the PWM signal according to the first sampling voltage, the second sampling voltage and the first sampling current, so that the control circuit 50 can adjust the PWM signal in time according to the first sampling voltage, the second sampling voltage and the first sampling current, thereby improving the real-time performance of the photovoltaic grid-connected inverter adjustment and the reliability of the photovoltaic grid-connected inverter.

[0067] As an example but not limitation, as shown in Figure 4 The first silicon carbide drive circuit 30 outputs a boost drive signal according to the inductance of the boost inductance; the second silicon carbide drive circuit 40 outputs an inverter drive signal according to the PWM signal and the inductance of the inverter inductance; the PWM signal includes four sub-PWM signals, the second silicon carbide drive circuit 40 includes four sub-second silicon carbide drive circuits 41, and the inverter drive signal includes four sub-inverter drive signals, wherein the first sub-inverter drive signal and the third sub-inverter drive signal are in phase, the second sub-inverter drive signal and the fourth sub-inverter drive signal are in phase, and the first sub-inverter drive signal and the second sub-inverter drive signal are in opposite phase.

[0068] The first sub-second silicon carbide drive circuit 41 is connected with the control circuit 50 and the H4 bridge inverter circuit 20, and is used for outputting the first sub-inverter drive signal according to the first sub-PWM signal in response to the first sub-PWM signal and the second sub-PWM signal being in opposite phase; the first sub-inverter drive signal is in phase with the first sub-PWM signal.

[0069] The second sub-second silicon carbide drive circuit 41 is connected with the control circuit 50 and the H4 bridge inverter circuit 20, and is used for outputting the second sub-inverter drive signal according to the second sub-PWM signal in response to the first sub-PWM signal and the second sub-PWM signal being in opposite phase; the second sub-inverter drive signal is in phase with the second sub-PWM signal.

[0070] The third sub-second silicon carbide drive circuit 41 is connected with the control circuit 50 and the H4 bridge inverter circuit 20, and is used for outputting a third sub-inverter drive signal according to the third sub-PWM signal in response to the third sub-PWM signal being opposite to the fourth sub-PWM signal; the third sub-inverter drive signal is in phase with the third sub-PWM signal.

[0071] The fourth sub-second silicon carbide drive circuit 41 is connected with the control circuit 50 and the H4 bridge inverter circuit 20, and is used for outputting a fourth sub-inverter drive signal according to the fourth sub-PWM signal in response to the third sub-PWM signal being opposite to the fourth sub-PWM signal; the fourth sub-inverter drive signal is in phase with the fourth sub-PWM signal.

[0072] The first sub-second silicon carbide drive circuit 41 outputs the first sub-inverter drive signal according to the first sub-PWM signal in the case that the first sub-PWM signal is opposite to the second sub-PWM signal; the second sub-second silicon carbide drive circuit 41 outputs the second sub-inverter drive signal according to the second sub-PWM signal in the case that the first sub-PWM signal is opposite to the second sub-PWM signal; the possibility that the two SiC MOSFETs on the same bridge arm of the H4 bridge inverter circuit 20 are opened at the same time is reduced when the first sub-PWM signal and the second sub-PWM signal output by the control circuit 50 are in phase due to a fault of the control circuit 50, causing the first sub-second silicon carbide drive circuit 41 and the second sub-second silicon carbide drive circuit 41 to output the first sub-inverter drive signal and the second sub-inverter drive signal at the same time; the interlocking of the first sub-second silicon carbide drive circuit 41 and the second sub-second silicon carbide drive circuit 41 is realized, and the safety and reliability of the photovoltaic grid-connected inverter circuit are improved; similarly, the third sub-second silicon carbide drive circuit 41 outputs the third sub-inverter drive signal according to the third sub-PWM signal in the case that the third sub-PWM signal is opposite to the fourth sub-PWM signal, and the fourth sub-second silicon carbide drive circuit 41 outputs the fourth sub-inverter drive signal according to the fourth sub-PWM signal in the case that the third sub-PWM signal is opposite to the fourth sub-PWM signal; the possibility that the two SiC MOSFETs on the same bridge arm of the H4 bridge inverter circuit 20 are opened at the same time is reduced when the third sub-PWM signal and the fourth sub-PWM signal output by the control circuit 50 are in phase due to a fault of the control circuit 50, causing the third sub-second silicon carbide drive circuit 41 and the fourth sub-second silicon carbide drive circuit 41 to output the third sub-inverter drive signal and the fourth sub-inverter drive signal at the same time; the interlocking of the third sub-second silicon carbide drive circuit 41 and the fourth sub-second silicon carbide drive circuit 41 is realized, and the safety and reliability of the photovoltaic grid-connected inverter circuit are improved.

[0073] As an example but not limitation, as shown in Figure 5 The photovoltaic grid-connected inverter circuit further includes a first common-mode filter circuit 90.

[0074] The first common-mode filter circuit 90 is connected with the MPPT boost circuit 10, and is configured to perform common-mode filtering on the photovoltaic direct current to output the common-mode filtered photovoltaic direct current.

[0075] The MPPT boost circuit 10 is specifically configured to convert the common-mode filtered photovoltaic direct current into the first direct current according to the boost driving signal.

[0076] The electromagnetic interference is suppressed by the first common-mode filter circuit 90, and the electromagnetic compatibility of the photovoltaic grid-connected inverter circuit is improved.

[0077] As an example but not limitation, as shown in Figure 6 The photovoltaic grid-connected inverter circuit further includes a bus capacitor assembly 100.

[0078] The bus capacitor assembly 100 is connected with the MPPT boost circuit 10 and the H4 bridge inverter circuit 20, and is configured to decouple the input instantaneous power and the output instantaneous power of the H4 bridge inverter circuit 20.

[0079] In actual use, the instantaneous power on both sides of the H4 bridge inverter circuit 20 is not matched, so the bus capacitor assembly 100 is needed to decouple the input instantaneous power and the output instantaneous power to improve the stability of the photovoltaic grid-connected inverter circuit.

[0080] As an example but not limitation, as shown in Figure 7 The photovoltaic grid-connected inverter circuit further includes an alternating current filter circuit 110, an alternating current protection switch circuit 120, and a second common-mode filter circuit 130.

[0081] The alternating current filter circuit 110 is connected with the H4 bridge inverter circuit 20, and is configured to filter the power supply alternating current to output the filtered power supply alternating current.

[0082] The alternating current protection switch circuit 120 is connected with the alternating current filter circuit 110, and is configured to protect the filtered power supply alternating current to output the protected power supply alternating current.

[0083] The second common-mode filter circuit 130 is connected with the alternating current protection switch circuit 120 and the power grid, and is configured to perform common-mode filtering on the protected power supply alternating current to output the common-mode filtered power supply alternating current.

[0084] The alternating current filter circuit 110 filters out the harmonics in the power supply alternating current, improving the stability of the photovoltaic grid-connected inverter circuit; the alternating current protection switch circuit 120 improves the safety of the photovoltaic grid-connected inverter circuit; and the second common-mode filter circuit 130 suppresses the harmonics and electromagnetic interference in the power supply alternating current, further improving the stability of the photovoltaic grid-connected inverter circuit.

[0085] The photovoltaic grid-connected inverter circuit further includes a direct current switch circuit.

[0086] The photovoltaic grid-connected inverter circuit can include two parallel MPPT boost circuits 10.

[0087] By staggered driving of the two MPPT boost circuits 10, the bus capacity size can be reduced, energy loss can be reduced, and the service life of the equipment can be prolonged.

[0088] Figure 8 A partial example circuit structure of the photovoltaic grid-connected inverter circuit provided by the embodiment of the application is shown, only the parts related to the embodiment of the application are shown for the convenience of description, and the details are as follows:

[0089] Among them, the photovoltaic direct current and the first direct current are transmitted through a direct current bus, and the direct current bus includes a positive direct current bus and a negative direct current bus.

[0090] Among them, the power supply alternating current is transmitted through an alternating current bus, and the alternating current bus includes a live wire and a zero line.

[0091] The H4 bridge inverter circuit 20 includes a first SiC MOSFET Q1, a second SiC MOSFET Q2, a third SiC MOSFET Q3, a fourth SiC MOSFET Q4, a first inductor L1, and a second inductor L2.

[0092] The gate of the first SiC MOSFET Q1 is connected with the first sub second silicon carbide drive circuit 41 as the first sub inverter drive signal input terminal of the H4 bridge inverter circuit 20, so as to input the first sub inverter drive signal; the gate of the second SiC MOSFET Q2 is connected with the second sub second silicon carbide drive circuit 41 as the second sub inverter drive signal input terminal of the H4 bridge inverter circuit 20, so as to input the second sub inverter drive signal; the gate of the third SiC MOSFET Q3 is connected with the third sub second silicon carbide drive circuit 41 as the third sub inverter drive signal input terminal of the H4 bridge inverter circuit 20, so as to input the third sub inverter drive signal; the gate of the fourth SiC MOSFET Q4 is connected with the fourth sub second silicon carbide drive circuit 41 as the fourth sub inverter drive signal input terminal of the H4 bridge inverter circuit 20, so as to input the fourth sub inverter drive signal; the drain of the first SiC MOSFET Q1 and the drain of the third SiC MOSFET Q3 are connected with the MPPT boost circuit 10 as the positive input terminal of the first direct current of the H4 bridge inverter circuit 20; the source of the second SiC MOSFET Q2 and the source of the fourth SiC MOSFET Q4 are connected with the MPPT boost circuit 10 as the negative input terminal of the first direct current of the H4 bridge inverter circuit 20, and the positive input terminal of the first direct current of the H4 bridge inverter circuit 20 and the negative input terminal of the first direct current of the H4 bridge inverter circuit 20 are connected with the first direct current; the source of the first SiC MOSFET Q1 and the drain of the second SiC MOSFET Q2 and the first end of the first inductor L1 are connected, the source of the third SiC MOSFET Q3, the drain of the fourth SiC MOSFET Q4 and the first end of the second inductor L2 are connected, and the second end of the first inductor L1 and the second end of the second inductor L2 are connected with the power grid as the power supply alternating current output terminal of the H4 bridge inverter circuit 20, so as to output the power supply alternating current.

[0093] The first inductor L1 and the second inductor L2 are inverter inductors.

[0094] It should be noted that one inductor can also achieve the filtering function, and here the first inductor L1 and the second inductor L2 are used to filter together to suppress common-mode current. In addition, the switching speed of the SiC MOSFET is fast, so the driving frequency of the inverter circuit can be improved, thereby reducing the inductance of the first inductor L1 and the second inductor L2. The driving frequency is increased by one time, and the inductance of the first inductor L1 and the second inductor L2 is reduced by one half, thereby reducing the volume of the photovoltaic grid-connected inverter circuit.

[0095] The first sub-second silicon carbide driving circuit 41 is connected with the control circuit 50 and the first SiC MOSFET Q1, and is also used for stopping and disconnecting the output of the first sub-inverter driving signal according to the first sub-PWM signal, and clamping the gate voltage of the first SiC MOSFET Q1 in response to the gate voltage of the first SiC MOSFET Q1 being less than a preset value.

[0096] The second sub-second silicon carbide driving circuit 41 is connected with the control circuit 50 and the second SiC MOSFET Q2, and is also used for stopping and disconnecting the output of the second sub-inverter driving signal according to the second sub-PWM signal, and clamping the gate voltage of the second SiC MOSFET Q2 in response to the gate voltage of the second SiC MOSFET Q2 being less than a preset value.

[0097] The third sub-second silicon carbide driving circuit 41 is connected with the control circuit 50 and the third SiC MOSFET Q3, and is also used for stopping and disconnecting the output of the third sub-inverter driving signal according to the third sub-PWM signal, and clamping the gate voltage of the third SiC MOSFET Q3 in response to the gate voltage of the third SiC MOSFET Q3 being less than a preset value.

[0098] The fourth sub-second silicon carbide driving circuit 41 is connected with the control circuit 50 and the fourth SiC MOSFET Q4, and is also used for stopping and disconnecting the output of the fourth sub-inverter driving signal according to the fourth sub-PWM signal, and clamping the gate voltage of the fourth SiC MOSFET Q4 in response to the gate voltage of the fourth SiC MOSFET Q4 being less than a preset value.

[0099] Specifically, since the SiC MOSFET has a fast switching speed, the crosstalk is prominent in the H4 bridge inverter circuit 20. It should be noted that the crosstalk refers to that in a half-bridge circuit, the switching of one SiC MOSFET causes the gate-source voltage fluctuation of another SiC MOSFET module. Specifically, the high switching speed of the SiC MOSFET leads to a high dv / dt (voltage change rate), and there is a Miller capacitance Cgd between the gate and the drain of the SiC MOSFET. The greater the dv / dt, the greater the crosstalk voltage generated by the SiC MOSFET. Therefore, in the case where the sub-second silicon carbide drive circuit 41 turns off the output of the sub-inverter drive signal, there is still a voltage on the gate of the SiC MOSFET. If the voltage is greater than the threshold voltage, the upper and lower SiC MOSFETs on the same bridge arm will be turned on at the same time, which will damage the SiC MOSFET. Therefore, in the case where the sub-second silicon carbide drive circuit 41 turns off the output of the sub-inverter drive signal, the sub-second silicon carbide drive circuit 41 needs to monitor the gate voltage of the SiC MOSFET, and in response to the gate voltage of the SiC MOSFET being lower than a preset value, the gate voltage of the SiC MOSFET is pulled low to clamp the gate voltage of the SiC MOSFET, which reduces the possibility of mis-conduction of the SiC MOSFET and improves the safety of the photovoltaic grid-connected inverter circuit.

[0100] The MPPT boost circuit 10 includes a boost SiC MOSFET Q5, a third inductor L3, a first capacitor C1, and a SiC Schottky diode D1.

[0101] The first end of the first capacitor C1, the first end of the third inductor L3, the second end of the first capacitor C1, and the source of the boost SiC MOSFET Q5 are collectively used as a photovoltaic direct current input end of the MPPT boost circuit 10 to input photovoltaic direct current. The second end of the third inductor L3, the drain of the boost SiC MOSFET Q5, and the positive electrode of the SiC Schottky diode D1 are connected. The negative electrode of the SiC Schottky diode D1, the second end of the first capacitor C1, and the source of the boost SiC MOSFET Q5 are collectively used as a first direct current output end of the MPPT boost circuit 10, and are connected with the H4 bridge inverter circuit 20 to output first direct current.

[0102] The third inductor L3 is a boost inductor.

[0103] The SiC MOSFET has a fast switching speed, so the driving frequency of the MPPT boost circuit 10 can be increased, thereby reducing the inductance of the third inductor L3. The inductance of the third inductor L3 is reduced by half for every doubling of the driving frequency, thereby reducing the size of the photovoltaic grid-connected inverter circuit.

[0104] The first sub-second silicon carbide driving circuit 41 comprises a single-channel isolated gate driver U1, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a second diode D2, a fourth capacitor C4, a fifth capacitor C5, and a sixth capacitor C6.

[0105] The first end of the first resistor R1 is connected with the control circuit 50 as the first sub-inverter driving signal input end of the first sub-second silicon carbide driving circuit 41 to input the first sub-inverter driving signal; the first end of the second resistor R2 is connected with the control circuit 50 as the second sub-inverter driving signal input end of the first sub-second silicon carbide driving circuit 41 to input the second sub-inverter driving signal; the second end of the first resistor R1 is connected with the non-inverting signal input end IN+ of the single-channel isolated gate driver U1, and the second end of the second resistor R2 is connected with the inverting signal input end IN- of the single-channel isolated gate driver U1; the ground reference end VEE2 of the single-channel isolated gate driver U1, the first end of the fourth capacitor C4, the first end of the sixth capacitor C6, and the first power supply are connected; the positive output power supply end VCC2 of the single-channel isolated gate driver U1, the first end of the fifth capacitor C5, the second end of the sixth capacitor C6, and the second power supply are connected; the second end of the fourth capacitor C4 and the second end of the fifth capacitor C5 are connected with the H4 bridge inverter circuit 20; the active Miller clamp input end CLAMP of the single-channel isolated gate driver U1, the first end of the third resistor R3, and the first end of the fourth resistor R4 are connected together as the first sub-inverter driving signal output end of the first sub-second silicon carbide driving circuit 41 and the gate voltage input end of the first SiC MOSFET Q1 of the first sub-second silicon carbide driving circuit 41, to output the first sub-inverter driving signal and input the gate voltage of the first SiC MOSFET Q1; the gate driver output end OUT of the single-channel isolated gate driver U1, the negative electrode of the second diode D2, and the second end of the fourth resistor R4 are connected, and the positive electrode of the second diode D2 and the second end of the third resistor R3 are connected.

[0106] It should be noted that the SiC MOSFET has a fast switching speed, and the crosstalk problem is prominent in the bridge circuit, so negative voltage driving is needed to prevent false conduction, therefore, the first power supply can be negative voltage, and the second power supply can be positive voltage, specifically, the first power supply can be-3V, and the second power supply can be 18V. In actual use, the single-channel isolated gate driver U1 can pull up the gate voltage of the SiC MOSFET while outputting the first sub-inverter driving signal, and the single-channel isolated gate driver U1 can pull down the gate voltage of the SiC MOSFET while stopping outputting the first sub-inverter driving signal, thereby reducing the possibility of false conduction of the SiC MOSFET and improving the safety of the photovoltaic grid-connected inverter circuit.

[0107] The specific circuit of the second sub-second silicon carbide driving circuit 41, the third sub-second silicon carbide driving circuit 41, and the fourth sub-second silicon carbide driving circuit 41 can refer to the first sub-second silicon carbide driving circuit 41, which will not be described here.

[0108] The direct current switch circuit includes a first direct current switch S1 and a second direct current switch S2.

[0109] The first direct current switch S1 is connected in series on the positive direct current bus, and the second direct current switch S2 is connected in series on the negative direct current bus.

[0110] The first common mode filter circuit 90 includes a first common mode inductor E1.

[0111] The first input end of the first common mode inductor E1 and the second input end of the first common mode inductor E1 are collectively used as the photovoltaic direct current input end of the first common mode filter circuit 90 to input photovoltaic direct current; the first output end of the first common mode inductor E1 and the second output end of the first common mode inductor E1 are collectively used as the common mode filtered photovoltaic direct current output end of the first common mode filter circuit 90, and are connected with the MPPT boost circuit 10 to output the common mode filtered photovoltaic direct current.

[0112] The bus capacitor assembly 100 includes a third capacitor C3.

[0113] The third capacitor C3 is connected in parallel between the positive direct current bus and the negative direct current bus.

[0114] The alternating current filter circuit 110 includes a second capacitor C2.

[0115] The first end of the second capacitor C2 and the second end of the second capacitor C2 are collectively used as the power supply alternating current input end of the alternating current filter circuit 110 and the filtered power supply alternating current output end of the alternating current filter circuit 110, and are connected with the H4 bridge inverter circuit 20 and the power grid to input power supply alternating current and output filtered power supply alternating current.

[0116] The alternating current protection switch circuit 120 includes a third switch S3, a fourth switch S4, a fifth switch S5, and a sixth switch S6.

[0117] The third switch S3 and the fifth switch S5 are connected in series on the live wire, and the fourth switch S4 and the sixth switch S6 are connected in series on the neutral wire.

[0118] The second common mode filter circuit 130 includes a second common mode inductor E2.

[0119] The first input end of the second common-mode inductor E2 and the second input end of the second common-mode inductor E2 are collectively used as a protected power supply alternating current input end of the second common-mode filter circuit 130, and are connected with the first current sampling circuit 80 and the alternating current filter circuit 110 to input the protected power supply alternating current; the first output end of the second common-mode inductor E2 and the second output end of the second common-mode inductor E2 are collectively used as a common-mode filtered power supply alternating current output end of the second common-mode filter circuit 130, and are connected with the power grid to output the common-mode filtered power supply alternating current.

[0120] The working principle is further described below in combination with the drawings: Figure 8

[0121] ​The direct current switch S1 transmits photovoltaic direct current to the first input end of the first common-mode inductor E1, the direct current switch S2 transmits photovoltaic direct current to the second input end of the first common-mode inductor E1, the first common-mode inductor E1 performs common-mode filtering on the photovoltaic direct current, and outputs the common-mode filtered photovoltaic direct current from the first output end of the first common-mode inductor E1 to the first end of the first capacitor C1 and the first end of the third inductor L3, and outputs the common-mode filtered photovoltaic direct current from the second output end of the first common-mode inductor E1 to the second end of the first capacitor C1 and the source of the fifth SiC MOSFET Q5, the first voltage sampling circuit 60 performs voltage sampling on the first direct current to output the first sampling voltage to the control circuit 50, the second voltage sampling circuit 70 samples the voltage of the power grid to output the second sampling voltage to the control circuit 50, the first current sampling circuit 80 samples the filtered power supply alternating current to output the first sampling current to the control circuit 50, the control circuit 50 outputs the boost driving signal to the gate of the boost SiC MOSFET Q5, the MPPT boost circuit 10 boosts the common-mode filtered photovoltaic direct current, and outputs the positive electrode of the first direct current from the negative electrode of the SiC Schottky diode D1 to the drain of the first SiC MOSFET Q1 and the drain of the third SiC MOSFET Q3, and outputs the negative electrode of the first direct current from the second end of the first capacitor C1 and the source of the fifth SiC MOSFET Q5 to the source of the second SiC MOSFET Q2 and the source of the fourth SiC MOSFET Q4, the H4 bridge inverter circuit 20 inverts the first direct current, and outputs the power supply alternating current from the source of the first SiC MOSFET Q1 and the drain of the second SiC MOSFET Q2 to the first end of the first inductor L1, and outputs the power supply alternating current from the source of the third SiC MOSFET Q3 and the drain of the fourth SiC MOSFET Q4 to the first end of the second inductor L2, the first inductor L1, the second inductor L2 and the second capacitor C2 filter the power supply alternating current, and output the filtered power supply alternating current from the second end of the first inductor L1 and the first end of the second capacitor C2 to the third switch S3, and output the filtered power supply alternating current from the second end of the second inductor L2 and the second end of the second capacitor C2 to the fourth switch S4, the third switch S3 and the fifth switch S5 transmit the filtered power supply alternating current to the first input end of the second common-mode inductor E2, the fourth switch S4 and the sixth switch S6 transmit the filtered power supply alternating current to the second input end of the second common-mode inductor E2, and the second common-mode inductor E2 performs common-mode filtering on the filtered power supply alternating current, and outputs the common-mode filtered power supply alternating current from the first output end of the second common-mode inductor E2 and the second output end of the second common-mode inductor E2 to the power grid.The control circuit 50 outputs a first sub-PWM signal to a first end of the first resistor R1 and a second sub-PWM signal to a first end of the second resistor R2, and the single-channel isolated gate driver U1 outputs a first sub-inverter drive signal to a gate of the first SiC MOSFET Q1 from a gate driver output end OUT of the single-channel isolated gate driver U1 via an active Miller clamp input end CLAMP of the single-channel isolated gate driver U1, a first end of the third resistor R3 and a first end of the fourth resistor R4 in the case that the first sub-PWM signal and the second sub-PWM signal are opposite, and the first SiC MOSFET Q1 is turned on according to the first sub-inverter drive signal, and the working principles of the second sub-second silicon carbide drive circuit 41 to the fourth sub-second silicon carbide drive circuit 41 are the same as that of the first sub-second silicon carbide drive circuit 41, and will not be described here again, so that the H4 bridge inverter circuit 20 specifically converts the first direct current into the power alternating current according to each sub-inverter drive signal.

[0122] The embodiment of the present application also provides an electronic device, which comprises the photovoltaic grid-connected inverter circuit.

[0123] It should be understood that the size of the serial number of each step in the above embodiment does not mean the order of execution, and the execution order of each process should be determined according to its function and inherent logic, and should not constitute any limitation on the implementation process of the embodiment of the present application.

[0124] The above-described embodiments are only used to illustrate the technical solutions of the present application, but not limit them; although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that they can still modify the technical solutions recorded in the foregoing embodiments, or make equivalent replacements for part of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application, and should be included in the protection scope of the present application.

Claims

1. A photovoltaic grid-tie inverter circuit, characterized by, The application relates to a photovoltaic power generation system, which comprises the following components: an MPPT boost circuit for connecting photovoltaic direct current, wherein the MPPT boost circuit comprises a boost inductor, a boost SiC MOSFET and a SiC Schottky diode; an H4 bridge inverter circuit connected with the MPPT boost circuit and a power grid, wherein the H4 bridge inverter circuit comprises an inverter inductor and an inverter SiC MOSFET; a first SiC drive circuit connected with one end of the boost inductor and the other end of the boost SiC MOSFET, which is used for confirming the drive frequency of the boost SiC MOSFET according to the inductance of the boost inductor; a second SiC drive circuit connected with one end of the inverter inductor and the other end of the inverter SiC MOSFET, which is used for confirming the drive frequency of the inverter SiC MOSFET according to the inductance of the inverter inductor.

2. The photovoltaic grid-tie inverter circuit of claim 1, wherein, The application further comprises a control circuit connected with the first SiC drive circuit and the second SiC drive circuit respectively, wherein the control circuit is further used for storing the inductance of the boost inductor and the inductance of the inverter inductor, so as to control the drive frequency of the first SiC drive circuit and the second SiC drive circuit.

3. The photovoltaic grid-tie inverter circuit of claim 2, wherein, The application further comprises: a first voltage sampling circuit connected with the MPPT boost circuit and the H4 bridge inverter circuit, which is used for voltage sampling of first direct current output by the MPPT boost circuit, so as to output a first sampling voltage; a second voltage sampling circuit connected with the power grid, which is used for voltage sampling of the voltage of the power grid, so as to output a second sampling voltage; a first current sampling circuit connected with the H4 bridge inverter circuit and the power grid, which is used for current sampling of power supply alternating current output by the H4 bridge inverter circuit, so as to output a first sampling current; a control circuit connected with the first voltage sampling circuit, the second voltage sampling circuit and the first current sampling circuit, which is used for outputting a PWM signal according to the first sampling voltage, the second sampling voltage and the first sampling current, and controlling the drive frequency of the second SiC drive circuit according to the PWM signal and the inductance of the inverter inductor.

4. The photovoltaic grid-tie inverter circuit of claim 3, wherein, The first SiC drive circuit outputs a boost drive signal according to the inductance of the boost inductor; the second SiC drive circuit outputs an inverter drive signal according to the PWM signal and the inductance of the inverter inductor; the PWM signal comprises four sub-PWM signals, the second SiC drive circuit comprises four sub-second SiC drive circuits, and the inverter drive signal comprises four sub-inverter drive signals, wherein the first sub-inverter drive signal and the third sub-inverter drive signal are in phase, the second sub-inverter drive signal and the fourth sub-inverter drive signal are in phase, and the first sub-inverter drive signal and the second sub-inverter drive signal are in opposite phase. The first sub-second silicon carbide drive circuit is connected with the control circuit and the H4 bridge inverter circuit, and is used for outputting the first sub-inverter drive signal according to the first sub-PWM signal in response to the first sub-PWM signal and the second sub-PWM signal being opposite; the first sub-inverter drive signal is in phase with the first sub-PWM signal; The second sub-second silicon carbide drive circuit is connected with the control circuit and the H4 bridge inverter circuit, and is used for outputting the second sub-inverter drive signal according to the second sub-PWM signal in response to the first sub-PWM signal and the second sub-PWM signal being opposite; the second sub-inverter drive signal is in phase with the second sub-PWM signal; The third sub-second silicon carbide drive circuit is connected with the control circuit and the H4 bridge inverter circuit, and is used for outputting the third sub-inverter drive signal according to the third sub-PWM signal in response to the third sub-PWM signal and the fourth sub-PWM signal being opposite; the third sub-inverter drive signal is in phase with the third sub-PWM signal; The fourth sub-second silicon carbide drive circuit is connected with the control circuit and the H4 bridge inverter circuit, and is used for outputting the fourth sub-inverter drive signal according to the fourth sub-PWM signal in response to the third sub-PWM signal and the fourth sub-PWM signal being opposite; the fourth sub-inverter drive signal is in phase with the fourth sub-PWM signal.

5. The photovoltaic grid-tie inverter circuit of claim 4, wherein, The inverter SiC MOSFET includes a first SiC MOSFET, a second SiC MOSFET, a third SiC MOSFET and a fourth SiC MOSFET, and the inverter inductor includes a first inductor and a second inductor; The gate of the first SiC MOSFET is used as a first sub-inverter drive signal input end of the H4 bridge inverter circuit, is connected with the first sub-second silicon carbide drive circuit, and is used for inputting the first sub-inverter drive signal; the gate of the second SiC MOSFET is used as a second sub-inverter drive signal input end of the H4 bridge inverter circuit, is connected with the second sub-second silicon carbide drive circuit, and is used for inputting the second sub-inverter drive signal; the gate of the third SiC MOSFET is used as a third sub-inverter drive signal input end of the H4 bridge inverter circuit, is connected with the third sub-second silicon carbide drive circuit, and is used for inputting the third sub-inverter drive signal; the gate of the fourth SiC MOSFET is used as a fourth sub-inverter drive signal input end of the H4 bridge inverter circuit, is connected with the fourth sub-second silicon carbide drive circuit, and is used for inputting the fourth sub-inverter drive signal; the drain of the first SiC MOSFET and the drain of the third SiC MOSFET are used as positive input ends of first direct current of the H4 bridge inverter circuit, are connected with the MPPT boost circuit, and are used for inputting the first direct current; the source of the second SiC MOSFET and the source of the fourth SiC MOSFET are used as negative input ends of the first direct current of the H4 bridge inverter circuit, are connected with the MPPT boost circuit, and are used for inputting the first direct current; the source of the first SiC MOSFET, the drain of the second SiC MOSFET and a first end of the first inductor are connected, the source of the third SiC MOSFET, the drain of the fourth SiC MOSFET and a first end of the second inductor are connected, and a second end of the first inductor and a second end of the second inductor are used as power supply alternating current output ends of the H4 bridge inverter circuit, are connected with the power grid, and are used for outputting the power supply alternating current.

6. The photovoltaic grid-tie inverter circuit of claim 5, wherein, The first sub-second silicon carbide drive circuit is connected with the control circuit and the first SiC MOSFET, is further used for stopping outputting the first sub-inverter drive signal according to the stop of the first sub-PWM signal, and clamps the gate voltage of the first SiC MOSFET in response to the gate voltage of the first SiC MOSFET being lower than a preset value; The second sub-second silicon carbide drive circuit is connected with the control circuit and the second SiC MOSFET, is further used for stopping outputting the second sub-inverter drive signal according to the stop of the second sub-PWM signal, and clamps the gate voltage of the second SiC MOSFET in response to the gate voltage of the second SiC MOSFET being lower than a preset value; The third sub-second silicon carbide drive circuit is connected with the control circuit and the third SiC MOSFET, is further used for stopping outputting the third sub-inverter drive signal according to the stop of the third sub-PWM signal, and clamps the gate voltage of the third SiC MOSFET in response to the gate voltage of the third SiC MOSFET being lower than a preset value; and The fourth sub-second silicon carbide drive circuit is connected with the control circuit and the fourth SiC MOSFET, is further used for stopping outputting the fourth sub-inverter drive signal according to the stop of the fourth sub-PWM signal, and clamps the gate voltage of the fourth SiC MOSFET in response to the gate voltage of the fourth SiC MOSFET being lower than a preset value. The third sub-second silicon carbide drive circuit is connected with the control circuit and the third SiC MOSFET, and is further configured to stop the output of the third sub-inverter drive signal according to the stop of the third sub-PWM signal, and to clamp the gate voltage of the third SiC MOSFET in response to the gate voltage of the third SiC MOSFET being lower than a preset value. The fourth sub-second silicon carbide drive circuit is connected with the control circuit and the fourth SiC MOSFET, and is further configured to stop the output of the fourth sub-inverter drive signal according to the stop of the fourth sub-PWM signal, and to clamp the gate voltage of the fourth SiC MOSFET in response to the gate voltage of the fourth SiC MOSFET being lower than a preset value.

7. The photovoltaic grid-tie inverter circuit according to any one of claims 1 to 6, wherein, Further comprising: A first common-mode filter circuit connected with the MPPT boost circuit, configured to perform common-mode filtering on the photovoltaic direct current to output the photovoltaic direct current after common-mode filtering.

8. The photovoltaic grid-tie inverter circuit of any one of claims 1 to 6, wherein, Further comprising: A bus capacitor assembly connected with the MPPT boost circuit and the H4 bridge inverter circuit, configured to decouple the input instantaneous power and the output instantaneous power of the H4 bridge inverter circuit.

9. The photovoltaic grid-tie inverter circuit of any one of claims 3 to 6, wherein, Further comprising: An alternating current filter circuit connected with the H4 bridge inverter circuit, configured to filter the power supply alternating current to output the power supply alternating current after filtering. An alternating current protection switch circuit connected with the alternating current filter circuit, configured to protect the power supply alternating current after filtering to output the power supply alternating current after protection. A second common-mode filter circuit connected with the alternating current protection switch circuit and the power grid, configured to perform common-mode filtering on the power supply alternating current after protection to output the power supply alternating current after common-mode filtering.

10. An electronic device, comprising: The photovoltaic grid-connected inverter circuit comprises the photovoltaic grid-connected inverter circuit according to any one of claims 1 to 9.

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