Regional oxide layer release method based on waveguide integrated optical chip containing photonic crystal structure
Through the regional oxide layer release method, HF corrosion-resistant photoresist is used to protect the bottom oxide layer of the waveguide, which solves the problem of waveguide collapse during the oxide layer release process of the photo-based integrated chip, and achieves the complete release of the oxide layer and the maintenance of transmission efficiency.
Patent Information
- Application Number
- CN202510492216.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-18
- Publication Date
- 2025-07-22
AI Technical Summary
During the release of the oxide layer of the photo-based integrated chip with photonic crystal structure, the oxide layer at the bottom of the straight waveguide is corroded, causing the waveguide to collapse, and the transmission efficiency is reduced.
The partial-region oxide layer release method is used to protect the bottom oxide layer of the waveguide using HF corrosion-resistant photoresist, and the photoresist is repeatedly cured during the release process to ensure that the functional area oxide layer is not corroded.
The optical-based chip is fully released during the release of the oxide layer in the transmission area, while protecting the functional area oxide layer, avoiding waveguide collapse and maintaining transmission efficiency.
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Figure CN120348904A_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the technical field of micro-nano processing, and particularly relates to a technology for releasing oxide layers in sub-regions of a waveguide integrated optical chip. Background Art
[0002] A photonic crystal is an artificial micro-nano structure formed by periodically arranging media with different refractive indices. The main feature of a photonic crystal is the presence of a photonic bandgap, which can block the propagation of waves within a specific frequency range in the photonic crystal, rendering the photonic crystal structure selective for light of different wavelength bands. Thus, photonic crystals are considered an effective means of controlling the propagation of electromagnetic waves. Based on the bandgap characteristics of photonic crystals, the applications of photonic crystal structures are extensive. By introducing nonlinear media and active materials into photonic crystals, photonic crystal optical switches and photonic crystal lasers can be formed. By introducing different types of defects and perturbations into photonic crystal structures, photonic crystal optical waveguides or high-Q photonic crystal microresonators can be designed and fabricated. The continuous development and evolution of applications and technologies related to photonic crystals have imposed higher requirements and more stringent and precise preparation conditions on the preparation process of photonic crystal structures.
[0003] Meanwhile, for an optical chip containing a photonic crystal structure, optical signals are used for signal transmission. In a laboratory environment, optical fibers are often used as the signal transmission medium. For an integrated optical chip containing a photonic crystal structure, the signals need to be transmitted on-chip through waveguides. For a traditional on-chip waveguide, the problem of collapse caused by the release of the oxide layer at the bottom of the waveguide due to the release of the transmission region can be avoided by combining a ridge waveguide with a support arm. However, for an integrated optical chip containing a photonic crystal structure, since one-dimensional and two-dimensional photonic crystals need to maintain consistency along the Z-axis, a ridge waveguide cannot be used for coupling, and a traditional straight waveguide, such as Figure 1 shown in the transmission layer part, is required. Using a support arm on a straight waveguide will cause a significant decrease in the waveguide transmission efficiency, and oxidizing and releasing the functional area without protection will cause the oxide layer at the bottom of the straight waveguide to be corroded, losing its supporting effect and resulting in waveguide collapse. Summary of the Invention
[0004] To solve the above technical problems, the present invention proposes a method for releasing oxide layers in sub-regions of a waveguide integrated optical chip based on a photonic crystal structure.
[0005] The technical solution adopted by the present invention is as follows: A method for releasing oxide layers in sub-regions of a waveguide integrated optical chip based on a photonic crystal structure, comprising:
[0006] S1. Provide a substrate, the substrate structure being divided into three layers: a top functional layer thin film, a middle buried oxide layer, and a bottom insulating layer;
[0007] S2. Spin-coat a layer of photoresist on the top layer of the substrate. Through patterning and etching processes, etch out the functional region containing the photonic crystal and the transmission region containing the waveguide on the top-layer thin film and remove the photoresist.
[0008] S3. Spin-coat and cure a layer of HF gas-resistant corrosion photoresist on the top layer of the substrate to protect the transmission region, and develop the photoresist in the functional region through a photomask.
[0009] S4. After the HF gas releases the oxide layer for a certain time, re-cure the photoresist.
[0010] S5. If the oxide layer at the bottom of the transmission region is completely released, remove the photoresist to obtain a photonic crystal chip in which the oxide layer for supporting the bottom of the functional region is not corroded and the oxide layer at the bottom of the transmission region is completely corroded; otherwise, return to step S4.
[0011] The substrate material includes SOI, LNOI, etc., with a thickness of 80 - 1000 nm.
[0012] The buried oxide layer of the substrate has a thickness of 1 - 5 um.
[0013] The photoresist described in step S2 is a positive photoresist or a negative photoresist.
[0014] The HF gas-resistant corrosion photoresist described in step S3 is an anti-corrosion photoresist such as 5216, 6214, or AR-PC 504.
[0015] As described in step S4, the release time of the oxide layer per round is 1 - 20 minutes.
[0016] Advantages of the present invention: The present invention proposes a method for releasing the oxide layer in sub-regions of a photonic crystal structure-based optical chip. During the release process, the present invention adopts a new waveguide protection method, uses an HF corrosion-resistant photoresist to wrap and protect the oxide layer at the bottom of the waveguide, and repeatedly cures the photoresist during the release process, ensuring that the photoresist does not liquefy during the release process, realizing the complete release of the oxide layer in the transmission region of the photonic crystal structure-based optical chip while protecting the oxide layer in the functional region and preventing waveguide collapse. Description of the Drawings
[0017] Figure 1 It is the front view of the method flow of the present invention.
[0018] Figure 2 It is the top view of the photonic crystal structure.
[0019] Figure 3 It is the SEM image of the accelerometer structure based on the cavity optomechanical structure. Detailed Embodiments
[0020] To facilitate the understanding of the technical content of the present invention by those skilled in the art, the content of the present invention will be further explained below with reference to the accompanying drawings.
[0021] As Figure 1 shown is a cross-sectional view of the chip. As Figure 2 shown is a top view of the photonic crystal structure. The substrate structure provided in this embodiment is divided into three layers: a top functional layer thin film, a middle buried oxide layer, and a bottom insulating layer. The method of the present invention includes the following steps:
[0022] 1. In this embodiment, a 6-inch SOI substrate is provided. The SOI substrate is cleaned through a standard RCA process to remove surface dust and dirt, preventing it from affecting the etching effect.
[0023] 2. On the SOI substrate processed in step 1, a photonic crystal chip with functional regions and transmission regions is obtained through patterning and etching. The functional regions are located on both sides, and the transmission region is located in the center. The etching effect is as Figure 2 shown. Figure 2 The holes and the etching grooves on both sides shown in
[0024] are all obtained through etching. Specifically, taking an accelerometer based on a cavity optomechanical structure as an example, the specific process is as follows: Spin-coat a layer of electron beam photoresist with a thickness of 400 nm, and complete the optical edge bead removal through edge exposure and baking. Then, use an electron beam direct writing system with the model JEOL JBX-9500FS to expose, develop, wash with ultrapure water, and spin-dry it in sequence. Finally, use the ICP process to etch out the overall structure of the accelerometer.
[0025] 3. Spin-coat the chip processed in step 2 with an AR 300-80new adhesion promoter with a standard thickness of 15 nm overall to improve the adhesion ability of the photoresist.
[0026] 4. Heat at 180 degrees for two minutes to improve the adhesion ability of the adhesion promoter.
[0027] 5. Spin-coat an AR-PC 500 HF-resistant photoresist with a thickness of 4.5 um on the chip that has been spin-coated with 15 nm of AR 300-80new adhesion promoter at a speed of 1000 revolutions per minute. The photoresist is used to protect the oxide layer.
[0028] 7. Expose and develop to remove the AR-PC photoresist above the transmission area; retain the photoresist on the functional area. The specific process of exposure and development is as follows: Exposure is to expose the pattern on the mask plate to the photoresist through a lithography machine. Among them, the positive photoresist undergoes a photochemical reaction in the exposed area and is dissolved during development. While the unexposed area of the negative photoresist is dissolved, and its exposed area crosslinks and solidifies. The main function of development is to dissolve the exposed area. The development methods include spray development, dip development, or spin immersion development. During development, the substrate is immersed in the developer to dissolve the exposed (positive resist) or unexposed (negative resist) area, thereby forming a pattern.
[0029] 8. Gaseous HF will enter and corrode the oxide layer through various holes on the surface of the Figure 2 shown chip for 10 minutes. At this time, the photoresist plays a protective role for the oxide layer in the functional area. Affected by gaseous HF, the curing effect of the photoresist above the functional area weakens;
[0030] 9. Stop the corrosion. Since the corrosion process of gaseous HF will cause the curing effect of the photoresist to weaken, it is necessary to re-cure the photoresist to prevent the AR-PC photoresist from liquefying and falling off;
[0031] 10. Repeat steps 7 and 9 for a total of three rounds, with a total release time of 30 minutes. The oxide layer at the bottom of the transmission area is completely corroded, and the oxide layer in the functional area remains intact;
[0032] 11. The oxide layer at the bottom of the transmission area is completely corroded, and the oxide layer in the functional area remains intact;
[0033] 12. Select an organic reagent such as acetone, isopropyl alcohol, ethanol, or methanol to soak and remove the photoresist. Observe the completion of photoresist removal through a microscope, and then control the soaking time; In this embodiment, acetone is selected to soak and remove the photoresist.
[0034] 13. Remove acetone to obtain a photonic crystal chip with a complete functional area and a completely released bottom of the transmission area.
[0035] As Figure 3 shown is the SEM image of the accelerometer structure based on the cavity optomechanical structure.
[0036] Those of ordinary skill in the art will realize that the embodiments described herein are to assist the reader in understanding the principles of the present invention and should be understood that the protection scope of the present invention is not limited to such specific statements and embodiments. For those skilled in the art, various changes and modifications can be made to the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present invention shall be included within the scope of the claims of the present invention.
Claims
1. A method for releasing a sub-region oxide layer of a waveguide integrated optical chip based on a photonic crystal structure, characterized in that, Including: S1. Provide a substrate, the substrate structure is divided into three layers: a top functional layer thin film, a middle buried oxide layer, and a bottom insulating layer; S2. Spin-coat a first photoresist on the top layer of the substrate. Through patterning and etching processes, etch out a functional region containing a photonic crystal and a transmission region containing a waveguide on the top thin film, and remove the first photoresist; S3. Spin-coat and cure a second photoresist resistant to HF gas corrosion on the top layer of the substrate to protect the functional region, and remove the second photoresist in the transmission region through exposure and development; S4. Re-cure the second photoresist after the HF gas releases the oxide layer for a certain time; S5. If the oxide layer at the bottom of the transmission region is completely released, remove the second photoresist to obtain a photonic crystal chip in which the oxide layer for bottom support of the functional region is not corroded and the oxide layer at the bottom of the transmission region is completely corroded; otherwise, return to step S4.
2. The method for releasing the sub-region oxide layer of a waveguide integrated optical chip based on a photonic crystal structure according to claim 1, wherein Before step S3, there is also S30: Spin-coat an adhesion promoter on the top layer of the substrate after being processed by step S2.
3. The method for releasing the sub-region oxide layer of a waveguide integrated optical chip based on a photonic crystal structure according to claim 2, wherein Step S30 specifically uses AR 300-80new adhesion promoter.
4. A method for releasing a sub-region oxide layer of a waveguide integrated optical chip based on a photonic crystal structure according to claim 2 or 3, characterized in that, After spin-coating the adhesion promoter in step S30, there is also a heat treatment to improve the adhesion ability of the adhesion promoter.
5. A method for releasing a sub-region oxide layer of a waveguide integrated optical chip based on a photonic crystal structure according to claim 4, characterized in that, The first photoresist uses an electron beam photoresist.
6. A method for releasing a sub-region oxide layer of a waveguide integrated optical chip based on a photonic crystal structure according to claim 5, characterized in that, The second photoresist uses an AR-PC photoresist.
7. A method for releasing a sub-region oxide layer of a waveguide integrated optical chip based on a photonic crystal structure according to claim 6, characterized in that, In step S4, when the HF gas releases the oxide layer, specifically, the HF gas enters the oxide layer through the holes formed in the functional region containing the photonic crystal and the transmission region containing the waveguide by the etching process in step S2, thereby corroding the oxide layer.