Converter valve fault detection method and system based on fault tree analysis and multi-frequency impedance test

Abstract

The invention discloses a converter valve fault detection method and system based on fault tree analysis and multi-frequency impedance test, and the method comprises the steps: applying multi-frequency voltage signals at two ends of a converter valve thyristor level, and collecting current and voltage data under each frequency; the multi-frequency voltage signal comprises a direct current signal and alternating current signals with different frequencies; obtaining the comprehensive impedance of a damping loop, a voltage-sharing loop and an energy-taking loop of the converter valve according to the current and voltage data; and establishing a fault tree analysis model related to fault detection of the converter valve, inputting the comprehensive impedance into the model, and performing fault diagnosis on a damping loop, a voltage-sharing loop and an energy-taking loop of the converter valve to complete fault detection of the converter valve. According to the method, the fault detection efficiency of the converter valve is improved, and the possibility of misjudgment and missed judgment is effectively reduced.

Description

Technical Field

[0001] The present invention relates to the technical field of power system maintenance, and particularly to a converter valve fault detection method and system based on fault tree analysis and multi-frequency impedance testing. Background Art

[0002] High-voltage direct current (HVDC) transmission technology has been widely applied and recognized globally due to its advantages of long-distance and large-capacity power transmission, as well as significant technical and economic benefits in asynchronous grid interconnection. As the core equipment in an HVDC transmission system, the converter valve undertakes the crucial task of converting alternating current into direct current and ensuring the stability and safety of power transmission. However, the internal structure of the converter valve is complex, especially the thyristor level and its attached damping circuit, voltage-sharing circuit, and energy-taking circuit, which are prone to failures during the long-term operation of the system. These failures not only affect the reliability of the power system but also pose a serious threat to the safety of the equipment. Therefore, the fault detection and fault location of the converter valve are particularly important.

[0003] Currently, traditional converter valve fault detection methods mainly rely on manual inspection or monitoring of current and voltage during operation. These methods have certain limitations in dealing with complex faults. For example, single-frequency testing can only detect the impedance characteristics of a specific circuit and is difficult to comprehensively analyze fault conditions in a complex electromagnetic environment. In addition, some methods can only be carried out after the equipment is shut down, with complex operations and long detection cycles, which are not conducive to the real-time maintenance of the power system. Summary of the Invention

[0004] The technical problem to be solved by the present invention is to provide a converter valve fault detection method and system based on fault tree analysis and multi-frequency impedance testing, which can more comprehensively and accurately identify faults in the internal damping circuit, voltage-sharing circuit, and energy-taking circuit of the converter valve, thereby meeting the needs of power system operation.

[0005] To solve the above technical problems, the present invention adopts the following technical solutions:

[0006] A converter valve fault detection method based on fault tree analysis and multi-frequency impedance testing includes the following steps:

[0007] S1. Apply a multi-frequency voltage signal across the thyristor level of the converter valve and collect current and voltage data at each frequency; the multi-frequency voltage signal includes a DC signal and AC signals of different frequencies.

[0008] S2. Obtain the comprehensive impedance of the damping circuit, voltage-sharing circuit, and energy-taking circuit of the converter valve based on the current and voltage data in step S1.

[0009] S3. Establish a fault tree analysis model related to the converter valve fault detection, input the comprehensive impedance obtained in step S2 into this model, conduct fault diagnosis on the damping circuit, voltage equalizing circuit and energy extraction circuit of the converter valve, and complete the fault detection of the converter valve.

[0010] Further, in step S2, the comprehensive impedance Z DC of the damping circuit, voltage equalizing circuit and energy extraction circuit of the converter valve has the following calculation formula:

[0011]

[0012] where V DC represents the applied DC voltage, and I DC represents the DC current.

[0013] Detect the peak current and voltage corresponding to AC signals of different frequencies, and calculate the comprehensive impedance values at the corresponding frequencies. The specific formula is:

[0014]

[0015] where Z(f1) represents the comprehensive impedance corresponding to the frequency f1; Z(f2) represents the comprehensive impedance corresponding to the frequency f2; U peak (f1), U peak (f2) respectively represent the peak voltages corresponding to the frequencies f1 and f2; I peak (f1), I peak (f2) respectively represent the peak currents corresponding to the frequencies f1 and f2.

[0016] Further, in step S3, the fault tree analysis model includes top events, intermediate events and bottom events.

[0017] Among them, the top event is the fault of the damping circuit, voltage equalizing circuit and energy extraction circuit of the converter valve.

[0018] The intermediate events are the resistance faults and capacitance faults of the damping circuit and energy extraction circuit of the converter valve and the voltage equalizing circuit fault.

[0019] The bottom event is the fault of specific components in the thyristor stage of the converter valve.

[0020] The top event, intermediate event and bottom event are all logical OR gates.

[0021] When the input comprehensive impedance is not within the standard threshold range of the converter valve thyristor stage impedance, it indicates that there is a fault in the converter valve; when the comprehensive impedance corresponding to the frequency f1 is not within the standard threshold range of the converter valve thyristor stage impedance, and the comprehensive impedance corresponding to the frequency f2 is within the standard threshold range of the converter valve thyristor stage impedance, it indicates that there is a capacitor fault in the damping circuit and the energy extraction circuit of the converter valve; when the comprehensive impedance corresponding to the frequency f2 is not within the standard threshold range of the converter valve thyristor stage impedance, and the comprehensive impedance corresponding to the frequency f1 is within the standard threshold range of the converter valve thyristor stage impedance, it indicates that there is a resistor fault in the damping circuit and the energy extraction circuit of the converter valve; when the comprehensive impedance corresponding to the frequency f1 and the comprehensive impedance corresponding to the frequency f2 are both not within the standard threshold range of the converter valve thyristor stage impedance, if the order of magnitude of the resistance value is in the order of ten thousand ohms at this time, it indicates a resistor fault, and if the order of magnitude of the capacitive reactance value is in the order of ten thousand ohms at this time, it indicates a capacitor fault.

[0022] Furthermore, by applying AC signals with different frequencies at both ends of the converter valve thyristor stage, the active and reactive power equation sets are obtained, and then the fault judgment of the damping circuit and the energy extraction circuit of the converter valve is verified.

[0023] The damping circuit includes a first resistor R1, a second resistor R2, a first capacitor C1 and a second capacitor C2; the energy extraction circuit includes a third resistor R3 and a third capacitor C3; the voltage equalizing circuit includes a fourth resistor R dc1 and a fifth resistor R dc2 .

[0024] The impedance Z1 corresponding to the series branch composed of the first resistor R1 and the first capacitor C1 is:

[0025]

[0026] where j represents the imaginary part, ω represents the angular frequency, ω = 2πf, f represents the applied frequency, f = f1, f2.

[0027] The impedance Z2 corresponding to the series branch composed of the second resistor R2 and the second capacitor C2 is:

[0028]

[0029] The impedance Z3 corresponding to the series branch composed of the third resistor R3 and the third capacitor C3 is:

[0030]

[0031] The impedance Z of the parallel branch composed of Z2 and Z3 23 is:

[0032]

[0033] Definition

[0034] Then

[0035] Definition

[0036] Then

[0037] The impedance Z corresponding to the series branch composed of Z1 and Z 23 is: 123 is:

[0038]

[0039] The active power P1 of the damping circuit and the energy extraction circuit of the converter valve is:

[0040]

[0041] where U represents the applied AC voltage.

[0042] The reactive power Q1 of the damping circuit and the energy extraction circuit of the converter valve is:

[0043]

[0044] The active power P2 and reactive power Q2 of the branch corresponding to the voltage equalizing circuit of the converter valve are respectively:

[0045]

[0046] Q2 = 0.

[0047] The total active power P and total reactive power Q under AC signals of different frequencies are respectively:

[0048] P = P1 + P2

[0049] Q = Q1 + Q2.

[0050] According to the known total active power P and total reactive power Q, the resistance value and capacitive reactance value are obtained by using the active and reactive power equations. When the error of the resistance value compared with the rated resistance setting value is within ±5%, it indicates a resistance fault; when the error of the capacitance value compared with the designed rated value is within ±10%, it indicates a capacitance fault.

[0051] Furthermore, the present invention also proposes a converter valve fault detection system based on fault tree analysis and multi-frequency impedance testing, including:

[0052] A data acquisition module, configured to apply multi-frequency voltage signals across the thyristor levels of the converter valve and collect current and voltage data at each frequency.

[0053] A comprehensive impedance calculation module is configured to obtain the comprehensive impedance of the damping circuit, voltage equalizing circuit, and energy extraction circuit of the converter valve based on the current and voltage data in the data acquisition module.

[0054] A fault detection module is configured to establish a fault tree analysis model related to the converter valve fault detection, input the comprehensive impedance obtained in the comprehensive impedance calculation module into the model, perform fault diagnosis on the fault conditions of the damping circuit, voltage equalizing circuit, and energy extraction circuit of the converter valve, and complete the fault detection of the converter valve.

[0055] Furthermore, the present invention also provides an electronic device, including a memory, a processor, and a computer program stored on the memory and executable on the processor. When the processor executes the computer program, the steps of the converter valve fault detection method based on fault tree analysis and multi-frequency impedance testing are implemented.

[0056] Furthermore, the present invention also provides a computer-readable storage medium. The computer-readable storage medium stores a computer program, and when the computer program is run by a processor, the converter valve fault detection method based on fault tree analysis and multi-frequency impedance testing is executed.

[0057] Compared with the prior art, the present invention adopts the above technical solutions and has the following technical effects:

[0058] The method proposed by the present invention improves the efficiency of converter valve fault detection, effectively reduces the possibility of misjudgment and missed judgment, and can more accurately locate the fault point by layer-by-layer investigation of the converter valve fault causes, thereby improving the reliability of the system. BRIEF DESCRIPTION OF THE DRAWINGS

[0059] Figure 1 is the structural diagram of the fault tree analysis model of the present invention.

[0060] Figure 2 is the schematic diagram of the thyristor-level electrical of the present invention.

[0061] Figure 3 is the equivalent circuit diagram of the thyristor level of the present invention.

[0062] Figure 4 is the test result diagram of the DC impedance of the converter valve under normal conditions in the embodiment of the present invention.

[0063] Figure 5 is the test result diagram of the 100 Hz impedance of the converter valve under normal conditions in the embodiment of the present invention.

[0064] Figure 6 is the test result diagram of the 100 kHz impedance of the converter valve under normal conditions in the embodiment of the present invention.

[0065] Figure 7 It is the test result diagram of the 100Hz impedance of the converter valve under the short - circuit of the capacitor in the embodiment of the present invention.

[0066] Figure 8 It is the test result diagram of the 100kHz impedance of the converter valve under the short - circuit of the capacitor in the embodiment of the present invention.

[0067] Figure 9 It is the test result diagram of the 100Hz impedance of the converter valve under the short - circuit of the resistor in the embodiment of the present invention.

[0068] Figure 10 It is the test result diagram of the 100kHz impedance of the converter valve under the short - circuit of the resistor in the embodiment of the present invention.

[0069] Figure 11 It is the test result diagram of the 100Hz impedance of the converter valve under the situation of resistor surge in the embodiment of the present invention.

[0070] Figure 12 It is the test result diagram of the 100kHz impedance of the converter valve under the situation of resistor surge in the embodiment of the present invention. Specific embodiments

[0071] The present invention will be further described below with reference to the accompanying drawings. The following embodiments are only used to more clearly illustrate the technical solutions of the present invention and cannot be used to limit the protection scope of the present invention.

[0072] To achieve the above - mentioned purpose, the present invention proposes a converter valve fault detection method based on fault tree analysis and multi - frequency impedance testing. The specific steps are as follows:

[0073] S1. Apply multi - frequency voltage signals across the thyristor stage of the converter valve to capture current and voltage data at different frequencies. By applying multi - frequency signals, the electrical response characteristics of different circuits can be comprehensively evaluated, and the current and voltage data at each frequency are collected. The multi - frequency voltage signals include DC signals and 100Hz and 100kHz sine signals.

[0074] S2. Obtain the comprehensive impedance of the damping circuit, voltage - sharing circuit, and energy - extraction circuit of the converter valve according to the current and voltage data in step S1.

[0075] The comprehensive impedance Z of the damping circuit, voltage - sharing circuit, and energy - extraction circuit of the converter valve DC The calculation formula is:

[0076]

[0077] Among them, V DC represents the applied DC voltage, and I DC represents the DC current.

[0078] Since the damping circuit and the energy extraction circuit contain inductance and capacitance elements, the damping circuit and the energy extraction circuit do not work when a DC voltage is applied. Therefore, the calculated impedance value reflects the resistance characteristics of the voltage equalizing circuit of the converter valve.

[0079] Detect the peak current and voltage corresponding to the sine signal at frequencies of 100 Hz and 100 kHz, and calculate the comprehensive impedance value at the corresponding frequencies. The specific formula is:

[0080]

[0081] Among them, Z(f1) represents the comprehensive impedance corresponding to a frequency of 100 Hz, f1 = 100 Hz; Z(f2) represents the comprehensive impedance corresponding to a frequency of 100 kHz, f2 = 100 kHz; U peak (f1), U peak (f2) respectively represent the peak voltages corresponding to frequencies of 100 Hz and 100 kHz; I peak (f1), I peak (f2) respectively represent the peak currents corresponding to frequencies of 100 Hz and 100 kHz.

[0082] The impedance value calculated at this time reflects the resistance characteristics of the damping circuit and the energy extraction circuit of the converter valve.

[0083] S3. Establish a fault tree analysis model related to the fault detection of the converter valve, input the comprehensive impedance obtained in step S2 into this model, and perform fault diagnosis on the damping circuit, voltage equalizing circuit and energy extraction circuit of the converter valve to complete the fault detection of the converter valve.

[0084] As Figure 1 shown, the fault tree analysis model includes top events, intermediate events and bottom events.

[0085] Among them, the top event represents the main fault that occurs in the entire system. The top event is the fault of the damping circuit, voltage equalizing circuit and energy extraction circuit of the converter valve.

[0086] The fault is further divided into the voltage equalizing circuit fault of the converter valve and the resistance fault and capacitance fault of the energy extraction circuit and damping circuit of the converter valve. The DC impedance test, as the first step of troubleshooting, can quickly identify the health status of the voltage equalizing circuit resistance and provide a direction for subsequent tests.

[0087] The intermediate events are the voltage equalizing circuit fault of the converter valve and the resistance fault and capacitance fault of the damping circuit and energy extraction circuit of the converter valve.

[0088] The bottom event is the specific component fault in the thyristor stage of the converter valve.

[0089] The top event, intermediate event and bottom event are all logical OR gates.

[0090] According to the technical specifications of the converter valve, determine the normal impedance range at each frequency, establish an impedance reference table by referring to existing engineering data and empirical values, and check whether the comprehensive impedance obtained from the impedance test is within the impedance standard threshold range of the converter valve thyristor level given by the converter valve manufacturer.

[0091] When the input comprehensive impedance is not within the impedance standard threshold range of the converter valve thyristor level, it indicates that there is a fault in the converter valve; when the comprehensive impedance corresponding to a frequency of 100 Hz is not within the impedance standard threshold range of the converter valve thyristor level, and the comprehensive impedance corresponding to a frequency of 100 kHz is within the impedance standard threshold range of the converter valve thyristor level, it indicates that there is a capacitance fault in the damping circuit and energy extraction circuit of the converter valve, and in this case, the abnormal capacitance does not show a significant increase in the capacitive reactance value; when the comprehensive impedance corresponding to a frequency of 100 kHz is not within the impedance standard threshold range of the converter valve thyristor level, and the comprehensive impedance corresponding to a frequency of 100 Hz is within the impedance standard threshold range of the converter valve thyristor level, it indicates that there is a resistance fault in the damping circuit and energy extraction circuit of the converter valve, and in this case, the abnormal resistance does not show a significant increase in the resistance value; when the comprehensive impedance corresponding to a frequency of 100 Hz and the comprehensive impedance corresponding to a frequency of 100 kHz are both not within the impedance standard threshold range of the converter valve thyristor level, if the resistance value increases significantly at this time, greater than tens of thousands of ohms, it indicates a resistance fault, and if the capacitive reactance value increases significantly at this time, greater than tens of thousands of ohms, it indicates a capacitance fault.

[0092] Based on the Figure 2 shown schematic diagram of the thyristor-level electric circuit, by applying AC signals with different frequencies across the two ends of the converter valve thyristor level, obtain the active and reactive power equation sets, and then verify the fault judgment situation of the damping circuit and energy extraction circuit of the converter valve.

[0093] As shown in the Figure 3 equivalent circuit diagram of the thyristor level, the damping circuit includes a first resistor R1, a second resistor R2, a first capacitor C1, and a second capacitor C2; the energy extraction circuit includes a third resistor R3 and a third capacitor C3; the voltage equalization circuit includes a fourth resistor R dc1 and a fifth resistor R dc2 .

[0094] The impedance Z1 corresponding to the series branch composed of the first resistor R1 and the first capacitor C1 is:

[0095]

[0096] where j represents the imaginary part, ω represents the angular frequency, ω = 2πf, f represents the applied frequency, f = 100 Hz, 100 kHz.

[0097] The impedance Z2 corresponding to the series branch composed of the second resistor R2 and the second capacitor C2 is:

[0098]

[0099] The impedance Z3 corresponding to the series branch composed of the third resistor R3 and the third capacitor C3 is:

[0100]

[0101] The impedance Z of the parallel branch composed of Z2 and Z3 23 is:

[0102]

[0103] Define Then Define Then The impedance Z of the series branch composed of Z1 and Z 23 is: 123 is:

[0104]

[0105] The active power P1 of the damping circuit and the energy extraction circuit of the converter valve is:

[0106]

[0107] Among them, U represents the applied AC voltage.

[0108] The reactive power Q1 of the damping circuit and the energy extraction circuit of the converter valve is:

[0109]

[0110] The active power P2 and the reactive power Q2 of the corresponding branch of the voltage equalizing circuit of the converter valve are respectively:

[0111]

[0112] Q2 = 0.

[0113] The total active power P and the total reactive power Q under AC signals of different frequencies are respectively:

[0114] P = P1 + P2

[0115] Q = Q1 + Q2.

[0116] According to the known total active power P and total reactive power Q, the resistance value and capacitive reactance value are obtained by using the active and reactive power equations. When the error of the resistance value compared with the rated resistance value is within ±5%, it indicates a resistance fault; when the error of the capacitance value compared with the designed rated value is within ±10%, it indicates a capacitance fault.

[0117] By analyzing each component of the equivalent circuit diagram of the thyristor of the converter valve, it can be known that R1 and R2 are in the order of dozens of ohms; C1, C2, and C3 are in the order of a few microfarads; R3 is in the order of hundreds of ohms; R dc1 and R dc2 are in the order of tens of thousands of ohms.

[0118] For the resistors and capacitors inside the converter valve, it can be known that the resistance is not affected by frequency. According to the capacitive reactance formula of the capacitor, the capacitive reactance is inversely proportional to the frequency. Therefore, the capacitive reactance is large at low frequencies and the resistance effect is not obvious. So, the comprehensive impedance of the 100Hz impedance test circuit is mainly capacitive reactance; but as the frequency increases, the capacitive reactance is very small at high frequencies. Therefore, the comprehensive impedance of the 100kHz impedance test circuit is mainly resistive.

[0119] To verify the effectiveness of the method proposed in the present invention, the thyristor stage of the Xuji HVTV2000 - 800 / 5000E type converter valve in the high and low - end valve halls of the pole I of the UHV Yibin Converter Station was selected for research. R1 = 50 / 3Ω, R2 = 50 / 3Ω, R3 = 440Ω, C1 = 4.4μF, C2 = 4.4μF, C3 = 1.23μF, R dc1 = 44kΩ, R dc2 = 44kΩ.

[0120] A DC voltage with an amplitude of 100V, a 100Hz voltage signal, and a 100kHz voltage signal were applied to the thyristor - stage circuit of the converter valve in the MATLAB simulation platform. Assuming that the damping circuit, energy - taking circuit, and voltage - equalizing circuit of the converter valve are all normal, the waveform diagrams obtained from the impedance test of the thyristor stage are as shown in Figure 4 、 5 、6.

[0121] According to Figure 4 (a) of, the peak voltage of the voltage - equalizing circuit under the applied DC voltage signal is 100V. Figure 4 (b) of, the peak current of the voltage - equalizing circuit under the applied DC voltage signal is 0.00136A. Thus, the comprehensive impedance of the voltage - equalizing circuit of the converter valve can be calculated to be approximately 88kΩ, which is within the normal range, indicating that the voltage - equalizing circuit is normal at this time.

[0122] The impedance standard thresholds of the thyristor stage of the converter valve used in the present invention are: 600 - 700Ω (frequency 100Hz) and 25 - 35Ω (frequency 100kHz).

[0123] According to Figure 5 (a) of Figure 5 it can be obtained that the peak voltage of the circuit under the applied 100 Hz voltage signal is 100 V.

[0124] According to Figure 6 (a) of Figure 6 it can be obtained that the peak current of the circuit under the applied 100 kHz voltage signal is 0.154 A, so that the comprehensive impedance of the circuit at this time can be calculated as 649 Ω.

[0125] Assume that the capacitors C1 and C2 in the damping circuit and the energy extraction circuit of the commutation valve are short-circuited. At this time, impedance testing is carried out according to the established fault tree model, and the test results are as Figure 7 、 8 shown.

[0126] According to Figure 7 (a) of Figure 7 it can be obtained that the peak voltage of the circuit under the applied 100 Hz voltage signal is 100 V.

[0127] According to Figure 8 (a) of Figure 8 it can be obtained that the peak current of the circuit under the applied 100 kHz voltage signal is 3.05 A, so that the comprehensive impedance of the circuit at this time can be calculated as 33 Ω.

[0128] It can be seen that the 100 Hz impedance test is abnormal and the 100 kHz impedance test is normal. Then, at this time, the capacitor elements in the damping circuit and the energy extraction circuit of the commutation valve fail, which conforms to the set situation.

[0129] Assume that the resistors R2 and R3 in the damping circuit and the energy extraction circuit of the commutation valve are short-circuited. At this time, impedance testing is carried out according to the established fault tree model, and the test results are as Figure 9 、 10 shown.

[0130] According to Figure 9 (a) of Figure 9From (b), the peak current of the circuit under a 100 Hz voltage signal is 0.154 A, so the comprehensive impedance of the circuit at this time can be calculated as 649 Ω.

[0131] According to Figure 10 From (a), the peak voltage of the circuit under a 100 kHz voltage signal is 100 V. Figure 10 From (b), the peak current of the circuit under a 100 kHz voltage signal is 6 A, so the comprehensive impedance of the circuit at this time can be calculated as 17 Ω.

[0132] It can be seen that the impedance test at 100 kHz is abnormal and the impedance test at 100 Hz is normal. At this time, the resistance elements in the damping circuit and the energy extraction circuit of the converter valve fail, which conforms to the set situation.

[0133] Assume that the resistances in the damping circuit and the energy extraction circuit of the converter valve fail, causing the resistance values to surge at this time. At this time, impedance tests are carried out according to the established fault tree model, and the test results are as Figure 11 、 12 shown.

[0134] According to Figure 11 From (a), the peak voltage of the circuit under a 100 Hz voltage signal is 100 V. Figure 11 From (b), the peak current of the circuit under a 100 Hz voltage signal is 0.125 A, so the comprehensive impedance of the circuit at this time can be calculated as 800 Ω.

[0135] According to Figure 12 From (a), the peak voltage of the circuit under a 100 kHz voltage signal is 100 V. Figure 12 From (b), the peak current of the circuit under a 100 kHz voltage signal is 0.26 A, so the comprehensive impedance of the circuit at this time can be calculated as 384 Ω.

[0136] It can be seen that the impedance test at 100 Hz is abnormal and the impedance test at 100 kHz is abnormal. At this time, the resistances in the damping circuit and the energy extraction circuit of the converter valve fail, which conforms to the set situation.

[0137] In summary, the present invention utilizes multi-frequency (DC, 100 Hz, 100 kHz) impedance testing, combines the laws of the characteristics of resistance and capacitance changing with frequency, and deeply analyzes the comprehensive impedance characteristics of the damping circuit, voltage-sharing circuit, and energy-taking circuit of the converter valve. Through frequency-divided detection, abnormal manifestations of resistance and capacitance can be distinguished, and more accurate fault location can be achieved. At the same time, the present invention combines the fault tree analysis model with multi-frequency impedance testing, and through logical analysis of top events, intermediate events, and bottom events, systematically correlates the impedance test results with specific component failures inside the converter valve. This method can quickly locate specific fault points without disconnecting electrical connection wires, improving the detection efficiency and reducing the possibilities of misjudgment and missed judgment.

[0138] An embodiment of the present invention also proposes a converter valve fault detection system based on fault tree analysis and multi-frequency impedance testing, including a data acquisition module, a comprehensive impedance calculation module, a fault detection module, and a computer program that can run on a processor. It should be noted that each module in the above system corresponds to the specific steps of the method provided by the embodiment of the present invention, and has the corresponding functional modules and beneficial effects of the execution method. For technical details not described in detail in this embodiment, reference can be made to the method provided by the embodiment of the present invention.

[0139] An embodiment of the present invention also proposes an electronic device, including a memory, a processor, and a computer program stored on the memory and executable on the processor. It should be noted that when the processor executes the computer program, it corresponds to the specific steps of the method provided by the embodiment of the present invention, and has the corresponding functional modules and beneficial effects of the execution method. For technical details not described in detail in this embodiment, reference can be made to the method provided by the embodiment of the present invention.

[0140] An embodiment of the present invention also proposes a computer-readable storage medium, and the computer-readable storage medium stores a computer program. It should be noted that when the computer program is run by a processor, it corresponds to the specific steps of the method provided by the embodiment of the present invention, and has the corresponding functional modules and beneficial effects of the execution method. For technical details not described in detail in this embodiment, reference can be made to the method provided by the embodiment of the present invention.

[0141] The above is only the preferred embodiment of the present invention. It should be pointed out that for those of ordinary skill in the art, without departing from the technical principle of the present invention, several improvements and deformations can be made, and these improvements and deformations should also be regarded as the protection scope of the present invention.

Claims

1. A fault detection method for a converter valve based on fault tree analysis and multi-frequency impedance testing, characterized in that Including: S1. Apply a multi-frequency voltage signal across the thyristor level of the converter valve, and collect current and voltage data at each frequency. The multi-frequency voltage signal includes a DC signal and AC signals of different frequencies; S2. Obtain the comprehensive impedance of the damping circuit, voltage-sharing circuit, and energy-taking circuit of the converter valve based on the current and voltage data in step S1; S3. Establish a fault tree analysis model related to the fault detection of the converter valve, input the comprehensive impedance obtained in step S2 into this model, perform fault diagnosis on the damping circuit, voltage-sharing circuit, and energy-taking circuit of the converter valve, and complete the fault detection of the converter valve.

2. The fault detection method for converter valves based on fault tree analysis and multi-frequency impedance testing according to claim 1, characterized in that In step S2, the combined impedance Z of the damping circuit, voltage equalizing circuit and energy extraction circuit of the commutation valve DC is calculated by the formula: Among them, V DC represents the applied DC voltage, and I DC represents the DC current; Detect the peak current and voltage corresponding to AC signals of different frequencies, and calculate the comprehensive impedance value at the corresponding frequency. The specific formula is: Among them, Z(f1) represents the comprehensive impedance corresponding to the frequency f1; Z(f2) represents the comprehensive impedance corresponding to the frequency f2; U peak (f1), U peak (f2) respectively represent the peak voltages corresponding to the frequencies f1 and f2; I peak (f1), I peak (f2) respectively represent the peak currents corresponding to the frequencies f1 and f2.

3. The fault detection method for a converter valve based on fault tree analysis and multi-frequency impedance testing according to claim 2, wherein In step S3, the fault tree analysis model includes top events, intermediate events, and bottom events; Among them, the top event is the fault of the damping circuit, voltage-sharing circuit, and energy-taking circuit of the converter valve; The intermediate events are the resistance faults and capacitance faults of the damping circuit and energy-taking circuit of the converter valve and the voltage-sharing circuit fault; The bottom event is the fault of specific components in the thyristor level of the converter valve; The top event, intermediate event, and bottom event are all logical OR gates; When the input comprehensive impedance is not within the standard impedance threshold range of the thyristor level of the converter valve, it indicates that the converter valve has a fault; when the comprehensive impedance corresponding to the frequency f1 is not within the standard impedance threshold range of the thyristor level of the converter valve, and the comprehensive impedance corresponding to the frequency f2 is within the standard impedance threshold range of the thyristor level of the converter valve, it indicates that there is a capacitance fault in the damping circuit and energy-taking circuit of the converter valve; when the comprehensive impedance corresponding to the frequency f2 is not within the standard impedance threshold range of the thyristor level of the converter valve, and the comprehensive impedance corresponding to the frequency f1 is within the standard impedance threshold range of the thyristor level of the converter valve, it indicates that there is a resistance fault in the damping circuit and energy-taking circuit of the converter valve; when the comprehensive impedance corresponding to the frequency f1 and the comprehensive impedance corresponding to the frequency f2 are both not within the standard impedance threshold range of the thyristor level of the converter valve, if the order of magnitude of the resistance value is in the order of ten thousand ohms at this time, it indicates a resistance fault, and if the order of magnitude of the capacitive reactance value is in the order of ten thousand ohms at this time, it indicates a capacitance fault.

4. The fault detection method for a converter valve based on fault tree analysis and multi-frequency impedance testing according to claim 3, characterized in that By applying AC signals of different frequencies across the thyristor level of the converter valve, obtain the active and reactive power equations, and then verify the fault judgment situation of the damping circuit and energy-taking circuit of the converter valve; The damping circuit includes a first resistor R1, a second resistor R2, a first capacitor C1 and a second capacitor C2; the energy extraction circuit includes a third resistor R3 and a third capacitor C3; the voltage equalizing circuit includes a fourth resistor R dc1 and a fifth resistor R dc2 ; The impedance Z1 corresponding to the series branch composed of the first resistor R1 and the first capacitor C1 is: Among them, j represents the imaginary part, ω represents the angular frequency, ω = 2πf, f represents the applied frequency, f = f1, f2; The impedance Z2 corresponding to the series branch composed of the second resistor R2 and the second capacitor C2 is: The impedance Z3 corresponding to the series branch composed of the third resistor R3 and the third capacitor C3 is: The impedance Z corresponding to the parallel branch composed of Z2 and Z3 23 is as follows: Definition Then Definition Then The impedance Z corresponding to the series branch composed of Z1 and Z 23 is as follows: 123 is: The active power P1 of the damping circuit and energy-taking circuit of the converter valve is: Among them, U represents the applied AC voltage; The reactive power Q1 of the damping circuit and energy-taking circuit of the converter valve is: The active power P2 and reactive power Q2 corresponding to the branch of the voltage-sharing circuit of the converter valve are respectively: Q2＝0； The total active power P and total reactive power Q under AC signals of different frequencies are respectively: P = P1 + P2 Q = Q1 + Q2; Based on the known total active power P and total reactive power Q, the resistance value and capacitive reactance value are obtained by using the active and reactive power equations. When the error of the resistance value compared with the rated resistance value is within ±5%, it indicates a resistance fault; when the error of the capacitance value compared with the designed rated value is within ±10%, it indicates a capacitance fault.

5. A system applied to the converter valve fault detection method based on fault tree analysis and multi-frequency impedance testing according to claim 1, characterized in that, Including: A data acquisition module, which is used to apply a multi-frequency voltage signal across the thyristor level of the converter valve and collect current and voltage data at each frequency; A comprehensive impedance calculation module, which is used to obtain the comprehensive impedance of the damping circuit, voltage equalizing circuit and energy extraction circuit of the converter valve according to the current and voltage data in the data acquisition module; A fault detection module, which is used to establish a fault tree analysis model related to the fault detection of the converter valve, input the comprehensive impedance obtained in the comprehensive impedance calculation module into this model, and perform fault diagnosis on the fault conditions of the damping circuit, voltage equalizing circuit and energy extraction circuit of the converter valve to complete the fault detection of the converter valve.

6. An electronic device, comprising a memory, a processor, and a computer program stored on the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the steps of the converter valve fault detection method based on fault tree analysis and multi-frequency impedance testing according to any one of claims 1 to 4.

7. A computer-readable storage medium storing a computer program, characterized in that, When the computer program is run by the processor, it executes the converter valve fault detection method based on fault tree analysis and multi-frequency impedance testing according to any one of claims 1 to 4.

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