Test bench, test system, device test method and test machine
By setting resistors with different resistance values at each test station of the test bench, the problem of misjudgment of good products caused by inconsistent wiring connections is solved, and more efficient and reliable FT test results are achieved, reducing production costs and customer complaints.
Patent Information
- Application Number
- CN202510532936.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-25
- Publication Date
- 2025-07-22
AI Technical Summary
Because the actual connection between the cable and the test station is inconsistent with expectations, good products are discarded and waste products flow into subsequent production and sales links, increasing costs and possibly causing customer complaints.
Each test station in the test bench has different resistance values, and a test machine is connected through a line to determine the corresponding relationship between the station identification and the device under test by measuring the resistance value to ensure the accuracy of the test results.
It improves the reliability and efficiency of FT testing, avoids good products being misjudged as waste, reduces production costs and reduces customer complaint risks.
Smart Images
Figure CN120352755A_ABST
Abstract
Description
Technical Field
[0001] Embodiments of the present application belong to the field of testing technologies, and particularly relate to a test bench, a test system, a device testing method, and a tester. Background Art
[0002] After devices such as chips are packaged, it is necessary to perform final testing (Final Test, FT, hereinafter collectively referred to as FT testing) on the chips. As Figure 1 and Figure 2 shown, currently, two devices, namely a test bench (Handler) and a tester, are used for FT testing. The two can be electrically connected through a cable. The test bench is responsible for detachably installing a device under test (Design Under Test, DUT) on a test station of a test board for testing. Specifically, the tester can send excitation signals to the test bench according to the characteristics and functions of the device under test. The test bench applies the excitation signals to the device under test and generates response signals, and feeds them back to the tester through the test bench. The tester determines whether the device under test passes the FT test according to the received response signals. If the response signals are consistent with the expected signals (obtained according to the characteristics and functions of the device under test), it is considered that the device under test passes the test, and the device under test is a good product; if not, it is considered that the device under test fails the test, and the device under test is a defective product. It can be seen that FT testing can prevent defective products with defects such as poor soldering and short circuits from flowing into subsequent manufacturing processes, such as circuit board soldering and whole machine manufacturing, thereby reducing manufacturing costs.
[0003] To improve testing efficiency, the test bench can be provided with multiple test boards, and each test board is provided with multiple test stations (such as test stations 1 to N) to perform FT testing on multiple devices under test simultaneously. There may be a situation where the actual connection relationship between the cable and the test stations is inconsistent with the expectation. For example, in fact, cables A and B are respectively connected to test stations 2 and 1, while the tester believes that cables A and B are respectively connected to test stations 1 and 2. At this time, if the device under test 2 installed on test station 2 is a good product and the device under test 1 installed on test station 1 is a defective product, then according to the test results, the tester believes that the device under test 1 is a good product and the device under test 2 is a defective product, resulting in the situation that the device under test 1, which is actually a defective product, flows into subsequent manufacturing processes, and the device under test 2, which is actually a good product, is discarded as a defective product, thereby increasing production costs and even possibly leading to customer complaints. Summary of the Invention
[0004] Embodiments of the present application provide a test bench, a test system, a device testing method, and a tester, which can solve the problem that due to the actual connection relationship between the cable and the test stations being inconsistent with the expectation, good products are discarded, and defective products flow into subsequent production and sales links, resulting in high costs and possibly bringing customer complaints, and can improve the reliability and efficiency of FT testing.
[0005] To achieve the above object, the embodiments of the present application adopt the following technical solutions:
[0006] In a first aspect, a test bench is provided. The test bench includes one or more test boards, and each test board includes:
[0007] N test stations, and each test station is used to detachably set a device under test;
[0008] N test resistors, the resistance values of the N test resistors are different from each other, and are respectively electrically connected to the N test stations;
[0009] Wherein, the N test resistors are respectively connected to a tester through N flexible cables, and the tester is used to perform parallel tests on the N devices under test set on the N test stations, and N is a positive integer and N>1.
[0010] In a second aspect, a test system is provided, including a tester and the test bench described in the first aspect.
[0011] In a third aspect, a device testing method is provided. The method is applicable to the test system described in the second aspect, and the method includes:
[0012] The tester sends a test excitation signal to the test bench;
[0013] The tester receives a test response signal from the test bench. The test response signal is the signal output by the N devices under test set on the N test stations after receiving the test excitation signal;
[0014] Wherein, the test excitation signal and the test response signal are used for the tester to determine the test result of each of the N devices under test set on the N test stations.
[0015] Optionally, the test excitation signal is a current signal and the test response signal is a voltage signal; or,
[0016] The test excitation signal is a voltage signal and the test response signal is a current signal.
[0017] Optionally, the method further includes:
[0018] The tester determines the resistance measurement values of the N test resistors electrically connected to the N test stations according to the test excitation signal and the test response signal;
[0019] The tester determines the station identifiers of the N test stations according to the resistance measurement values and the nominal resistance values of the N test resistors electrically connected to the N test stations;
[0020] The testing machine determines the test results of each of the N devices under test disposed on N test stations according to the station identifiers of the N test stations.
[0021] Optionally, the method further includes:
[0022] The testing machine outputs the test results of each of the N devices under test disposed on N test stations, and the test results are used to indicate whether each of the N devices under test disposed on N test stations passes the test.
[0023] Further, before the testing machine sends a test excitation signal to the test bench, the method further includes:
[0024] The testing machine receives a test trigger signal from the test bench.
[0025] In a fourth aspect, a testing machine is provided, including: a processor, the processor is coupled to a memory, and when the processor reads and executes a program or instruction stored in the memory, the testing machine is caused to execute the method described in any implementation manner of the third aspect.
[0026] In a fifth aspect, a computer-readable storage medium is provided, storing a program or instruction, and when a computer reads and executes the program or instruction, the computer is caused to execute the method described in any implementation manner of the third aspect.
[0027] In a sixth aspect, a computer program product is provided, including a program or instruction, and when the program or instruction is executed by a processor, the method described in any implementation manner of the third aspect is implemented.
[0028] Based on the technical solution provided by the embodiments of the present application, resistors with different resistance values can be disposed on each test station of multiple test boards of the test bench, so as to implement that each test station is electrically connected to the testing machine through a certain specific resistor and a wiring harness. When FT testing is simultaneously performed on multiple devices under test disposed on multiple test stations, the corresponding relationship among each test station, the devices under test installed on each test station, and the test results of each device under test can be determined through the resistors with different resistance values connected to each test station, which can solve the problem that due to the actual connection relationship between the wiring harness and the test station being inconsistent with the expectation, good products are discarded, and defective products flow into subsequent production and sales links, resulting in high costs and possible customer complaints, and can improve the reliability and efficiency of FT testing. Description of the Drawings
[0029] The accompanying drawings described herein are used to provide a further understanding of the present application and form a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation of the present application. Some specific embodiments of the present application will be described in detail hereinafter with reference to the accompanying drawings in an exemplary rather than restrictive manner. The same reference numerals in the drawings denote the same or similar components or parts. Those skilled in the art should understand that these drawings are not necessarily drawn to scale. In the drawings:
[0030] Figure 1 is a schematic structural diagram of a device testing system provided by an embodiment of the present application;
[0031] Figure 2 is a schematic diagram of a device testing process provided by an embodiment of the present application;
[0032] Figure 3 is a schematic structural diagram of a test bench provided by an embodiment of the present application;
[0033] Figure 4 is a schematic flowchart of a device testing method provided by an embodiment of the present application;
[0034] Figure 5 is a schematic structural diagram of a testing machine provided by an embodiment of the present application. Detailed Description of the Embodiments
[0035] In order to enable those skilled in the art to better understand the solution of the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present application without creative efforts shall fall within the protection scope of the present application.
[0036] Currently, when performing parallel FT tests on multiple devices under test, it is often necessary for testers to connect the test interfaces of the tester to the test stations on the test bench through flexible cables, and it is necessary to ensure that specific test interfaces are connected to specific test stations one by one (expected connection relationship). For example, connect the test interfaces numbered 1 to 4 to the test stations 1 to 4 in sequence through flexible cables. The specific test interface is used for the tester to perform FT tests on the devices under test on specific test stations. When the device under test fails the test, the device under test will be regarded as a defective product and discarded. It can be seen that when the number of devices under test is large, the number of test interfaces and test stations that need to be connected correspondingly is also large, which will cause it to be very easy to make mistakes when manually connecting the test interfaces and test stations through flexible cables. For example, the flexible cables of the test interfaces numbered 2 and 3 are respectively connected to the test stations with station identifiers 3 and 2, that is, the connection relationship between these 2 test interfaces and these two test stations does not conform to the expectation, resulting in good products being discarded and defective products flowing into subsequent production and sales links, resulting in high costs and possibly causing customer complaints.
[0037] To solve the above problems, the embodiments of the present application provide a test bench, a test system, a device testing method, and a tester. The following is a specific description.
[0038] Figure 3 The following is a schematic structural diagram of a test bench provided by an embodiment of the present application. As Figure 3 shown, the test bench includes one or more test boards ( Figure 3 M test boards in the figure, M is a positive integer), and each test board includes:
[0039] N test stations, and each test station is used to detachably set a device under test. Among them, the detachable method can be a pluggable method or other methods. For example, each test station can be provided with a socket designed according to the device under test, and the device under test can be placed on the socket and pressed tightly so that the pins of the device under test can be in close contact with the corresponding metal contacts on the socket, so that the device under test can receive the test excitation signal sent by the test bench through the flexible cable and send the test response signal of the device under test to the tester through the flexible cable.
[0040] Optionally, the test excitation signal can be a current signal, and correspondingly, the test response signal can be a voltage signal; or,
[0041] the test excitation signal can be a voltage signal, and correspondingly, the test response signal can be a current signal.
[0042] N test resistors, and the resistance values of the N test resistors are different from each other ( Figure 3 R1, R2,..., RN in the figure), and are respectively electrically connected to the N test stations;
[0043] Among them, N test resistors are respectively connected to a tester through N flexible cables. The tester is used to perform parallel tests on N devices under test arranged at N test stations, where N is a positive integer and N > 1.
[0044] It can be seen that since the resistance values of the N test resistors are different from each other, before performing a functional test on the device under test, the resistance values of the test resistors connected to each device under test (measured values) can be measured first, and compared with the resistance values (nominal values) of the test resistors connected to each measurement station recorded in advance, so as to determine the corresponding relationship among the station identifiers of the test stations where each device under test is arranged, the devices under test, and the cable numbers connecting the test stations and the tester, and further determine the corresponding relationship between the devices under test and the measurement results. This can solve the problem that due to the actual connection relationship between the flexible cables and the test stations being inconsistent with the expectation, good products are discarded, and defective products flow into subsequent production and sales links, resulting in high costs and possible customer complaints, and can improve the reliability and efficiency of FT testing.
[0045] The following is illustrated by an example.
[0046] Table 1 is a correspondence table of test stations and test resistors recorded by the tester. Tables 2 and 3 are two measurement results of the test resistors.
[0047] As shown in Table 1, the recorded resistance values of the test resistors are nominal values. It can be seen that the resistance values of the test resistors are different from each other, being 1 kΩ, 2 kΩ, and 3 kΩ respectively, and each test resistor is in one-to-one correspondence with test stations 1, 2, and 3, that is, the test resistor connected to test station 1 is 1 kΩ, the test resistor connected to test station 2 is 2 kΩ, and the test resistor connected to test station 3 is 3 kΩ.
[0048] It should be noted that the correspondence between the test stations and the test resistors recorded in Table 1 is fixed. Therefore, when the tester and the test bench are connected through flexible cables, the resistance values of the test resistors electrically connected to each test station (measured values) can be measured, and Table 1 can be queried according to the measured values of each test resistor, so as to obtain the station identifiers of the measurement stations electrically connected to each test resistor, and further determine the corresponding relationship between the devices under test arranged at each measurement station and their measurement results, that is, determine the station identifiers of the measurement stations through the resistance values, and establish the corresponding relationship between the devices under test and the measurement results through the station identifiers.
[0049] As shown in Table 2, the excitation signals are all current signals of 1 mA, and the response signals are voltage signals of 1 V, 2 V, and 3 V respectively. Then, the measured values of the test resistors can be calculated by R = U / I. Assuming they are 0.99 kΩ, 2.01 kΩ, and 2.99 kΩ respectively, the nominal values of the test resistors corresponding to each test station can be determined to be 1 kΩ, 2 kΩ, and 3 kΩ respectively. By querying Table 1, it can be learned that each test station is Test Station 1, Test Station 2, and Test Station 3 respectively.
[0050] As shown in Table 3, the excitation signals are all current signals of 1 mA, and the response signals are voltage signals of 1 V, 3 V, and 2 V respectively. Then, the measured values of the test resistors can be calculated by R = U / I. Assuming they are 1.01 kΩ, 3.01 kΩ, and 1.99 kΩ respectively, the nominal values of the test resistors corresponding to each test station can be determined to be 1 kΩ, 3 kΩ, and 2 kΩ respectively. By querying Table 1, it can be learned that each test station is Test Station 1, Test Station 3, and Test Station 2 respectively.
[0051] As can be seen from the above examples, when connecting the tester to the test stations on the test bench, there is no need to care about the actual connection relationship between each cable and each measurement station. This is because the measurement stations can be distinguished by measuring the resistance values of the resistors, and then the corresponding relationship between each device under test and the measurement results can be distinguished, thereby improving the reliability and efficiency of FT parallel testing.
[0052] Table 1
[0053] Testing station Test resistance (nominal value) 1 1kΩ 2 2kΩ 3 3kΩ
[0054] Table 2
[0055]
[0056] Table 3
[0057]
[0058] Figure 4 It is a schematic flowchart of a device testing method provided by an embodiment of the present application. This method is applicable to the above-mentioned test system. As Figure 4 shown, this method includes:
[0059] S41, the tester sends a test excitation signal to the test bench.
[0060] Specifically, the tester can send a test excitation signal to the test stations on the test bench through a cable. Among them, the test excitation signal can be a voltage signal or a current signal, which is not limited in the embodiments of the present application.
[0061] Optionally, before the testing machine sends a test excitation signal to the test bench, the method further includes:
[0062] The testing machine receives a test trigger signal from the test bench. Among them, the test trigger signal can be sent after all test interfaces and test stations are connected by patch cords, indicating that the test bench is ready for testing and the testing machine can start the test program. Among them, the test program can be designed according to the device under test and can include one or more test cases for testing the functions, performance, electrical characteristics, abnormal operating boundaries, etc. of the device under test. Each test case can include one or more test excitation signals and expected response signals corresponding to the one or more test excitation signals.
[0063] S42. The testing machine receives a test response signal from the test bench.
[0064] Among them, the test response signal is the signal output by N devices under test set on N test stations after receiving the test excitation signal, and is used to perform a matching operation with the expected response signal in the test case.
[0065] Optionally, the test excitation signal is a current signal and the test response signal is a voltage signal; or,
[0066] The test excitation signal is a voltage signal and the test response signal is a current signal.
[0067] S43. The testing machine determines the test result of each of the N devices under test set on N test stations according to the test excitation signal and the test response signal.
[0068] Optionally, in S43, the testing machine determines the test result of each of the N devices under test set on N test stations according to the test excitation signal and the test response signal, including the following steps:
[0069] Step 1. The testing machine determines the resistance measurement values of N test resistors electrically connected to N test stations according to the test excitation signal and the test response signal;
[0070] Step 2. The testing machine determines the station identifiers of N test stations according to the resistance measurement values and nominal resistance values of N test resistors electrically connected to N test stations;
[0071] Step 3. The testing machine determines the test result of each of the N devices under test set on N test stations according to the station identifiers of N test stations.
[0072] For the specific implementation of Steps 1 to 3, reference can be made to the relevant content in Tables 1 to 3 above, which will not be elaborated here.
[0073] Optionally, the method further includes:
[0074] The testing machine outputs the test results of each of the N devices under test set at N test stations, and the test results are used to indicate whether each of the N devices under test set at the N test stations passes the test.
[0075] For example, for a certain device under test, if the test response signals of all test cases match the corresponding expected response signals, it is considered that the device under test has passed the FT test (PASS), and the device under test is a good product; otherwise, it is considered that the device under test has failed the FT test (FAIL), and the device under test is a defective product.
[0076] Figure 5 The figure is a schematic structural diagram of a testing machine provided by an embodiment of the present application. As Figure 5 shown, the testing machine 500 includes: a processor 501, and the processor 501 is coupled to a memory 502. When the processor 501 reads and executes the program or instruction stored in the memory 502, the testing machine 500 executes the method described in the above method embodiment.
[0077] Optionally, the testing machine 500 may further include a transceiver 503 for communicating with the test bench, such as sending a test excitation signal and receiving a test response signal.
[0078] An embodiment of the present application provides a test system, including the above-mentioned testing machine and test bench.
[0079] An embodiment of the present application provides a computer-readable storage medium storing a program or instruction. When a computer reads and executes the program or instruction, the computer executes the method described in the above method embodiment.
[0080] An embodiment of the present application provides a computer program product including a program or instruction. When the program or instruction is executed by a processor, the method described in the above method embodiment is implemented.
[0081] Based on the technical solution provided by the embodiment of the present application, resistors with different resistances can be set at each test station of multiple test boards on the test bench, so as to realize that each test station is electrically connected to the testing machine through a certain specific resistor and a wiring harness. When performing FT tests on multiple devices under test set at multiple test stations simultaneously, the corresponding relationship between each test station, the devices under test installed on each test station, and the test results of each device under test can be determined through the resistors with different resistances connected to each test station. This can solve the problem that due to the actual connection relationship between the wiring harness and the test station being inconsistent with the expectation, good products are discarded, and defective products flow into subsequent production and sales links, resulting in high costs and possible customer complaints, and can improve the reliability and efficiency of FT tests.
[0082] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them; although the present application has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements on some or all of the technical features; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present application.
Claims
1. A test bench, characterized in that, The test bench includes one or more test boards, and each test board includes: N test stations, each of which is used to detachably set a device under test; N test resistors, the resistance values of the N test resistors are different from each other, and are respectively electrically connected to the N test stations; Wherein, the N test resistors are respectively connected to a test machine through N wiring harnesses, and the test machine is used to perform parallel tests on the N devices under test arranged on the N test stations, and N is a positive integer and N>1.
2. A test system, characterized in that, It includes a test machine and the test bench as described in claim 1.
3. A device testing method, characterized in that, Applicable to the test system as described in claim 2, the method includes: The test machine sends a test excitation signal to the test bench; The test machine receives a test response signal from the test bench, and the test response signal is the signal output by the N devices under test arranged on the N test stations after receiving the test excitation signal; Wherein, the test excitation signal and the test response signal are used for the test machine to determine the test result of each of the N devices under test arranged on the N test stations.
4. The method according to claim 3, wherein The test excitation signal is a current signal, and the test response signal is a voltage signal; or, The test excitation signal is a voltage signal, and the test response signal is a current signal.
5. The method according to claim 4, characterized in that, The method further includes: The test machine determines the resistance measurement values of the N test resistors electrically connected to the N test stations according to the test excitation signal and the test response signal; The test machine determines the station identifiers of the N test stations according to the resistance measurement values and nominal resistance values of the N test resistors electrically connected to the N test stations; The test machine determines the test result of each of the N devices under test arranged on the N test stations according to the station identifiers of the N test stations.
6. The method according to any one of claims 3-5, characterized in that, The method further includes: The test machine outputs the test result of each of the N devices under test arranged on the N test stations, and the test result is used to indicate whether each of the N devices under test arranged on the N test stations passes the test.
7. The method according to claim 6, wherein Before the test machine sends a test excitation signal to the test bench, the method further includes: The test machine receives a test trigger signal from the test bench.
8. A testing machine, characterized in that, It includes: A processor, the processor is coupled to a memory, and when the processor reads and executes a program or instruction stored in the memory, the test machine is caused to execute the method described in any one of claims 3-7.
9. A computer-readable storage medium, characterized in that, Stored with a program or instruction, when a computer reads and executes the program or instruction, the computer is caused to execute the method described in any one of claims 3-7.
10. A computer program product, characterized in that, Includes a program or instruction, and when the program or instruction is executed by a processor, the method described in any one of claims 3-7 is implemented.