Multi-source MAP data review method and device, electronic equipment and medium

Abstract

The invention provides a multi-source MAP data review method and device, electronic equipment and a medium, and relates to the technical field of semiconductors, and the method comprises the steps: obtaining the multi-source MAP data of a to-be-processed wafer; the MAP data comprises coordinates of each chip in the to-be-processed wafer and test results at corresponding test nodes; preprocessing coordinates of corresponding chips in each piece of MAP data to obtain target coordinates of each chip; and based on the target coordinates of the chips, fusing the test results of the chips at different test nodes to obtain a quality review result. According to the invention, the evaluation efficiency and accuracy of each chip in the to-be-processed wafer can be improved to a great extent, and meanwhile, remarkable competitive advantages are brought to the semiconductor manufacturing industry.

Description

Technical Field

[0001] This application relates to the field of semiconductor technology, and more particularly, to a method, apparatus, electronic device, and medium for reviewing multi-source MAP data. Background Art

[0002] In the precise and complex semiconductor manufacturing process, quality review plays a key role in ensuring that the final products strictly meet the design specifications and technical standards. This process not only involves the accurate measurement of the physical characteristics of semiconductor devices but also includes a comprehensive assessment of their electrical performance. However, the traditional manual overlay method, as a technical means mainly relying on manual operations for data comparison and analysis, has shown its inherent limitations, seriously restricting the review efficiency and accuracy. Summary of the Invention

[0003] The purpose of the embodiments of this application is to provide a method, apparatus, electronic device, and medium for reviewing multi-source MAP data, which solves the above problems existing in the prior art and can improve the review efficiency and accuracy of each chip in the wafer to be processed.

[0004] In a first aspect, a method for reviewing multi-source MAP data is provided, which may include:

[0005] Obtain multi-source MAP data of the wafer to be processed; the MAP data includes the coordinates of each chip in the wafer to be processed and the test results at the corresponding test nodes;

[0006] Preprocess the coordinates of the corresponding chips in each MAP data to obtain the target coordinates of each chip;

[0007] Based on the target coordinates of each chip, fuse the test results of each chip at different test nodes to obtain a quality review result.

[0008] In a possible implementation, preprocessing the coordinates of the corresponding chips in each MAP data to obtain the target coordinates of each chip includes:

[0009] Determine the coordinate system of any one of the multiple MAP data as the target coordinate system;

[0010] Based on the deviation between the multiple coordinate systems other than the target coordinate system and the target coordinate system, determine the transformation matrix between the multiple system coordinate systems other than the target coordinate system and the target coordinate system;

[0011] Based on the transformation matrix, transform the coordinates of each chip in the multiple coordinate systems other than the target coordinate system to obtain the target coordinates.

[0012] In a possible implementation, the quality review result includes: the test results of each chip at each test node and the comprehensive test result of each chip;

[0013] Based on the target coordinates of each chip, the test results of each chip at different test nodes are fused to obtain the quality review result, including:

[0014] For any chip, based on the target coordinates of the chip, determine the test results of different test nodes corresponding to the chip;

[0015] Based on the test results of different test nodes, determine the comprehensive test result.

[0016] In a possible implementation, the method further includes: configuring the priorities of each test node;

[0017] Based on the test results of different test nodes, determine the comprehensive test result, including:

[0018] If there is only one test node whose test result does not meet the standard, then determine the test result of this test node as the comprehensive test result;

[0019] If there are at least two test nodes whose test results do not meet the standard, then determine the test result of the test node corresponding to the highest priority among the test nodes that do not meet the standard as the comprehensive test result.

[0020] In a possible implementation, the priority configuration of each test node includes:

[0021] For any test node, based on the accuracy coefficient of the test equipment corresponding to the test node, determine the weight of the test node.

[0022] In a possible implementation, the priority configuration of each test node includes:

[0023] For any test node, based on the contribution degree of the chip corresponding to the test node to the wafer to be processed, determine the weight of the test node.

[0024] In a possible implementation, the method further includes:

[0025] If the comprehensive test result is inconsistent with the configured INKMAP data, then determine that there is an error in the configuration process of the INKMAP data, and generate a prompt message indicating the configuration error to the corresponding staff.

[0026] In a second aspect, there is provided a review device for multi-source MAP data, and the device may include:

[0027] An acquisition unit for acquiring multi-source MAP data of a wafer to be processed; the MAP data includes the coordinates of each chip in the wafer to be processed and the test results at corresponding test nodes;

[0028] A processing unit for preprocessing the coordinates of the corresponding chips in each MAP data to obtain the target coordinates of each chip;

[0029] A fusion unit for fusing the test results of each chip at different test nodes based on the target coordinates of each chip to obtain a quality review result.

[0030] In a third aspect, an electronic device is provided, which includes a processor, a communication interface, a memory, and a communication bus. Among them, the processor, the communication interface, and the memory complete communication with each other through the communication bus;

[0031] The memory is used to store a computer program;

[0032] The processor is configured to implement the method steps described in any one of the first aspects when executing the program stored on the memory.

[0033] In a fourth aspect, a computer-readable storage medium is provided, in which a computer program is stored, and the computer program implements the method steps described in any one of the first aspects when executed by a processor.

[0034] The present application provides a method for reviewing multi-source MAP data, and the method includes: acquiring multi-source MAP data of a wafer to be processed; the MAP data includes the coordinates of each chip in the wafer to be processed and the test results at corresponding test nodes; preprocessing the coordinates of the corresponding chips in each MAP data to obtain the target coordinates of each chip; fusing the test results of each chip at different test nodes based on the target coordinates of each chip to obtain a quality review result. The present application can greatly improve the review efficiency and accuracy of each chip in the wafer to be processed, and at the same time bring significant competitive advantages to the semiconductor manufacturing industry. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following will briefly introduce the drawings required to be used in the embodiments of the present application. It should be understood that the following drawings only show some embodiments of the present application, and therefore should not be regarded as limiting the scope. For those of ordinary skill in the art, other related drawings can be obtained based on these drawings without creative efforts.

[0036] Figure 1 It is a system architecture diagram of a method for reviewing multi-source MAP data provided by an embodiment of the present application;

[0037] Figure 2 A flowchart showing a review method for multi-source MAP data provided by an embodiment of the present application;

[0038] Figure 3 A structural diagram showing a review device for multi-source MAP data provided by an embodiment of the present application;

[0039] Figure 4 A structural diagram showing an electronic device provided by an embodiment of the present application. Detailed implementation manners

[0040] Next, the technical solutions in the embodiments of the present application will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments of the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present application.

[0041] A review method for multi-source MAP data provided by an embodiment of the present application can be applied in Figure 1 the system architecture shown in Figure 1 As shown, the system may include: a server and a measuring device. The server may be a physical server, or a server cluster or a distributed system composed of multiple physical servers, or a cloud server providing basic cloud computing services such as cloud services, cloud databases, cloud computing, cloud functions, cloud storage, network services, cloud communications, middleware services, domain name services, security services, Content Delivery Network (CDN), and big data and artificial intelligence platforms. The measuring device may be an optical microscope, a scanning electron microscope, an atomic force microscope, an X-ray diffractometer, an electrical testing device, an Automatic Optical Inspection (AOI) device, a laser speckle detection system, etc. The terminal and the server may be directly or indirectly connected through wired or wireless communication methods, and the present application does not make a limitation here.

[0042] The measuring device is configured to obtain multi-source MAP data and send the multi-source MAP data to the server;

[0043] The server, which is the server of the review system, is configured to receive the multi-source MAP data to execute a review method for multi-source MAP data provided by the present application.

[0044] In the semiconductor manufacturing process, quality review is a key link to ensure that products meet design specifications and technical standards. However, the traditional manual overlay method has many limitations, which limit the efficiency and accuracy.

[0045] Problems existing in the traditional method:

[0046] Large workload: As the complexity of semiconductor products increases, the quantity and variety of test data are also growing continuously. Manually processing this vast amount of data is not only time-consuming but also a huge test of the energy of data specialists.

[0047] Low review efficiency: Since a large number of test results need to be compared one by one, the process of manual overlay mapping is very slow, resulting in an extended overall quality review cycle and affecting production efficiency.

[0048] Lack of accuracy: Humans are prone to fatigue during long-term repetitive work, which may lead to errors. In addition, different people may have different interpretations of the same set of data, increasing the risk of inconsistency.

[0049] Multiple people need to check: To reduce human errors, it is usually necessary for multiple data specialists to jointly complete the review work of a project. Although this method can improve accuracy to a certain extent, it also means higher costs and more complex coordination requirements.

[0050] Therefore, the present application provides a review method for multi-source MAP data to solve the above problems existing in the prior art and improve the review efficiency and accuracy of each chip in the wafer to be processed.

[0051] The following describes the preferred embodiments of the present application in conjunction with the accompanying drawings of the specification. It should be understood that the preferred embodiments described herein are only used to illustrate and explain the present application and are not used to limit the present application. And without conflict, the embodiments in the present application and the features in the embodiments can be combined with each other.

[0052] Figure 2 It is a schematic flow chart of a review method for multi-source MAP data provided by an embodiment of the present application. As Figure 2 shown, the method may include:

[0053] Step S210, obtaining multi-source MAP data of the wafer to be processed.

[0054] Among them, the multi-source MAP data may be: IQCMAP (text format), OQCMAP (text format), CPXMAP (X refers to 1, 2, 3, and there may be multiple excel files), INKMAP (text format), etc.

[0055] That is to say, multi-source means the test results of each chip at different test nodes; each MAP data includes the coordinates of each chip in the wafer to be processed and the test results at the corresponding test nodes.

[0056] In some embodiments, the division method of the test results of each chip in the wafer to be processed may be adaptive grid division, which may specifically include:

[0057] Construct a quadtree index based on the coordinates of the wafer to be processed, and divide the wafer to be processed into dynamic grids (such as 5×5mm 2 block), and preferentially process the high-defect-density area to reduce ineffective calculations. Among them, dynamic grid division means that the size of each grid can be adjusted according to the actual conditions of the wafer to be processed (such as its size, defect distribution, etc.). The purpose of doing this is to reduce unnecessary computational workload while ensuring more refined analysis of important areas (i.e., high-defect-density areas). In this way, the overall computational burden can be reduced without sacrificing necessary accuracy; for example, the high-density area is refined to 1×1mm 2 , and the low-density area remains 5×5mm 2 .

[0058] Define the block meta-information: <BlockID, starting row / column>, where BlockID: a unique number that identifies each block; starting row / column: represents the position coordinates of the block on the wafer, which helps to quickly locate and access specific blocks. By defining clear block meta-information, distributed storage and parallel processing of wafer test results can be achieved. This means that different nodes can independently process different parts of the data, thus accelerating the entire processing flow. In addition, this also facilitates the management of large-scale data sets because each block can be accessed and updated individually without affecting other parts.

[0059] The significance of this embodiment lies in improving the efficiency and accuracy of wafer detection. By preferentially processing the high-defect-density area and dynamically adjusting the grid size according to actual needs, it can ensure that resources are concentrated in the most critical places while reducing unnecessary computational overhead. This is of great significance for improving production efficiency and product quality.

[0060] Step S220: Preprocess the coordinates of the corresponding chips in each MAP data to obtain the target coordinates of each chip.

[0061] Specifically, in semiconductor manufacturing, different inspection steps (such as IQC, i.e., Incoming Quality Control, OQC, i.e., Outgoing Quality Control, CPX, i.e., Critical Parameter X) may use different measuring devices to inspect the quality of the wafer to be processed. Each measuring device may have its own coordinate system and reference point, which may result in the inability to directly compare or merge the inspection results generated by different measuring devices in space even for the same wafer to be processed.

[0062] To solve this problem, a general coordinate transformation mechanism needs to be established, which is based on the unique identifier of the wafer to be processed (wafer ID) and the specific position thereon (usually represented in the form of rows and columns). In this way, data from different measurement devices can be mapped to a common coordinate system, ensuring that all data is relative to the same reference point.

[0063] In one embodiment, the coordinate system of any one of the multiple MAP data is determined as the target coordinate system; based on the deviation between the multiple coordinate systems other than the target coordinate system and the target coordinate system, the transformation matrix between the multiple system coordinate systems other than the target coordinate system and the target coordinate system is determined; based on the transformation matrix, the coordinates of each chip in the multiple coordinate systems other than the target coordinate system are transformed to obtain the target coordinates.

[0064] In wafer inspection, after coordinate alignment is completed, data loss may occur in some areas, especially when dealing with edges or irregularly shaped objects. At this time, the nearest neighbor interpolation algorithm can be used to fill in these blanks to ensure data integrity and continuity. Especially when applying the quadtree index, sometimes parts of the wafer edge are encountered, and these parts cannot completely fill the standard-sized grid (block), forming so-called "incomplete blocks". To ensure the consistency and accuracy of the analysis, these incomplete areas need to be processed. Through the nearest neighbor interpolation algorithm, the value of the nearest neighbor data point is taken to estimate the value of the unknown point. For the incomplete blocks at the wafer edge, this method can be used to fill in the missing parts according to the known good data around it (such as the data in adjacent complete blocks). The purpose of doing this is to make all blocks appear complete, facilitating subsequent automated analysis and processing.

[0065] This method can improve data consistency: by unifying the coordinate system and eliminating offsets, it ensures that data from different sources can be compared and analyzed under the same standard, improving data consistency. Enhance analysis reliability: Completing the incomplete blocks at the edge avoids analysis errors caused by data loss, enhancing the reliability and usability of the overall analysis results. Optimize resource utilization: Efficient coordinate transformation and data completion techniques can reduce unnecessary repetitive work, optimize the use of computing resources, and thus improve the efficiency of the entire production process.

[0066] Step S230: Based on the target coordinates of each chip, fuse the test results of each chip at different test nodes to obtain the quality review result.

[0067] Among them, the quality review result includes: the test results of each chip at each test node and the comprehensive test results of each chip;

[0068] Specifically, for any chip, based on the target coordinates of the chip, determine the test results of different test nodes corresponding to the chip;

[0069] Based on the test results of different test nodes, determine the comprehensive test result. This step can specifically include: During the implementation process, the priorities of each test node are configured. If there is only one test node with a test result that does not meet the standard, then determine the test result of this test node as the comprehensive test result; if there are at least two test nodes with test results that do not meet the standard, then determine the test result of the test node corresponding to the highest priority among the test nodes that do not meet the standard as the comprehensive test result. For example: The standard test result is good. The detection results can include: excellent (represented by the number 1), good (represented by the number 2), medium (represented by the number 3), and poor (represented by the number 4). When the detection result of the chip corresponding to a certain target coordinate at the detection node (IQC) is 2, the detection result at the detection node (OQC) is 3, and the detection results at the detection nodes (CP1, 2, 3) are all 1; the number of detection results that do not meet the standard is only 1, that is: the detection node (OQC). Therefore, the comprehensive detection result of this chip is: 3. When the detection result of the chip corresponding to another target coordinate at the detection node (IQC) is 2, the detection result at the detection node (OQC) is 3, the detection result at the detection node (CP1) is 1, the detection results at the detection node (CP2) are all 4, and the detection results at the detection node (CP3) are all 2; the detection results that do not meet the standard include: the detection node (OQC) and the detection node (CP2). At this time, determine the test result of the test node corresponding to the highest priority among the priorities corresponding to the detection node (OQC) and the detection node (CP2) as the comprehensive test result.

[0070] Furthermore, the priority configuration of each test node includes:

[0071] For any test node, based on the precision coefficient of the measuring device corresponding to the test node, determine the weight of the test node.

[0072] Or, for any test node, based on the contribution degree of the chip corresponding to the test node to the wafer to be processed, determine the weight of the test node.

[0073] It can be understood that: For numerical conflicts (such as differences in electrical measurements CPX of different wafers to be processed), the weighted average method is used, and the weights are dynamically allocated by the precision coefficients of the measuring devices. Among them, the weight is inversely proportional to the precision coefficient:

[0074] Linear inverse ratio: ki is the precision coefficient of the i-th measuring device;

[0075] Variance inverse ratio: σi is the standard deviation of the measured values of the measuring device;

[0076] Update σi or ki based on real-time calibration data, such as collecting the stability index of the acquisition device (such as the repeatability range R value), and dynamically correct the weight parameters.

[0077] The state conflict (Pass / Fail inconsistency) triggers an exception flag, and the original chunk data is retained for manual recheck.

[0078] In another embodiment, the contribution weights of different Map data are dynamically adjusted based on the attention mechanism. For example, the correlation between the defect density and the electrical parameters is used to calculate the fusion weight through a multi-layer perceptron (MLP). Using the mid-term fusion strategy, the intermediate features such as the defect distribution and process parameters are concatenated within the chunk and then input into the convolutional network to generate a fused local feature matrix.

[0079] In some embodiments, a method for processing the test results of the wafers to be processed based on the MapReduce framework, generating and analyzing local and global heatmaps for quality control:

[0080] First, the Map stage includes: each chunk generates a local heatmap (including a Die status matrix with color coding):

[0081] Chunking: The entire wafer to be processed is divided into multiple small regions or "chunks", and each chunk contains a certain number of Dies (chips). This helps with distributed processing.

[0082] Local heatmap: In the Map stage, a local heatmap is calculated for each chunk, where the status of each Die (such as Pass / Fail or other attributes) is represented in a color-coded form in a matrix. This method can visually display the quality status of different regions.

[0083] After that, the Reduce stage includes: merging the local features based on the target coordinates of each chip to generate a global wafer heatmap, supporting multi-layer overlay comparison (such as the defect layer and the parameter layer):

[0084] Merging local features: In the Reduce stage, the local heatmaps output from all Map tasks are merged into a complete global heatmap representing the entire wafer according to their coordinate information.

[0085] Multi-layer overlay comparison: Supports overlay display of different layers on the same interface (for example, one layer shows the defect distribution and another layer shows the electrical parameters) to facilitate comparative analysis of the relationships between different factors.

[0086] Run-length encoding (RLE) is used for consecutive identical states (such as the Pass region), reducing the storage space by 60%.

[0087] Run - Length Encoding (RLE): This is a simple lossless data compression method, especially suitable for data sets with a large number of consecutive repeated values. For example, when there are large Pass areas on the wafer to be processed, instead of recording the specific state of each Die, only the starting positions and lengths of these areas can be recorded, thus greatly saving storage space.

[0088] Real - time rendering of millions of Dies is achieved through WebGL, supporting zooming and multi - view synchronization operations (such as FourMap comparison layout).

[0089] WebGL: It is a JavaScript API for rendering interactive 3D and 2D graphics, which can run in modern browsers without using plugins. Here, the powerful functions of WebGL are utilized to achieve real - time rendering, maintaining a smooth user experience even for large - scale data sets containing millions of Dies.

[0090] Zooming and multi - view synchronization operations: Users can zoom in and out to view the details of specific areas and simultaneously view multiple different types of heat maps (for example, defect density maps and electrical parameter maps) for easy comparison and analysis.

[0091] The above - mentioned method efficiently processes the test results of large - scale wafers through the MapReduce framework, combines multiple performance optimization technologies to ensure the efficiency and accuracy in the data analysis process, and also provides powerful visualization tools to help engineers better understand the product quality status.

[0092] This method also includes: The test equipment will also provide comprehensive detection results: For example: INKMAP data.

[0093] At this time, the generated comprehensive test results can be compared with the comprehensive detection results:

[0094] If the comprehensive test results are inconsistent with the configured INKMAP data, it is determined that an error occurred in the generation of the INKMAP data, and a prompt message indicating an error in the INKMAP data is generated to the corresponding staff. Conversely, the INKMAP data is consistent with the comprehensive test results.

[0095] The review system provided by this application can also detect the comprehensive detection results to determine the accuracy of the test equipment, so as to provide analysis data for the corresponding staff to debug the test equipment.

[0096] Step S240: Output the quality review results.

[0097] Specifically, the quality review results are output in a file in excel format. The parsing results of each MAP data can be placed in different sheets of the excel format file, and a summary (merge) sheet is generated.

[0098] This application can summarize the test results of different file types at different test nodes into the quality review results for analyzing whether the wafers to be processed are qualified.

[0099] This application provides a method for reviewing multi-source MAP data. The method includes: obtaining multi-source MAP data of the wafers to be processed; the MAP data includes the coordinates of each chip in the wafers to be processed and the test results at the corresponding test nodes; preprocessing the coordinates of the corresponding chips in each MAP data to obtain the target coordinates of each chip; based on the target coordinates of each chip, fusing the test results of each chip at different test nodes to obtain the quality review results. This application can greatly improve the review efficiency and accuracy of each chip in the wafers to be processed, and also bring significant competitive advantages to the semiconductor manufacturing industry.

[0100] Corresponding to the above method, an embodiment of this application also provides a device for reviewing multi-source MAP data, as Figure 3 shown. The device includes:

[0101] An obtaining unit 310, configured to obtain multi-source MAP data of the wafers to be processed; the MAP data includes the coordinates of each chip in the wafers to be processed and the test results at the corresponding test nodes;

[0102] A processing unit 320, configured to preprocess the coordinates of the corresponding chips in each MAP data to obtain the target coordinates of each chip;

[0103] A fusing unit 330, configured to fuse the test results of each chip at different test nodes based on the target coordinates of each chip to obtain the quality review results.

[0104] The functions of each functional unit of the device for reviewing multi-source MAP data provided in the above embodiment of this application can be implemented by the above method steps. Therefore, the specific working processes and beneficial effects of each unit in the device for reviewing multi-source MAP data provided in the embodiment of this application are not described herein again.

[0105] An embodiment of this application also provides an electronic device, as Figure 4 shown, including a processor 410, a communication interface 420, a memory 430, and a communication bus 440. Among them, the processor 410, the communication interface 420, and the memory 430 communicate with each other through the communication bus 440.

[0106] A memory 430 for storing computer programs;

[0107] A processor 410, when executing the programs stored on the memory 430, implements the following steps:

[0108] Obtain multi-source MAP data of the wafer to be processed; the MAP data includes the coordinates of each chip in the wafer to be processed and the test results at the corresponding test nodes;

[0109] Preprocess the coordinates of the corresponding chips in each MAP data to obtain the target coordinates of each chip;

[0110] Based on the target coordinates of each chip, fuse the test results of each chip at different test nodes to obtain a quality review result.

[0111] The communication bus mentioned above can be a Peripheral Component Interconnect (PCI) bus or an Extended Industry Standard Architecture (EISA) bus, etc. This communication bus can be divided into an address bus, a data bus, a control bus, etc. For the sake of simplicity, only a thick line is used to represent it in the figure, but it does not mean that there is only one bus or one type of bus.

[0112] The communication interface is used for communication between the above-mentioned electronic device and other devices.

[0113] The memory can include a Random Access Memory (RAM), or can also include a Non-Volatile Memory (NVM), such as at least one disk memory. Optionally, the memory can also be at least one storage device located far from the aforementioned processor.

[0114] The above-mentioned processor can be a general-purpose processor, including a Central Processing Unit (CPU), a Network Processor (NP), etc.; it can also be a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field-Programmable Gate Array (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components.

[0115] Since the implementation manners and beneficial effects of the devices of the electronic device in the above embodiments for solving problems can be implemented by referring to the steps in the embodiments shown in Figure 2 the embodiments shown, the specific working process and beneficial effects of the electronic device provided in the embodiments of the present application will not be described in detail herein.

[0116] In another embodiment provided by the present application, a computer-readable storage medium is further provided. Instructions are stored in the computer-readable storage medium. When it runs on a computer, the computer is enabled to execute a review method for multi-source MAP data described in any one of the above embodiments.

[0117] In another embodiment provided by the present application, a computer program product containing instructions is further provided. When it runs on a computer, the computer is enabled to execute a review method for multi-source MAP data described in any one of the above embodiments.

[0118] Those skilled in the art should understand that the embodiments in the embodiments of the present application can be provided as methods, systems, or computer program products. Therefore, the embodiments in the embodiments of the present application can take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware aspects. Moreover, the embodiments in the embodiments of the present application can take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk memories, CD-ROMs, optical memories, etc.) containing computer-usable program codes.

[0119] The embodiments in the embodiments of the present application are described with reference to the flowcharts and / or block diagrams of methods, devices (systems), and computer program products according to the embodiments in the embodiments of the present application. It should be understood that each process and / or block in the flowchart and / or block diagram can be implemented by computer program instructions, and the combination of the processes and / or blocks in the flowchart and / or block diagram can also be implemented by computer program instructions. These computer program instructions can be provided to the processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing devices to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing devices generate a device for implementing the specified functions in Figure 1 one process or multiple processes and / or blocks Figure 1 one block or multiple blocks.

[0120] These computer program instructions can also be stored in a computer-readable memory that can direct a computer or other programmable data processing device to work in a specific manner, so that the instructions stored in the computer-readable memory generate a manufactured product including an instruction device, and the instruction device implements the specified functions in Figure 1 one process or multiple processes and / or blocks Figure 1 one block or multiple blocks.

[0121] These computer program instructions can also be loaded onto a computer or other programmable data processing apparatus, so that a series of operation steps are executed on the computer or other programmable apparatus to produce a computer-implemented process, and thus the instructions executed on the computer or other programmable apparatus provide steps for implementing the functions specified in one process or multiple processes and / or blocks Figure 1 one process or multiple processes and / or blocks Figure 1 steps for implementing the functions specified in one block or multiple blocks.

[0122] Unless otherwise defined, the technical terms or scientific terms used in this application shall have the ordinary meanings understood by those of ordinary skill in the art to which this invention pertains. The terms "first", "second" and similar terms used in this application do not denote any order, quantity or importance, but are only used to distinguish different components. Words such as "comprising" or "including" mean that the elements or items appearing before this word cover the elements or items listed after this word and their equivalents, without excluding other elements or items. Words such as "connected", "coupled" or "linked" are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "Up", "down", "left", "right", etc. are only used to indicate relative positional relationships, and when the absolute position of the object being described changes, the relative positional relationship may also change accordingly.

[0123] Although the preferred embodiments in the embodiments of this application have been described, those skilled in the art can make additional changes and modifications once they learn the basic creative concepts. Therefore, the embodiments of this application are intended to be construed as including the preferred embodiments and all changes and modifications falling within the scope of the embodiments of this application.

[0124] Obviously, those skilled in the art can make various changes and modifications to the embodiments in the embodiments of this application without departing from the spirit and scope of the embodiments in the embodiments of this application. Thus, if these modifications and variations of the embodiments in the embodiments of this application fall within the scope of the embodiments of this application and their equivalent technologies, the embodiments of this application are also intended to include these changes and modifications.

Claims

1. A review method for multi-source MAP data, characterized in that The method includes: Obtaining multi-source MAP data of the wafer to be processed; the MAP data includes the coordinates of each chip in the wafer to be processed and the test results at corresponding test nodes; Preprocessing the coordinates of the corresponding chips in each MAP data to obtain the target coordinates of each chip; Based on the target coordinates of each chip, fusing the test results of each chip at different test nodes to obtain a quality review result.

2. The method according to claim 1, wherein Preprocessing the coordinates of the corresponding chips in each MAP data to obtain the target coordinates of each chip, including: Determining the coordinate system of any one of the multiple MAP data as the target coordinate system; Based on the deviation between the multiple coordinate systems other than the target coordinate system and the target coordinate system, determining the transformation matrix between the multiple system coordinate systems other than the target coordinate system and the target coordinate system; Based on the transformation matrix, transforming the coordinates of each chip in the multiple coordinate systems other than the target coordinate system to obtain the target coordinates.

3. The method according to claim 1, characterized in that, The quality review result includes: the test results of each chip at each test node and the comprehensive test results of each chip; Based on the target coordinates of each chip, fusing the test results of each chip at different test nodes to obtain a quality review result, including: For any one chip, based on the target coordinates of the chip, determining the test results of the different test nodes corresponding to the chip; Based on the test results of different test nodes, determining the comprehensive test result.

4. The method according to claim 3, wherein The method further includes: configuring the priority of each test node; Based on the test results of different test nodes, determining the comprehensive test result, including: If there is only one test node whose test result does not meet the standard, determining the test result of this test node as the comprehensive test result; If there are at least two test nodes whose test results do not meet the standard, determining the test result of the test node corresponding to the highest priority among the non-compliant test nodes as the comprehensive test result.

5. The method according to claim 4, characterized in that The priority configuration of each test node includes: For any one test node, based on the accuracy coefficient of the test equipment corresponding to the test node, determining the weight of the test node.

6. The method according to claim 4, wherein The priority configuration of each test node includes: For any one test node, based on the contribution degree of the chip corresponding to the test node to the wafer to be processed, determining the weight of the test node.

7. The method according to claim 3, wherein The method further includes: If the comprehensive test result is inconsistent with the configured INKMAP data, determining that there is an error in the configuration process of the INKMAP data and generating a prompt message of configuration error to the corresponding staff.

8. A review device for multi-source MAP data, characterized in that The device includes: An acquisition unit, configured to acquire multi-source MAP data of the wafer to be processed; the MAP data includes the coordinates of each chip in the wafer to be processed and the test results at corresponding test nodes; A processing unit, configured to preprocess the coordinates of the corresponding chips in each MAP data to obtain the target coordinates of each chip; A fusion unit, configured to fuse the test results of each chip at different test nodes based on the target coordinates of each chip to obtain a quality review result.

9. An electronic device, characterized in that, The electronic device includes a processor, a communication interface, a memory, and a communication bus. Among them, the processor, the communication interface, and the memory complete communication with each other through the communication bus; The memory is used for storing a computer program; The processor is configured to implement the method steps described in any one of claims 1-7 when executing the program stored on the memory.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program, and when the computer program is executed by the processor, the method steps described in any one of claims 1-7 are implemented.

Images