Surface-emitting semiconductor laser and preparation method thereof

Abstract

The invention relates to the technical field of lasers, in particular to a surface-emitting semiconductor laser and a preparation method thereof. An epitaxial structure; the P-type switch electrode is positioned on the top surface, far away from the substrate, of the epitaxial structure; the N-type switch electrode is positioned on the bottom surface of the substrate; the cooling electrode is located on the top face, away from the substrate, of the epitaxial structure, the cooling electrode is arranged on the outer ring of the P-type switch electrode in a sleeving mode, and the cooling electrode comprises P-type regions and N-type regions which are alternately arranged in the extending direction of the cooling electrode; the same voltage is applied to the P-type region and the P-type switch electrode, and the same voltage is applied to the N-type region and the N-type switch electrode; the insulating layer is located on the top face, away from the substrate, of the epitaxial structure, and the insulating layer is at least located between the P-type switch electrode and the cooling electrode. The working performance of the surface-emitting semiconductor laser can be improved at least.

Description

Technical Field

[0001] The present invention belongs to the technical field of lasers, and particularly relates to a surface-emitting semiconductor laser and a preparation method thereof. Background Art

[0002] In recent years, with the development of vertical-cavity surface-emitting lasers (VCSELs), due to their advantages such as high power, circularly symmetric light spots, and easy two-dimensional integration, they have shown good development prospects in the fields of optical communication, quantum precision measurement, etc. However, when VCSEL devices are applied in the field of precision measurement, they usually need to work in a high-temperature environment, which often causes problems such as power decline and wavelength shift in VCSEL devices, affecting the accuracy and performance of VCSEL devices.

[0003] Specifically, for top-emitting VCSEL devices, since they have a DBR structure with multiple stacked film layers inside, VCSEL devices are relatively thick and have a high resistance. A large amount of heat will accumulate inside during operation. If the heat cannot be effectively dissipated, it will cause the device temperature to rise, the gain spectrum to redshift, reduce the matching degree with the resonant cavity, and thus reduce the effective output power.

[0004] Currently, VCSEL devices usually use external heat sink materials with high thermal conductivity such as diamond as TEC (Thermoelectric cooler) components to achieve heat dissipation. By utilizing the difference in thermal conductivity between different materials, the direction of heat transfer is changed to improve the heat accumulation problem of the device. However, TEC components usually have a certain size and weight, increasing the volume of VCSEL devices, restricting their application in precision measurement and aerospace equipment, and the TEC components also increase the complexity and cost of device manufacturing, and the maintenance cost of TEC components is relatively high. Summary of the Invention

[0005] In view of this, the present invention aims to provide a surface-emitting semiconductor laser and a preparation method thereof, which is at least beneficial to improving the working performance of the surface-emitting semiconductor laser.

[0006] To achieve the above object, the technical solution of the present invention is realized as follows:

[0007] On the one hand, the present invention provides a surface-emitting semiconductor laser, comprising: a substrate; an epitaxial structure located on the top surface of the substrate; a ring-shaped P-type switching electrode located on the top surface of the epitaxial structure away from the substrate; an N-type switching electrode located on the bottom surface of the substrate; a curved cooling electrode located on the top surface of the epitaxial structure away from the substrate, and the cooling electrode is sleeved outside the P-type switching electrode. The cooling electrode includes P-type regions and N-type regions arranged alternately along its extending direction; the P-type regions are applied with the same voltage as the P-type switching electrode, and the N-type regions are applied with the same voltage as the N-type switching electrode; an insulating layer located on the top surface of the epitaxial structure away from the substrate, and the insulating layer is at least located between the P-type switching electrode and the cooling electrode.

[0008] Further, the number of P-type regions in the cooling electrode is the same as the number of N-type regions.

[0009] Further, the surface-emitting semiconductor laser further includes an isolation channel located between the cooling electrode and the P-type switching electrode, and the isolation channel penetrates the epitaxial structure along the thickness direction of the epitaxial structure.

[0010] Further, the orthographic projection of the isolation channel on the top surface of the substrate is ring-shaped.

[0011] Further, the epitaxial structure includes an N-type DBR layer, an active region layer, an oxidation confinement layer, a P-type DBR layer, a P-type isolation layer, and a P-side capping layer stacked in sequence along the direction away from the substrate. The P-side capping layer has a ring-shaped hole exposing the P-type isolation layer. The ring-shaped hole penetrates the P-side capping layer and is sleeved outside the P-type switching electrode. The cooling electrode is disposed in the ring-shaped hole.

[0012] Further, the material of the P-side capping layer is the same as that of the P-type regions, and the P-side capping layer and the P-type regions are formed in the same step.

[0013] Further, along the direction perpendicular to the top surface of the substrate, the thickness of the cooling electrode is in the range of 200 nm to 500 nm.

[0014] Further, the material of the cooling electrode includes at least one of titanium, platinum, gold, nickel, or germanium.

[0015] Further, along the radial direction of the P-type switching electrode, the distance between the P-type switching electrode and the cooling electrode is in the range of 10 μm to 20 μm.

[0016] On the other hand, the present invention provides a method for preparing a surface-emitting semiconductor laser, comprising: providing a substrate; forming an epitaxial structure on the top surface of the substrate; forming a ring-shaped P-type switching electrode on the top surface of the epitaxial structure away from the substrate; forming an N-type switching electrode on the bottom surface of the substrate; forming an arc-shaped cooling electrode on the top surface of the epitaxial structure away from the substrate, and the cooling electrode is sleeved outside the P-type switching electrode. The cooling electrode includes alternately arranged P-type regions and N-type regions along its extending direction. The P-type regions are applied with the same voltage as the P-type switching electrode, and the N-type regions are applied with the same voltage as the N-type switching electrode; forming an insulating layer on the top surface of the epitaxial structure away from the substrate, and the insulating layer is at least located between the P-type switching electrode and the cooling electrode.

[0017] Compared with the prior art, the present invention can achieve the following beneficial effects: The present invention provides a surface-emitting semiconductor laser applicable to high-power usage scenarios. Active cooling is achieved inside it through a cooling electrode. Without adding any TEC components, by injecting a current in a certain direction into the cooling electrode including a PN junction, based on the characteristics of the PN junction and using the Peltier effect of the semiconductor, active cooling of the device is realized, which is beneficial to alleviating the heat accumulation phenomenon inside the device, improving the gain spectrum redshift phenomenon, beneficial to increasing the output power of the device, enhancing the working performance of the device, and also overcoming the problems of high device preparation difficulty, complexity, and expensive process caused by traditional use of externally added TEC components. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The accompanying drawings forming a part of the present invention are used to provide a further understanding of the present invention. The schematic embodiments and descriptions thereof of the present invention are used to explain the present invention and do not constitute an improper limitation to the present invention. In the drawings:

[0019] Figure 1 is a three-dimensional structure schematic diagram of the surface-emitting semiconductor laser according to the embodiment of the present invention;

[0020] Figure 2 is a longitudinal sectional view of the surface-emitting semiconductor laser according to the embodiment of the present invention;

[0021] Figure 3 is a top view of the surface-emitting semiconductor laser according to the embodiment of the present invention showing electrode contacts;

[0022] Figure 4 is a top view of the surface-emitting semiconductor laser according to the embodiment of the present invention without showing electrode contacts. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0023] In order to make the objectives, technical solutions and advantages of the present invention clearer and more understandable, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and do not constitute a limitation to the present invention.

[0024] It should be noted that, without conflict, the embodiments in the present invention and the features in the embodiments may be combined with each other.

[0025] In the description of the present invention, it should be understood that the orientation or positional relationship indicated by the terms "center", "longitudinal", "transverse", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", etc. is based on the orientation or positional relationship shown in the accompanying drawings. It is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as a limitation to the present invention. In addition, the terms "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, the features defined with "first", "second", etc. may explicitly or implicitly include one or more of such features. In the description of the present invention, unless otherwise specified, the meaning of "a plurality" is two or more.

[0026] In the description of the present invention, it should be noted that, unless otherwise clearly defined and limited, the terms "mounted", "connected" and "coupled" should be understood in a broad sense. For example, it may be a fixed connection, a detachable connection or an integral connection; it may be a mechanical connection or an electrical connection; it may be directly connected or indirectly connected through an intermediate medium, and it may be the communication inside two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood through specific situations.

[0027] The present invention will be described in detail below with reference to the accompanying drawings and in conjunction with the embodiments.

[0028] It should be noted that, in order to show the internal structure of the surface-emitting semiconductor laser, Figure 1 is a schematic perspective view of a partially cut surface-emitting semiconductor laser for reference Figures 1 to 4, on the one hand, the present invention provides a surface-emitting semiconductor laser, comprising: a substrate 101; an epitaxial structure located on the top surface of the substrate 101; a ring-shaped P-type switching electrode 112 located on the top surface of the epitaxial structure away from the substrate 101; an N-type switching electrode 100 located on the bottom surface of the substrate 101; an arc-shaped cooling electrode 113 located on the top surface of the epitaxial structure away from the substrate 101, and the cooling electrode 113 is sleeved on the outer ring of the P-type switching electrode 112. The cooling electrode 113 includes P-type regions 201 and N-type regions 202 arranged alternately along its extending direction; the P-type regions 201 are applied with the same voltage as the P-type switching electrode 112, and the N-type regions 202 are applied with the same voltage as the N-type switching electrode 100; an insulating layer 111 located on the top surface of the epitaxial structure away from the substrate 101, and the insulating layer 111 is at least located between the P-type switching electrode 112 and the cooling electrode 113.

[0029] The arc-shaped cooling electrode 113 can make the current uniformly distributed along the circumference of the cooling electrode 113, avoiding the generation of local hot spots. At the same time, the N-type regions 202 absorb heat by using the Peltier effect, which is beneficial to dissipate heat from the device more uniformly. Moreover, the arc-shaped cooling electrode 113 matches the circular spot characteristics of the surface-emitting semiconductor laser, and can maximize the use of the edge region to actively cool the surface-emitting semiconductor laser without occupying the central light-emitting hole 200.

[0030] The P-type regions are applied with the same voltage as the P-type switching electrode, and the N-type regions are applied with the same voltage as the N-type switching electrode, which means that the voltage direction between the P-type regions and the N-type regions is the same as the voltage direction between the P-type switching electrode and the N-type switching electrode.

[0031] In some embodiments, the number of P-type regions 201 in the cooling electrode 113 is the same as the number of N-type regions 202. In some embodiments, the number of P-type regions 201 and the number of N-type regions 202 are both in the range of 3 to 10. The inner diameter of the cooling electrode 113 is in the range of 60 μm to 80 μm, and in the radial direction of the cooling electrode 113, the width of the cooling electrode 113 is in the range of 3 μm to 20 μm.

[0032] In some embodiments, the surface-emitting semiconductor laser further includes an isolation channel 102 located between the cooling electrode 113 and the P-type switching electrode 112, and the isolation channel 102 penetrates the epitaxial structure along the thickness direction of the epitaxial structure.

[0033] In some embodiments, the orthographic projection of the isolation channel 102 on the top surface of the substrate 101 is ring-shaped.

[0034] The isolation trench 102 helps prevent the current injected by the P-type switching electrode 112 from laterally diffusing into the non-working area, ensuring that carriers are concentrated and injected into the active region layer 105. Moreover, the isolation trench 102 separates the cooling electrode 113 from the epitaxial structure in the working area, which helps reduce thermal crosstalk and electrical interference, alleviates the leakage problem and thermal coupling problem between the P-type switching electrode 112 and the cooling electrode 113, and enhances the stability of the surface-emitting semiconductor laser at high power. The annular isolation trench 102 and the arc-shaped cooling electrode 113 are coordinated in layout to form "thermal-electric co-isolation", which not only restricts the diffusion of carriers but also directionally guides heat to dissipate from the cooling electrode 113 through the isolation trench 102, thereby realizing the rapid extraction of heat from the high-power area and reducing the internal temperature gradient of the device. The annular isolation trench 102 can achieve uniform heat dissipation and avoid the red shift of the gain spectrum caused by local heat accumulation. The annular isolation trench 102 does not occupy the central light-emitting aperture 200, which is conducive to the compatibility of high power and miniaturization.

[0035] In some embodiments, in the direction perpendicular to the top surface of the substrate 101, the thickness of the cooling electrode 113 is in the range of 200 nm to 500 nm.

[0036] In some embodiments, the material of the cooling electrode 113 includes at least one of titanium, platinum, gold, nickel, or germanium.

[0037] In some embodiments, in the radial direction of the P-type switching electrode 112, the spacing between the P-type switching electrode 112 and the cooling electrode 113 is in the range of 10 μm to 20 μm. In this way, on the premise of avoiding interference between the P-type switching electrode 112 and the cooling electrode 113, the spacing between the P-type switching electrode 112 and the cooling electrode 113 can be ensured to be small, which is conducive to improving the cooling effect of the cooling electrode 113 on the working area.

[0038] Furthermore, the epitaxial structure includes an N-type DBR layer 103, an active region layer 105, an oxidation confinement layer 106, a P-type DBR layer 108, a P-type isolation layer 109, and a P-side capping layer 110 that are sequentially stacked in a direction away from the substrate 101. The P-side capping layer 110 has an annular hole that exposes the P-type isolation layer 109. The annular hole penetrates the P-side capping layer 110, and the annular hole is sleeved outside the P-type switching electrode 112. The cooling electrode 113 is disposed in the annular hole.

[0039] The P-type isolation layer 109 is located between the P-type DBR layer 108 and the P-side capping layer 110. The P-type isolation layer 109 can be a high-aluminum component layer in the P-type DBR layer 108. The sum of the thicknesses of the P-type isolation layer 109 and the P-side capping layer 110 is one-fourth of the optical thickness.

[0040] Furthermore, the material of the P-side capping layer 110 is the same as that of the P-type region 201, and the P-side capping layer 110 and the P-type region 201 are formed in the same step.

[0041] As part of the epitaxial structure, an annular hole is etched directly on the P-side capping layer 110 and filled with the material of the N-type region 202. The P-type region 201 and the P-side capping layer 110 are formed in the same step, which simplifies the manufacturing process of the cooling electrode 113. Moreover, the cooling electrode 113 is located on the top surface of the P-type isolation layer 109, which helps reduce the interfacial thermal resistance, and heat can be efficiently conducted to the outside through the cooling electrode 113, facilitating the improvement of the heat dissipation efficiency.

[0042] In some embodiments, along the radial direction of the P-type switching electrode 112, there is a gap between the cooling electrode 113 and the P-side capping layer 110 located outside the cooling electrode 113. The width of the gap is in the range of 5 μm to 10 μm. That is to say, the width of the P-type isolation layer 109 exposed by the annular hole is in the range of 5 μm to 10 μm.

[0043] It should be noted that the part of the P-type isolation layer 109 (oxidized part) facing the cooling electrode 113 is an electrically insulating material. In some examples, the part of the P-type isolation layer 109 facing the cooling electrode 113 is an electrically insulating Al2O3 material formed by wet oxidation. Its function is to prevent the cooling electrode 113 from contacting the P-side capping layer 110, thereby ensuring that the current injected into the cooling electrode 113 flows within the cooling electrode 113 and avoiding flowing to the working area of the laser. The part of the P-type isolation layer 109 (unoxidized part) facing the P-type switching electrode 112 has the same material as some of the film layers in the P-type DBR layer 108.

[0044] In some embodiments, the oxidized part of the P-type isolation layer and the oxide layer in the oxidation confinement layer are formed in the same wet oxidation step. In this way, it is beneficial to simplify the preparation process and reduce the preparation cost.

[0045] In some embodiments, the epitaxial structure further includes: a first transition layer 124 and a second transition layer 104. The first transition layer 124 is located between the N-type DBR layer 103 and the active region layer 105, and the second transition layer 104 is located between the oxidation confinement layer 106 and the P-type DBR layer 108.

[0046] It should be noted that the material components, thicknesses, and doping concentrations of each layer selected in the P-type DBR layer 108 and part of the epitaxial structure between the P-type DBR layer 108 and the substrate 101 are designed the same as those of the currently widely used and mature epitaxial structure design of vertical cavity surface emitting lasers. In some examples, the epitaxial structure can adopt the AlGaAs material system.

[0047] The oxide layer includes a patterned non-oxide layer and an oxide layer. The non-oxide layer serves as an oxidation hole 107 to limit the carrier injection region.

[0048] In some embodiments, the cavity length of the surface-emitting semiconductor laser is in the range of 3 μm to 10 μm, and the mesa diameter of the surface-emitting semiconductor laser is in the range of 10 μm to 50 μm.

[0049] The specific structure of a surface-emitting semiconductor laser based on an aluminum gallium arsenide material system is as follows:

[0050] The epitaxial structure of the surface-emitting semiconductor laser includes: an N-type substrate 101, where the N-type substrate 101 is an N-type GaAs material; an N-type DBR layer 103, the total number of N-type DBR units in the N-type DBR layer 103 is in the range of 20 pairs to 40 pairs, the total thickness of the N-type DBR layer 103 can be in the range of 2 μm to 8 μm, each pair of N-type DBR units includes two alternately grown AlGaAs with different Al compositions, the Al composition of each layer of AlGaAs can be in the range of 0.05 to 1, the thickness of each layer of AlGaAs is one-fourth of the optical thickness, and the dopant of the N-type DBR layer 103 can be Si, and the doping concentration of Si is in 1E16 / cm 3 ~8E18 / cm 3 range; a first transition layer 124 and a second transition layer 104, the materials of the first transition layer 124 and the second transition layer 104 are both AlGaAs materials, where the Al composition can be in the range of 0.2 to 0.7, and the first transition layer 124 and the second transition layer 104 are both non-intentionally doped; an active region layer 105, the active region layer 105 is non-intentionally doped, the active region layer 105 can be a barrier / quantum well / barrier structure, the material of the barrier is AlGaAs, the material of the quantum well is GaAs, the Al composition in the barrier can be in the range of 0.1 to 0.5, the thickness of the barrier can be in the range of 1 nm to 30 nm, the thickness of the quantum well can be in the range of 1 nm to 20 nm, and the corresponding emission wavelength band can be 600 nm to 1200 nm; an oxide confinement layer 106, the material inside the oxidation hole 107 in the oxide confinement layer 106 is AlGaAs, the Al composition can be in the range of 0.95 to 1, the thickness of the oxide confinement layer 106 can be in the range of 10 nm to 50 nm, the dopant of AlGaAs is C, and the doping concentration can be in 1E15 / cm 3 ~1E17 / cm 3Within the range, the material of the part of the oxidation limiting layer 106 except for the oxidation holes 107 is alumina material, and the diameter of the oxidation holes 107 can be within the range of 5 μm to 15 μm; the P-type DBR layer 108, the total number of pairs of P-type DBR units in the P-type DBR layer 108 is within the range of 20 pairs to 30 pairs, and each pair of P-type DBR units includes two alternately grown AlGaAs with different Al compositions. The Al composition of each layer of AlGaAs can be within the range of 0.05 to 1, the thickness of each layer of AlGaAs is one-fourth of the optical thickness, the thickness of each layer of AlGaAs is within the range of 0.01 μm to 1 μm, and the dopant in the P-type DBR layer 108 can be C, and the doping concentration of C can be within 1E16 / cm 3 ~8E18 / cm 3 Within the range; the P-type isolation layer 109, the P-type isolation layer 109 includes an oxidized part and an unoxidized part. The cooling electrode 113 is located on the oxidized part, and the unoxidized part is aligned with the P-type switch electrode and the central light-emitting hole. The material of the unoxidized part is consistent with the high-Al composition film layer in the P-type DBR layer 108. The sum of the thickness of the P-type isolation layer 109 and the thickness of the P-side capping layer 110 is one-fourth of the optical thickness, and the oxidized part is an electrically insulating material formed after wet oxidation; the P-side capping layer 110, the material of the P-side capping layer 110 is doped GaAs.

[0051] In some embodiments, the cooling electrode 113 of the surface-emitting semiconductor laser is made of doped GaAs material. The cooling electrode 113 is embedded in the P-side capping layer 110. A groove for forming the N-type region 202 can be etched on the P-side capping layer 110 first, and then a layer of N-type material is grown on the P-side capping layer 110 to fill the groove with the N-type material, and then the N-type material on the surface of the P-side capping layer 110 is removed to obtain the cooling electrode 113. The specific number of series-connected PN junctions in the cooling electrode 113 and the shapes of the N-type region 202 and the P-type region 201 can be determined according to the mesa size and shape of the surface-emitting semiconductor laser.

[0052] In some examples, the inner diameter of the isolation channel 102 can be within the range of 20 μm to 50 μm, the width of the isolation channel 102 can be within the range of 30 μm to 100 μm, the isolation channel 102 can be formed in the epitaxial structure by an etching process, the isolation channel 102 needs to expose the substrate 101, and the depth of the isolation channel 102 can be within the range of 5 μm to 20 μm.

[0053] In some examples, the insulating layer 111 can be made of SiO2 or Si3N4 material, and the thickness of the insulating layer 111 can be within the range of 100 nm to 500 nm.

[0054] In some examples, the thicknesses of the cooling electrode 113, the P-type switching electrode 112, and the N-type switching electrode 100 can all be in the range of 200 nm to 500 nm. The materials of the N-type region 202, the P-type switching electrode 112, and the N-type switching electrode 100 can all include at least one of titanium, platinum, gold, nickel, and germanium. Metal electrode contacts are provided at the ends of the P-type switching electrode 112, the N-type region 202, and the N-type switching electrode 100.

[0055] It should be noted that, in some embodiments, the cooling electrode 113 is arc-shaped and the P-type switching electrode 112 is a circular ring structure. In this way, it is beneficial to avoid right-angle bends and reduce the resistance of each electrode. In other embodiments, the cooling electrode 113 and the P-type switching electrode 112 can also both be square structures.

[0056] The working principle of the surface-emitting semiconductor laser can be as follows: When a forward voltage is applied to the P-type switching electrode 112 and the N-type switching electrode 100, current flows into the active region layer 105 through the oxidation holes 107, thereby generating optical gain. The light emitted by the active region layer 105 oscillates and amplifies between the N-type DBR layer 103 and the P-type DBR layer 108. When the threshold current is reached, the laser is emitted from the central light-emitting hole 200 at the top of the epitaxial structure. The central light-emitting hole 200 is the inner ring of the P-type switching electrode 112.

[0057] The working principle of the cooling electrode 113 is as follows: The cooling electrode 113 is located outside the P-type switching electrode 112, avoiding the generation of electrothermal crosstalk problems. By applying the same forward voltage to both ends of the cooling electrode 113 as that of the P-type switching electrode 112 and the N-type switching electrode 100, and using the PN junction characteristics, a semiconductor Peltier effect is generated between the adjacent P-type region 201 and N-type region 202 in the cooling electrode 113. Specifically, electrons are negatively charged. When electrons flow from the N-type region 202 to the P-type region 201, positively charged holes are left in the N-type region 202. Since the movement of electrons is equivalent to taking away negative charges, a local "positive charge excess" state will be formed in the N-type region 202. This state will absorb the surrounding heat to balance the energy change brought about by the movement of charges, realizing heat dissipation using the N-type region 202, and simply realizing active cooling of the surface-emitting semiconductor laser using the cooling electrode 113.

[0058] On the other hand, the present invention provides a method for preparing a surface-emitting semiconductor laser, comprising: providing a substrate 101; forming an epitaxial structure on the top surface of the substrate 101; forming a ring-shaped P-type switching electrode 112 on the top surface of the epitaxial structure away from the substrate 101; forming an N-type switching electrode 100 on the bottom surface of the substrate 101; forming an arc-shaped cooling electrode 113 on the top surface of the epitaxial structure away from the substrate 101, and the cooling electrode 113 is sleeved outside the P-type switching electrode 112. The cooling electrode 113 includes P-type regions 201 and N-type regions 202 arranged alternately along its extending direction. The P-type regions 201 are applied with the same voltage as the P-type switching electrode 112, and the N-type regions 202 are applied with the same voltage as the N-type switching electrode 100; forming an insulating layer 111 on the top surface of the epitaxial structure away from the substrate 101, and the insulating layer 111 is at least located between the P-type switching electrode 112 and the cooling electrode 113.

[0059] In some embodiments, the method for preparing the surface-emitting semiconductor laser is specifically as follows:

[0060] Step 1: Design and etch a first photomask for forming the isolation trench 102, a second photomask for etching the groove corresponding to the N-type region 202 on the P-side capping layer 110, a third photomask 3 for etching and forming the cooling electrode 113, and a fourth photomask for forming the P-type switching electrode 112;

[0061] Step 2: Sequentially deposit an N-type DBR layer 103, a first transition layer 124, an active region layer 105, an initial oxidation confinement layer, a second transition layer 104, a P-type DBR layer 108, an initial P-type isolation layer, and an initial P-side capping layer on the N-type GaAs substrate 101;

[0062] Step 3: Perform a first photolithography process on the surface of the epitaxial structure using the first photomask, and etch out the isolation trench 102 through a dry etching process;

[0063] Step 4: Oxidize the initial oxidation confinement layer and the initial P-type isolation layer in the same step by wet side oxidation, that is, partially oxidize the initial oxidation confinement layer to form an oxidation confinement layer 106, and partially oxidize the initial P-type isolation layer to form a P-type isolation layer 109. In this way, it is beneficial to simplify the difficulty of preparing the P-type isolation layer 109 including the oxidized part;

[0064] Step Five: Perform the second lithography process on the surface of the initial P-side capping layer using the second photomask to etch out the grooves for forming the N-type region 202. After forming the material of the N-type region 202, remove the excess material of the N-type region 202 on the surface of the P-side capping layer 110 and the top surface of the P-type region 201 between adjacent grooves to obtain the cooling electrode 113. That is to say, pattern the initial P-side capping layer to form the P-side capping layer 110 and the P-type region 201, and then fill the material of the N-type region between adjacent P-type regions 201 to form the N-type region 202;

[0065] Step Six: Grow the insulating layer 111 using plasma-enhanced chemical vapor deposition method and clean it to ensure no pollution in subsequent processes;

[0066] Step Seven: Perform the third lithography process using the third photomask. Remove part of the insulating layer 111 through the third lithography process to form the current injection window and expose the top surface of the cooling electrode 113;

[0067] Step Eight: Use the lift-off process. In the metal film evaporation equipment, form the P-type switching electrode 112 on the P-side capping layer 110 located in the inner circle of the isolation channel 102 using the fourth photomask;

[0068] Step Nine: Thin, polish, and clean the N-type substrate to ensure that the thickness of the substrate 101 meets the requirements. In some examples, the N-type GaAs substrate 101 can be thinned to a range of 100 μm to 300 μm. Grow the N-type switching electrode 100 on the back surface of the N-type GaAs substrate 101 and perform the annealing process to make the N-type switching electrode 100 form a good ohmic contact with the substrate 101.

[0069] It should be understood that various forms of the processes shown above can be used, re-ordered, steps added or deleted. For example, the steps described in the disclosure of the present invention can be executed in parallel, sequentially, or in different orders, as long as the desired results of the technical solution disclosed in the present invention can be achieved. There is no limitation here.

[0070] The above specific embodiments do not constitute a limitation to the protection scope of the present invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention shall be included within the protection scope of the present invention.

Claims

1. A surface-emitting semiconductor laser, characterized in that, Comprising: A substrate; An epitaxial structure located on the top surface of the substrate; An annular P-type switching electrode located on the top surface of the epitaxial structure away from the substrate; An N-type switching electrode located on the bottom surface of the substrate; A curved cooling electrode located on the top surface of the epitaxial structure away from the substrate, and the cooling electrode is sleeved outside the P-type switching electrode. The cooling electrode includes P-type regions and N-type regions arranged alternately along its extending direction; The same voltage is applied to the P-type region and the P-type switching electrode, and the same voltage is applied to the N-type region and the N-type switching electrode; An insulating layer located on the top surface of the epitaxial structure away from the substrate, and the insulating layer is at least located between the P-type switching electrode and the cooling electrode.

2. The surface-emitting semiconductor laser according to claim 1, wherein The number of P-type regions in the cooling electrode is the same as the number of N-type regions.

3. The surface-emitting semiconductor laser according to claim 1, characterized in that, The surface-emitting semiconductor laser further includes an isolation channel located between the cooling electrode and the P-type switching electrode, and the isolation channel penetrates the epitaxial structure along the thickness direction of the epitaxial structure.

4. The surface-emitting semiconductor laser according to claim 3, wherein, The orthographic projection of the isolation channel on the top surface of the substrate is annular.

5. The surface-emitting semiconductor laser according to claim 1, characterized in that, The epitaxial structure includes an N-type DBR layer, an active region layer, an oxidation confinement layer, a P-type DBR layer, a P-type isolation layer, and a P-side capping layer stacked in sequence along the direction away from the substrate. The P-side capping layer has an annular hole exposing the P-type isolation layer. The annular hole penetrates the P-side capping layer, and the annular hole is sleeved outside the P-type switching electrode. The cooling electrode is disposed in the annular hole.

6. The surface-emitting semiconductor laser according to claim 5, characterized in that, The material of the P-side capping layer is the same as the material of the P-type region, and the P-side capping layer and the P-type region are formed in the same step.

7. The surface-emitting semiconductor laser according to claim 1, wherein, Along the direction perpendicular to the top surface of the substrate, the thickness of the cooling electrode is in the range of 200 nm to 500 nm.

8. The surface-emitting semiconductor laser according to claim 1 or 7, characterized in that, The material of the cooling electrode includes at least one of titanium, platinum, gold, nickel, or germanium.

9. The surface-emitting semiconductor laser according to claim 1, wherein Along the radial direction of the P-type switching electrode, the distance between the P-type switching electrode and the cooling electrode is in the range of 10 μm to 20 μm.

10. A method for preparing a surface-emitting semiconductor laser, characterized in that, Comprising: Providing a substrate; Forming an epitaxial structure located on the top surface of the substrate; Forming an annular P-type switching electrode located on the top surface of the epitaxial structure away from the substrate; Forming an N-type switching electrode located on the bottom surface of the substrate; Forming a curved cooling electrode located on the top surface of the epitaxial structure away from the substrate, and the cooling electrode is sleeved outside the P-type switching electrode. The cooling electrode includes P-type regions and N-type regions arranged alternately along its extending direction. The same voltage is applied to the P-type region and the P-type switching electrode, and the same voltage is applied to the N-type region and the N-type switching electrode; Forming an insulating layer located on the top surface of the epitaxial structure away from the substrate, and the insulating layer is at least located between the P-type switching electrode and the cooling electrode.

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