Test circuit and test method for dynamic switching characteristics of high-voltage power assembly

Abstract

The invention provides a test circuit for dynamic switching characteristics of a high-voltage power assembly and a test method thereof. The test method comprises the following steps: measuring a test voltage of a test endpoint between the first high-voltage transistor and the second high-voltage transistor; when the high-voltage power assembly is in a conducting state, in a first period, the first high-voltage transistor is driven to be conducted through a first signal, and the second high-voltage transistor is driven to be cut off through a second signal, so that the test voltage is equal to the to-be-tested voltage of the high-voltage power assembly. When the high-voltage power assembly is in a cut-off state, the first high-voltage transistor is driven to be cut off through the first signal, and the second high-voltage transistor is driven to be conducted through the second signal, so that the test voltage is clamped. The first signal and the second signal drive the first high-voltage transistor and the second high-voltage transistor not to be in a conducting state at the same time.

Description

Technical Field

[0001] The present invention relates to a voltage measurement technique, and more particularly to a test circuit and a test method for the dynamic switching characteristics of high-voltage power components. Background Art

[0002] The applications of high-voltage power components are becoming increasingly popular. Since the switching characteristics of high-voltage power components (such as switching speed, switching loss, voltage waveform, etc.) will affect the performance of electronic products, in order to confirm that they can operate stably and reliably in electronic products, it is necessary to test (such as measure) their dynamic switching characteristics. However, when the high-voltage power component switches states, its voltage to be measured (such as Vds) will oscillate / vary between a high voltage (such as 300V) and a low voltage (such as 1V). Especially when the high-voltage power component switches to the on state, its voltage to be measured will drop significantly and instantaneously, resulting in a reduction in measurement accuracy.

[0003] To improve the measurement accuracy, a clamping circuit can be connected to the measurement terminal of the voltage to be measured of the high-voltage power component. Please refer to Figure 1 and Figure 2 , Figure 1 which is a schematic circuit diagram of a test circuit for the dynamic switching characteristics of high-voltage power components. The test circuit includes a device under test (DUT) (such as a high-voltage power component), a load, and a clamping circuit. The clamping circuit includes a high-voltage transistor M1 and passive components (such as resistors, capacitors, inductors, etc.). The drain of the DUT is electrically connected to the load and the drain of the high-voltage transistor M1. The source of the DUT is electrically connected to a low-voltage terminal (such as a ground terminal GND). The source of the high-voltage transistor M1 is electrically connected to the passive components. The high-voltage transistor M1 is turned on or off according to the signal Vgs_m output by the battery. The DUT can be turned on or off according to the signal Vgs output by a driver (not shown in Figure 1 ). By testing the test endpoint in the clamping circuit, the dynamic voltage characteristics of the DUT can be obtained. Specifically, through the clamping circuit, when the DUT is in the off state, the test voltage Vds_m of the test endpoint is clamped at a low voltage (such as the threshold voltage Vg-th of the high-voltage transistor). When the DUT switches to the on state, the test voltage Vds_m drops slightly. By measuring the test voltage Vds_m, the voltage to be measured Vds can be obtained, thereby improving the measurement accuracy.

[0004] Figure 2 For Figure 1Schematic diagram of the voltage waveform timing. At time point t0, Vgs provides a low voltage, the device under test (DUT) is in the cut-off state, and the test voltage Vds_m is clamped (e.g., 6V). At time point t1, Vgs switches to providing a high voltage, the device under test (DUT) switches to the on state, causing the voltage under test Vds to drop and the test voltage Vds_m to drop. During the period from t1 to t2, measuring the test voltage Vds_m can obtain the voltage under test Vds with high precision. At time point t2, Vgs switches to providing a low voltage, the device under test (DUT) switches to the cut-off state, causing the voltage under test Vds to rise and the test voltage Vds_m to instantaneously rise and cause a spike (e.g., higher than 6V). During the period from t2 to t3, the test voltage Vds_m discharges and returns to the normal value. At time point t3, Vgs provides a low voltage, the device under test (DUT) is in the cut-off state, and the test voltage Vds_m is clamped.

[0005] It should be noted that in the above circuit structure, the high-voltage transistor is continuously in the on state, that is, current continuously passes through the high-voltage transistor and the passive component (i.e., forming a continuous leakage path), resulting in heat generation and higher power consumption. In addition, when the device under test switches to the cut-off state, the parasitic capacitance in the test circuit causes the test voltage Vds_m to instantaneously rise (e.g., spike overshoot), but the charge of the test voltage Vds_m needs to discharge through the resistor to return to the normal value, thereby reducing the overall operation speed. In addition, if a diode is used to replace the above passive component, although the leakage can be reduced and the instantaneous high-voltage amplitude of the voltage under test Vds can be suppressed, the discharge recovery time will increase.

[0006] Therefore, how to effectively test the dynamic switching characteristics of high-voltage power components is a problem that is extremely eager to be solved. Summary of the Invention

[0007] To solve the above technical problems, the present invention proposes a test circuit and a test method for the dynamic switching characteristics of high-voltage power components to (1) reduce power consumption and heat generation, and (2) improve test accuracy and overall test speed.

[0008] An embodiment of the present invention provides a test circuit for the dynamic switching characteristics of a high-voltage power component, including: a first high-voltage transistor electrically connected to the high-voltage power component; a second high-voltage transistor electrically connected to the first high-voltage transistor; a first driver electrically connected to the first high-voltage transistor for outputting a first signal to the first high-voltage transistor; and a second driver electrically connected to the second high-voltage transistor for outputting a second signal to the second high-voltage transistor. The first high-voltage transistor and the second high-voltage transistor are not simultaneously in the conducting state. There is a test endpoint between the first high-voltage transistor and the second high-voltage transistor. When the high-voltage power component is in the conducting state, during a first period, the first high-voltage transistor conducts according to the first signal, and the second high-voltage transistor cuts off according to the second signal, so that the test voltage at the test endpoint is equal to the voltage to be measured of the high-voltage power component. When the high-voltage power component is in the cut-off state, the first high-voltage transistor cuts off according to the first signal, and the second high-voltage transistor conducts according to the second signal, so that the test voltage at the test endpoint is clamped not higher than a specific voltage.

[0009] Optionally, the first gate of the first high-voltage transistor is electrically connected to the first driver to receive the first signal, the first drain of the first high-voltage transistor is electrically connected to the third drain of the high-voltage power component, the first source of the first high-voltage transistor is electrically connected to the second drain of the second high-voltage transistor, the second gate of the second high-voltage transistor is electrically connected to the second driver to receive the second signal, the second source of the second high-voltage transistor is electrically connected to the low-voltage terminal, and the third source of the high-voltage power component is electrically connected to the low-voltage terminal.

[0010] Optionally, the first high-voltage transistor is a first N-type transistor or a first P-type transistor, the second high-voltage transistor is a second N-type transistor or a second P-type transistor, and the high-voltage power component is one of silicon carbide (SiC), gallium nitride (GaN), and insulated gate bipolar transistor (IGBT).

[0011] Optionally, the starting time point of the first period is not earlier than the starting conduction time point of the high-voltage power component, and the ending time point of the first period is earlier than the ending conduction time point of the high-voltage power component.

[0012] Optionally, when the high-voltage power component is in the conducting state, during a second period, the first high-voltage transistor cuts off according to the first signal, so that the test voltage is clamped not higher than the specific voltage, where the starting time point of the second period is later than the ending time point of the first period, and the ending time point of the second period is not later than the ending conduction time point of the high-voltage power component.

[0013] An embodiment of the present invention further provides a method for testing the dynamic switching characteristics of a high-voltage power component, including: measuring the test voltage at the test terminal between the first high-voltage transistor and the second high-voltage transistor; when the high-voltage power component is in the conducting state, during a first period, driving the first high-voltage transistor to conduct through a first signal output by a first driver, and driving the second high-voltage transistor to cut off through a second signal output by a second driver, so that the test voltage is equal to the voltage to be measured of the high-voltage power component; and when the high-voltage power component is in the cut-off state, driving the first high-voltage transistor to cut off through the first signal, and driving the second high-voltage transistor to conduct through the second signal, so that the test voltage is clamped not higher than a specific voltage. The first high-voltage transistor is electrically connected to the high-voltage power component and the first driver. The second high-voltage transistor is electrically connected to the first high-voltage transistor and the second driver. The first high-voltage transistor and the second high-voltage transistor are respectively driven by the first signal and the second signal to not be in the conducting state simultaneously.

[0014] Based on the above, the testing method of the present invention and the testing circuit applying the same obtain the dynamic switching characteristics of the high-voltage power component by measuring the test voltage at the test terminal between the two high-voltage transistors. Since the two high-voltage transistors are controlled not to conduct simultaneously, no current will pass through the path between them during the testing process, thereby reducing power consumption and heat generation. In addition, by controlling the conducting states of the two high-voltage transistors, the test voltage at the test terminal is in a low numerical state, thereby reducing voltage oscillation and recovery time, and thus improving the testing accuracy and the overall testing speed (i.e., being able to support frequent testing). BRIEF DESCRIPTION OF THE DRAWINGS

[0015] The provided drawings are used to enable those skilled in the art to which the present invention pertains to further understand the present invention, and are incorporated into and constitute a part of the specification of the present invention. The drawings show exemplary embodiments of the present invention and are used together with the specification of the present invention to explain the principles of the present invention.

[0016] Figure 1 is a schematic circuit diagram of a testing circuit for the dynamic switching characteristics of a high-voltage power component;

[0017] Figure 2 is according to Figure 1 the voltage waveform timing diagram;

[0018] Figure 3 is a schematic circuit diagram of a testing circuit for the dynamic switching characteristics of a high-voltage power component according to an embodiment of the present invention;

[0019] Figure 4 is according to Figure 3 the voltage waveform timing diagram; and

[0020] Figure 5 Schematic diagram of the process of a test method for the dynamic switching characteristics of a high-voltage power component according to an embodiment of the present invention.

[0021] Symbol Explanation

[0022] Vgs: Signal output by the driver

[0023] Vds: Voltage to be measured

[0024] Vgs_m: Signal output by the battery

[0025] Vds_m: Test voltage

[0026] DUT: Component to be tested

[0027] HV: High-voltage power supply

[0028] GND: Ground terminal

[0029] M1: First high-voltage transistor

[0030] M2: Second high-voltage transistor

[0031] Vgs_m1: First signal

[0032] Vgs_m2: Second signal

[0033] t0, t0’, t1, t2, t2’, t2*, t3: Time points

[0034] S502, S504, S506, S508, S510, S512, S514: Steps Detailed implementation manner

[0035] The present invention provides a test circuit and a test method for the dynamic switching characteristics of a high-voltage power component to solve the problems mentioned in the background technology. To make the features and advantages of the present invention more obvious and understandable, the specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings. The following description contains specific information related to the exemplary embodiments of the present invention. The drawings and their accompanying detailed descriptions in the present invention are only exemplary embodiments. However, the present invention is not limited to these exemplary embodiments. Those skilled in the art will think of other variations and embodiments of the present invention. Unless otherwise specified, the same or corresponding components in the drawings may be indicated by the same or corresponding reference numerals. In addition, the drawings and illustrations in the present invention are generally not drawn to scale and are not intended to correspond to the actual relative sizes.

[0036] Figure 3 Circuit schematic diagram of a test circuit for the dynamic switching characteristics of a high-voltage power component according to an embodiment of the present invention. As Figure 3As shown, a test circuit for the dynamic switching characteristics of a device under test (DUT) (such as a high-voltage power component) includes a first high-voltage transistor M1, a second high-voltage transistor M2, a first driver, and a second driver. The driver can be, for example, a driving unit, a driving component, or a driving circuit, etc., but the present invention is not limited thereto.

[0037] The first high-voltage transistor M1 is electrically connected to the DUT and the second high-voltage transistor M2 in series. The first driver is electrically connected to the first high-voltage transistor M1 and is used to output a first signal to the first high-voltage transistor M1 to drive the first high-voltage transistor M1 to conduct or cut off. The first signal can be implemented, for example, by the voltage between the gate and the source (subsequently referred to as "Vgs_m1" for description). The second driver is electrically connected to the second high-voltage transistor M2 and is used to output a second signal to the second high-voltage transistor M2 to drive the second high-voltage transistor M2 to conduct or cut off. The second signal can be implemented, for example, by the voltage between the gate and the source (subsequently referred to as "Vgs_m2" for description). The first signal Vgs_m1 and the second signal Vgs_m2 drive the first high-voltage transistor M1 and the second high-voltage transistor M2 not to be in the conducting state simultaneously (for example, one of them is in the conducting state and the other is in the cut-off state; or both are in the cut-off state).

[0038] There is a test endpoint between the first high-voltage transistor M1 and the second high-voltage transistor M2. The conduction states of the first high-voltage transistor M1 and the second high-voltage transistor M2 are controlled according to the first signal Vgs_m1 and the second signal Vgs_m2 respectively to control the test voltage at the test endpoint. The test voltage can be implemented, for example, by the voltage between the drain and the source (subsequently referred to as "Vds_m" for description). It can be measured / observed by an oscilloscope. When the DUT is in the conducting state, during a first period, the first signal Vgs_m1 drives the first high-voltage transistor M1 to conduct, and the second signal Vgs_m2 drives the second high-voltage transistor M2 to cut off, so that the test voltage Vds_m is equal to the voltage to be measured of the DUT. The voltage to be measured can be implemented, for example, by the voltage between the drain and the source (subsequently referred to as "Vds" for description). That is to say, the first period is a measurement period for achieving accurate measurement. When the DUT is in the cut-off state, the first signal Vgs_m1 drives the first high-voltage transistor M1 to cut off, and the second signal Vgs_m2 drives the second high-voltage transistor M2 to conduct, so that the test voltage Vds_m is clamped not to be higher than a specific voltage. In other words, the high-voltage transistors M1 and M2 can achieve a clamping effect.

[0039] Based on the above, since the high-voltage transistors M1 and M2 do not conduct simultaneously, no current will flow through this measurement path during the measurement process, thereby reducing power consumption and heat generation. In addition, the test voltage Vds_m can be maintained at a low value state, reducing the voltage recovery time, and thus supporting frequent measurements.

[0040] In some embodiments, the first gate of the first high-voltage transistor M1 can be electrically connected to the first driver to receive the first signal Vgs_m1. The first drain of the first high-voltage transistor M1 can be electrically connected to the third drain of the device under test DUT. The first source of the first high-voltage transistor M1 can be electrically connected to the second drain of the second high-voltage transistor M2. The second gate of the second high-voltage transistor M2 can be electrically connected to the second driver to receive the second signal Vgs_m2. The second source of the second high-voltage transistor M2 can be electrically connected to the low-voltage terminal (such as the ground terminal GND). The third source of the device under test DUT can be electrically connected to the low-voltage terminal.

[0041] In some embodiments, the third gate of the device under test DUT can be electrically connected to a third driver (not shown in the figure) to receive a third signal. The third signal can be implemented, for example, as a gate-source voltage (subsequently described as "Vgs"). The third signal Vgs can drive the device under test DUT to conduct or cut off. The third drain of the device under test DUT can be electrically connected to the load and the power supply in series. The power supply can be, for example, a high-voltage terminal (such as a high-voltage power supply HV), etc., but the present invention is not limited thereto. The load can include at least one of a resistor, an inductor, and a capacitor, but the present invention is not limited thereto.

[0042] In some embodiments, the first high-voltage transistor M1 can be a first N-type transistor (N-type metal oxide semiconductor (NMOS) transistor) or a first P-type transistor (P-type metal oxide semiconductor (PMOS) transistor). The second high-voltage transistor M2 can be a second N-type transistor or a second P-type transistor. The device under test DUT can be one of silicon carbide (SiC), gallium nitride (GaN), and insulated gate bipolar transistor (IGBT), but the present invention is not limited thereto.

[0043] In some embodiments, the starting time point of the first period may not be earlier than (later than or equal to) the starting conduction time point of the high-voltage power component. The ending time point of the first period can be earlier than the ending conduction time point of the high-voltage power component. That is to say, the time point when the first high-voltage transistor M1 conducts is not earlier than the time point when the device under test DUT conducts.

[0044] In some embodiments, when the device under test (DUT) is in the conducting state, during the second period, the first signal Vgs_m1 can drive the first high-voltage transistor M1 to cut off (and the second signal Vgs_m2 drives the second high-voltage transistor M2 to conduct), so that the test voltage is clamped not to be higher than a specific voltage. The start time point of the second period can be later than the end time point of the first period, and the end time point of the second period can be not later than (earlier than or equal to) the end conduction time point of the high-voltage power component. That is, the time point when the first high-voltage transistor M1 cuts off is earlier than the time point when the DUT cuts off. Accordingly, by precisely controlling the high-voltage transistors M1 and M2, the occurrence of surges can be avoided, making the waveform more stable.

[0045] In some embodiments, the time point when the second high-voltage transistor M2 cuts off can be not later than the start conduction time point of the high-voltage power component. The time point when the second high-voltage transistor M2 conducts can be earlier than the end conduction time point of the high-voltage power component.

[0046] In some embodiments, the specific voltage can be the gate voltage Vg-th of the first high-voltage transistor M1. In some embodiments, when the first high-voltage transistor M1 is in the cut-off state, the test voltage can be clamped close to (e.g., equal to) 0V.

[0047] In some embodiments, the test circuit can further include a diode (not shown in the figure). The positive electrode of the diode can be electrically connected to the low-voltage terminal. The negative electrode of the diode can be electrically connected to the test end point.

[0048] It should be noted that Figure 3 the high-voltage transistors M1 and M2 in are exemplified by N-type transistors, but the present invention is not limited thereto.

[0049] Figure 4 is a schematic diagram of the voltage waveform timing according to Figure 3 At the time point t0, the third signal Vgs provides a low voltage, and the DUT is in the cut-off state. The second signal Vgs_m2 provides a high voltage, and the high-voltage transistor M2 is in the conducting state. The first signal Vgs_m1 provides a low voltage, and the high-voltage transistor M1 is in the cut-off state, so that the test voltage Vds_m is clamped.

[0050] At the time point t0', the second signal Vgs_m2 changes to provide a low voltage, and the high-voltage transistor M2 switches to the cut-off state. Vgs_m1 remains clamped.

[0051] At the time point t1, the third signal Vgs changes to provide a high voltage, and the DUT switches to the conducting state, so that the measured voltage Vds drops. The first signal Vgs_m1 changes to provide a high voltage, and the high-voltage transistor M1 switches to the conducting state, so that the test voltage Vds_m rises slightly and approaches (e.g., equals) the measured voltage Vds.

[0052] During the period from t1 to t2', measuring the test voltage Vds_m can obtain the voltage under test Vds with high accuracy.

[0053] At the time point t2', the second signal Vgs_m2 maintains a low voltage, and the high-voltage transistor M2 is in the cut-off state. The first signal Vgs_m1 switches to provide a low voltage, and the high-voltage transistor M1 switches to the cut-off state, causing the test voltage Vds_m to drop slightly and be clamped.

[0054] At the time point t2*, the second signal Vgs_m2 switches to provide a high voltage, and the high-voltage transistor M2 switches to the on state. Vgs_m1 remains clamped.

[0055] At the time point t2, the third signal Vgs switches to provide a low voltage, and the device under test DUT switches to the cut-off state, causing the voltage under test Vds to rise. Vgs_m1 remains clamped.

[0056] It should be noted that the time point t0' is not later than the time point t1. The time point t2* is not earlier than t2'. The time point t2* is earlier than t2. The period from t1 to t2' can be regarded as the above-mentioned first period, and accurate measurement can be achieved. The period from t2' to t2 can be regarded as the above-mentioned second period, and the surge condition can be avoided. In addition Figure 4 Taking the time point when the third signal Vgs switches to provide a high voltage being equal to the time point when the first signal Vgs_m1 switches to provide a high voltage (i.e., t1) as an example, but the present invention is not limited thereto. For example, the time point when the first signal Vgs_m1 switches to provide a high voltage is not earlier than the time point when the third signal Vgs switches to provide a high voltage.

[0057] According to the above embodiments, the following test method can be obtained (for example, summarized into). Figure 5 It is a schematic flowchart of a test method for the dynamic switching characteristics of a high-voltage power component according to an embodiment of the present invention. As Figure 5 shown, this test method includes the following steps:

[0058] In step S502, measure the test voltage Vds_m at the test terminal between the first high-voltage transistor M1 and the second high-voltage transistor M2.

[0059] In step S504, drive the first high-voltage transistor M1 to cut off through the first signal Vgs_m1 output by the first driver, and drive the second high-voltage transistor M2 to conduct through the second signal Vgs_m2 output by the second driver, so that the test voltage is clamped not higher than a specific voltage.

[0060] In step S506, the second high-voltage transistor M2 is driven to be cut off by the second signal Vgs_m2. At this time, the first high-voltage transistor M1 maintains the cut-off state.

[0061] In step S508, the high-voltage power component DUT is driven to conduct.

[0062] In step S510, when the high-voltage power component DUT is in the conducting state, during the first period, the first high-voltage transistor M1 is driven to conduct by the first signal Vgs_m1, and the second high-voltage transistor M2 is driven to be cut off by the second signal Vgs_m2, so that the test voltage Vds_m is equal to the voltage Vds to be measured of the high-voltage power component DUT.

[0063] In step S512, when the high-voltage power component DUT is in the conducting state, during the second period, the first high-voltage transistor M1 is driven to be cut off by the first signal Vgs_m1 (and the second high-voltage transistor M2 is driven to conduct by the second signal Vgs_m2), so that the test voltage is clamped not to be higher than a specific voltage.

[0064] In step S514, the high-voltage power component DUT is driven to be cut off. At this time, the first high-voltage transistor M1 maintains the cut-off state, and the second high-voltage transistor M2 maintains the conducting state.

[0065] In summary, the test circuit and the test method for the dynamic switching characteristics of the high-voltage power component of the present invention obtain the dynamic switching characteristics of the high-voltage power component by measuring the test voltage at the test end between the two high-voltage transistors. Since the two high-voltage transistors are controlled not to conduct simultaneously, no current will pass through the path between them during the test, thereby reducing power consumption and heat generation. In addition, by controlling the conducting states of the two high-voltage transistors, the test voltage at the test end is in a low value state, thereby reducing voltage oscillation and recovery time, so as to improve the test accuracy and the overall test speed (i.e., it can support frequent tests).

[0066] Although the present application has been disclosed by using the above embodiments, it is not intended to limit the present invention. Any person skilled in the art can make various changes and modifications to the above embodiments without departing from the spirit and scope of the present invention, and still fall within the technical scope protected by the present invention. Therefore, the protection scope of the present invention shall be determined by the scope defined by the claims.

Claims

1. A test circuit for the dynamic switching characteristics of a high-voltage power component, characterized in that, Comprising: A first high-voltage transistor electrically connected to the high-voltage power component; A second high-voltage transistor electrically connected to the first high-voltage transistor; A first driver electrically connected to the first high-voltage transistor for outputting a first signal to the first high-voltage transistor; And A second driver electrically connected to the second high-voltage transistor for outputting a second signal to the second high-voltage transistor, Wherein, The first high-voltage transistor and the second high-voltage transistor are not simultaneously in the on state, There is a test terminal between the first high-voltage transistor and the second high-voltage transistor, When the high-voltage power component is in the on state, during a first period, the first high-voltage transistor conducts according to the first signal, and the second high-voltage transistor cuts off according to the second signal, so that a test voltage at the test terminal is equal to a voltage to be measured of the high-voltage power component, and When the high-voltage power component is in the off state, the first high-voltage transistor cuts off according to the first signal, and the second high-voltage transistor conducts according to the second signal, so that the test voltage at the test terminal is clamped not to be higher than a specific voltage.

2. The test circuit according to claim 1, characterized in that, A first gate of the first high-voltage transistor is electrically connected to the first driver to receive the first signal, a first drain of the first high-voltage transistor is electrically connected to a third drain of the high-voltage power component, a first source of the first high-voltage transistor is electrically connected to a second drain of the second high-voltage transistor, a second gate of the second high-voltage transistor is electrically connected to the second driver to receive the second signal, a second source of the second high-voltage transistor is electrically connected to a low-voltage terminal, and a third source of the high-voltage power component is electrically connected to the low-voltage terminal.

3. The test circuit according to claim 1, characterized in that, The first high-voltage transistor is a first N-type transistor or a first P-type transistor, the second high-voltage transistor is a second N-type transistor or a second P-type transistor, and the high-voltage power component is one of silicon carbide, gallium nitride, and insulated gate bipolar transistor.

4. The test circuit according to claim 1, wherein A start time point of the first period is not earlier than a start conduction time point of the high-voltage power component, and an end time point of the first period is earlier than an end conduction time point of the high-voltage power component.

5. The test circuit according to claim 4, wherein When the high-voltage power component is in the on state, during a second period, the first high-voltage transistor cuts off according to the first signal, so that the test voltage is clamped not to be higher than the specific voltage, wherein a start time point of the second period is later than the end time point of the first period, and an end time point of the second period is not later than the end conduction time point of the high-voltage power component.

6. A test method for the dynamic switching characteristics of a high-voltage power component, characterized in that, Comprising: Measuring a test voltage at a test terminal between a first high-voltage transistor and a second high-voltage transistor; When the high-voltage power component is in the conducting state, during a first period, a first signal output by a first driver drives the first high-voltage transistor to conduct, and a second signal output by a second driver drives the second high-voltage transistor to cut off, so that the test voltage is equal to a voltage to be measured of the high-voltage power component; And When the high-voltage power component is in the cut-off state, the first signal drives the first high-voltage transistor to cut off, and the second signal drives the second high-voltage transistor to conduct, so that the test voltage is clamped not to be higher than a specific voltage. Wherein, the first high-voltage transistor is electrically connected to the high-voltage power component and the first driver. The second high-voltage transistor is electrically connected to the first high-voltage transistor and the second driver, and The first high-voltage transistor and the second high-voltage transistor are respectively driven by the first signal and the second signal not to be in the conducting state simultaneously.

7. The test method according to claim 6, wherein A first gate of the first high-voltage transistor is electrically connected to the first driver to receive the first signal, a first drain of the first high-voltage transistor is electrically connected to a third drain of the high-voltage power component, a first source of the first high-voltage transistor is electrically connected to a second drain of the second high-voltage transistor, a second gate of the second high-voltage transistor is electrically connected to the second driver to receive the second signal, a second source of the second high-voltage transistor is electrically connected to a low-voltage terminal, and a third source of the high-voltage power component is electrically connected to the low-voltage terminal.

8. The test method according to claim 6, wherein, The first high-voltage transistor is a first N-type transistor or a first P-type transistor, the second high-voltage transistor is a second N-type transistor or a second P-type transistor, and the high-voltage power component is one of silicon carbide, gallium nitride and insulated gate bipolar transistor.

9. The testing method according to claim 6, characterized in that, A starting time point of the first period is not earlier than a starting conduction time point of the high-voltage power component, and an ending time point of the first period is earlier than an ending conduction time point of the high-voltage power component.

10. The test method according to claim 9, characterized in that, Further included: When the high-voltage power component is in the conducting state, during a second period, the first signal drives the first high-voltage transistor to cut off, so that the test voltage is clamped not to be higher than the specific voltage, wherein a starting time point of the second period is later than the ending time point of the first period, and an ending time point of the second period is not later than the ending conduction time point of the high-voltage power component.

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