Method and apparatus for determining virtual machine running frequency, electronic device and storage medium

Abstract

The present disclosure provides a virtual machine running frequency determination method and device, electronic equipment and storage medium, relates to the technical field of computers, in particular to the technical field of virtualization in cloud scenarios. The method comprises obtaining a target register from a transparent list, and obtaining register data corresponding to the target register, the registers in the transparent list being accessible by the virtual machine; during the running of the virtual machine, in response to receiving a read target register data instruction, the register data corresponding to the target register is transmitted to the virtual machine, so that the virtual machine obtains the running frequency of the virtual machine according to the register data. The transparent mechanism of the present disclosure enables the virtual machine to perceive the actual running frequency of the host machine in real time, thereby significantly improving the real-time performance and accuracy of the virtual machine in performance monitoring and optimization.

Description

Technical Field

[0001] This disclosure relates to the field of computer technology, specifically to the field of virtualization technology in cloud scenarios, and particularly to methods, apparatus, electronic devices and storage media for determining the operating frequency of virtual machines. Background Technology

[0002] In current virtualization environments based on QEMU (Quick Emulator, virtualization management software) and KVM (Kernel-based Virtual Machine), the operating frequency of a virtual machine is typically a fixed value, usually consistent with the nominal clock speed of the host CPU (Central Processing Unit). However, modern CPUs support dynamic frequency adjustment technology, which means that the actual operating frequency of the host CPU may change dynamically due to factors such as load, temperature, or power consumption. Furthermore, when the host CPU frequency decreases due to abnormal conditions (such as overheating or power management policies), the actual operating frequency of the virtual machine will also fluctuate accordingly. However, existing technologies typically display a fixed operating frequency for virtual machines, making it impossible for users to perceive changes in the actual operating frequency, thus limiting real-time monitoring and optimization of virtual machine performance. Summary of the Invention

[0003] This disclosure provides a method, apparatus, electronic device, and storage medium for determining the operating frequency of a virtual machine.

[0004] According to one aspect of this disclosure, a method for determining the operating frequency of a virtual machine is provided, the method comprising:

[0005] The target register is obtained from the pass-through list, and the register data corresponding to the target register is obtained. The registers in the pass-through list can be accessed by the virtual machine.

[0006] During the operation of the virtual machine, in response to receiving a read target register data instruction, register data corresponding to the target register is passed through to the virtual machine, so that the virtual machine can obtain the operating frequency of the virtual machine based on the register data.

[0007] According to another aspect of this disclosure, an apparatus for determining the operating frequency of a virtual machine is provided, the apparatus comprising:

[0008] The acquisition module is used to acquire a target register from the pass-through list and acquire the register data corresponding to the target register. The registers in the pass-through list can be accessed by the virtual machine.

[0009] The pass-through module is used to, during the operation of the virtual machine, in response to receiving a read target register data instruction, pass-through the register data corresponding to the target register to the virtual machine, so that the virtual machine can obtain the operating frequency of the virtual machine based on the register data.

[0010] According to a third aspect of this disclosure, an electronic device is provided, comprising:

[0011] At least one processor; and

[0012] A memory communicatively connected to the at least one processor; wherein,

[0013] The memory stores instructions that can be executed by the at least one processor, which, when executed by the at least one processor, enables the at least one processor to perform the method described in any of the above technical solutions.

[0014] According to a fourth aspect of this disclosure, a non-transitory computer-readable storage medium is provided storing computer instructions, wherein the computer instructions are used to cause the computer to perform any one of the methods described above.

[0015] According to a fifth aspect of this disclosure, a computer program product is provided, comprising a computer program that, when executed by a processor, implements the method described in any one of the above technical solutions.

[0016] This disclosure provides a method, apparatus, electronic device, and storage medium for determining the operating frequency of a virtual machine. By adding a target register to a pass-through list and passing the register data of the target register to the virtual machine during virtual machine operation, the virtual machine can calculate and obtain its own operating frequency in real time based on this register data. This pass-through mechanism allows the virtual machine to directly access the value of the target register, thereby obtaining the actual operating frequency of the host machine in real time. This solves the problem that virtual machines in traditional virtualization environments can only see a fixed frequency, enabling the virtual machine to dynamically perceive changes in the host machine's frequency. Secondly, in response to a read target register data instruction, this disclosure directly reads the pass-through register data, thereby accurately calculating the virtual machine's operating frequency. This direct access to hardware registers avoids the inaccurate frequency perception problem caused by the abstraction of the virtualization layer in traditional methods. Therefore, the pass-through mechanism of this solution enables the virtual machine to perceive the actual operating frequency of the host machine in real time, significantly improving the real-time performance and accuracy of virtual machine performance monitoring and optimization. This not only improves the performance of the virtual machine but also provides more accurate performance feedback for applications in the virtualization environment, contributing to more efficient and flexible resource management and performance optimization.

[0017] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of this disclosure, nor is it intended to limit the scope of this disclosure. Other features of this disclosure will become readily apparent from the following description. Attached Figure Description

[0018] The accompanying drawings are provided to better understand this solution and do not constitute a limitation of this disclosure. Wherein:

[0019] Figure 1 This is a schematic diagram illustrating the steps of the method for determining the virtual machine operating frequency in an embodiment of this disclosure;

[0020] Figure 2 This is a flowchart illustrating the transparent transmission mechanism in this embodiment of the disclosure.

[0021] Figure 3 This is a schematic diagram corresponding to the transparent transmission mechanism in the embodiments of this disclosure;

[0022] Figure 4 This is a schematic diagram of the process of reading and writing register data in one embodiment of this disclosure;

[0023] Figure 5 This is a flowchart illustrating the compensation mechanism in one embodiment of this disclosure;

[0024] Figure 6 A schematic block diagram of the device for determining the virtual machine running frequency in this embodiment of the present disclosure;

[0025] Figure 7 This is a block diagram of an electronic device used to implement the method for determining the virtual machine operating frequency in the embodiments of this disclosure. Detailed Implementation

[0026] The exemplary embodiments of this disclosure are described below with reference to the accompanying drawings, including various details of the embodiments to aid understanding, and should be considered merely exemplary. Therefore, those skilled in the art will recognize that various changes and modifications can be made to the embodiments described herein without departing from the scope and spirit of this disclosure. Similarly, for clarity and brevity, descriptions of well-known functions and structures are omitted in the following description.

[0027] In the current virtualization environment, the main methods for checking the running frequency of virtual machines include the following:

[0028] The first method involves viewing the virtual machine's exposed interfaces. Virtual machines typically report CPU (Central Processing Unit) frequency information through operating system interfaces (such as / proc / cpuinfo) or system tools (such as cpupower monitor, turbostat, etc.). These tools rely on accessing the values ​​of APERF (Actual Performance Frequency) / MPERF (Maximum Performance Frequency) to determine the CPU's actual operating frequency. However, in QEMU (Quick Emulator) and KVM (Kernel-based Virtual Machine) virtualization scenarios, virtual machines cannot directly access these registers, causing tools to only return a fixed CPU frequency value and failing to reflect the CPU's actual dynamic frequency changes.

[0029] The second approach involves observing the CPU's operating frequency using tools on a virtual machine. This involves indirectly calculating the CPU's frequency by using performance analysis tools (such as perf) or writing custom test programs within the virtual machine. This method typically obtains the number of CPU cycles over a period of time by accessing the Performance Monitoring Unit (PMU) and combines this with the task clock (the actual time the CPU spends executing tasks) to calculate the CPU's operating frequency. While this method does not rely on the APERF / MPERF registers, it has some drawbacks: it is relatively complex to use and not intuitive; the results may be inaccurate, as the calculations from performance analysis tools may be biased due to scheduler or other system interference (such as context switching, interrupt handling, etc.), failing to provide precise frequency information.

[0030] The third method is to check the host machine. Since the CPU frequency in a virtual machine is usually consistent with that of the host machine, the CPU frequency of the virtual machine can be indirectly estimated by checking the CPU frequency of the host machine. However, in a virtualized cloud environment, users can usually only log in and manage the virtual machines they own, and cannot obtain access to the host machine. This access restriction prevents users from indirectly obtaining the CPU frequency information of the virtual machine through the host machine, further exacerbating the difficulty of frequency monitoring in a virtualized environment.

[0031] To address the aforementioned technical problems, this disclosure provides a method for determining the operating frequency of a virtual machine, see [link to relevant documentation]. Figure 1 As shown, Figure 1 This is a schematic diagram illustrating the steps of a method for determining the virtual machine running frequency in an embodiment of this disclosure. This method is applied to KVM and includes:

[0032] Step S101: Obtain the target register from the pass-through list and obtain the register data corresponding to the target register. The registers in the pass-through list can be accessed by the virtual machine.

[0033] Specifically, "target registers" refer to specific hardware registers related to virtual machine performance monitoring, such as MSR_IA32_APERF and MSR_IA32_MPERF. These registers record the CPU's frequency in its actual operating state and its frequency in its maximum performance state, respectively. The pass-through list is a list maintained by a virtualization kernel module (such as KVM) to record which hardware register values ​​should be directly passed to the virtual machine, rather than indirectly accessed through the virtualization layer. When the virtual machine runs, it retrieves the target registers from the pass-through list, along with the corresponding register data, and directly passes these values ​​to the virtual machine. In this way, the virtual machine can directly access the data in these registers, thereby obtaining the CPU's actual operating frequency in real time for performance monitoring and optimization. This mechanism not only improves the accuracy and real-time performance monitoring but also reduces the overhead of the virtualization layer, enabling the virtual machine to more efficiently utilize the host CPU's performance monitoring features.

[0034] In step S102, during the virtual machine's operation, in response to receiving a read target register data instruction, the register data corresponding to the target register is passed through to the virtual machine so that the virtual machine can obtain the virtual machine's operating frequency based on the register data.

[0035] Specifically, during virtual machine (VM) operation, a mechanism called "passthrough" allows the VM to directly access specific hardware registers (i.e., "target registers") of the host CPU, thereby obtaining data (i.e., "register data") from these registers. These target registers, such as MSR_IA32_MPERF and MSR_IA32_APERF, record key performance indicators such as the CPU's actual operating frequency. When the VM kernel executes instructions to read data from these target registers, KVM (or a similar virtualization kernel module) directly passes the data from the corresponding registers in the host CPU to the VM, rather than returning a simulated or preset value. In this way, the VM can accurately calculate its own operating frequency based on this real register data, achieving real-time awareness of dynamic frequency changes in the host CPU and improving the accuracy and real-time performance monitoring.

[0036] Taking the target registers, including APERF (Actual Performance Frequency) and MPERF (Maximum Performance Frequency), as an example, APERF and MPERF are used to measure the CPU's actual operating frequency and the number of cycles at its maximum frequency. Specifically, the APERF counter records the number of cycles the CPU completes under actual operating conditions, reflecting the CPU's actual operating frequency under the current load and frequency adjustment strategy. The MPERF counter records the number of cycles the CPU completes at its maximum frequency (i.e., nominal clock speed), representing the number of cycles the CPU completes under ideal conditions. Therefore, the current operating frequency of the CPU can be obtained by calculating using these two counters.

[0037] The specific calculation process is as follows: First, the kernel checks whether the CPU supports the X86_FEATURE_APERF and MPERF features (also known as target features). If supported, it reads the current values ​​of the APERF and MPERF counters at each clock interrupt and calculates and saves the differences (ΔAPERF and ΔMPERF) with the previous sampled values. When the user executes `cat / proc / cpuinfo`, the kernel calculates the virtual machine's operating frequency based on these differences using the following formula:

[0038] ;

[0039] Where ΔAPERF and ΔMPERF are the differences from the previous sampled value, and CPU_KHZ is the nominal frequency of the CPU.

[0040] This disclosure provides a method, apparatus, electronic device, and storage medium for determining the operating frequency of a virtual machine. By adding a target register to a pass-through list and passing the register data of the target register to the virtual machine during virtual machine operation, the virtual machine can calculate and obtain its own operating frequency in real time based on this register data. This pass-through mechanism allows the virtual machine to directly access the value of the target register, thereby obtaining the actual operating frequency of the host machine in real time. This solves the problem that virtual machines in traditional virtualization environments can only see a fixed frequency, enabling the virtual machine to dynamically perceive changes in the host machine's frequency. Secondly, in response to a read target register data instruction, this disclosure directly reads the pass-through register data, thereby accurately calculating the virtual machine's operating frequency. This direct access to hardware registers avoids the inaccurate frequency perception problem caused by the abstraction of the virtualization layer in traditional methods. Therefore, the pass-through mechanism of this solution enables the virtual machine to perceive the actual operating frequency of the host machine in real time, significantly improving the real-time performance and accuracy of virtual machine performance monitoring and optimization. This not only improves the performance of the virtual machine but also provides more accurate performance feedback for applications in the virtualization environment, contributing to more efficient and flexible resource management and performance optimization.

[0041] In some optional embodiments, the method further includes, prior to retrieving the target register from the pass-through list;

[0042] If an enable target feature request instruction is received, the target register information contained in the target feature request instruction is added to the pass-through list.

[0043] Specifically, a "target feature request instruction" is an instruction sent by virtualization management software (such as QEMU) to the kernel virtualization module (such as KVM) to enable specific hardware features, such as CPU performance monitoring registers (such as APERF and MPERF). These instructions contain "target register information," which is the identification information of the specific hardware registers that need to be enabled. When KVM receives such a request, it adds this register information to a "pass-through list," a list maintained by KVM that records which hardware register values ​​should be directly passed to the virtual machine, allowing the virtual machine to directly access these register values ​​without indirect access through the virtualization layer.

[0044] The implementation process involves QEMU sending a request to KVM to enable a target feature via an ioctl (device control) system call. This request includes identification information for the target registers, such as the register numbers MSR_IA32_MPERF and MSR_IA32_APERF. Upon receiving the request, KVM parses the target register information and adds the identifiers of these registers to the pass-through list. Once the register information is added to the pass-through list, KVM ensures that the virtual machine can directly access the values ​​of these registers. When the virtual machine executes instructions to read these registers, KVM directly reads the register values ​​from the hardware and returns them to the virtual machine, rather than returning a fixed or simulated value.

[0045] In this way, by adding the target register information to the pass-through list upon receiving a request to enable a target feature, the virtual machine can directly access the data in these registers. This mechanism not only improves the virtual machine's awareness of the host CPU's characteristics but also enhances the accuracy and real-time performance monitoring. Specifically, the virtual machine can calculate its own operating frequency in real time based on this register data, thereby more accurately monitoring and optimizing performance. This direct access to hardware registers avoids the inaccurate frequency perception problem caused by the abstraction of the virtualization layer in traditional methods, improving the virtual machine's performance monitoring and optimization capabilities and providing more accurate performance feedback for applications in the virtualization environment.

[0046] In some optional embodiments, the method further includes adding the target register information contained in the target feature request instruction to the pass-through list before the method adds the target register information contained in the target feature request instruction to the pass-through list;

[0047] If a detection instruction is received to check whether the host machine supports the target feature, the processor feature detection instruction is obtained and executed to obtain the feature information of the host machine;

[0048] Determine whether the host machine supports the target feature based on the host machine's feature information.

[0049] Specifically, when an instruction is received to detect whether the host machine supports a specific hardware feature (i.e., the "target feature"), a series of operations are triggered to determine the host machine's actual capabilities. First, a "processor feature detection instruction" is retrieved and executed. This instruction typically refers to the CPUID instruction, a standard x86 architecture instruction used to query detailed CPU information, including manufacturer, model, supported instruction sets, and feature flags. By executing the CPUID instruction, the host machine's feature information can be obtained. This information is presented as a set of specific flag bits or return values, indicating which hardware features the host machine supports. Subsequently, this feature information is analyzed to check if it contains specific flag bits indicating support for the target feature. For example, if the target feature is the APERF / MPERF register, the CPUID return flags will be checked for corresponding APERF and MPERF support flags. If these flag bits are present, it indicates that the host machine supports the target feature; conversely, if these flag bits are absent, it indicates that the host machine does not support the target feature. This process not only ensures that the virtualization environment can accurately identify the host machine's hardware capabilities, but also provides an important basis for subsequent feature activation and virtual machine configuration, enabling the virtual machine to reasonably enable and utilize relevant features based on the actual hardware support of the host machine, thereby improving the performance and compatibility of the virtual machine.

[0050] This solution, by receiving and executing detection instructions (such as CPUID), accurately obtains the host machine's characteristic information, thereby determining whether the host machine supports the target characteristic (such as the APERF / MPERF registers). This mechanism ensures that the virtualization environment can be reasonably configured and optimized according to the actual hardware capabilities of the host machine. Specifically, it enables the virtual machine to dynamically perceive the characteristics of the host CPU and enable relevant characteristics when supported, thereby improving the accuracy and real-time performance monitoring. Furthermore, this detection mechanism enhances the flexibility and compatibility of the virtualization environment, allowing the virtual machine to adaptively adjust according to different host machine hardware configurations, ensuring optimal performance on various hardware platforms.

[0051] In some optional embodiments, the method further includes, before obtaining and executing processor characteristic detection instructions to obtain host machine characteristic information;

[0052] Obtain the processor feature detection instruction and add the target feature to the processor feature detection instruction;

[0053] Execute processor characteristic detection instructions to obtain host machine characteristic information.

[0054] Specifically, the "processor characteristic detection instruction" usually refers to the CPUID instruction, a standard instruction in x86 architecture processors used to obtain detailed CPU information. By executing the CPUID instruction, information such as the CPU's manufacturer, model, supported instruction sets, and various hardware characteristics can be obtained. The "target characteristic" refers to specific hardware characteristics or functions, such as the APERF and MPERF registers. These characteristics are crucial for enabling virtual machines to perceive dynamic frequency changes of the host CPU.

[0055] The implementation process of this scheme includes: First, obtaining the CPUID instruction and explicitly specifying the target feature to be queried within it. This means that when executing the CPUID instruction, appropriate input parameters need to be set so that the instruction can return information related to the target feature. For example, to detect the support status of the APERF and MPERF registers, the input parameters of the CPUID instruction need to be set so that it can return flag bits or function information related to these registers. Next, this modified CPUID instruction is executed to obtain the host machine's feature information. This information will explicitly indicate whether the host machine's CPU supports the target feature. If the host machine's CPU supports these features, then the corresponding flag bits or function information in the returned feature information will be set, indicating that the host machine has these features. Conversely, if these flag bits are not set, it indicates that the host machine does not support the target feature. In this way, this scheme can accurately detect whether the host machine supports specific hardware features, providing an important basis for subsequent virtualization operations.

[0056] In this way, by adding the target characteristic to the processor characteristic detection instruction (such as CPUID) and executing the instruction to obtain the host machine's characteristic information, it is possible to accurately detect whether the host machine supports specific hardware characteristics. This mechanism ensures that the virtualization environment can be reasonably configured and optimized according to the actual hardware capabilities of the host machine, thereby improving the virtual machine's awareness of the host machine's CPU characteristics. Specifically, it enables the virtual machine to dynamically perceive the characteristics of the host machine's CPU and enable relevant characteristics when supported, thereby improving the accuracy and real-time performance monitoring. In addition, this detection mechanism also enhances the flexibility and compatibility of the virtualization environment, allowing the virtual machine to adaptively adjust according to different hardware configurations of the host machine, ensuring optimal performance on various hardware platforms.

[0057] In some optional embodiments, if an enable target feature request instruction is received, the target register information contained in the target feature request instruction is added to the pass-through list, including:

[0058] If a request command to enable actual performance frequency characteristics and maximum performance frequency characteristics is received, the actual performance frequency register and the maximum performance frequency register are added to the pass-through list.

[0059] Specifically, the "Request Instruction to Enable Actual Performance Frequency Characteristics and Maximum Performance Frequency Characteristics" refers to an instruction sent by virtualization management software (such as QEMU) to the kernel virtualization module (such as KVM) to enable specific hardware characteristics that allow virtual machines to directly access the host CPU's performance monitoring registers. These characteristics include "Actual Performance Frequency Characteristics" (corresponding to the MSR_IA32_APERF register) and "Maximum Performance Frequency Characteristics" (corresponding to the MSR_IA32_MPERF register). These registers record the CPU's frequency under actual operating conditions and its frequency under maximum performance conditions, respectively, which are crucial for real-time monitoring and optimization of CPU performance.

[0060] When KVM receives such an enable request, it adds the identification information of these two registers to an internal list called the "passthrough list." The passthrough list is a list maintained by KVM that records which hardware register values ​​should be directly passed to the virtual machine, rather than emulated or accessed indirectly through the virtualization layer. By adding the MSR_IA32_APERF and MSR_IA32_MPERF registers to the passthrough list, KVM ensures that the virtual machine can directly access the values ​​of these registers, thereby obtaining the CPU's actual operating frequency and maximum performance frequency in real time. This direct access method not only improves the accuracy and real-time performance of performance monitoring but also reduces the overhead of the virtualization layer, enabling the virtual machine to more efficiently utilize the host CPU's performance monitoring features.

[0061] In this way, by receiving request instructions to enable actual performance frequency characteristics and maximum performance frequency characteristics, and adding the corresponding registers to the pass-through list, the virtual machine can directly access these registers, thereby obtaining the CPU's actual operating frequency and maximum performance frequency in real time. This mechanism significantly improves the virtual machine's awareness of the host CPU's performance, enhances the accuracy and real-time performance of performance monitoring, reduces the overhead of the virtualization layer, improves the performance of the virtual machine, and provides more accurate performance feedback for applications in the virtualization environment, contributing to more efficient and flexible resource management and performance optimization.

[0062] To understand the pass-through mechanism of this application as a whole, see [link to relevant documentation]. Figure 2 , Figure 2 This is a flowchart illustrating the transparent transmission mechanism in an embodiment of this disclosure. The flowchart includes:

[0063] Step S201: QEMU sends a detection command to KVM to check whether the host machine supports the target feature;

[0064] Step S202: KVM determines whether the host machine supports the target feature;

[0065] Step S203: If supported, QEMU sends an enable target feature request command to KVM;

[0066] In step S204, KVM adds the target register information contained in the target feature request instruction to the pass-through list, so that the virtual machine can obtain the register data of the target register during virtual machine runtime. See also... Figure 3 , Figure 3 This is a system diagram corresponding to the pass-through mechanism in this embodiment. The system includes a user space portion 301 and a hardware portion 302. The user space portion 301 refers to the environment in which the virtual machine (VM) runs, i.e., the space where the operating system and user applications reside; while the hardware portion 302 refers to the physical hardware of the host machine, especially the CPU, which specifically includes the MSR_IA32_APERF and MSR_IA32_MPERF registers. The working principle corresponding to this diagram is as follows: when the user executes `cat / proc / cpuinfo`, if the CPU supports the X86_FEATURE_APERF_FMPERF feature (i.e., the target feature), the virtual machine can directly obtain the values ​​of MSR_IA32_MPERF and MSR_IA32_APERF. In this way, the virtual machine can accurately calculate its own operating frequency based on these real register data, thereby achieving real-time perception of dynamic frequency changes of the host machine CPU, improving the accuracy and real-time performance monitoring.

[0067] In some optional embodiments, the method further includes:

[0068] When a virtual machine migrates from the first physical processor of the host machine, a compensation value is calculated based on the actual performance frequency register value and the maximum performance frequency register value corresponding to the first physical processor. The host machine's register values ​​are then compensated based on the compensation value, and the compensated register values ​​are updated in the target register.

[0069] Specifically, the "first physical processor" refers to the host CPU core where the virtual machine's vCPU currently resides, while the "actual performance frequency register value" and "maximum performance frequency register value" refer to the values ​​of the MSR_IA32_APERF and MSR_IA32_MPERF registers, respectively. These two registers record the CPU's frequency under actual operating conditions and its frequency under maximum performance conditions. When the virtual machine's vCPU is migrated from the host's first physical processor, this solution employs a series of compensation measures to ensure that the virtual machine can accurately perceive the host CPU's frequency changes. Specifically, KVM reads the values ​​of the MSR_IA32_APERF and MSR_IA32_MPERF registers corresponding to the first physical processor and calculates the frequency change since the last update, i.e., the compensation value. Then, KVM adjusts the register values ​​on the host side based on this compensation value to reflect the actual frequency changes during this period. Finally, KVM writes the compensated register values ​​into the target registers, ensuring that the virtual machine can continue to accurately monitor and optimize performance based on the latest frequency information after migration. This process not only ensures the continuity of CPU frequency awareness of the virtual machine before and after migration, but also improves the accuracy and stability of performance monitoring of the entire virtualization environment.

[0070] In this way, when the virtual machine migrates from the host's first physical processor, a compensation value is calculated using the values ​​of the actual performance frequency register (MSR_IA32_APERF) and the maximum performance frequency register (MSR_IA32_MPERF). This compensation value is then used to adjust the host-side register values, and the adjusted value is updated in the target register. This mechanism ensures that the virtual machine accurately perceives the actual operating frequency of the host CPU before and after migration, thus maintaining the continuity and accuracy of performance monitoring. This compensation mechanism not only solves the problem of inaccurate frequency perception caused by changes in the physical processor during virtual machine migration but also improves the reliability and stability of performance monitoring in the virtualization environment, enabling virtual machines to perform performance optimization and resource management more effectively.

[0071] In some optional embodiments, when the virtual machine migrates from the first physical processor of the host machine, a compensation value is calculated based on the actual performance frequency register value and the maximum performance frequency register value corresponding to the first physical processor. The host machine-side register values ​​are then compensated based on this compensation value, and the compensated register values ​​are updated in the target register, including:

[0072] When the virtual machine exits from the first physical processor, it obtains the actual performance frequency register value and the maximum performance frequency register value corresponding to the first physical processor, and obtains the first actual performance frequency register value and the first maximum performance frequency register value respectively.

[0073] The compensation value is calculated based on the first actual performance frequency register value and the first maximum performance frequency register value;

[0074] The first actual performance frequency register value and the first maximum performance frequency register value are compensated based on the compensation value to obtain the second actual performance frequency register value and the second maximum performance frequency register value.

[0075] The second actual performance frequency register value and the second maximum performance frequency register value are stored in the actual performance frequency register and the maximum performance frequency register, respectively.

[0076] Specifically, this solution addresses the performance monitoring issue of virtual machines in a virtualization environment by proposing a processing mechanism when a virtual machine exits the first physical processor. Specifically, when the virtual machine's vCPU exits the first physical processor, the values ​​of the corresponding actual performance frequency register (MSR_IA32_APERF) and maximum performance frequency register (MSR_IA32_MPERF) are obtained and recorded as the first actual performance frequency register value and the first maximum performance frequency register value, respectively. These two registers record the CPU's frequency under actual operating conditions and its frequency under maximum performance conditions, respectively, which are crucial for real-time monitoring of CPU performance.

[0077] Next, compensation values ​​are calculated based on these two register values. The compensation values ​​are calculated to adjust for frequency-aware differences caused by virtual machine migration or scheduling, ensuring that the virtual machine can accurately perceive the actual operating frequency of the host CPU before and after migration. By applying the compensation values ​​to the first actual performance frequency register value and the first maximum performance frequency register value, updated second actual performance frequency register values ​​and second maximum performance frequency register values ​​are obtained.

[0078] Finally, the two updated register values ​​are stored back into the actual performance frequency register and the maximum performance frequency register, respectively. This process not only ensures the continuity and accuracy of the virtual machine's CPU frequency awareness before and after migration, but also improves the stability and reliability of performance monitoring throughout the virtualization environment. Through this mechanism, the virtual machine can more effectively optimize performance and manage resources, thereby improving the overall performance of the virtualization environment.

[0079] In this way, by acquiring and calculating compensation values ​​when the virtual machine exits the first physical processor, and then compensating and updating the register values, it is ensured that the virtual machine can accurately perceive the actual operating frequency of the host CPU before and after migration. This mechanism not only solves the problem of inaccurate frequency perception caused by changes in the physical processor during virtual machine migration, but also improves the continuity and stability of performance monitoring in the virtualization environment. Through this compensation mechanism, the virtual machine can more effectively optimize performance and manage resources, thereby improving the overall performance of the virtualization environment.

[0080] In some optional embodiments, calculating the compensation value based on the first actual performance frequency register value and the first maximum performance frequency register value includes:

[0081] Get the actual performance frequency register value updated in the previous time step, and the maximum performance frequency register value updated in the previous time step;

[0082] The difference between the first actual performance frequency register value and the actual performance frequency register value updated at the previous moment is calculated to obtain the actual performance frequency register compensation value;

[0083] The difference between the first maximum performance frequency register value and the maximum performance frequency register value updated at the previous moment is calculated to obtain the maximum performance frequency register compensation value.

[0084] Specifically, to ensure that the virtual machine can accurately perceive the actual operating frequency of the host CPU before and after migration, this solution introduces a compensation mechanism. Specifically, it first obtains the previously updated actual performance frequency register value (MSR_IA32_APERF) and the previously updated maximum performance frequency register value (MSR_IA32_MPERF). These values ​​record the CPU's frequency under actual operating conditions and its frequency under maximum performance conditions, respectively, and are crucial for virtual machine performance monitoring.

[0085] Next, the difference between the current actual performance frequency register value and the updated actual performance frequency register value at the previous time is calculated to obtain the actual performance frequency register compensation value. Similarly, the difference between the current maximum performance frequency register value and the updated maximum performance frequency register value at the previous time is calculated to obtain the maximum performance frequency register compensation value.

[0086] In this way, the solution can accurately calculate the change in CPU frequency between two points in time. These compensation values ​​reflect the frequency changes of the CPU under actual operation and maximum performance conditions, which is crucial for maintaining the continuity and accuracy of performance monitoring during virtual machine migration or scheduling. By applying these compensation values, virtual machines can more accurately perceive the actual operating frequency of the host CPU, thereby improving the reliability of performance monitoring, optimizing resource management, and enhancing the overall performance of the virtualization environment.

[0087] By obtaining the updated actual performance frequency register value and maximum performance frequency register value from the previous moment, and calculating the difference between the current value and the previous moment's value to obtain the compensation value, this scheme can accurately quantify changes in CPU frequency. This mechanism allows virtual machines to use these compensation values ​​to adjust their performance monitoring data during migration or scheduling, ensuring the continuity and accuracy of the virtual machine's CPU frequency perception when migrating between different physical processors. This not only improves the reliability of performance monitoring but also optimizes resource management, enhances the overall performance of the virtualization environment, and ensures that virtual machines can effectively optimize performance based on the latest frequency information.

[0088] In some optional embodiments, the first actual performance frequency register value and the first maximum performance frequency register value are compensated according to the compensation value to obtain the second actual performance frequency register value and the second maximum performance frequency register value, including:

[0089] The first actual performance frequency register value is added to the actual performance frequency register compensation value, and the result is used as the second actual performance frequency register value.

[0090] The first maximum performance frequency register value is accumulated with the maximum performance frequency register compensation value, and the accumulated result is used as the second maximum performance frequency register value.

[0091] Specifically, the "first actual performance frequency register value" and "first maximum performance frequency register value" in this scheme refer to the values ​​of the actual performance frequency (MSR_IA32_APERF) and maximum performance frequency (MSR_IA32_MPERF) registers obtained from the current physical processor before virtual machine migration. These registers record the CPU's frequency in its actual operating state and its frequency in its maximum performance state, respectively. The "actual performance frequency register compensation value" and "maximum performance frequency register compensation value" are obtained by calculating the difference between the current value and the updated value at the previous moment, and are used to compensate for frequency-aware differences caused by virtual machine migration or scheduling.

[0092] The implementation process of this scheme includes summing the first actual performance frequency register value with the actual performance frequency register compensation value, and using the result as the second actual performance frequency register value. Similarly, the first maximum performance frequency register value is summed with the maximum performance frequency register compensation value, and the result is used as the second maximum performance frequency register value. Through this summation operation, the frequency information before migration can be combined with the compensation value to obtain a more accurate frequency value that reflects the actual running status of the virtual machine after migration. This process not only ensures the continuity of the virtual machine's CPU frequency awareness before and after migration, but also improves the accuracy and stability of performance monitoring, enabling the virtual machine to perform effective performance optimization and resource management based on the latest frequency information.

[0093] By accumulating the first actual performance frequency register value with the actual performance frequency register compensation value, and by accumulating the first maximum performance frequency register value with the maximum performance frequency register compensation value, this scheme can generate more accurate second actual performance frequency register values ​​and second maximum performance frequency register values. This accumulation operation ensures that the virtual machine can continuously and accurately perceive the actual operating frequency and maximum performance frequency of the host CPU before and after migration. This mechanism significantly improves the virtual machine's ability to perceive changes in the host CPU frequency, enhances the accuracy and stability of performance monitoring, and thus provides more reliable performance feedback for applications in the virtualization environment, contributing to more efficient and flexible resource management and performance optimization.

[0094] To facilitate a comprehensive understanding of the compensation mechanism in this application, please first refer to... Figure 4 , Figure 4 This is a schematic diagram of the process of reading and writing register data in one embodiment of this disclosure. Taking the host processor 401 (also known as the CPU) as an example, when the vCPU starts running on the host processor 401 (i.e., VM entry), it needs to read the register value corresponding to the current CPU. When the vCPU stops running on the host processor 401 (i.e., VM exit), the updated value is written into the register of the current CPU so that the latest performance data can be reflected on the next access.

[0095] See Figure 5 , Figure 5This is a flowchart illustrating the compensation mechanism in one embodiment of this disclosure, showing the process of register data update when a vCPU exits a physical processor. Taking the virtual machine (vCPU) exiting from CPU0 (also called the first physical processor 501) and then entering CPU1 (called the second physical processor 502) as an example, this represents the register value update process of the vCPU migrating from CPU0 to CPU1. The registers corresponding to CPU0 are APERF0 and MPERF0, and the registers corresponding to CPU1 are APERF1 and MPERF1. When the vCPU migrates from CPU0 to CPU1, it first triggers a VM exit event on CPU0 to exit execution, then migrates to CPU1, triggering a VM entry event on CPU1 to enter and run. When the vCPU triggers a VM exit event from CPU0, KVM reads the current APERF0 and MPERF0 values ​​of CPU0 and calculates the increment (also called the compensation value) for this period, where the compensation value satisfies the following formula:

[0096] in, The actual performance frequency register compensation value is APERF0, which is the first actual performance frequency register value. The actual performance frequency register value updated at the previous moment;

[0097] in, MPERF0 is the maximum performance frequency register compensation value, and MPERF0 is the first maximum performance frequency register value. This is the value of the maximum performance frequency register updated at the previous moment.

[0098] After calculating the compensation value, the compensation is applied to aperf (the first actual performance frequency register value) and mperf (the first maximum performance frequency register value) respectively. Then, the compensated aperf and mperf are written back to the APERF0 and MPERF0 registers of CPU0 by writing to the model-specific registers. At the same time, APERF0 is saved as the value of v_aperf and MPERF0 is saved as the value of v_mperf, so that the value of vCPU can be obtained for future use.

[0099] When vCPU triggers a VM entry on CPU1 and enters CPU1 runtime, KVM reads the current APERF1 and MPERF1 values ​​of CPU1 and assigns them to aperf and mperf. At the same time, v_aperf and v_mperf on the virtual machine side are written to the MSR register.

[0100] The following describes an apparatus embodiment of this application, which can be used to execute the virtual machine operating frequency determination method in the above embodiments of this application. For details not disclosed in the apparatus embodiments of this application, please refer to the embodiments of the virtual machine operating frequency determination method described above.

[0101] This disclosure also provides a device 600 for determining the operating frequency of a virtual machine, such as... Figure 6 As shown, it includes:

[0102] The acquisition module 601 is used to obtain the target register from the pass-through list and obtain the register data corresponding to the target register. The registers in the pass-through list can be accessed by the virtual machine.

[0103] The pass-through module 602 is used to pass through the register data corresponding to the target register to the virtual machine in response to receiving a read target register data instruction during virtual machine operation, so that the virtual machine can obtain the virtual machine's operating frequency based on the register data.

[0104] In some optional embodiments, the acquisition module 601 is further configured to, before acquiring the target register from the pass-through list, add the target register information contained in the target feature request instruction to the pass-through list if an enable target feature request instruction is received.

[0105] In some optional embodiments, the acquisition module 601 is further configured to: add the target register information contained in the target feature request instruction to the pass-through list before the acquisition module 601 adds the target register information contained in the target feature request instruction to the pass-through list;

[0106] If a detection instruction is received to check whether the host machine supports the target feature, the processor feature detection instruction is obtained and executed to obtain the feature information of the host machine;

[0107] Determine whether the host machine supports the target feature based on the host machine's feature information.

[0108] In some optional embodiments, before acquiring and executing the processor characteristic detection instruction to obtain the host machine's characteristic information, the acquisition module 601 is further configured to:

[0109] Obtain the processor feature detection instruction and add the target feature to the processor feature detection instruction;

[0110] Execute processor characteristic detection instructions to obtain host machine characteristic information.

[0111] In some optional embodiments, if the acquisition module 601 receives an enable target feature request instruction, it adds the target register information contained in the target feature request instruction to the pass-through list, including:

[0112] If a request command to enable actual performance frequency characteristics and maximum performance frequency characteristics is received, the actual performance frequency register and the maximum performance frequency register are added to the pass-through list.

[0113] In some optional embodiments, the apparatus further includes a migration module, which is used for:

[0114] When a virtual machine migrates from the first physical processor of the host machine, a compensation value is calculated based on the actual performance frequency register value and the maximum performance frequency register value corresponding to the first physical processor. The host machine's register values ​​are then compensated based on the compensation value, and the compensated register values ​​are updated in the target register.

[0115] In some optional embodiments, when the virtual machine migrates from the first physical processor of the host machine, the migration module calculates a compensation value based on the actual performance frequency register value and the maximum performance frequency register value corresponding to the first physical processor, compensates the register values ​​on the host side according to the compensation value, and updates the compensated register values ​​to the target register, including:

[0116] When the virtual machine exits from the first physical processor, it obtains the actual performance frequency register value and the maximum performance frequency register value corresponding to the first physical processor, and obtains the first actual performance frequency register value and the first maximum performance frequency register value respectively.

[0117] The compensation value is calculated based on the first actual performance frequency register value and the first maximum performance frequency register value;

[0118] The first actual performance frequency register value and the first maximum performance frequency register value are compensated based on the compensation value to obtain the second actual performance frequency register value and the second maximum performance frequency register value.

[0119] The second actual performance frequency register value and the second maximum performance frequency register value are stored in the actual performance frequency register and the maximum performance frequency register, respectively.

[0120] In some optional embodiments, the migration module calculates a compensation value based on a first actual performance frequency register value and a first maximum performance frequency register value, including:

[0121] Get the actual performance frequency register value updated in the previous time step, and the maximum performance frequency register value updated in the previous time step;

[0122] The difference between the first actual performance frequency register value and the actual performance frequency register value updated at the previous moment is calculated to obtain the actual performance frequency register compensation value;

[0123] The difference between the first maximum performance frequency register value and the maximum performance frequency register value updated at the previous moment is calculated to obtain the maximum performance frequency register compensation value.

[0124] In some optional embodiments, the migration module compensates the first actual performance frequency register value and the first maximum performance frequency register value according to the compensation value to obtain a second actual performance frequency register value and a second maximum performance frequency register value, including:

[0125] The first actual performance frequency register value is added to the actual performance frequency register compensation value, and the result is used as the second actual performance frequency register value.

[0126] The first maximum performance frequency register value is accumulated with the maximum performance frequency register compensation value, and the accumulated result is used as the second maximum performance frequency register value.

[0127] The acquisition, storage, and application of user personal information involved in the technical solution disclosed herein comply with the provisions of relevant laws and regulations and do not violate public order and good morals.

[0128] According to embodiments of this disclosure, this disclosure also provides an electronic device, a readable storage medium, and a computer program product.

[0129] Figure 7 A schematic block diagram of an example electronic device 700 that can be used to implement embodiments of the present disclosure is shown. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device may also represent various forms of mobile devices, such as personal digital processors, cellular phones, smartphones, wearable devices, and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely illustrative and are not intended to limit the implementation of the present disclosure described and / or claimed herein.

[0130] like Figure 7 As shown, the electronic device 700 includes a computing unit 701, which can perform various appropriate actions and processes based on a computer program stored in a read-only memory (ROM) 702 or a computer program loaded from a storage unit 708 into a random access memory (RAM) 703. The RAM 703 may also store various programs and data required for the operation of the device 700. The computing unit 701, ROM 702, and RAM 703 are interconnected via a bus 704. An input / output (I / O) interface 705 is also connected to the bus 704.

[0131] Multiple components in device 700 are connected to I / O interface 705, including: input unit 706, such as keyboard, mouse, etc.; output unit 707, such as various types of monitors, speakers, etc.; storage unit 708, such as disk, optical disk, etc.; and communication unit 709, such as network card, modem, wireless transceiver, etc. Communication unit 709 allows device 700 to exchange information / data with other devices through computer networks such as the Internet and / or various telecommunications networks.

[0132] The computing unit 701 can be a variety of general-purpose and / or special-purpose processing components with processing and computing capabilities. Some examples of the computing unit 701 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various special-purpose artificial intelligence (AI) computing chips, various computing units running machine learning model algorithms, a digital signal processor (DSP), and any suitable processor, controller, microcontroller, etc. The computing unit 701 performs the various methods and processes described above, such as the method for determining the virtual machine operating frequency. For example, in some embodiments, the method for determining the virtual machine operating frequency may be implemented as a computer software program tangibly contained in a machine-readable medium, such as storage unit 708. In some embodiments, part or all of the computer program may be loaded and / or installed on device 700 via ROM 702 and / or communication unit 709. When the computer program is loaded into RAM 703 and executed by the computing unit 701, one or more steps of the applet distribution described above may be performed. Alternatively, in other embodiments, the computing unit 701 may be configured to perform the method for determining the virtual machine operating frequency by any other suitable means (e.g., by means of firmware).

[0133] Various embodiments of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field-programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), application-specific standard products (ASSPs), systems-on-a-chip (SoCs), payload-programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various embodiments may include implementations in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which may be a dedicated or general-purpose programmable processor, capable of receiving data and instructions from a storage system, at least one input device, and at least one output device, and transmitting data and instructions to the storage system, the at least one input device, and the at least one output device.

[0134] The program code used to implement the methods of this disclosure may be written in any combination of one or more programming languages. This program code may be provided to a processor or controller of a general-purpose computer, special-purpose computer, or other programmable virtual machine operating at a determined frequency, such that when executed by the processor or controller, the program code causes the functions / operations specified in the flowcharts and / or block diagrams to be implemented. The program code may be executed entirely on the machine, partially on the machine, as a standalone software package partially on the machine and partially on a remote machine, or entirely on a remote machine or server.

[0135] In the context of this disclosure, a machine-readable medium can be a tangible medium that may contain or store a program for use by or in conjunction with an instruction execution system, apparatus, or device. A machine-readable medium can be a machine-readable signal medium or a machine-readable storage medium. A machine-readable medium can be, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatus, or devices, or any suitable combination of the foregoing. More specific examples of machine-readable storage media include electrical connections based on one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination of the foregoing.

[0136] To provide interaction with a user, the systems and techniques described herein can be implemented on a computer having: a display device for displaying information to the user (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor); and a keyboard and pointing device (e.g., a mouse or trackball) through which the user provides input to the computer. Other types of devices can also be used to provide interaction with the user; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including sound input, voice input, or tactile input).

[0137] The systems and technologies described herein can be implemented in computing systems that include backend components (e.g., as a data server), or computing systems that include middleware components (e.g., an application server), or computing systems that include frontend components (e.g., a user computer with a graphical user interface or web browser through which a user can interact with implementations of the systems and technologies described herein), or any combination of such backend, middleware, or frontend components. The components of the system can be interconnected via digital data communication of any form or medium (e.g., a communication network). Examples of communication networks include local area networks (LANs), wide area networks (WANs), and the Internet.

[0138] Computer systems can include clients and servers. Clients and servers are generally located far apart and typically interact via communication networks. Client-server relationships are created by computer programs running on the respective computers and having a client-server relationship with each other. Servers can be cloud servers, servers in distributed systems, or servers incorporating blockchain technology.

[0139] It should be understood that the various forms of processes shown above can be used to rearrange, add, or delete steps. For example, the steps described in this disclosure can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution of this disclosure can be achieved, and this is not limited herein.

[0140] The specific embodiments described above do not constitute a limitation on the scope of protection of this disclosure. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this disclosure should be included within the scope of protection of this disclosure.

Claims

1. A method for determining the operating frequency of a virtual machine, wherein, The method includes: The target register is obtained from the pass-through list, and the register data corresponding to the target register is obtained. The registers in the pass-through list can be accessed by the virtual machine. During the operation of the virtual machine, in response to receiving a read target register data instruction, register data corresponding to the target register is passed through to the virtual machine, so that the virtual machine can obtain the operating frequency of the virtual machine based on the register data; When the virtual machine exits from the first physical processor of the host machine, it obtains the actual performance frequency register value and the maximum performance frequency register value corresponding to the first physical processor, and obtains the first actual performance frequency register value and the first maximum performance frequency register value respectively. Get the actual performance frequency register value updated in the previous time step, and the maximum performance frequency register value updated in the previous time step; Calculate the difference between the first actual performance frequency register value and the actual performance frequency register value updated at the previous moment to obtain the actual performance frequency register compensation value; Calculate the difference between the first maximum performance frequency register value and the maximum performance frequency register value updated at the previous moment to obtain the maximum performance frequency register compensation value; The first actual performance frequency register value and the first maximum performance frequency register value are compensated according to the actual performance frequency register compensation value and the maximum performance frequency register compensation value to obtain the second actual performance frequency register value and the second maximum performance frequency register value. The second actual performance frequency register value and the second maximum performance frequency register value are stored in the actual performance frequency register and the maximum performance frequency register, respectively.

2. The method according to claim 1, wherein, Prior to retrieving the target register from the pass-through list, the method further includes; If an enable target feature request instruction is received, the target register information contained in the target feature request instruction is added to the pass-through list.

3. The method according to claim 2, wherein, Before adding the target register information contained in the target feature request instruction to the pass-through list, the method further includes: If a detection instruction is received to check whether the host machine supports the target feature, the processor feature detection instruction is obtained and executed to obtain the feature information of the host machine. Based on the host machine's characteristic information, determine whether the host machine supports the target characteristic.

4. The method according to claim 3, wherein, Before obtaining and executing the processor characteristic detection instruction to obtain the host machine's characteristic information, the method further includes: Obtain the processor feature detection instruction, and add the target feature to the processor feature detection instruction; The processor characteristic detection instruction is executed to obtain the characteristic information of the host machine.

5. The method according to claim 2, wherein, If a target feature request instruction is received, the target register information contained in the target feature request instruction is added to the pass-through list, including: If a request command to enable actual performance frequency characteristics and maximum performance frequency characteristics is received, the actual performance frequency register and the maximum performance frequency register are added to the pass-through list.

6. The method according to claim 1, wherein, The step of compensating the first actual performance frequency register value and the first maximum performance frequency register value according to the actual performance frequency register compensation value and the maximum performance frequency register compensation value to obtain the second actual performance frequency register value and the second maximum performance frequency register value includes: The first actual performance frequency register value is added to the actual performance frequency register compensation value, and the result of the addition is used as the second actual performance frequency register value. The first maximum performance frequency register value is added to the maximum performance frequency register compensation value, and the result is used as the second maximum performance frequency register value.

7. A device for determining the operating frequency of a virtual machine, wherein, The device includes: The acquisition module is used to acquire a target register from the pass-through list and acquire the register data corresponding to the target register. The registers in the pass-through list can be accessed by the virtual machine. The pass-through module is used to, during the operation of the virtual machine, in response to receiving a read target register data instruction, pass-through the register data corresponding to the target register to the virtual machine, so that the virtual machine can obtain the operating frequency of the virtual machine based on the register data; The pass-through module is further configured to: when the virtual machine exits from the first physical processor of the host machine, obtain the actual performance frequency register value and the maximum performance frequency register value corresponding to the first physical processor, and obtain the first actual performance frequency register value and the first maximum performance frequency register value respectively; obtain the actual performance frequency register value updated at the previous moment and the maximum performance frequency register value updated at the previous moment; calculate the difference between the first actual performance frequency register value and the actual performance frequency register value updated at the previous moment to obtain the actual performance frequency register compensation value; calculate the difference between the first maximum performance frequency register value and the maximum performance frequency register value updated at the previous moment to obtain the maximum performance frequency register compensation value; compensate the first actual performance frequency register value and the first maximum performance frequency register value according to the actual performance frequency register compensation value and the maximum performance frequency register compensation value to obtain the second actual performance frequency register value and the second maximum performance frequency register value; and store the second actual performance frequency register value and the second maximum performance frequency register value into the actual performance frequency register and the maximum performance frequency register respectively.

8. An electronic device, comprising: At least one processor; as well as A memory communicatively connected to the at least one processor; wherein, The memory stores instructions that can be executed by the at least one processor to enable the at least one processor to perform the method of any one of claims 1-6.

9. A non-transitory computer-readable storage medium storing computer instructions, wherein, The computer instructions are used to cause the computer to perform the method according to any one of claims 1-6.

10. A computer program product comprising a computer program that, when executed by a processor, implements the method according to any one of claims 1-6.

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