A fast matching method and device for radio frequency chipset

Abstract

The present invention relates to the technical field of radio frequency chip scheduling and matching control, and specifically discloses a method and device for fast matching of radio frequency chipsets, wherein the method includes: constructing a chip response time prediction model; using a short job priority scheduling algorithm to control the handshake sequence; sending a handshake command through the SPI or I2C protocol; receiving a response and evaluating the handshake quality based on a fuzzy scoring mechanism; completing parameter configuration using a weighted Euclidean distance matching method; verifying the configuration status through instruction loopback mapping and generating a configuration summary table. Compared with the prior art that adopts a fixed handshake process and a unified parameter configuration method, especially in the face of a complex terminal environment with heterogeneous chipsets from multiple manufacturers and large differences in response time, it is difficult to achieve a technical problem of fast and stable parameter matching. The present invention improves the automation level of the multi-chip parallel handshake and differentiated parameter configuration process by constructing a response prediction mechanism and a fuzzy quality scoring mechanism based on statistical modeling.

Description

Technical Field

[0001] The present invention relates to the technical field of radio frequency chip scheduling and matching control, and in particular to a fast matching method and device for a radio frequency chipset. Background Art

[0002] Currently, multi-band communication terminals typically integrate multiple RF chips to support multiple network protocols and multi-band coverage. However, since different RF chips come from different manufacturers, there are problems such as inconsistent response timing, differences in communication protocol support, and non-uniform parameter configuration interfaces, which pose significant challenges to system initialization and scheduling control. Existing technologies often use a fixed-sequence handshake process and a unified parameter template approach to initialize RF chips. Although simple to implement, this can easily lead to initialization failures, system function degradation, or communication failures in application scenarios with large differences in chip response delays, frequent bus communication conflicts, and mismatched parameter capabilities. This makes it difficult to meet the actual needs of complex terminals for fast startup, stable handshakes, and intelligent adaptation. For example, in terminal platforms that integrate multiple RF modules such as 5G, Wi-Fi, and GNSS, the initialization timing of each chip can vary by milliseconds. If a serial polling handshake strategy is still used, initialization failures are likely due to waiting redundancy or response timeouts. At the same time, parameter configuration cannot be dynamically adjusted based on chip characteristics, further affecting the system's communication capabilities. Therefore, there is an urgent need for a method that can achieve fast handshake scheduling and parameter adaptive matching in the case of multi-chip heterogeneity and uncertain response, so as to improve system initialization efficiency, bus communication stability and overall platform compatibility. Summary of the Invention

[0003] In response to the above-mentioned technical deficiencies, the purpose of the present invention is to propose a fast matching method for RF chipsets, aiming to solve the technical problem that the existing technology adopts a fixed handshake process and a unified parameter configuration method, especially in the face of complex terminal environments with heterogeneous chipsets from multiple manufacturers and large differences in response time, which makes it difficult to achieve fast and stable parameter matching.

[0004] In order to solve the above technical problems, the present invention adopts the following technical solution: the present invention provides a fast matching method for a radio frequency chipset.

[0005] The fast matching method of the radio frequency chipset includes:

[0006] Step S10: Obtain the basic response characteristics of chip i in the RF chipset through the preset main control platform, and construct the initial timing deviation of chip i based on the response delay estimation model in the statistical learning method ;

[0007] Step S20: Based on the initial timing deviation The shortest job priority scheduling algorithm is used for handshake scheduling, and the SPI or I2C request protocol is used to send handshake commands at the physical layer;

[0008] Step S30: Receive the chip handshake response data corresponding to the handshake command, and use the fuzzy scoring mechanism to quantitatively evaluate the chip handshake response data to obtain a handshake response quality score. , preset handshake response quality score threshold ,like , using exponential backoff method to execute resending handshake command;

[0009] Step S40: Handshake response quality score Chip The main control platform further reads its capability parameter vector and combines it with the preset target configuration vector to calculate the chip parameter configuration matching score using the weighted Euclidean distance matching method. , configure matching scores based on chip parameters Execution parameter configuration;

[0010] Step S50: After completing the parameter configuration, the main control platform verifies the configuration status of each RF chip using the instruction loopback mapping verification method. After the verification is passed, the main control platform summarizes the parameter configuration information of all chips to generate a parameter configuration summary table.

[0011] Preferably, in step S10, the initial timing deviation of chip i ,in, The default response time of chip i after power-on, determined from the chip data sheet; The expected startup offset obtained by the main control platform statistics, based on past experience The average estimate of the onset delay of the underlying response characteristics is determined; The response jitter is modeled as a Gaussian distribution, determined by fitting the fundamental response characteristics obtained from historical handshake tests. , represents the normal distribution under statistical learning methods, is the response time variance determined based on the basic response characteristics of chip i.

[0012] Preferably, in step S30, the handshake response quality score ,in, For chips Whether to return the checksum of the handshake confirmation; Verification value to check whether the read-back ID or version data passes; Is the check value for whether the interrupt line is pulled high to indicate completion; The weight factor is the empirical weight factor set by the main control platform based on experience; the exponential backoff method is used to execute the step of resending the handshake command, and the formula used is: ,in, To use exponential backoff method to execute The handshake interval between retries, is the initial handshake interval, is the preset backoff factor.

[0013] Preferably, in step S40, the handshake response quality score Chip The main control platform further reads its capability parameter vector and combines it with the preset target configuration vector to calculate the chip parameter configuration matching score using the weighted Euclidean distance matching method. , configure matching scores based on chip parameters The steps for performing parameter configuration include:

[0014] Handshake response quality score Chip , the main control platform further reads the chip Parameters, including the upper limit of supported communication frequency, supported communication protocol mode, supported frequency band number set and supported transmission power range, and perform parameter feature normalization to obtain its capability parameter vector , capability parameter vector ,in, For chips The upper limit characteristic value of the supported communication frequency, is the characteristic value of the communication protocol mode supported by the chip, It is the characteristic value of the frequency band number set supported by the chip. The transmit power range characteristic value supported by the chip;

[0015] The main control platform presets the target configuration vector based on the current communication task , the target configuration vector ,in, is the target communication frequency characteristic value, is the target communication protocol mode characteristic value, is the target frequency band number set characteristic value, is the target transmission power range characteristic value;

[0016] The chip is calculated using the weighted Euclidean distance matching method Parameter configuration matching score ;

[0017] The master control platform presets the matching tolerance threshold ,when When the parameter matching is successful, the matching parameter vector Send to chip , complete the configuration of communication rate, protocol mode, frequency band number and transmission power;

[0018] when , then enter the parameter fallback mechanism, prioritize downgrading the parameter items with the lowest matching degree, and update the target configuration vector , get the fallback target configuration vector , and recalculate the fallback parameter configuration matching score ,like , the fault-tolerant isolation mechanism is triggered.

[0019] Preferably, in step S40, the parameter configuration matching score ,in, They are the matching weight coefficients of communication frequency, protocol mode, frequency band number and transmission power. The weight coefficients are automatically set by the main control platform according to the current task priority, and are used to reflect the importance of matching the communication target to each parameter.

[0020] Preferably, in step S50, after completing the parameter configuration, the main control platform verifies the configuration status of each RF chip using an instruction loopback mapping verification method. After the verification is passed, the main control platform aggregates the parameter configuration information of all chips to generate a parameter configuration summary table, specifically including:

[0021] First, the main control platform constructs a corresponding parameter loopback instruction set based on the target configuration vector set in step S40. The parameter loopback instruction set includes reading the frequency register, reading the protocol mode flag, and reading the frequency band control register. The chip echo result is obtained according to the parameter loopback instruction set, and the chip echo result is compared with the target configuration vector item by item. If each comparison result is within the preset echo comparison error range, it is determined that the verification has passed. Otherwise, it is determined that the verification has failed.

[0022] The parameter configuration information of all chips is then summarized to generate a parameter configuration summary table, which includes the chip number, target configuration vector, chip parameter configuration matching score and chip register final state flag, which is used for scheduling, backup or exception handling of communication tasks.

[0023] Preferably, in step S20, based on the initial timing deviation The shortest job priority scheduling algorithm is used for handshake scheduling. The steps of sending handshake commands using the SPI or I2C request protocol at the physical layer include:

[0024] Based on initial timing deviation The main control platform uses the shortest job priority scheduling algorithm to sort all chips to be handshaked, and gives priority to chips with smaller initial timing deviation to send handshake commands;

[0025] The SPI or I2C request protocol is used at the physical layer to send handshake commands, including: when the communication interface is SPI, the main control platform pulls down the chip select signal of the target chip to select the corresponding chip and sends a handshake command, and the handshake command includes a read device ID command, a read status register command and a send wake-up command; when the communication interface is I2C, the main control platform sends a handshake command with the target chip address as the addressing target; wherein, during the handshake command sending process, the main control platform sets an access status lock through the bus mutual exclusion mechanism to ensure that only one chip occupies the communication bus resources.

[0026] The present invention also provides a fast matching device for a radio frequency chipset, comprising:

[0027] The response characteristic modeling module is used to obtain the basic response characteristics of chip i in the RF chipset through the preset main control platform, and to build the initial timing deviation of chip i based on the response delay estimation model in the statistical learning method. ;

[0028] Handshake scheduling control module for initial timing deviation The shortest job priority scheduling algorithm is used for handshake scheduling, and the SPI or I2C request protocol is used to send handshake commands at the physical layer;

[0029] The handshake quality evaluation and retry control module is used to receive the chip handshake response data corresponding to the handshake command, and use the fuzzy scoring mechanism to quantitatively evaluate the chip handshake response data to obtain the handshake response quality score. , preset handshake response quality score threshold ,like , using exponential backoff method to execute resending handshake command;

[0030] Parameter configuration matching module for handshake response quality score Chip The main control platform further reads its capability parameter vector and combines it with the preset target configuration vector to calculate the chip parameter configuration matching score using the weighted Euclidean distance matching method. , configure matching scores based on chip parameters Execution parameter configuration;

[0031] The configuration status verification and information collection module is used to verify the configuration status of each RF chip using the instruction loopback mapping verification method after completing the parameter configuration. After the verification is passed, the main control platform summarizes the parameter configuration information of all chips to generate a parameter configuration summary table.

[0032] The present invention also provides a fast matching device for a radio frequency chipset, comprising: a memory, a processor, and a fast matching program for the radio frequency chipset stored in the memory and runnable on the processor. When the fast matching program for the radio frequency chipset is executed by the processor, a fast matching method for the radio frequency chipset is implemented.

[0033] The present invention also provides a computer program product, including a fast matching program for a radio frequency chipset, which implements the fast matching method for the radio frequency chipset when executed by a processor.

[0034] The beneficial effects of the present invention are: compared with the existing technology that adopts a fixed handshake process and a unified parameter configuration method, especially in the face of a complex terminal environment with heterogeneous chipsets from multiple manufacturers and large differences in response time, the technical problem of difficulty in achieving fast and stable parameter matching, because the present invention improves the automation level of multi-chip parallel handshake and differentiated parameter configuration processes by constructing a response prediction mechanism and a fuzzy quality scoring mechanism based on statistical modeling. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0036] Figure 1 The present invention is a flowchart of a method for quickly matching a radio frequency chipset.

[0037] Figure 2 The present invention is a schematic structural diagram of a fast matching device for a radio frequency chipset. DETAILED DESCRIPTION

[0038] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0039] Example 1: Figure 1 FIG. 1 is a flow chart of a fast matching method for a radio frequency chipset according to the present invention, and provides a first embodiment of a fast matching method for a radio frequency chipset according to the present invention.

[0040] In the first embodiment, the fast matching method of the radio frequency chipset includes:

[0041] Step S10: Obtain the basic response characteristics of chip i in the RF chipset through the preset main control platform, and construct the initial timing deviation of chip i based on the response delay estimation model in the statistical learning method ;

[0042] It should be noted that in step S10, the initial timing deviation of chip i ,in, The default response time of chip i after power-on, determined from the chip data sheet; The expected startup offset obtained by the main control platform statistics, based on past experience The average estimate of the onset delay of the underlying response characteristics is determined; The response jitter is modeled as a Gaussian distribution, determined by fitting the fundamental response characteristics obtained from historical handshake tests. , represents the normal distribution under statistical learning methods, is the response time variance determined based on the basic response characteristics of chip i.

[0043] It is understandable that the chip response time is not a fixed constant during the actual initialization process, but is affected by various factors such as temperature, voltage, and system load, and exhibits certain fluctuations. Therefore, the introduction of normal distribution modeling can effectively improve the robustness and prediction accuracy of the scheduling algorithm.

[0044] It should be understood that the establishment of the initial timing deviation does not rely on real-time testing each time the power is turned on, but is based on the historical operating data of the main control platform for the same model chip, and is completed offline through statistical fitting. It can then be directly referenced in the actual initialization process, ensuring that the modeling process does not increase the initialization burden.

[0045] Step S20: Based on the initial timing deviation The shortest job priority scheduling algorithm is used for handshake scheduling, and the SPI or I2C request protocol is used to send handshake commands at the physical layer;

[0046] It should be noted that, in step S20, based on the initial timing deviation The shortest job priority scheduling algorithm is used for handshake scheduling. The steps of sending handshake commands using SPI or I2C request protocol at the physical layer include: based on the initial timing deviation The main control platform uses a short-job priority scheduling algorithm to sort all chips to be handshaked, and gives priority to chips with smaller initial timing deviations to send handshake commands; the SPI or I2C request protocol is used to send handshake commands at the physical layer, including: when the communication interface is SPI, the main control platform pulls down the chip select signal of the target chip to select the corresponding chip and sends a handshake command, which includes a read device ID command, a read status register command and a send wake-up command; when the communication interface is I2C, the main control platform sends a handshake command with the target chip address as the addressing target; in the process of sending the handshake command, the main control platform uses the bus mutual exclusion mechanism to set an access status lock to ensure that only one chip occupies the communication bus resources.

[0047] Understandably, because different RF chips take significantly different amounts of time to complete their startup and prepare for handshakes, if the control platform polls them in a fixed order without prioritizing them, it could prematurely initiate handshake requests for chips that aren't ready yet, causing handshake failures or timeouts. By adopting the shortest job priority scheduling mechanism, the control platform prioritizes the chips predicted to respond the fastest, reducing wait times and improving handshake success rates and bus utilization efficiency.

[0048] It should be understood that this scheduling method does not require the chip's actual response time to be completely accurate. Simply predicting the relative order through statistical modeling can effectively improve overall scheduling efficiency. Furthermore, the bus mutual exclusion mechanism ensures the integrity and exclusivity of each handshake command communication process, meeting the communication requirements of the SPI / I2C bus protocol in multi-device parallel scenarios.

[0049] For example, if the synchronization time predictions for RF chips A, B, and C are: 、 , the main control platform will follow B When the handshake is scheduled to chip B, the master pulls down its SPI chip select signal and sends a read device ID command. After B completes the response and releases the bus resources, it initiates a handshake operation on chip A.

[0050] Step S30: Receive the chip handshake response data corresponding to the handshake command, and use the fuzzy scoring mechanism to quantitatively evaluate the chip handshake response data to obtain a handshake response quality score. , preset handshake response quality score threshold ,like , using exponential backoff method to execute resending handshake command;

[0051] It should be noted that in step S30, the handshake response quality score ,in, For chips Whether to return the checksum of the handshake confirmation; Verification value to check whether the read-back ID or version data passes; Is the check value for whether the interrupt line is pulled high to indicate completion; The weight factor is the empirical weight factor set by the main control platform based on experience; the exponential backoff method is used to execute the step of resending the handshake command, and the formula used is: ,in, To use exponential backoff method to execute The handshake interval between retries, is the initial handshake interval, is the preset backoff factor.

[0052] It is understandable that since the response quality of the RF chip is affected by factors such as electrical interference, bus congestion or timing instability, a single indicator (such as the ACK bit) cannot fully determine whether the handshake is successful. Therefore, a fuzzy scoring mechanism is used to combine multiple response dimensions into a single score, which helps to improve the accuracy of the judgment.

[0053] It should be understood that the exponential backoff method is derived from the Ethernet conflict avoidance mechanism and is applicable to the current scenario where multiple chips share a communication bus. It can effectively reduce the probability of repeated conflicts, schedule handshake retries in staggered times, and improve the overall handshake success rate.

[0054] Step S40: Handshake response quality score Chip The main control platform further reads its capability parameter vector and combines it with the preset target configuration vector to calculate the chip parameter configuration matching score using the weighted Euclidean distance matching method. , configure matching scores based on chip parameters Execution parameter configuration;

[0055] It should be noted that, in step S40, the handshake response quality score Chip The main control platform further reads its capability parameter vector and combines it with the preset target configuration vector to calculate the chip parameter configuration matching score using the weighted Euclidean distance matching method. , configure matching scores based on chip parameters Execute parameter configuration steps, including: Chip , the main control platform further reads the chip Parameters, including the upper limit of supported communication frequency, supported communication protocol mode, supported frequency band number set and supported transmission power range, and perform parameter feature normalization to obtain its capability parameter vector , capability parameter vector ,in, For chips The upper limit characteristic value of the supported communication frequency, is the characteristic value of the communication protocol mode supported by the chip, It is the characteristic value of the frequency band number set supported by the chip. The transmit power range characteristic value supported by the chip; the main control platform presets the target configuration vector based on the current communication task , the target configuration vector ,in, is the target communication frequency characteristic value, is the target communication protocol mode characteristic value, is the target frequency band number set characteristic value, is the target transmission power range characteristic value; the chip is calculated using the weighted Euclidean distance matching method Parameter configuration matching score ; The master control platform presets the matching tolerance threshold ,when When the parameter matching is successful, the matching parameter vector Send to chip , complete the configuration of communication rate, protocol mode, frequency band number and transmission power; when , then enter the parameter fallback mechanism, prioritize downgrading the parameter items with the lowest matching degree, and update the target configuration vector , get the fallback target configuration vector , and recalculate the fallback parameter configuration matching score ,like , the fault-tolerant isolation mechanism is triggered.

[0056] It is understandable that due to the structural differences in the parameter capabilities supported by different chips, using a unified configuration template can easily lead to configuration failures for some chips. By constructing parameter vectors and quantifying their matching degree, this invention can achieve dynamic adaptation based on capability ranges, thereby improving the configuration success rate.

[0057] It should be understood that the weighted Euclidean distance matching method is a typical multi-objective fitting optimization algorithm, which is suitable for the current multi-parameter, multi-chip heterogeneous environment. It can accurately describe the matching relationship of "relatively close to the optimal parameters" and avoid unnecessary rejection caused by absolute matching.

[0058] Step S50: After completing the parameter configuration, the main control platform verifies the configuration status of each RF chip using the instruction loopback mapping verification method. After the verification is passed, the main control platform summarizes the parameter configuration information of all chips to generate a parameter configuration summary table.

[0059] It should be noted that in step S50, after completing the parameter configuration, the main control platform uses the instruction loopback mapping verification method to verify the configuration status of each RF chip. After the verification is passed, the main control platform summarizes the parameter configuration information of all chips to generate a parameter configuration summary table. The steps specifically include: first, the main control platform constructs a corresponding parameter loopback instruction set based on the target configuration vector set in step S40, and the parameter loopback instruction set includes reading the frequency register, reading the protocol mode flag, and reading the frequency band control register; according to the parameter loopback instruction set, the chip echo result is obtained, and the chip echo result is compared with the target configuration vector item by item. If each comparison result is within the preset echo comparison error range, it is determined that the verification is passed; otherwise, it is determined that the verification fails; then the parameter configuration information of all chips is summarized to generate a parameter configuration summary table. The parameter configuration summary table includes the chip number, target configuration vector, chip parameter configuration matching score and chip register final status flag, which is used for scheduling, backup or exception handling of communication tasks.

[0060] It is understandable that chip parameter configuration in complex systems often fails to take effect due to factors such as bus interference, register write failure, or register echo lag. A single configuration write operation is not enough to ensure system availability. Loopback reading and comparison can accurately confirm the status of each configuration and ensure that the system is in a "valid working" state after initialization.

[0061] It should be understood that the instruction loop mapping verification method is different from the traditional method of only checking the READY or ACK bit. Instead, it adopts a "read-after-comparison" mechanism to constitute active verification at the parameter level. It is particularly suitable for improving reliability and reducing the probability of hidden configuration failure in a multi-chip parallel initialization environment.

[0062] Embodiment 2: In addition, the present invention provides a rapid matching device for a radio frequency chipset, which adopts a rapid matching method for a radio frequency chipset in the above embodiment, and can solve the technical problem of rapid matching of a radio frequency chipset. Compared with the prior art, the beneficial effects of the rapid matching device for a radio frequency chipset provided by the present invention are the same as the beneficial effects of the rapid matching method for a radio frequency chipset provided by the above embodiment, and the other technical features of the rapid matching device for a radio frequency chipset are the same as the features disclosed in the above embodiment method, and are not further described here.

[0063] Example 3: The present invention provides a fast matching device for a radio frequency chipset, please refer to Figure 2A fast matching device for a radio frequency chipset includes: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to perform the fast matching method for a radio frequency chipset described in the first embodiment. The fast matching device for a radio frequency chipset in the embodiments of the present invention may include, but is not limited to, mobile terminals such as mobile phones, laptop computers, digital broadcast receivers, PDAs (Personal Digital Assistants), PADs (Portable Application Descriptions), PMPs (Portable Media Players), in-vehicle terminals (e.g., in-vehicle navigation terminals), and fixed terminals such as digital TVs and desktop computers. The fast matching device for a radio frequency chipset is merely an example and should not limit the functionality or scope of use of the embodiments of the present invention. The fast matching device for a radio frequency chipset may include a processor 1001 (e.g., a central processing unit, a graphics processor, etc.), which may perform various appropriate actions and processes based on a program stored in a read-only memory (ROM) 1002 or a program loaded from a storage device 1003 into a random access memory (RAM) 1004. RAM 1004 also stores various programs and data required for the operation of a fast matching device for a radio frequency chipset. Processor 1001, ROM 1002, and RAM 1004 are interconnected via bus 1005. An input / output (I / O) interface 1006 is also connected to the bus. Typically, the following devices may be connected to I / O interface 1006: input device 1007, such as a touch screen, touchpad, keyboard, mouse, image sensor, microphone, accelerometer, gyroscope, etc.; output device 1008, such as a liquid crystal display (LCD), speaker, vibrator, etc.; storage device 1003, such as a magnetic tape, hard disk, etc.; and communication device 1009. Communication device 1009 allows a fast matching device for a radio frequency chipset to communicate with other devices wirelessly or wired to exchange data. While the figure shows a fast matching device for a radio frequency chipset with various devices, it should be understood that implementation or presence of all illustrated devices is not required. More or fewer devices may alternatively be implemented or present.

[0064] Embodiment 4: The present invention further provides a computer program product, comprising a computer program. When executed by a processor, the computer program implements the steps of the aforementioned method for rapidly matching a radio frequency chipset. The computer program product provided by the present invention can solve the technical problem of rapidly matching a radio frequency chipset. Compared to the prior art, the beneficial effects of the computer program product provided by the present invention are the same as those of the method for rapidly matching a radio frequency chipset provided in the aforementioned embodiment, and are not further elaborated here.

[0065] In particular, according to the embodiments disclosed in the present invention, the processes described above with reference to the flowcharts can be implemented as computer software programs. For example, the embodiments disclosed in the present invention include a computer program product comprising a computer program carried on a computer-readable medium, the computer program comprising program code for executing the method shown in the flowchart. In such an embodiment, the computer program can be downloaded and installed from a network via a communication device, or installed from a storage device 1003, or installed from a ROM 1002. When the computer program is executed by the processor 1001, the above-mentioned functions defined in the method of the embodiment disclosed in the present invention are performed.

[0066] It should be understood that the various parts disclosed in the present invention can be implemented using hardware, software, firmware, or a combination thereof. In the description of the above embodiments, specific features, structures, materials, or characteristics can be combined in any appropriate manner in any one or more embodiments or examples.

[0067] Obviously, those skilled in the art may make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, if such changes and modifications fall within the scope of the claims and their equivalents, the present invention is intended to include such changes and modifications.

Claims

1. A fast matching method for a radio frequency chipset, characterized in that: Methods include: Step S10: Obtain the basic response characteristics of chip i in the RF chipset through the preset main control platform, and construct the initial timing deviation of chip i based on the response delay estimation model in the statistical learning method ; Step S20: Based on the initial timing deviation The shortest job priority scheduling algorithm is used for handshake scheduling, and the SPI or I2C request protocol is used to send handshake commands at the physical layer; Step S30: Receive the chip handshake response data corresponding to the handshake command, and use the fuzzy scoring mechanism to quantitatively evaluate the chip handshake response data to obtain a handshake response quality score. , preset handshake response quality score threshold ,like , using exponential backoff method to execute resending handshake command; Step S40: Handshake response quality score Chip The main control platform further reads its capability parameter vector and combines it with the preset target configuration vector to calculate the chip parameter configuration matching score using the weighted Euclidean distance matching method. , configure matching scores based on chip parameters Execution parameter configuration; Step S50: After completing the parameter configuration, the main control platform verifies the configuration status of each RF chip using the instruction loopback mapping verification method. After the verification is passed, the main control platform summarizes the parameter configuration information of all chips to generate a parameter configuration summary table.

2. The fast matching method of a radio frequency chipset according to claim 1, wherein: In step S10, the initial timing deviation of chip i ,in, The default response time of chip i after power-on, determined from the chip data sheet; The expected startup offset obtained by the main control platform statistics, based on past experience The average estimate of the onset delay of the underlying response characteristics is determined; The response jitter is modeled as a Gaussian distribution, determined by fitting the fundamental response characteristics obtained from historical handshake tests. , represents the normal distribution under statistical learning methods, is the response time variance determined based on the basic response characteristics of chip i.

3. The fast matching method of a radio frequency chipset according to claim 1, wherein: In step S30, the handshake response quality score ,in, For chips Whether to return the checksum of the handshake confirmation; Verification value to check whether the read-back ID or version data passes; Is the check value for whether the interrupt line is pulled high to indicate completion; The weight factor is the empirical weight factor set by the main control platform based on experience; the exponential backoff method is used to execute the step of resending the handshake command, and the formula used is: ,in, To use exponential backoff method to execute The handshake interval between retries, is the initial handshake interval, is the preset backoff factor.

4. The fast matching method of a radio frequency chipset according to claim 1, wherein: In step S40, the handshake response quality score Chip The main control platform further reads its capability parameter vector and combines it with the preset target configuration vector to calculate the chip parameter configuration matching score using the weighted Euclidean distance matching method. , configure matching scores based on chip parameters The steps for performing parameter configuration include: Handshake response quality score Chip , the main control platform further reads the chip Parameters, including the upper limit of supported communication frequency, supported communication protocol mode, supported frequency band number set and supported transmission power range, and perform parameter feature normalization to obtain its capability parameter vector , capability parameter vector ,in, For chips The upper limit characteristic value of the supported communication frequency, is the characteristic value of the communication protocol mode supported by the chip, It is the characteristic value of the frequency band number set supported by the chip. The transmit power range characteristic value supported by the chip; The main control platform presets the target configuration vector based on the current communication task , the target configuration vector ,in, is the target communication frequency characteristic value, is the target communication protocol mode characteristic value, is the target frequency band number set characteristic value, is the target transmission power range characteristic value; The chip is calculated using the weighted Euclidean distance matching method Parameter configuration matching score ; The master control platform presets the matching tolerance threshold ,when When the parameter matching is successful, the matching parameter vector Send to chip , complete the configuration of communication rate, protocol mode, frequency band number and transmission power; when , then enter the parameter fallback mechanism, prioritize downgrading the parameter items with the lowest matching degree, and update the target configuration vector , get the fallback target configuration vector , and recalculate the fallback parameter configuration matching score ,like , the fault-tolerant isolation mechanism is triggered.

5. The fast matching method of a radio frequency chipset according to claim 4, wherein: Parameter configuration matching score ,in, They are the matching weight coefficients of communication frequency, protocol mode, frequency band number and transmission power. The weight coefficients are automatically set by the main control platform according to the current task priority, and are used to reflect the importance of matching the communication target to each parameter.

6. The fast matching method of a radio frequency chipset according to claim 1, wherein: In step S50, after completing the parameter configuration, the main control platform verifies the configuration status of each RF chip using the instruction loopback mapping verification method. After the verification is passed, the main control platform summarizes the parameter configuration information of all chips to generate a parameter configuration summary table, which specifically includes: First, the main control platform constructs a corresponding parameter loopback instruction set based on the target configuration vector set in step S40. The parameter loopback instruction set includes reading the frequency register, reading the protocol mode flag, and reading the frequency band control register. The chip echo result is obtained according to the parameter loopback instruction set, and the chip echo result is compared with the target configuration vector item by item. If each comparison result is within the preset echo comparison error range, it is determined that the verification has passed. Otherwise, it is determined that the verification has failed. The parameter configuration information of all chips is then summarized to generate a parameter configuration summary table, which includes the chip number, target configuration vector, chip parameter configuration matching score and chip register final state flag, which is used for scheduling, backup or exception handling of communication tasks.

7. The fast matching method of a radio frequency chipset according to claim 1, wherein: In step S20, based on the initial timing deviation The shortest job priority scheduling algorithm is used for handshake scheduling. The steps of sending handshake commands using the SPI or I2C request protocol at the physical layer include: Based on initial timing deviation The main control platform uses the shortest job priority scheduling algorithm to sort all chips to be handshaked, and gives priority to chips with smaller initial timing deviation to send handshake commands; The SPI or I2C request protocol is used at the physical layer to send handshake commands, including: when the communication interface is SPI, the main control platform pulls down the chip select signal of the target chip to select the corresponding chip and sends a handshake command, and the handshake command includes a read device ID command, a read status register command and a send wake-up command; when the communication interface is I2C, the main control platform sends a handshake command with the target chip address as the addressing target; wherein, during the handshake command sending process, the main control platform sets an access status lock through the bus mutual exclusion mechanism to ensure that only one chip occupies the communication bus resources.

8. A fast matching device for a radio frequency chipset, applied to a fast matching method for a radio frequency chipset according to any one of claims 1 to 7, characterized in that: The fast matching device of the radio frequency chipset includes: The response characteristic modeling module is used to obtain the basic response characteristics of chip i in the RF chipset through the preset main control platform, and to build the initial timing deviation of chip i based on the response delay estimation model in the statistical learning method. ; Handshake scheduling control module for initial timing deviation The shortest job priority scheduling algorithm is used for handshake scheduling, and the SPI or I2C request protocol is used to send handshake commands at the physical layer; The handshake quality evaluation and retry control module is used to receive the chip handshake response data corresponding to the handshake command, and use the fuzzy scoring mechanism to quantitatively evaluate the chip handshake response data to obtain the handshake response quality score. , preset handshake response quality score threshold ,like , using exponential backoff method to execute resending handshake command; Parameter configuration matching module for handshake response quality score Chip The main control platform further reads its capability parameter vector and combines it with the preset target configuration vector to calculate the chip parameter configuration matching score using the weighted Euclidean distance matching method. , configure matching scores based on chip parameters Execution parameter configuration; The configuration status verification and information collection module is used to verify the configuration status of each RF chip using the instruction loopback mapping verification method after completing the parameter configuration. After the verification is passed, the main control platform summarizes the parameter configuration information of all chips to generate a parameter configuration summary table.

9. A fast matching device for a radio frequency chipset, characterized in that: The fast matching device of the RF chipset includes: a memory, a processor, and a fast matching program of the RF chipset stored in the memory and runnable on the processor. When the fast matching program of the RF chipset is executed by the processor, a fast matching method of the RF chipset according to any one of claims 1 to 7 is implemented.

10. A computer program product, characterized in that The computer program product includes a fast matching program for a radio frequency chipset, and when the fast matching program for a radio frequency chipset is executed by a processor, a fast matching method for a radio frequency chipset according to any one of claims 1 to 7 is implemented.

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