Large board combination interface design method adaptive to various core boards

Abstract

The invention discloses a large board combination interface design method adaptive to various core boards, and relates to the field of large board combination interface design, which comprises the following steps: grouping and numbering different core boards, and establishing a basic parameter library of the different core boards; setting a software identification method and a hardware identification method of the large board for the type of the pre-accessed core board; a dynamic adjustment model of the large board to the pre-access core board is set, and the adaptability of the large board to the interface of the pre-access core board is improved; establishing a large board combination interface library adaptive to various core boards, and obtaining and recording an adaptability adjustment result of the large board to the pre-access core board interface and product information of the pre-access core board; and updating and optimizing the large board combination interface library adaptive to the plurality of core boards. The method has the advantages that the identification of different core board types by the large board is effectively improved, and the adaptability and dynamic stability of the large board to the interfaces of different core board types are improved by dynamically adjusting the physical state of the large board and the pre-access core board interface.

Description

Technical Field

[0001] The present invention relates to the field of large board combination interface design, and more specifically, to a large board combination interface design method adapted to multiple core boards. Background Art

[0002] The large board is the basic platform circuit board in an embedded hardware system, which bears a pluggable core board through a standardized interface. The core board is a high-density embedded module integrating a core computing unit, mainly including: a processor, a memory, a storage controller, and basic power management. It is connected to the large board through a standardized interface and together with the large board constitutes a complete electronic device or system. Using the same large board to adapt to multiple core boards can effectively improve the reuse rate of hardware design, realize on-demand expansion of computing power, adapt to dynamic load requirements, and thus achieve the "1 + 1 > 2" effect through the optimization of physical space, power supply and heat dissipation, interface expansion, and performance coordination between the large board and multiple core boards.

[0003] The traditional large board and core board adaptation neural network adaptation method needs to obtain all-round product information of the pre-connected core board, and by traversing all parameters, improve the optimization effect of the physical state of the interface between the large board and the pre-connected core board. It lacks consideration of the influence of different pre-connected core board types, and is prone to increasing the computing power and running time of the large board for dynamic adaptation to the core board, resulting in local overheating of the large board core system due to the increase in computing power, causing a sharp increase in power consumption and the phenomenon of "low-quality computing", thus affecting the stability and lifespan of the system. Summary of the Invention

[0004] To solve the above technical problems, a large board combination interface design method adapted to multiple core boards is provided. This technical solution solves the problems raised in the above background art, such as the lack of consideration of the influence of different pre-connected core board types, the easy increase in the computing power and running time of the large board for dynamic adaptation to the core board, resulting in local overheating of the large board core system due to the increase in computing power, causing a sharp increase in power consumption and the phenomenon of "low-quality computing", thus affecting the stability and lifespan of the system.

[0005] To achieve the above objectives, the technical solution adopted by the present invention is as follows: A large board combination interface design method adapted to multiple core boards, including: Based on big data, obtain product information of different core boards, group and number different core boards, and establish a basic parameter library for different core boards; According to the basic parameter library of different core boards, set software recognition and hardware recognition methods for the large board to the type of pre-connected core board; According to the recognition result of the large board to the type of pre-connected core board, set a dynamic adjustment model for the large board to the pre-connected core board to improve the adaptability of the large board to the interface of the pre-connected core board; Build a large board combination interface library adapted to multiple core boards, and obtain and record the adaptation adjustment results of the large board to the interfaces of the pre-connected core boards and the product information of the pre-connected core boards; Update and optimize the large board combination interface library adapted to multiple core boards according to the stability determination results of the dynamic adjustment model of the large board to the pre-connected core boards.

[0006] Preferably, the method for setting the software recognition and hardware recognition methods of the large board for the types of pre-connected core boards according to the basic parameter library of different core boards specifically includes: Set the software recognition of the large board for the types of pre-connected core boards according to the product information retrieval sequence; According to the numbers and product information of different core boards, set corresponding digital adjustment knobs on the large board, and make the large board perform hardware recognition on the types of pre-connected core boards by adjusting the digital knobs; The setting of the software recognition of the large board for the types of pre-connected core boards specifically includes: The large board reads the pre-programmed EEPROM information on the core board through a software program; According to the pre-programmed EEPROM information on the core board and in combination with the product information retrieval sequence, obtain the consistency evaluation of the core board product information; According to the results of the consistency evaluation of the core board product information, classify the types of pre-connected core boards into recognizable types and unrecognizable types. Among them, the recognizable types include: standard types and non-standard types.

[0007] Preferably, the method for setting the dynamic adjustment model of the large board for the pre-connected core boards according to the recognition results of the large board for the types of pre-connected core boards and improving the adaptability of the large board to the interfaces of the pre-connected core boards specifically includes: Set the input parameter values of different recognition results respectively according to the recognition results of the large board for the types of pre-connected core boards; Through a hardware acquisition device, real-time collect the physical state information of the interfaces between the large board and the pre-connected core boards. Among them, the physical state information includes: voltage, current, temperature, and clock frequency.

[0008] Perform filtering and normalization processing on the real-time collected physical state information of the interfaces between the large board and the pre-connected core boards; Establish a dynamic adjustment model of the large board for the pre-connected core boards according to the PID algorithm and the neural network algorithm, and dynamically adjust the physical state of the interfaces between the large board and the pre-connected core boards.

[0009] Preferably, the dynamic adjustment model of the large board for the pre-connected core boards specifically includes: PID algorithm control term Satisfy, In the formula, 、 , are the proportional gain coefficient, integral gain coefficient, and derivative gain coefficient respectively. is the error value between the target value and the monitored value of the physical state of the interface between the large board and the pre-connected core board. is the time step, and the physical state of the interface between the large board and the pre-connected core board is dynamically adjusted through the PID algorithm. The neural network algorithm uses the BP neural network. Among them, the loss function satisfies , where is the input sample data. In the BP neural network algorithm, the feedback weight update method through the backpropagation method uses the gradient descent algorithm. Among them, the gradient descent algorithm satisfies , where is the th update parameter value. is the th update parameter value. is the learning rate. is the batch value adaptation function in the batch gradient descent algorithm. By adjusting the batch value of the gradient descent in the BP neural network algorithm, the calculation efficiency of the neural network is improved, and the adjustment speed of the model is increased. Among them, satisfies , where is the ceiling symbol. is the parameter adjustment coefficient, which is a constant and can be obtained through big data or test experiments. It is used to adjust the obtained data to avoid extreme values. , are the influence weights of the core board product information consistency evaluation value on the gradient descent batch value towards the boundary and boundary respectively. The dynamic adjustment model expression of the large board for the pre-connected core board satisfies , where is the dynamic adjustment value of the physical state of the interface between the large board and the pre-connected core board. is the dynamic compensation value generated by the BP neural network algorithm.

[0010] Compared with the prior art, the beneficial effects of the present invention are as follows: By analyzing the product information of different core boards, grouping and numbering different core boards, establishing a basic parameter library and a product information retrieval sequence for different core boards, and adopting software recognition and hardware recognition methods for the basic parameter library and product information retrieval sequence of different core boards, the large board can effectively identify the type of pre-connected core board, thereby providing data support for limiting the subsequent gradient descent batch value. Secondly, according to the PID algorithm and the neural network algorithm, a dynamic adjustment model of the large board for the pre-connected core board is established to dynamically adjust the physical state of the interface between the large board and the pre-connected core board, enabling the large board to be effectively adapted to multiple core boards. Finally, by establishing a large board combination interface library adapted to multiple core boards, updating and storing model data and the basic parameter library of different core boards, expanding the recognition range of the basic parameter library of different core boards, and analyzing the stability of the dynamic adjustment model of the large board for the pre-connected core board according to the usage times of the same type of pre-connected core board in the large board combination interface library adapted to multiple core boards, the large board combination interface library adapted to multiple core boards is updated and optimized through the analysis results of the model stability, thereby effectively improving the recognition of different core board types by the large board and improving the adaptability and dynamic stability of the large board to the interfaces of different core board types by dynamically adjusting the physical state of the interface between the large board and the pre-connected core board. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Figure 1 is a flowchart of a method for designing a large board combination interface adapted to multiple core boards according to the present invention; Figure 2 is a flowchart of software recognition for setting the type of pre-connected core board by the large board according to the present invention; Figure 3 is a flowchart for setting a dynamic adjustment model of the large board for the pre-connected core board according to the recognition result of the type of pre-connected core board by the large board and improving the adaptability of the large board to the interface of the pre-connected core board according to the present invention; Figure 4 is a structural diagram of the architecture of an electronic device proposed by the present invention; Figure 5 is a schematic structural diagram of a computer-readable storage medium proposed by the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0012] The following description is used to disclose the present invention so that those skilled in the art can implement the present invention. The preferred embodiments described below are only examples, and those skilled in the art can think of other obvious variations.

[0013] Referring to Figure 1 as shown, a method for designing a large board combination interface adapted to multiple core boards includes: Based on big data, obtain the product information of different core boards, group and number different core boards, and establish a basic parameter library for different core boards; According to the basic parameter library of different core boards, set the software recognition and hardware recognition methods of the main board for the pre-connected core board types; According to the recognition results of the main board for the pre-connected core board types, set the dynamic adjustment model of the main board for the pre-connected core board to improve the adaptability of the main board to the interfaces of the pre-connected core boards; Establish a main board combined interface library adapted to multiple core boards, and obtain and record the adaptability adjustment results of the main board to the interfaces of the pre-connected core boards and the product information of the pre-connected core boards; According to the stability determination results of the dynamic adjustment model of the main board for the pre-connected core board, update and optimize the main board combined interface library adapted to multiple core boards.

[0014] It can be explained that in this solution, by analyzing the product information of different core boards, different core boards are grouped and numbered, a basic parameter library and a product information retrieval sequence of different core boards are established. Software recognition and hardware recognition methods are adopted for the basic parameter library and product information retrieval sequence of different core boards, enabling the main board to effectively recognize the types of pre-connected core boards, thereby providing data support for the subsequent limitation of the gradient descent batch value. Secondly, according to the PID algorithm and neural network algorithm, a dynamic adjustment model of the main board for the pre-connected core board is established to dynamically adjust the physical state of the interfaces between the main board and the pre-connected core boards, enabling the main board to be effectively adapted to multiple core boards. Finally, by establishing a main board combined interface library adapted to multiple core boards, updating and storing model data and the basic parameter libraries of different core boards, the recognition range of the basic parameter libraries of different core boards is broadened. At the same time, according to the usage times of the same type of pre-connected core boards in the main board combined interface library adapted to multiple core boards, the stability of the dynamic adjustment model of the main board for the pre-connected core board is analyzed. Through the analysis results of the model stability, the main board combined interface library adapted to multiple core boards is updated and optimized, thereby effectively improving the recognition of different core board types by the main board and improving the adaptability and dynamic stability of the main board to the interfaces of different core board types by dynamically adjusting the physical state of the interfaces between the main board and the pre-connected core boards.

[0015] The specific steps of obtaining the product information of different core boards based on big data, grouping and numbering different core boards, and establishing a basic parameter library of different core boards include: Based on big data, obtain the product information of different core boards and set the types of different core boards. Among them, the product information includes: processor, number of cores, main frequency, pins, CPU, memory, and communication interfaces; Group and number different core board types in digital form respectively; Establish a basic parameter library of different core boards, record and list the product information of core boards corresponding to different numbers, and establish a product information retrieval sequence; The product information retrieval sequence refers to arranging the product information of the core board in a fixed form, and when retrieving product information, the product information arranged in the front is retrieved first.

[0016] It can be explained that when determining the type of the pre-connected core board, a core board type comparison library needs to be formulated, and the consistency between the product information of the pre-connected core board and the product information in the comparison library is matched. Thus, the type of the pre-connected core board is determined. Therefore, based on big data, this solution obtains the product information of different core boards, sets the types of different core boards, groups and numbers them in digital form, and thus groups and establishes a product information retrieval sequence through the numbers, determining the basic rules and comparison information for later product information retrieval.

[0017] The method for setting the software recognition and hardware recognition of the large board for the type of the pre-connected core board according to the basic parameter library of different core boards specifically includes: Set the software recognition of the large board for the type of the pre-connected core board according to the product information retrieval sequence; According to the numbers and product information of different core boards, set corresponding digital adjustment knobs on the large board, and the large board performs hardware recognition of the type of the pre-connected core board by adjusting the digital knobs.

[0018] It can be explained that there are two common methods for the large board to recognize the type of the pre-connected core board. One is to read the pre-programmed EEPROM information on the core board through software, and the other is to manually identify the product information on the core board and let the large board obtain it by manually inputting information. In this solution, by reserving the product information in the basic parameter library of different core boards in the large board and finding the corresponding core board type through the numbers, the large board can perform hardware recognition of the type of the pre-connected core board by setting digital knobs according to the manual recognition result.

[0019] Refer to Figure 2 As shown, the method for setting the software recognition of the large board for the type of the pre-connected core board specifically includes: The large board reads the pre-programmed EEPROM information on the core board through a software program; According to the pre-programmed EEPROM information on the core board and in combination with the product information retrieval sequence, obtain the consistency evaluation of the core board product information; According to the result of the consistency evaluation of the core board product information, divide the type of the pre-connected core board into recognizable types and unrecognizable types. Among them, the recognizable types include: standard types and non-standard types.

[0020] It can be explained that by using the pre-programmed EEPROM information on the core board and matching the product information pre-connected to the core board with the product information in the control library, the type of the pre-connected core board can be effectively determined through software recognition. Among them, to ensure the consistency of the lengths of the two groups of data during the data consistency determination, it is necessary to correct data of different lengths. By representing the group with empty product information at the corresponding positions in the two groups of data as zero to fill the empty positions, the consistency of the lengths of the two groups of data can be improved. The consistency evaluation expression of the core board product information is as follows: In the formula, is the consistency evaluation value of the pre-connected core board product information, is the number of pairs of exactly the same elements in the two groups of data, all possible comparison times; Based on historical data, set the consistency evaluation threshold of the core board product information 、 where, When , it indicates that the consistency of the core board product information is high, and the core board type is the standard type among the recognizable types. When , it indicates that the consistency of the core board product information is weak, and the core board type is the non-standard type among the recognizable types. When , it indicates that the consistency of the core board product information is the weakest, and the core board type is the unrecognizable type.

[0021] Referring to Figure 3 shown, setting the dynamic adjustment model of the large board for the pre-connected core board according to the recognition result of the pre-connected core board type by the large board to improve the adaptability of the large board to the interface of the pre-connected core board specifically includes: According to the recognition result of the pre-connected core board type by the large board, set the input parameter values of different recognition results respectively; Through the hardware acquisition device, the physical state information of the interface between the large board and the pre-connected core board is collected in real time. Among them, the physical state information includes: voltage, current, temperature, and clock frequency.

[0022] Filter and normalize the physical state information of the interface between the large board and the pre-connected core board collected in real time; According to the PID algorithm and the neural network algorithm, establish a dynamic adjustment model of the large board for the pre-connected core board to dynamically adjust the physical state of the interface between the large board and the pre-connected core board.

[0023] It can be explained that when the large board is interconnected with the pre-connected core board through the interface, it is easily affected by the physical state of the interface, namely voltage, current, temperature, and clock frequency. Due to the mismatch of the interface physical state, it is easy to cause the overall instability when the large board is interconnected with the pre-connected core board. Therefore, in this solution, the PID algorithm is used to dynamically adjust the physical state of the interface, and the neural network algorithm is used to compensate for the non-linear parameter error in the PID algorithm, so as to improve the accuracy and adaptability of the model to the adjustment of the interface physical state, and reduce the degradation of the interface physical state adjustment performance caused by the influence of the load.

[0024] The dynamic adjustment model of the large board for the pre-connected core board specifically includes: PID algorithm control term Satisfy, , where, 、 、 are the proportional gain coefficient, integral gain coefficient, and differential gain coefficient respectively, is the error value between the target value and the monitored value of the physical state of the interface between the large board and the pre-connected core board, is the time step, and the physical state of the interface between the large board and the pre-connected core board is dynamically adjusted through the PID algorithm; The neural network algorithm uses the BP neural network. Among them, the loss function Satisfy, , where, is the input sample data; In the BP neural network algorithm, the feedback weight update method through the backpropagation method uses the gradient descent algorithm. Among them, the gradient descent algorithm Satisfy, , where, is the th update parameter value, is the th update parameter value, is the learning rate, is the batch value adaptation function in the batch gradient descent algorithm. By adjusting the batch value of the gradient descent in the BP neural network algorithm, the calculation efficiency of the neural network is improved, and the adjustment speed of the model is improved. Among them, Satisfy, , where, is the ceiling symbol, is the parameter adjustment coefficient, which is a constant and can be obtained through big data or test experiments. It is used to adjust the obtained data to avoid extreme values, 、 are the consistency evaluation values of the core board product information tending to boundary and The influence weight of the boundary on the gradient descent batch value; The dynamic adjustment model expression of the large board for the pre-connected core board Satisfy, , where, is the dynamic adjustment value of the large board for the physical state of the interface of the pre-connected core board, is the dynamic compensation value generated by the BP neural network algorithm.

[0025] It can be explained that by the PID algorithm control term and the BP neural network algorithm, the accuracy and adaptability of the model for adjusting the physical state of the interface can be effectively improved. However, since the BP neural network needs to iteratively optimize the parameters through the gradient descent algorithm, in order to ensure the absolute accuracy of the data, all parameters need to be traversed, which increases the operation time and system computing power, and may lead to the delay of the PID algorithm control, resulting in the overall inadaptability of the model. Therefore, in this solution, through the core board product information consistency evaluation result, the batch value in the gradient descent algorithm is dynamically adjusted, so as to improve the computing ability of the BP neural network, reduce the operation time, and thus improve the overall adaptability of the model.

[0026] The establishment of a large board combined interface library adapted to multiple core boards, and the acquisition and recording of the adaptation adjustment results of the large board for the interface of the pre-connected core board and the product information of the pre-connected core board specifically include: According to the basic parameter library of different core boards and the adaptation adjustment results of the large board for the interface of the pre-connected core board, establish a large board combined interface library adapted to multiple core boards; Based on the large board combined interface library adapted to multiple core boards, automatically input the product information of the pre-connected core board, and supplement the basic parameter library of different core boards according to the product information of the pre-connected core board of unrecognizable type and non-standard type, and expand the basic parameter library of different core boards; According to the usage times of the same type of pre-connected core board in the large board combined interface library adapted to multiple core boards, obtain the stability of the dynamic adjustment model of the large board for the pre-connected core board.

[0027] It can be explained that in order to improve the range of pre-connected core board type recognition, in this solution, by establishing a large board combined interface library adapted to multiple core boards, accessing the product information of the core board, and supplementing the basic parameter library of different core boards according to the product information of the pre-connected core board of unrecognizable type and non-standard type, expanding the basic parameter library of different core boards, and analyzing the stability of the dynamic adjustment model of the large board for the pre-connected core board according to the usage times of the same type of pre-connected core board in the large board combined interface library adapted to multiple core boards, so as to determine the change of the stability of the large board after multiple accesses to the core board; The expression for analyzing the stability of the dynamic adjustment model of the large board for the pre-connected core board is: Wherein, is the stability evaluation value of the dynamic adjustment model of the large board for the pre-connected core board, is the number of types of interface physical states, is the weight of the th type of interface physical state, is the number of samples of the th type of interface physical state, is the th sample data of the th type of interface physical state, is the target data of the th type of interface physical state, is the number of connections between the large board and the pre-connected core board,

[0028] The stability determination result of the dynamic adjustment model of the large board for the pre-connected core board is used to update and optimize the large board combined interface library adapted to multiple core boards, which specifically includes: According to the determination result of the stability of the dynamic adjustment model of the large board for the pre-connected core board, the different physical state information of the interface between the large board and the pre-connected core board is analyzed directionally; For the abnormal physical state information that appears at the interface between the large board and the pre-connected core board, check whether the interface hardware of the large board is abnormal. If so, correct it through hardware measures. If not, through testability tests, set the proposed standard value, and use the dynamic adjustment model of the large board for the pre-connected core board to perform repetitive data tests, and adjust and correct the parameters in the model.

[0029] It can be explained that by analyzing the evaluation value of the stability of the dynamic adjustment model of the large board for the pre-connected core board, by setting a boundary threshold, when the model stability evaluation value exceeds the boundary threshold, it means that the current dynamic adjustment model of the large board for the pre-connected core board is unstable, and the interface hardware of the large board and the dynamic adjustment model of the large board for the pre-connected core board need to be adjusted. When the model stability evaluation value is within the boundary threshold, it means that the current dynamic adjustment model of the large board for the pre-connected core board is stable, so as to effectively evaluate the stability of the dynamic adjustment model of the large board for the pre-connected core board, and avoid the imbalance of the model dynamic adjustment caused by the material life or the accumulated subtle deviation of the model, which affects the stability of the interface between the large board and the core board.

[0030] Furthermore, the method according to the embodiment of the present application can also be implemented by means of the architecture of the electronic device shown in Figure 4 . As shown in Figure 4As shown, the electronic device 500 may include a bus 501, one or more CPUs 502, a read-only memory (ROM) 503, a random access memory (RAM) 504, a communication port 505 connected to a network, an input / output component 506, a hard disk 507, etc. Storage devices in the electronic device 500, such as the ROM 503 or the hard disk 507, may store a method for designing a large-board combined interface adapted to multiple core boards provided in this application. The electronic device 500 may also include a user interface 508. Of course, Figure 4 The architecture shown is only exemplary. When implementing different devices, one or more components in the Figure 4 shown electronic device may be omitted according to actual needs.

[0031] Figure 5 It is a schematic diagram of the structure of a computer-readable storage medium provided by an embodiment of this application. As Figure 5 shown, it is a computer-readable storage medium 600 according to an embodiment of this application. Computer-readable instructions are stored on the computer-readable storage medium 600. When the computer-readable instructions are run by a processor, a method for designing a large-board combined interface adapted to multiple core boards according to the embodiments of this application described with reference to the above drawings can be executed. The storage medium 600 includes but is not limited to, for example, volatile memory and / or non-volatile memory. Volatile memory may include, for example, random access memory (RAM) and cache memory, etc. Non-volatile memory may include, for example, read-only memory (ROM), hard disk, flash memory, etc.

[0032] In summary, the advantages of the present invention are as follows: effectively improving the recognition of different core board types by the large board, and improving the adaptability and dynamic stability of the large board to the interfaces of different core board types by dynamically adjusting the physical state of the interface between the large board and the pre-connected core board.

[0033] The above shows and describes the basic principles, main features, and advantages of the present invention. Those skilled in the art should understand that the present invention is not limited by the above embodiments. What is described in the above embodiments and the specification is only the principle of the present invention. Without departing from the spirit and scope of the present invention, the present invention will have various changes and improvements, and these changes and improvements all fall within the scope of the present invention claimed. The scope of protection claimed by the present invention is defined by the appended claims and their equivalents.

Claims

1. A large board combined interface design method adapted to multiple core boards, characterized in that Including: Based on big data, obtain the product information of different core boards, group and number different core boards, and establish a basic parameter library for different core boards; According to the basic parameter library of different core boards, set the software recognition and hardware recognition methods for the large board to the pre-connected core board type; According to the recognition result of the large board to the pre-connected core board type, set the dynamic adjustment model of the large board to the pre-connected core board to improve the adaptability of the large board to the interface of the pre-connected core board; Establish a large board combination interface library adapted to multiple core boards, obtain and record the adaptability adjustment results of the large board to the interface of the pre-connected core board and the product information of the pre-connected core board; According to the stability determination result of the dynamic adjustment model of the large board to the pre-connected core board, update and optimize the large board combination interface library adapted to multiple core boards.

2. A large board combined interface design method adapted to multiple core boards according to claim 1, characterized in that, The specific steps of obtaining the product information of different core boards based on big data, grouping and numbering different core boards, and establishing a basic parameter library for different core boards include: Based on big data, obtain the product information of different core boards, and set the types of different core boards. Among them, the product information includes: processor, number of cores, main frequency, pins, CPU, memory, and communication interface; Group and number different core board types in digital form respectively; Establish a basic parameter library for different core boards, record and list the core board product information corresponding to different numbers, and establish a product information retrieval sequence; The product information retrieval sequence refers to setting the arrangement order of the core board product information in a fixed form. When retrieving product information, the product information arranged in the front is retrieved first.

3. A large board combined interface design method adapted to multiple core boards according to claim 2, characterized in that The specific steps of setting the software recognition and hardware recognition methods for the large board to the pre-connected core board type according to the basic parameter library of different core boards include: Set the software recognition of the large board to the pre-connected core board type according to the product information retrieval sequence; According to the numbers and product information of different core boards, set corresponding digital adjustment knobs on the large board, and make the large board perform hardware recognition of the pre-connected core board type by adjusting the digital knobs; The specific steps of setting the software recognition of the large board to the pre-connected core board type include: The large board reads the pre-programmed EEPROM information on the core board through a software program; According to the pre-programmed EEPROM information on the core board, combined with the product information retrieval sequence, obtain the consistency evaluation of the core board product information; According to the consistency evaluation result of the core board product information, divide the pre-connected core board type into recognizable types and unrecognizable types. Among them, the recognizable types include: standard types and non-standard types.

4. A large board combined interface design method adapted to multiple core boards according to claim 3, characterized in that The specific steps of setting the dynamic adjustment model of the large board to the pre-connected core board according to the recognition result of the large board to the pre-connected core board type to improve the adaptability of the large board to the interface of the pre-connected core board include: According to the recognition result of the large board to the pre-connected core board type, set the input parameter values of different recognition results respectively; Through a hardware acquisition device, real-time collect the physical state information of the interface between the large board and the pre-connected core board. Among them, the physical state information includes: voltage, current, temperature, and clock frequency; Perform filtering and normalization processing on the real-time collected physical state information of the interface between the large board and the pre-connected core board; According to the PID algorithm and the neural network algorithm, a dynamic adjustment model of the large board for the pre-connected core board is established to dynamically adjust the physical state of the interface between the large board and the pre-connected core board.

5. A method for designing a large board combined interface adapted to multiple core boards according to claim 4, characterized in that, The dynamic adjustment model of the large board for the pre-connected core board specifically includes: PID algorithm control term Satisfied, , where , , are the proportional gain coefficient, integral gain coefficient and derivative gain coefficient respectively, is the error value between the target value and the monitored value of the physical state of the interface between the large board and the pre-connected core board, is the time step, and the physical state of the interface between the large board and the pre-connected core board is dynamically adjusted through the PID algorithm; The neural network algorithm uses a BP neural network. Among them, the loss function satisfies , where is the input sample data; In the BP neural network algorithm, the feedback weight update method through backpropagation adopts the gradient descent algorithm. Among them, the gradient descent algorithm satisfies , where is the th update parameter value, is the th update parameter value, is the learning rate, is the batch value adaptation function in the batch gradient descent algorithm. By adjusting the batch value of the gradient descent in the BP neural network algorithm, the calculation efficiency of the neural network is improved, and the adjustment speed of the model is increased. Among them, satisfies , where is the ceiling symbol, is the parameter adjustment coefficient, which is a constant and can be obtained through big data or test experiments. It is used to adjust the obtained data to avoid extreme values, , are the influence weights of the core board product information consistency evaluation value on the gradient descent batch value towards the boundary and boundary respectively; Dynamic adjustment model expression of the large board for pre-connected core board Satisfy , where is the dynamic adjustment value of the physical state of the interface of the large board for the pre-connected core board is the dynamic compensation value generated by the BP neural network algorithm 6. A method for designing a large board combined interface adapted to multiple core boards according to claim 5, characterized in that The establishment of a large board combined interface library adapted to multiple core boards, and the acquisition and recording of the adaptation adjustment results of the interface between the large board and the pre-connected core board and the product information of the pre-connected core board specifically include: According to the basic parameter libraries of different core boards and the adaptation adjustment results of the interface between the large board and the pre-connected core board, a large board combined interface library adapted to multiple core boards is established; Based on the large board combined interface library adapted to multiple core boards, the product information of the pre-connected core board is automatically entered, and the basic parameter libraries of different core boards are supplemented according to the product information of the pre-connected core board of unrecognizable types and non-standard types, and the basic parameter libraries of different core boards are expanded; According to the usage times of the same type of pre-connected core board in the large board combined interface library adapted to multiple core boards, the stability of the dynamic adjustment model of the large board for the pre-connected core board is obtained.

7. A method for designing a large board combined interface adapted to multiple core boards according to claim 6, characterized in that The stability determination result of the dynamic adjustment model of the large board for the pre-connected core board is used to update and optimize the large board combined interface library adapted to multiple core boards, which specifically includes: According to the determination result of the stability of the dynamic adjustment model of the large board for the pre-connected core board, the different physical state information of the interface between the large board and the pre-connected core board is analyzed directionally; For the abnormal physical state information that appears at the interface between the large board and the pre-connected core board, check whether the interface hardware of the large board is abnormal. If so, correct it through hardware measures. If not, through a test experiment, set the proposed standard value, and use the dynamic adjustment model of the large board for the pre-connected core board to perform repetitive data testing, and adjust and correct the parameters in the model.

8. An electronic device, characterized in that, It includes: At least one processor; And, a memory communicatively connected to the at least one processor; wherein, The memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor so that the at least one processor can execute a method for designing a large board combined interface adapted to multiple core boards as described in any one of claims 1-7.

9. A computer-readable storage medium storing a computer program, characterized in that, When the computer program is executed by the processor, it implements a method for designing a large board combined interface adapted to multiple core boards as described in any one of claims 1-7.

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