Chip structure, manufacturing method and related device

Abstract

The embodiment of the invention provides a chip structure, a manufacturing method and a related device, and the chip structure comprises a functional chip; the heat dissipation chip is bonded to the functional chip; the heat dissipation chip comprises a heat dissipation sheet which is of a symmetrical structure; the connecting parts are located at the two ends of the cooling fins and connected with the frame through rotating shafts; the capacitor structure is located on the outer side of the connecting part and used for providing power for movement of the cooling fins; the frame surrounds the cooling fins and the connecting part, and the frame, the cooling fins and the connecting part are arranged at intervals. According to the embodiment of the invention, the heat dissipation problem of the chip can be solved.

Description

Technical Field

[0001] Embodiments of the present application relate to the field of semiconductor technology, and more particularly to a chip structure, a manufacturing method, and related devices. Background Art

[0002] With the rapid progress of electronic technology, the demand for chip integration and computing power has increased sharply, driving the development of packaging technology towards higher density and diversified chip integration. This trend has inevitably led to a significant increase in the internal power consumption of the chip system, and thus a large amount of heat is released during operation. If this heat cannot be effectively and timely dissipated, it will directly threaten the performance stability and service life of the chip and its surrounding electronic components, and even cause system failures.

[0003] In this context, how to provide a chip structure to solve the heat dissipation problem of the chip has become a technical problem that needs to be solved urgently by those skilled in the art. Summary of the Invention

[0004] In view of this, embodiments of the present application provide a chip structure, a manufacturing method, and related devices to solve the heat dissipation problem of the chip.

[0005] To achieve the above object, embodiments of the present application provide the following technical solutions.

[0006] In a first aspect, embodiments of the present application provide a chip structure, including:

[0007] A functional chip;

[0008] A heat dissipation chip bonded to the functional chip;

[0009] The heat dissipation chip includes: a heat sink, the heat sink is a symmetric structure; connection parts located at both ends of the heat sink, the connection parts are connected to a frame through a rotating shaft; a capacitor structure located outside the connection parts, the capacitor structure is used to provide power for the movement of the heat sink;

[0010] Wherein, the frame surrounds the heat sink and the connection parts and is spaced apart from the heat sink and the connection parts.

[0011] In a second aspect, embodiments of the present application provide a manufacturing method of a chip structure, including:

[0012] Providing a functional chip and a heat dissipation chip;

[0013] Bonding the heat dissipation chip to the functional chip;

[0014] Among them, the heat dissipation chip includes: a heat sink, the heat sink being of a symmetrical structure; connecting parts located at both ends of the heat sink, the connecting parts being connected to the frame through rotating shafts; a capacitor structure located outside the connecting parts, the capacitor structure being used to provide power for the movement of the heat sink; wherein, the frame surrounds the heat sink and the connecting parts and is spaced apart from the heat sink and the connecting parts.

[0015] In a third aspect, an embodiment of the present application provides a packaging structure, the packaging structure including the chip structure as described in the first aspect above.

[0016] In a fourth aspect, an embodiment of the present application provides an integrated circuit structure, the integrated circuit structure including the chip structure as described in the first aspect above.

[0017] Compared with the prior art, the technical solution of the embodiment of the present application has the following advantages:

[0018] The embodiment of the present application provides a chip structure, a manufacturing method and related devices. Among them, the chip structure includes: a functional chip; a heat dissipation chip bonded to the functional chip; the heat dissipation chip includes: a heat sink, the heat sink being of a symmetrical structure; connecting parts located at both ends of the heat sink, the connecting parts being connected to the frame through rotating shafts; a capacitor structure located outside the connecting parts, the capacitor structure being used to provide power for the movement of the heat sink; wherein, the frame surrounds the heat sink and the connecting parts and is spaced apart from the heat sink and the connecting parts.

[0019] It can be seen that in the chip structure provided by the embodiment of the present application, by bonding the heat dissipation chip to the functional chip, and in the heat dissipation chip, the capacitor structure located outside the connecting part provides power for the movement of the heat sink, thereby driving the heat sink to swing to accelerate the dissipation of heat, improving the heat exchange efficiency, and further solving the heat dissipation problem of the chip. Description of the Drawings

[0020] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the drawings in the following description are only the embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained according to the provided drawings.

[0021] Figure 1 is a top view of the chip structure provided by the embodiment of the present application;

[0022] Figures 2 to 3 is a schematic structural diagram corresponding to each step in an embodiment of the method for forming the heat dissipation chip in the embodiment of the present application;

[0023] Figure 4 It is an alternative structural schematic diagram of the encapsulation structure of the embodiment of the present application. Detailed implementation manners

[0024] Next, the technical solutions in the embodiments of the present application will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments in the present application without creative efforts shall fall within the protection scope of the present application.

[0025] As described in the background art, with the rapid progress of electronic technology, the demand for chip integration and computing power has increased sharply, driving the development of packaging technology towards higher density and diversified chip integration. This trend inevitably leads to a significant increase in the internal power consumption of the chip system, and a large amount of heat is released during operation. If these heats cannot be effectively and timely dissipated, it will directly threaten the performance stability and service life of the chip and its surrounding electronic components, and even cause system failures. In this context, how to provide a chip structure to solve the heat dissipation problem of the chip has become a technical problem that those skilled in the art need to solve urgently.

[0026] In view of this, the embodiments of the present application provide a chip structure, a manufacturing method and related devices. Among them, the chip structure includes: a functional chip; a heat dissipation chip bonded to the functional chip; the heat dissipation chip includes: a heat sink, the heat sink is a symmetric structure; connection parts located at both ends of the heat sink, the connection parts are connected to the frame through rotating shafts; a capacitor structure located outside the connection parts, the capacitor structure is used to provide power for the movement of the heat sink; wherein, the frame surrounds the heat sink and the connection parts and is spaced from the heat sink and the connection parts.

[0027] It can be seen that the chip structure provided by the embodiments of the present application bonds the heat dissipation chip to the functional chip, and the capacitor structure located outside the connection parts in the heat dissipation chip provides power for the movement of the heat sink, thereby driving the heat sink to swing to accelerate the heat dissipation, improving the heat exchange efficiency, and further solving the heat dissipation problem of the chip.

[0028] Next, the technical solutions in the embodiments of the present application will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments.

[0029] Refer to Figure 1 , Figure 1 which is a top view of the chip structure provided by the embodiment of the present application. As Figure 1 shown, the chip structure includes:

[0030] Functional chip 10; a heat dissipation chip 20 bonded to the functional chip (as shown by the dashed box in the figure); the heat dissipation chip 20 includes: a heat sink 21, and the heat sink 21 has a symmetrical structure; connecting portions 22 located at both ends of the heat sink 21, and the connecting portions 22 are connected to a frame 24 through a rotating shaft 23; a capacitor structure 25 located outside the connecting portions 22, and the capacitor structure 25 is used to provide power for the movement of the heat sink.

[0031] Wherein, the frame 24 surrounds the heat sink 21 and the connecting portions 22 and is spaced apart from the heat sink 21 and the connecting portions 22.

[0032] Wherein, the functional chip 10 refers to an integrated circuit chip with specific functions, and may include but is not limited to a microprocessor chip, a memory chip, a graphics processor chip, a communication chip, etc.

[0033] In a specific implementation, the connecting portion 22 has a U-shaped structure; one end of the rotating shaft 23 is connected to the inner side of the frame 24, and the other end is connected to the bottom of the U-shaped structure of the connecting portion 22.

[0034] In an alternative implementation, the capacitor structure 25 includes: a plurality of first electrode plates 251 located outside the connecting portions 22, and the first electrode plates 251 are spaced apart from each other; a plurality of second electrode plates 252 located at positions opposite to the first electrode plates 251 on the inner side of the frame 24, and the second electrode plates 252 are spaced apart from each other; wherein, the first electrode plates 251 and the second electrode plates 252 are alternately arranged along the extending direction of the connecting portion 22.

[0035] Wherein, the first electrode plates 251 and the second electrode plates 252 at least partially overlap in projection along the extending direction of the connecting portion 22, and the distance between adjacent first electrode plates 251 and second electrode plates 252 is greater than 1 micron. The height of the first electrode plates 251 is greater than 5 microns, and the width is greater than 5 microns; the height of the second electrode plates 252 is greater than 5 microns, and the width is greater than 5 microns.

[0036] The first electrode plates 251 and the second electrode plates 252 are alternately arranged along the extending direction of the connecting portion 22 and at least partially overlap in projection along the extending direction of the connecting portion 22, so that the first electrode plates 251 and the second electrode plates 252 together form a parallel plate capacitor. It can store charges and generate an electric field, and thus can be used as a power source.

[0037] Specifically, when a voltage is applied between two electrode plates, the charges on one electrode plate will attract the opposite charges on the other electrode plate, thereby forming an electric field between the two electrode plates. This electric field can store electrical energy, and when needed, the stored electrical energy can be released in a certain way (such as by changing the voltage or connecting an external circuit) to provide power for other electronic components or systems.

[0038] It should be noted that the above method of generating power by applying a voltage between two electrode plates is only an optional example. In practical applications, designers can select a suitable driving mechanism according to the actual situation, including but not limited to electrostatic driving, electrothermal effect driving, electromagnetic induction driving, and piezoelectric effect driving, etc. The embodiments of the present application do not limit this.

[0039] In the embodiments of the present application, by applying a varying voltage to the first electrode plate 251 and the second electrode plate 252, a varying electric field is generated, which in turn causes the heat sink to swing about the axis of the rotating shaft 23. The swinging of the heat sink can accelerate the dissipation of heat, improve the heat exchange efficiency, and thus solve the heat dissipation problem of the chip.

[0040] Among them, the first electrode plate 251 and the second electrode plate 252 arranged alternately along the extension direction of the connecting portion 22 can be regarded as a comb structure. The first electrode plate 251 and the second electrode plate 252 are respectively a movable moving tooth and a fixed stationary tooth. Its driving voltage can be a square wave. When the moving tooth moves in the direction of the maximum torsion angle, the square wave driving signal is 0. When the maximum torsion angle is reached, the driving signal is a positive intermediate voltage, driving the moving tooth to accelerate towards the equilibrium position. When the equilibrium position is reached, the driving voltage is 0 again. Due to inertia, the moving tooth continues to move in the reverse direction. When the moving tooth reaches the reverse maximum torsion angle, a negative voltage is applied to drive the moving tooth to move towards the equilibrium position again. This process is repeated to achieve the driving of the heat sink 21.

[0041] In an alternative implementation, the heat dissipation chip further includes: a plurality of through holes 26 located at the edge of the frame 24 for bonding the heat dissipation chip 20 to the functional chip 10.

[0042] By adopting the TSV (Through-Silicon Via) technology to achieve efficient bonding of the heat dissipation chip. The power supply in the functional chip can pass through the through holes of the heat dissipation chip to provide corresponding circuit control for the capacitive structures on both sides of the cantilever beam in the heat dissipation chip. Among them, the bonding methods include but are not limited to solder ball bonding, copper pillar bonding, and wafer bonding, etc. In the embodiments of the present application, the heat dissipation chip is bonded to the functional chip by using the solder ball bonding method.

[0043] In an alternative implementation, the heat sink 21 is circular, oval, square, or rectangular in a top-down view. For the sake of specific illustration, the heat sink in the embodiment of the present application is exemplified by a square heat sink, but this is only for the convenience of understanding and does not mean the exclusion of other shapes. It should be noted that the embodiment of the present application does not limit the shape of the heat sink, as long as the connecting portion can stably drive the selected-shaped heat sink to perform necessary movements to achieve efficient heat conduction and heat dissipation effects.

[0044] In the design of an electronic device, the pairing relationship between the functional chip and the heat dissipation chip can be flexibly determined according to specific application scenarios, cost considerations, performance requirements, and design complexity. The following are two configuration methods provided by the embodiments of the present application:

[0045] (1) One functional chip is correspondingly provided with one or more heat dissipation chips:

[0046] One functional chip being correspondingly provided with one or more heat dissipation chips can ensure that each functional chip can obtain sufficient heat dissipation support, which is particularly suitable for high-performance and high-power chips such as processors and graphics processors. By separately equipping each functional chip with a heat dissipation chip, heat can be dissipated more effectively, preventing performance degradation or damage of the functional chip caused by heat accumulation.

[0047] (2) Multiple functional chips are correspondingly provided with one heat dissipation chip:

[0048] Multiple functional chips being correspondingly provided with one heat dissipation chip helps to reduce costs and complexity because sharing a heat dissipation chip can reduce the number of required heat dissipation chips. At the same time, in some cases, if the heat loads between the functional chips are relatively balanced and low, sharing a heat dissipation chip can also meet the heat dissipation requirements.

[0049] It should be noted that when selecting a configuration method, multiple factors such as heat dissipation efficiency, cost-effectiveness, space layout, reliability, and maintenance convenience need to be comprehensively considered. In some designs, a hybrid configuration method may also be adopted, that is, according to the different performances and heat dissipation requirements of the functional chips, a one-to-one or many-to-one heat dissipation configuration is flexibly selected.

[0050] It can be seen that the chip structure provided by the embodiment of the present application bonds the heat dissipation chip to the functional chip, and a capacitive structure located outside the connecting portion in the heat dissipation chip provides power for the movement of the heat sink, thereby driving the heat sink to swing and accelerating heat dissipation, improving the heat exchange efficiency, and further solving the heat dissipation problem of the chip.

[0051] Meanwhile, in the embodiments of the present application, in view of the inherent limitations of current air-cooling and liquid-cooling heat dissipation technologies, such as the high noise, large volume, and heat dissipation performance bottleneck of air-cooling systems, which are difficult to cope with the heat dissipation challenges of high-performance chips; while liquid-cooling systems face high costs, stringent installation conditions, and increasing post-maintenance costs. By adopting microelectromechanical system (MEMS) technology, a heat dissipation chip is manufactured as a heat dissipation solution. Through the design of miniaturized and high-performance heat dissipation chips, while effectively reducing noise and occupied space, the heat dissipation efficiency is significantly improved, meeting the urgent need for heat dissipation capabilities of high-performance computing and electronic devices.

[0052] The embodiments of the present application also provide a manufacturing method of a chip structure. The manufacturing method of the chip structure includes: providing a functional chip and a heat dissipation chip; bonding the heat dissipation chip to the functional chip. In an optional implementation, the step of providing the functional chip and the heat dissipation chip may include: providing a functional chip; forming a heat dissipation chip. Among them, the step of forming the heat dissipation chip may include:

[0053] Referring to Figure 2 , providing a SOI (Silicon On Insulator) wafer, the SOI wafer includes a substrate silicon 100, an insulating layer 200, and a top silicon 300 stacked in sequence;

[0054] Referring to Figure 3 , removing a partial area of the SOI wafer to obtain the heat dissipation chip 20.

[0055] Among them, the heat dissipation chip 20 includes: a heat sink 21, the heat sink 21 is a symmetric structure; connecting portions 22 located at both ends of the heat sink 21, the connecting portions 22 are connected to a frame 24 through a rotating shaft 23; a capacitor structure 25 located outside the connecting portions 22, the capacitor structure 25 is used to provide power for the movement of the heat sink; wherein, the frame 24 surrounds the heat sink 21 and the connecting portions 22 and is spaced apart from the heat sink 21 and the connecting portions 22. The connecting portion 22 is a U-shaped structure; one end of the rotating shaft 23 is connected to the inner side of the frame 24, and the other end is connected to the bottom of the U-shaped structure of the connecting portion 22.

[0056] In an optional implementation, the heat dissipation chip 20 may further include: a plurality of through holes 26 located at the edge of the frame 24, for bonding the heat dissipation chip to the functional chip.

[0057] The efficient bonding of the heat dissipation chip is achieved by adopting the TSV (Through-Silicon Via) technology. The electrodes in the functional chip can directly pass through the through-holes of the heat dissipation chip to form stable electrical connection points, greatly improving the reliability of the connection and the heat dissipation efficiency. Among them, the bonding methods include but are not limited to solder ball bonding, copper pillar bonding, and wafer bonding, etc. In the embodiment of the present application, the heat dissipation chip is bonded to the functional chip by using the solder ball bonding method.

[0058] In an alternative implementation, the heat sink 21 is circular, oval, square, or rectangular in a top-down view. For specific illustration, the square heat sink is taken as an example in the embodiment of the present application, but this is only for easy understanding and does not mean excluding other shapes. It should be noted that the embodiment of the present application does not limit the shape of the heat sink, as long as the connecting part can stably drive the selected-shaped heat sink to perform necessary movements to achieve efficient heat conduction and heat dissipation effects.

[0059] In an alternative implementation, the capacitor structure 25 includes: a plurality of first electrode plates 251 located outside the connecting part 22, and the first electrode plates 251 are spaced apart from each other; a plurality of second electrode plates 252 located at positions opposite to the first electrode plates 251 inside the frame 24, and the second electrode plates 252 are spaced apart from each other; wherein, the first electrode plates 251 and the second electrode plates 252 are arranged alternately along the extending direction of the connecting part 22.

[0060] Among them, the first electrode plates 251 and the second electrode plates 252 at least partially overlap in projection along the extending direction of the connecting part 22, and the distance between adjacent first electrode plates 251 and second electrode plates 252 is greater than 1 micron. The height of the first electrode plate 251 is greater than 5 microns, and the width is greater than 5 microns; the height of the second electrode plate 252 is greater than 5 microns, and the width is greater than 5 microns.

[0061] The first electrode plates 251 and the second electrode plates 252 are arranged alternately along the extending direction of the connecting part 22 and at least partially overlap in projection along the extending direction of the connecting part 22, so that the first electrode plates 251 and the second electrode plates 252 together form a parallel plate capacitor. It can store charges and generate an electric field, and thus can be used as a power source.

[0062] Specifically, when a voltage is applied between two electrode plates, the charges on one electrode plate will attract the opposite charges on the other electrode plate, thereby forming an electric field between the two electrode plates. This electric field can store electrical energy, and when needed, the stored electrical energy can be released in a certain way (such as by changing the voltage or connecting an external circuit) to provide power for other electronic components or systems.

[0063] It should be noted that the above method of generating power by applying a voltage between two electrode plates is only an optional example. In practical applications, designers can select a suitable driving mechanism according to the actual situation, including but not limited to electrostatic drive, electrothermal effect drive, electromagnetic induction drive, and piezoelectric effect drive, etc. The embodiments of the present application do not limit this.

[0064] In the embodiments of the present application, by applying a changing voltage to the first electrode plate and the second electrode plate, a changing electric field is generated, which in turn causes the heat sink to swing about the axis of the rotating shaft. The swinging of the heat sink can accelerate the dissipation of heat and improve the heat exchange efficiency, thereby solving the heat dissipation problem of the chip.

[0065] In an alternative implementation, the step of removing a partial region of the SOI wafer to obtain the heat dissipation chip may include:

[0066] Forming a patterned mask layer (not shown in the figure) on the SOI wafer;

[0067] The mask layer is used to expose a partial region of the SOI wafer, so as to perform corresponding process treatment on the exposed SOI wafer.

[0068] In this embodiment, the material of the mask layer can be, for example, silicon nitride. Silicon nitride has high hardness and density, which is beneficial to improving the masking effect. Moreover, silicon nitride is a commonly used dielectric material in semiconductor processes and has high process compatibility. In some other embodiments, the material of the mask layer can also be amorphous carbon. In other embodiments, the material of the mask layer can also be selected from one or more of SiOC, SiOCH, SiC, SiCN, SiO2, SiN, and SiON.

[0069] Using an etching process to remove a partial region of the SOI wafer to obtain the heat dissipation chip.

[0070] Wherein, the etching process is a combination of one or two of a dry etching process and a wet etching process. That is to say, the etching process can be a dry etching process, a wet etching process, or a combined dry and wet etching process.

[0071] It can be seen that for the chip structure provided by the embodiments of the present application, the capacitive structure located outside the connection part provides power for the movement of the heat sink, thereby driving the heat sink to swing and accelerating the heat dissipation, improving the heat exchange efficiency, and further solving the heat dissipation problem of the chip.

[0072] Meanwhile, in view of the inherent limitations of current air-cooling and liquid-cooling heat dissipation technologies in the embodiments of the present application, such as the high noise, large volume, and heat dissipation performance bottleneck of the air-cooling system, which are difficult to meet the heat dissipation challenges of high-performance chips; while the liquid-cooling system faces high costs, strict installation conditions, and increasing later maintenance costs. By adopting micro-electro-mechanical system (MEMS) technology, a heat dissipation chip is manufactured as a heat dissipation solution. Through the design of miniaturized and high-performance heat dissipation chips, while effectively reducing noise and occupied space, the heat dissipation efficiency is significantly improved, meeting the urgent need for heat dissipation capacity in high-performance computing and electronic devices.

[0073] The embodiments of the present application further provide a packaging structure, and the packaging structure includes the chip structure as described above.

[0074] In an optional implementation, the bonded hybrid chips can be directly bonded to carriers such as a substrate, a TSV interposer, a fan-out interposer, or a glass interposer. Among them, the number of hybrid chips can be 1 or multiple. The embodiments of the present application take the example of flipping 1 bonded hybrid chip onto a substrate for illustration.

[0075] Specifically, referring to Figure 4 , the bonded hybrid chips (functional chip 10 and heat dissipation chip 20) are bonded to the substrate 30 through the first solder balls 11. The substrate 30 is provided with a reinforcing ring 31 to enhance the mechanical strength of the substrate 30 and prevent the substrate 30 from deforming or being damaged during subsequent processing, testing, or use. In addition, the other side of the substrate 30 is provided with a plurality of second solder balls 32 for electrically connecting and / or mechanically fixing the substrate to other components (such as another substrate).

[0076] Among them, the power supply in the functional chip 10 can provide corresponding circuit control (such as power supply and rotation signal, etc.) for the capacitive structure outside the connection part in the heat dissipation chip 20 through the conductive structure in the through hole of the heat dissipation chip 20. Thus, the capacitive structure outside the connection part serves as a power source to provide power for the movement of the heat sink, thereby driving the heat sink to swing and accelerating the heat dissipation, improving the heat exchange efficiency, and further solving the heat dissipation problem of the chip.

[0077] The embodiments of the present application further provide an integrated circuit structure, and the integrated circuit structure includes the chip structure as described above.

[0078] The above text describes multiple embodiment solutions provided by the embodiments of the present application. Each optional manner introduced in each embodiment solution can be combined and cross-referenced with each other without conflict, thereby extending a variety of possible embodiment solutions, all of which can be considered as the embodiment solutions disclosed and made public by the embodiments of the present application.

[0079] Although the embodiments of the present application are disclosed as above, the present application is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present application. Therefore, the protection scope of the present application shall be subject to the scope defined by the claims.

Claims

1. A chip structure, characterized in that, Comprising: A functional chip; A heat dissipation chip bonded to the functional chip; The heat dissipation chip includes: a heat sink, the heat sink having a symmetric structure; connection parts located at both ends of the heat sink, the connection parts being connected to a frame through a rotating shaft; a capacitor structure located outside the connection parts, the capacitor structure being used to provide power for the movement of the heat sink; Wherein, the frame surrounds the heat sink and the connection parts and is spaced apart from the heat sink and the connection parts.

2. The chip structure according to claim 1, wherein The capacitor structure includes: A plurality of first electrode plates located outside the connection parts, and the first electrode plates are spaced apart from each other; A plurality of second electrode plates located at positions on the inner side of the frame opposite to the first electrode plates, and the second electrode plates are spaced apart from each other; Wherein, the first electrode plates and the second electrode plates are alternately arranged along the extending direction of the connection parts.

3. The chip structure according to claim 2, wherein The first electrode plates and the second electrode plates at least partially overlap in projection along the extending direction of the connection parts, and the distance between adjacent first electrode plates and second electrode plates is greater than 1 micron.

4. The chip structure according to claim 2, characterized in that The height of the first electrode plates is greater than 5 microns, and the width is greater than 5 microns; the height of the second electrode plates is greater than 5 microns, and the width is greater than 5 microns.

5. The chip structure according to claim 1, wherein The connection parts are of a U-shaped structure; one end of the rotating shaft is connected to the inner side of the frame, and the other end is connected to the bottom of the U-shaped structure of the connection parts.

6. The chip structure according to claim 1, wherein The heat dissipation chip further includes: A plurality of through holes located at the edge of the frame, for bonding the heat dissipation chip to the functional chip.

7. The chip structure according to claim 1, wherein, The heat sink is circular, oval, square or rectangular in a top view.

8. The chip structure according to claim 1, wherein One or more heat dissipation chips are correspondingly provided for one functional chip, or one heat dissipation chip is correspondingly provided for multiple functional chips.

9. A manufacturing method of a chip structure, characterized in that, Comprising: Providing a functional chip and a heat dissipation chip; Bonding the heat dissipation chip to the functional chip; Wherein, the heat dissipation chip includes: a heat sink, the heat sink having a symmetric structure; connection parts located at both ends of the heat sink, the connection parts being connected to a frame through a rotating shaft; a capacitor structure located outside the connection parts, the capacitor structure being used to provide power for the movement of the heat sink; wherein, the frame surrounds the heat sink and the connection parts and is spaced apart from the heat sink and the connection parts.

10. The manufacturing method of the chip structure according to claim 9, characterized in that, The connection parts are of a U-shaped structure; one end of the rotating shaft is connected to the inner side of the frame, and the other end is connected to the bottom of the U-shaped structure of the connection parts.

11. The manufacturing method of the chip structure according to claim 9, wherein The capacitor structure includes: A plurality of first electrode plates located outside the connection parts, and the first electrode plates are spaced apart from each other; A plurality of second electrode plates located at positions on the inner side of the frame opposite to the first electrode plates, and the second electrode plates are spaced apart from each other; Wherein, the first electrode plates and the second electrode plates are alternately arranged along the extending direction of the connection parts.

12. The manufacturing method of the chip structure according to claim 11, characterized in that, The first electrode plates and the second electrode plates at least partially overlap in projection along the extending direction of the connection parts, and the distance between adjacent first electrode plates and second electrode plates is greater than 1 micron.

13. The manufacturing method of the chip structure according to claim 11, characterized in that The height of the first electrode plates is greater than 5 microns, and the width is greater than 5 microns; the height of the second electrode plates is greater than 5 microns, and the width is greater than 5 microns.

14. The manufacturing method of the chip structure according to claim 9, characterized in that, The heat sink is circular, oval, square or rectangular in a top-down view.

15. The manufacturing method of the chip structure according to claim 9, characterized in that, The steps of providing the functional chip and the heat dissipation chip include: Providing a functional chip; Forming a heat dissipation chip.

16. The manufacturing method of the chip structure according to claim 15, wherein The step of forming the heat dissipation chip includes: Providing a SOI wafer, the SOI wafer including a substrate silicon, an insulating layer and a top silicon stacked in sequence; Removing a partial area of the SOI wafer to obtain the heat dissipation chip.

17. The manufacturing method of the chip structure according to claim 16, wherein, The step of removing a partial area of the SOI wafer to obtain the heat dissipation chip includes: Forming a patterned mask layer on the SOI wafer; Using an etching process to remove a partial area of the SOI wafer to obtain the heat dissipation chip.

18. The manufacturing method of the chip structure according to claim 17, wherein, The etching process is a combination of one or both of a dry etching process and a wet etching process.

19. An encapsulation structure, characterized in that, The packaging structure includes the chip structure according to any one of claims 1-8.

20. An integrated circuit structure, characterized in that, The integrated circuit structure includes the chip structure according to any one of claims 1-8.

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