Voltage-controlled low-voltage-stress three-inductor buck converter

Abstract

The invention relates to the field of DC-DC converters, and discloses a voltage-controlled low-voltage-stress three-inductor step-down converter. The buck converter comprises a buck converter power stage and control, level conversion and driving related circuits matched with the buck converter power stage. Wherein the buck converter power stage comprises a power switch, two flying capacitors and three inductors. The technical characteristics of the invention are that the flight capacitor is inserted into the power stage of the traditional step-down converter to bear part of voltage stress, and the voltage at the two ends of the flight capacitor is kept at one half of the input voltage by controlling the turn-on and turn-off time sequence of the power switch, thereby reducing the withstand voltage of the power tube, and improving the reliability of the converter. A power tube with low voltage stress is allowed to be used under high power supply voltage to directly realize voltage reduction conversion; and meanwhile, the three inductors are adopted to cooperatively provide current for the load, so that the problem of efficiency reduction caused by the fact that a single inductor bears all load current is avoided, and the efficiency under large load current can be improved.

Description

Technical Field

[0001] This application relates to the field of power conversion, and particularly to DC-DC buck converter technology. Background Art

[0002] DC-DC buck converters are widely used in various electronic devices to convert a higher DC voltage into a lower DC voltage to meet the requirements of different loads. Traditional buck converters usually adopt a single-inductor structure and achieve voltage reduction by controlling the on and off of the switching transistor. However, with the continuous improvement of the requirements for power efficiency, power density, load current, and voltage conversion ratio in electronic devices, some limitations of traditional single-inductor buck converters have gradually emerged in performance.

[0003] Multi-inductor buck converters have gradually become a research hotspot due to their potential advantages in terms of efficiency, ripple suppression, and power density. The multi-inductor structure can achieve more efficient energy transfer and smoother output voltage through a reasonable control strategy. However, existing multi-inductor buck converters are often complex in design and control, and there is still room for improvement in reducing the voltage stress of power devices. The voltage stress of power devices directly affects the size and efficiency of the converter, and using power transistors with low voltage stress helps to improve system performance.

[0004] In high-input-voltage application scenarios, the power switch of a traditional buck converter needs to bear the full input voltage, which requires the use of high-voltage withstand power devices. High-voltage withstand devices usually have a relatively high on-resistance, resulting in increased switching losses and reduced efficiency. In addition, when the load current is large, the inductor in the single-inductor structure needs to bear the full load current, increasing the inductor loss and also leading to a decrease in efficiency.

[0005] Although existing research has attempted to solve the above problems by improving the circuit topology or control strategy, there is still a lack of a solution that can effectively reduce the voltage stress of power devices and improve the efficiency under large load currents at the same time. Therefore, designing a buck converter that can both reduce the voltage stress of power devices and maintain high efficiency under large load current conditions is of great significance for improving the energy utilization efficiency and reliability of electronic devices. Summary of the Invention

[0006] The purpose of this application is to provide a voltage-controlled low-voltage stress three-inductor buck converter to solve the problems raised in the above background art.

[0007] The present application discloses a voltage-controlled low-voltage stress three-inductor buck converter, including: a buck converter power stage and associated control, level-shifting, and driving circuits; wherein, the buck converter power stage includes a power switch circuit, a first flying capacitor, a second flying capacitor, a first inductor, a second inductor, a third inductor, and an output capacitor, the power switch circuit includes a first switch to a tenth switch, its power input terminal is connected to the power supply voltage, the reference ground terminal is grounded, the load terminal is connected to the load, the third voltage switching node output terminal and the fifth voltage switching node output terminal are connected to the control, level-shifting, and driving associated circuits, and the driving signal input terminal is connected to the driving signal output terminal of the control, level-shifting, and driving associated circuits; wherein, the first flying capacitor is coupled between the first voltage switching node output terminal and the third voltage switching node output terminal; the second flying capacitor is coupled between the second voltage switching node output terminal and the fourth voltage switching node output terminal; the first inductor is coupled between the third voltage switching node output terminal and the load terminal; the second inductor is coupled between the fourth voltage switching node output terminal and the load terminal;

[0008] the third inductor is coupled between the fifth voltage switching node output terminal and the load terminal; the output capacitor is coupled between the load terminal and the reference ground.

[0009] In a preferred example, the control, level-shifting, and driving associated circuits include: a controller module for receiving the output voltage, the third voltage switching node voltage, and the fifth voltage switching node voltage of the buck converter power stage, and generating a clock control signal in combination with a reference voltage; a level shifter module for converting the clock control signal output by the controller module to a suitable voltage domain to generate an input signal for the driver module; a driver module for converting the output signal of the level shifter module into a driving signal capable of driving a power transistor and providing it to the buck converter power stage.

[0010] In a preferred example, in the power switch circuit of the buck converter power stage, a first switch is coupled between the power input terminal and the output terminal of the first voltage switching node; a second switch is coupled between the power input terminal and the output terminal of the second voltage switching node; a third switch is coupled between the output terminal of the first voltage switching node and the intermediate potential node; a fourth switch is coupled between the output terminal of the second voltage switching node and the intermediate potential node; a fifth switch is coupled between the intermediate potential node and the output terminal of the third voltage switching node; a sixth switch is coupled between the intermediate potential node and the output terminal of the fourth voltage switching node; a seventh switch is coupled between the output terminal of the third voltage switching node and the reference ground terminal; an eighth switch is coupled between the output terminal of the fourth voltage switching node and the reference ground terminal; a ninth switch is coupled between the intermediate potential node and the output terminal of the fifth voltage switching node; a tenth switch is coupled between the output terminal of the fifth voltage switching node and the reference ground terminal.

[0011] In a preferred example, under steady-state operation, the voltage across the first flying capacitor and the voltage across the second flying capacitor are maintained at one-half of the input voltage.

[0012] In a preferred example, the controller module includes:

[0013] A current balance module for detecting the voltages of the third voltage switching node and the fifth voltage switching node and outputting a voltage comparison signal for participating in the generation of the ramp signal;

[0014] A RAMP generation module for receiving the comparison signal output by the current balance module and generating a first ramp signal, a second ramp signal, and a third ramp signal;

[0015] An error amplifier and compensation module for detecting the output voltage of the buck converter power stage and the reference voltage and generating an error signal through an error amplifier and a compensation network;

[0016] A PWM generation module for receiving the error signal output by the error amplifier and compensation module and the first ramp signal, the second ramp signal, and the third ramp signal output by the RAMP generation module and generating a first PWM signal, a second PWM signal, and a third PWM signal;

[0017] A non-overlapping clock module for receiving the first PWM signal, the second PWM signal, and the third PWM signal output by the PWM generation module and processing them to generate a clock control signal for controlling the turning on and off of the power transistors.

[0018] In a preferred example, it is characterized in that:

[0019] The level shifter module includes a control signal input terminal and a signal output terminal. Among them, the control signal input terminal is connected to the clock control signal output terminal of the controller module, and the signal output terminal is connected to the signal input terminal of the driver module, which is used to perform level conversion on the clock control signal to generate the input signal of the driver module.

[0020] The driver module includes a signal input terminal and a drive signal output terminal. Among them, the signal input terminal is connected to the signal output terminal of the level shifter module, and the drive signal output terminal is connected to the drive signal input terminal of the buck converter power stage, which is used to convert the input signal into a drive signal with appropriate driving ability and provide it to the buck converter power stage.

[0021] In a preferred example, the buck converter power stage includes the following working process:

[0022] When the duty cycle is less than 0.25,

[0023] In the first stage, the first switch, the fourth switch, the fifth switch, the eighth switch, and the tenth switch are closed, the second switch, the third switch, the sixth switch, the seventh switch, and the ninth switch are open, and one end of the second inductor and the third inductor is shorted to the ground.

[0024] After the first stage ends, it enters the second stage. The fourth switch, the seventh switch, the eighth switch, and the tenth switch are closed, the first switch, the second switch, the third switch, the fifth switch, the sixth switch, and the ninth switch are open, and one end of the first inductor, the second inductor, and the third inductor is shorted to the ground.

[0025] After the second stage ends, it enters the third stage. The fourth switch, the seventh switch, the eighth switch, and the ninth switch are closed, the first switch, the second switch, the third switch, the fifth switch, the sixth switch, and the tenth switch are open, and one end of the first inductor and the second inductor is shorted to the ground.

[0026] After the third stage ends, it enters the fourth stage. The seventh switch, the eighth switch, and the tenth switch are closed, the first switch, the second switch, the third switch, the fourth switch, the fifth switch, the sixth switch, and the ninth switch are open, and one end of the first inductor, the second inductor, and the third inductor is shorted to the ground.

[0027] After the fourth stage ends, it enters the fifth stage. The second switch, the third switch, the sixth switch, the seventh switch, and the tenth switch are closed, the first switch, the fourth switch, the fifth switch, the eighth switch, and the ninth switch are open, and one end of the first inductor and the third inductor is shorted to the ground.

[0028] After the fifth stage, it enters the sixth stage. The third switch, the seventh switch, the eighth switch, and the tenth switch are closed, and the first switch, the second switch, the fourth switch, the fifth switch, the sixth switch, and the ninth switch are open. One end of the first inductor, the second inductor, and the third inductor is shorted to ground;

[0029] After the sixth stage, it enters the seventh stage. The third switch, the seventh switch, the eighth switch, and the ninth switch are closed, and the first switch, the second switch, the fourth switch, the fifth switch, the sixth switch, and the tenth switch are open. One end of the first inductor and the second inductor is shorted to ground;

[0030] After the seventh stage, it enters the eighth stage. The seventh switch, the eighth switch, and the tenth switch are closed, and the first switch, the second switch, the third switch, the fourth switch, the fifth switch, the sixth switch, and the ninth switch are open. One end of the first inductor, the second inductor, and the third inductor is shorted to ground;

[0031] After the eighth stage, it enters the first stage, and the behavior of the switches and inductors cycles in this order.

[0032] In a preferred example, the buck converter power stage includes the following operating process:

[0033] When the duty cycle is 0.25,

[0034] In the first stage, the first switch, the fourth switch, the fifth switch, the eighth switch, and the tenth switch are closed, and the second switch, the third switch, the sixth switch, the seventh switch, and the ninth switch are open. One end of the second inductor and the third inductor is shorted to ground;

[0035] After the first stage, it enters the second stage. The fourth switch, the seventh switch, the eighth switch, and the ninth switch are closed, and the first switch, the second switch, the third switch, the fifth switch, the sixth switch, and the tenth switch are open. One end of the first inductor and the second inductor is shorted to ground;

[0036] After the second stage, it enters the third stage. The seventh switch, the eighth switch, and the tenth switch are closed, and the first switch, the second switch, the third switch, the fourth switch, the fifth switch, the sixth switch, and the ninth switch are open. One end of the first inductor, the second inductor, and the third inductor is shorted to ground;

[0037] After the third stage, it enters the fourth stage. The second switch, the third switch, the sixth switch, the seventh switch, and the tenth switch are closed, and the first switch, the fourth switch, the fifth switch, the eighth switch, and the ninth switch are open. One end of the first inductor and the third inductor is shorted to ground;

[0038] After the fourth stage, the fifth stage is entered. The third switch, the seventh switch, the eighth switch, and the ninth switch are closed, and the first switch, the second switch, the fourth switch, the fifth switch, the sixth switch, and the tenth switch are opened. One end of the first inductor and the second inductor is shorted to the ground.

[0039] After the fifth stage, the sixth stage is entered. The seventh switch, the eighth switch, and the tenth switch are closed, and the first switch, the second switch, the third switch, the fourth switch, the fifth switch, the sixth switch, and the ninth switch are opened. One end of the first inductor, the second inductor, and the third inductor is shorted to the ground.

[0040] After the sixth stage, the first stage is entered. The behavior of the switches and inductors cycles in this order.

[0041] In a preferred example, the buck converter power stage includes the following operating process:

[0042] When the duty cycle is greater than 0.25 and less than 0.5,

[0043] In the first stage, the first switch, the fourth switch, the fifth switch, the eighth switch, and the tenth switch are closed, and the second switch, the third switch, the sixth switch, the seventh switch, and the ninth switch are opened. One end of the second inductor and the third inductor is shorted to the ground.

[0044] After the first stage, the second stage is entered. The first switch, the fourth switch, the fifth switch, the eighth switch, and the ninth switch are closed, and the second switch, the third switch, the sixth switch, the seventh switch, and the tenth switch are opened. One end of the second inductor is shorted to the ground.

[0045] After the second stage, the third stage is entered. The fourth switch, the seventh switch, the eighth switch, and the ninth switch are closed, and the first switch, the second switch, the third switch, the fifth switch, the sixth switch, and the tenth switch are opened. One end of the first inductor and the second inductor is shorted to the ground.

[0046] After the third stage, the fourth stage is entered. The seventh switch, the eighth switch, and the tenth switch are closed, and the first switch, the second switch, the third switch, the fourth switch, the fifth switch, the sixth switch, and the ninth switch are opened. One end of the first inductor, the second inductor, and the third inductor is shorted to the ground.

[0047] After the fourth stage, the fifth stage is entered. The second switch, the third switch, the sixth switch, the seventh switch, and the tenth switch are closed, and the first switch, the fourth switch, the fifth switch, the eighth switch, and the ninth switch are opened. One end of the first inductor and the third inductor is shorted to the ground.

[0048] After the fifth stage, the sixth stage is entered. The second switch, the third switch, the sixth switch, the seventh switch, and the ninth switch are closed, and the first switch, the fourth switch, the fifth switch, the eighth switch, and the tenth switch are opened. One end of the first inductor is shorted to the ground.

[0049] After the sixth stage ends, the seventh stage begins. The third switch, the seventh switch, the eighth switch, and the ninth switch are closed, while the first switch, the second switch, the fourth switch, the fifth switch, the sixth switch, and the tenth switch are open. One end of the first inductor and the second inductor is shorted to ground;

[0050] After the seventh stage ends, the eighth stage begins. The seventh switch, the eighth switch, and the tenth switch are closed, while the first switch, the second switch, the third switch, the fourth switch, the fifth switch, the sixth switch, and the ninth switch are open. One end of the first inductor, the second inductor, and the third inductor is shorted to ground;

[0051] After the eighth stage ends, the first stage begins. The behavior of the switches and inductors cycles in this order.

[0052] In a preferred example, the relationship between the output voltage and the input voltage of the buck converter is:

[0053] V OUT =(D / 2)·V IN , where D is the proportion of the conduction time of the first switch in one cycle to that cycle, i.e., the duty cycle.

[0054] In a preferred example, the inductance values of the first inductor and the second inductor are the same, and the inductance value of the third inductor is half of the inductance value of the first inductor.

[0055] Compared with the prior art, the voltage-controlled low-voltage stress three-inductor buck converter disclosed in this application has the following

[0056] Advantages:

[0057] By introducing two flying capacitors in the power stage, where the first flying capacitor is coupled between the first voltage switching node and the third voltage switching node, and the second flying capacitor is coupled between the second voltage switching node and the fourth voltage switching node. Under steady-state operation, the voltages across the first flying capacitor and the second flying capacitor are maintained at half of the input voltage, thereby reducing the breakdown voltage of the power transistors and allowing low-voltage stress power transistors to be directly used to achieve buck conversion under a high supply voltage.

[0058] Adopt a structure where the first inductor, the second inductor, and the third inductor provide current to the load. The first inductor is coupled between the third voltage switching node and the load terminal, the second inductor is coupled between the fourth voltage switching node and the load terminal, and the third inductor is coupled between the fifth voltage switching node and the load terminal. This three-inductor design helps improve the efficiency under a large load current.

[0059] Through the collaborative work of the current balance module, RAMP generation module, error amplifier and compensation module, PWM generation module, and non-overlapping clock module in the controller module, the relationship between the output voltage and the input voltage is achieved as output voltage = (duty cycle / 2) · input voltage, ensuring the stable operation of the system at different duty cycles.

[0060] The output capacitor is coupled between the load terminal and the reference ground terminal, used to smooth the ripple of the output voltage and improve the stability of the output voltage.

[0061] A large number of technical features are recorded in the specification of this application, distributed in various technical solutions. If all possible combinations of technical features (i.e., technical solutions) of this application are listed, the specification will become overly lengthy. To avoid this problem, each technical feature disclosed in the above-mentioned invention content of this application, each technical feature disclosed in the following embodiments and examples, and each technical feature disclosed in the drawings can be freely combined with each other to form various new technical solutions (these technical solutions are all considered to have been recorded in this specification), unless the combination of such technical features is technically infeasible. For example, in one example, features A + B + C are disclosed, and in another example, features A + B + D + E are disclosed, and features C and D are equivalent technical means that play the same role. Only one of them can be used technically and it is impossible to use both at the same time. Feature E can be combined with feature C technically. Then, the solution of A + B + C + D should not be considered to have been recorded due to technical infeasibility, while the solution of A + B + C + E should be considered to have been recorded. Brief Description of the Drawings

[0062] Figure 1 It is a schematic diagram of the overall architecture of a voltage-controlled low-voltage stress three-inductor buck converter according to an embodiment of the present application;

[0063] Figure 2 It is a schematic diagram of the structure of the controller module of a voltage-controlled low-voltage stress three-inductor buck converter according to an embodiment of the present application;

[0064] Figure 3 It is a schematic diagram of the structure of the power stage and load of a voltage-controlled low-voltage stress three-inductor buck converter according to an embodiment of the present application;

[0065] Figure 4 It is a schematic diagram of the switching state and inductor current of a voltage-controlled low-voltage stress three-inductor buck converter when the duty cycle is less than 0.25 according to an embodiment of the present application;

[0066] Figure 5 It is a schematic diagram of the working process of a voltage-controlled low-voltage stress three-inductor buck converter when the duty cycle is less than 0.25 according to an embodiment of the present application;

[0067] Figure 6 It is a schematic diagram of the switching state and inductor current of a voltage-controlled low-voltage stress three-inductor buck converter according to an embodiment of the present application when the duty cycle is greater than 0.25 and less than 0.5;

[0068] Figure 7 It is a schematic diagram of the working process of a voltage-controlled low-voltage stress three-inductor buck converter according to an embodiment of the present application when the duty cycle is greater than 0.25 and less than 0.5;

[0069] Figure 8 It is a schematic diagram of the working flow of a voltage-controlled low-voltage stress three-inductor buck converter according to an embodiment of the present application. Detailed implementation manners

[0070] In the following description, many technical details are presented for the reader to better understand the present application. However, those of ordinary skill in the art can understand that even without these technical details and various changes and modifications based on the following embodiments, the technical solutions claimed in the present application can still be implemented.

[0071] Explanation of some concepts:

[0072] Flying capacitor: It refers to a capacitor used to bear part of the voltage stress in the power stage. In the present application, it specifically refers to the first flying capacitor coupled between the first voltage switching node and the third voltage switching node, and the second flying capacitor coupled between the second voltage switching node and the fourth voltage switching node.

[0073] Voltage switching node: It refers to a node used to connect power switches, flying capacitors, and inductors in the power stage. In the present application, it includes the first to fifth voltage switching nodes.

[0074] Duty cycle: It refers to the proportion of the conduction time of the first switch in a switching cycle to the time of the cycle.

[0075] Intermediate potential node: It refers to an intermediate potential point used to connect multiple power switches in the power stage.

[0076] The following briefly describes some innovative points of the present application:

[0077] Generally speaking, the present application discloses a voltage-controlled low-voltage stress three-inductor buck converter, which solves the technical problems of existing buck converters in high input voltage and large load current scenarios, and achieves outstanding technical effects through innovative technical concepts.

[0078] Specifically, as Figure 1 and Figure 3 shown, the present application introduces two flying capacitors C into the power stage 100F1 , C F2 , where C F1 is coupled between the first voltage switching node V1 and the third voltage switching node V3, and C F2 is coupled between the second voltage switching node V2 and the fourth voltage switching node V4. During steady-state operation, the voltage across the first flying capacitor C F1 and the second flying capacitor C F2 is maintained at half of the input voltage V IN , thereby reducing the voltage withstand requirements of the power switching devices S1 - S 10 , and allowing a low-voltage-stress power transistor to directly achieve buck conversion at a high supply voltage.

[0079] Meanwhile, this application uses three inductors L1, L2, and L3 to supply current to the load. Among them, L1 is coupled between V3 and the load terminal, L2 is coupled between V4 and the load terminal, and L3 is coupled between the fifth voltage switching node V5 and the load terminal. This three-inductor structure helps to improve the efficiency under a large load current. The flying capacitors and the three inductors in the power stage 100 work together through a specific control strategy. As Figures 4 - 7 shown, when the duty cycle D varies within different ranges, the clock control signal V CLK1-10 output by the controller module 200 can adjust the conduction timing of the power transistor, so that the output voltage V OUT and the input voltage V IN maintain the relationship of V OUT =(D / 2)·V IN .

[0080] In the controller module 200, the current balance module 210 detects the voltages of the third voltage switching node V3 and the fifth voltage switching node V5, and outputs a voltage comparison signal V CAL ; the RAMP generation module 220 receives this comparison signal and generates three ramp signals V RAMP1 , V RAMP2 and V RAMP3 ; the error amplifier and compensation module 230 detects the output voltage V OUT and the reference voltage V REF to generate an error signal V EA ; the PWM generation module 240 and the non-overlapping clock module 250 generate the final control signal based on these signals.

[0081] Such a technical solution, through the combination of the flying capacitor bearing part of the voltage stress and the three inductors supplying power together, improves the efficiency under a large load current while reducing the voltage stress of the power device, reflecting the creativity of this application.

[0082] To make the objectives, technical solutions, and advantages of this application clearer, the following will further describe the implementation manners of this application in detail with reference to the accompanying drawings.

[0083] In the description of this application, for the sake of clearer and more concise article expression, some technical features are represented by English letter codes. It should be clear that for the technical features represented only by letter codes in this application, their meanings are exactly the same as those of the technical features represented by the corresponding Chinese names plus letter codes. For example, "V IN " and "input voltage V IN " refer to the same technical feature, "V OUT " and "output voltage V OUT " refer to the same technical feature, and other technical features represented by similar English letter codes are also equivalent to their corresponding technical features represented by Chinese names plus letter codes. When reading and understanding this application, please treat the technical features represented only by letter codes as equivalent to their corresponding technical features represented by Chinese names plus letter codes. Among them, the technical features involving English letter codes include but are not limited to:

[0084] Input voltage V IN ;

[0085] Output voltage V OUT ;

[0086] Reference voltage V REF ;

[0087] Voltage of the first voltage switching node V1; Voltage of the second voltage switching node V2; Voltage of the third voltage switching node V3; Voltage of the fourth voltage switching node V4; Voltage of the fifth voltage switching node V5; Voltage of the intermediate potential node VMID;

[0088] First flying capacitor C F1 ;

[0089] Second flying capacitor C F2 ;

[0090] First inductor L1;

[0091] Second inductor L2;

[0092] Third inductor L3;

[0093] Output capacitor C O ;

[0094] First switch S1;

[0095] Second switch S2;

[0096] Third switch S3;

[0097] Fourth switch S4;

[0098] The fifth switch S5;

[0099] The sixth switch S6;

[0100] The seventh switch S7;

[0101] The eighth switch S8;

[0102] The ninth switch S9;

[0103] The tenth switch S 10 ;

[0104] The drive signal V S1-10 ;

[0105] The clock control signal V CLK1-10 ;

[0106] The driver module input signal V LS1-10 ;

[0107] The voltage comparison signal V CAL ;

[0108] The first ramp signal V RAMP1 ;

[0109] The second ramp signal V RAMP2 ;

[0110] The third ramp signal V RAMP3 ;

[0111] The error signal V EA ;

[0112] The first PWM signal V PWM1 ;

[0113] The second PWM signal V PWM2 ;

[0114] The third PWM signal V PWM3 ;

[0115] The duty cycle D.

[0116] The first embodiment of the present application relates to a voltage-controlled low-voltage stress three-inductor buck converter, as Figure 1 shown, including:

[0117] The buck converter power stage 100 and the control, level conversion, and drive-related circuits cooperating therewith; wherein,

[0118] The buck converter power stage 100 includes a power switch circuit, a first flying capacitor C F1 , a second flying capacitor C F2, the first inductor L1, the second inductor L2, the third inductor L3, and the output capacitor C O , the power switch circuit includes the first switch S1 to the tenth switch S 10 , whose power input terminal is connected to the power supply voltage V IN , the reference ground terminal is grounded, the load terminal is connected to the load 500, the third voltage switching node output terminal V3 and the fifth voltage switching node output terminal V5 are connected to the control, level conversion, and driving related circuit, and the drive signal input terminal is connected to the drive signal output terminal of the control, level conversion, and driving related circuit;

[0119] The first flying capacitor C F1 is coupled between the first voltage switching node output terminal V1 and the third voltage switching node output terminal V3;

[0120] The second flying capacitor C F2 is coupled between the second voltage switching node output terminal V2 and the fourth voltage switching node output terminal V4;

[0121] The first inductor L1 is coupled between the third voltage switching node output terminal V3 and the load terminal;

[0122] The second inductor L2 is coupled between the fourth voltage switching node output terminal V4 and the load terminal;

[0123] The third inductor L3 is coupled between the fifth voltage switching node output terminal V5 and the load terminal;

[0124] The output capacitor C O is coupled between the load terminal and the reference ground;

[0125] wherein, the first flying capacitor C F1 and the second flying capacitor C F2 are used to bear part of the voltage stress to reduce the withstand voltage requirement of the switches in the power switch circuit; the first inductor L1, the second inductor L2, and the third inductor L3 are used to cooperate to provide current for the load 500 to improve the conversion efficiency under large load current.

[0126] The control, level conversion, and driving related circuit includes:

[0127] The controller module 200, which is used to receive the output voltage V of the buck converter power stage OUT , the third voltage switching node voltage V3, and the fifth voltage switching node voltage V5, and generate the clock control signal V REF by combining with the reference voltage V CLK1-10 ;

[0128] The level shifter module 300 is used to convert the clock control signal V output by the controller module CLK1-10 to an appropriate voltage domain and generate the input signal V of the driver module LS1-10 ;

[0129] The driver module 400 is used to convert the output signal V of the level shifter module LS1-10 into a drive signal V capable of driving the power transistor S1-10 and provide it to the buck converter power stage.

[0130] Optionally, in the power switch circuit of the buck converter power stage 100, the first switch S1 is coupled between the power input terminal and the output terminal V1 of the first voltage switching node; the second switch S2 is coupled between the power input terminal and the output terminal V2 of the second voltage switching node; the third switch S3 is coupled between the output terminal V1 of the first voltage switching node and the intermediate potential node VMID; the fourth switch S4 is coupled between the output terminal V2 of the second voltage switching node and the intermediate potential node VMID; the fifth switch S5 is coupled between the intermediate potential node VMID and the output terminal V3 of the third voltage switching node; the sixth switch S6 is coupled between the intermediate potential node VMID and the output terminal V4 of the fourth voltage switching node; the seventh switch S7 is coupled between the output terminal V3 of the third voltage switching node and the reference ground terminal; the eighth switch S8 is coupled between the output terminal V4 of the fourth voltage switching node and the reference ground terminal; the ninth switch S9 is coupled between the intermediate potential node VMID and the output terminal V5 of the fifth voltage switching node; the tenth switch S 10 is coupled between the output terminal V5 of the fifth voltage switching node and the reference ground terminal.

[0131] Optionally, in steady-state operation, the voltage across the first flying capacitor C F1 and the voltage across the second flying capacitor C F2 are maintained at half of the input voltage V IN .

[0132] Optionally, the controller module 200 includes:

[0133] The current balance module 210 is used to detect the voltages of the third voltage switching node V3 and the fifth voltage switching node V5 and output a voltage comparison signal V for participating in the ramp signal generation CAL ;

[0134] The RAMP generation module 220 is used to receive the comparison signal V output by the current balance module 210 CAL and generate a first ramp signal V RAMP1, the second ramp signal V RAMP2 and the third ramp signal V RAMP3 ;

[0135] The error amplifier and compensation module 230 is used to detect the output voltage V of the buck converter power stage 100 OUT and the reference voltage V REF , and generate an error signal V through an error amplifier and a compensation network EA ;

[0136] The PWM generation module 240 is used to receive the error signal V output by the error amplifier and compensation module 230 EA and the first ramp signal V output by the RAMP generation module 220 RAMP1 , the second ramp signal V RAMP2 and the third ramp signal V RAMP3 , and generate a first PWM signal V PWM1 , a second PWM signal V PWM2 and a third PWM signal V PWM3 ;

[0137] The non - overlapping clock module 250 is used to receive the first PWM signal V output by the PWM generation module 240 PWM1 , the second PWM signal V PWM2 and the third PWM signal V PWM3 and process them to generate a clock control signal V for controlling the turn - on and turn - off of the power transistor CLK1-10 .

[0138] Optionally, the level shifter module 300 includes a control signal input terminal and a signal output terminal. Among them, the control signal input terminal is connected to the clock control signal V output terminal of the controller module 200 CLK1-10 output terminal, and the signal output terminal is connected to the signal input terminal of the driver module 400, and is used to perform level conversion on the clock control signal to generate an input signal V of the driver module LS1-10 ;

[0139] The driver module 400 includes a signal input terminal and a drive signal output terminal. Among them, the signal input terminal is connected to the signal output terminal of the level shifter module 300, and the drive signal output terminal is connected to the drive signal V S1-10 input terminal of the buck converter power stage 100, and is used to convert the input signal into a drive signal with appropriate drive ability and provide it to the buck converter power stage.

[0140] Optionally, the working process of the buck converter power stage 100 includes the following:

[0141] When the duty cycle is less than 0.25,

[0142] In the first stage, the first switch S1, the fourth switch S4, the fifth switch S5, the eighth switch S8, and the tenth switch S 10 are closed, the second switch S2, the third switch S3, the sixth switch S6, the seventh switch S7, and the ninth switch S9 are open, and one ends of the second inductor L2 and the third inductor L3 are shorted to the ground;

[0143] After the first stage ends, it enters the second stage. The fourth switch S4, the seventh switch S7, the eighth switch S8, and the tenth switch S 10 are closed, the first switch S1, the second switch S2, the third switch S3, the fifth switch S5, the sixth switch S6, and the ninth switch S9 are open, and one ends of the first inductor L1, the second inductor L2, and the third inductor L3 are shorted to the ground;

[0144] After the second stage ends, it enters the third stage. The fourth switch S4, the seventh switch S7, the eighth switch S8, and the ninth switch S9 are closed, and the first switch S1, the second switch S2, the third switch S3, the fifth switch S5, the sixth switch S6, and the tenth switch S 10 are open, and one ends of the first inductor L1 and the second inductor L2 are shorted to the ground;

[0145] After the third stage ends, it enters the fourth stage. The seventh switch S7, the eighth switch S8, and the tenth switch S 10 are closed, the first switch S1, the second switch S2, the third switch S3, the fourth switch S4, the fifth switch S5, the sixth switch S6, and the ninth switch S9 are open, and one ends of the first inductor L1, the second inductor L2, and the third inductor L3 are shorted to the ground;

[0146] After the fourth stage ends, it enters the fifth stage. The second switch S2, the third switch S3, the sixth switch S6, the seventh switch S7, and the tenth switch S 10 are closed, the first switch S1, the fourth switch S4, the fifth switch S5, the eighth switch S8, and the ninth switch S9 are open, and one ends of the first inductor L1 and the third inductor L3 are shorted to the ground;

[0147] After the fifth stage ends, it enters the sixth stage. The third switch S3, the seventh switch S7, the eighth switch S8, and the tenth switch S 10 are closed, the first switch S1, the second switch S2, the fourth switch S4, the fifth switch S5, the sixth switch S6, and the ninth switch S9 are open, and one ends of the first inductor L1, the second inductor L2, and the third inductor L3 are shorted to the ground;

[0148] After the sixth stage, it enters the seventh stage. The third switch S3, the seventh switch S7, the eighth switch S8, and the ninth switch S9 are closed, and the first switch S1, the second switch S2, the fourth switch S4, the fifth switch S5, the sixth switch S6, and the tenth switch S 10 are opened, and one ends of the first inductor L1 and the second inductor L2 are shorted to the ground;

[0149] After the seventh stage, it enters the eighth stage. The seventh switch S7, the eighth switch S8, and the tenth switch S 10 are closed, and the first switch S1, the second switch S2, the third switch S3, the fourth switch S4, the fifth switch S5, the sixth switch S6, and the ninth switch S9 are opened. One ends of the first inductor L1, the second inductor L2, and the third inductor L3 are shorted to the ground;

[0150] After the eighth stage, it enters the first stage, and the behaviors of the switches and inductors cycle in this order.

[0151] Optionally, the buck converter power stage 100 includes the following working processes:

[0152] When the duty cycle is 0.25,

[0153] In the first stage, the first switch S1, the fourth switch S4, the fifth switch S5, the eighth switch S8, and the tenth switch S 10 are closed, the second switch S2, the third switch S3, the sixth switch S6, the seventh switch S7, and the ninth switch S9 are opened, and one ends of the second inductor L2 and the third inductor L3 are shorted to the ground;

[0154] After the first stage, it enters the second stage. The fourth switch S4, the seventh switch S7, the eighth switch S8, and the ninth switch S9 are closed, and the first switch S1, the second switch S2, the third switch S3, the fifth switch S5, the sixth switch S6, and the tenth switch S 10 are opened, and one ends of the first inductor L1 and the second inductor L2 are shorted to the ground;

[0155] After the second stage, it enters the third stage. The seventh switch S7, the eighth switch S8, and the tenth switch S 10 are closed, the first switch S1, the second switch S2, the third switch S3, the fourth switch S4, the fifth switch S5, the sixth switch S6, and the ninth switch S9 are opened, and one ends of the first inductor L1, the second inductor L2, and the third inductor L3 are shorted to the ground;

[0156] After the third stage, it enters the fourth stage. The second switch S2, the third switch S3, the sixth switch S6, the seventh switch S7, and the tenth switch S 10 are closed, the first switch S1, the fourth switch S4, the fifth switch S5, the eighth switch S8, and the ninth switch S9 are opened, and one ends of the first inductor L1 and the third inductor L3 are shorted to the ground;

[0157] After the fourth stage, it enters the fifth stage. The third switch S3, the seventh switch S7, the eighth switch S8, and the ninth switch S9 are closed, and the first switch S1, the second switch S2, the fourth switch S4, the fifth switch S5, the sixth switch S6, and the tenth switch S 10 are opened, and one ends of the first inductor L1 and the second inductor L2 are shorted to the ground;

[0158] After the fifth stage, it enters the sixth stage. The seventh switch S7, the eighth switch S8, and the tenth switch S 10 are closed, and the first switch S1, the second switch S2, the third switch S3, the fourth switch S4, the fifth switch S5, the sixth switch S6, and the ninth switch S9 are opened. One ends of the first inductor L1, the second inductor L2, and the third inductor L3 are shorted to the ground;

[0159] After the sixth stage, it enters the first stage, and the behavior of the switches and inductors cycles in this order.

[0160] Optionally, the buck converter power stage 100 includes the following working process:

[0161] When the duty cycle is greater than 0.25 and less than 0.5,

[0162] In the first stage, the first switch S1, the fourth switch S4, the fifth switch S5, the eighth switch S8, and the tenth switch S 10 are closed, the second switch S2, the third switch S3, the sixth switch S6, the seventh switch S7, and the ninth switch S9 are opened, and one ends of the second inductor L2 and the third inductor L3 are shorted to the ground;

[0163] After the first stage, it enters the second stage. The first switch S1, the fourth switch S4, the fifth switch S5, the eighth switch S8, and the ninth switch S9 are closed, and the second switch S2, the third switch S3, the sixth switch S6, the seventh switch S7, and the tenth switch S 10 are opened, and one end of the second inductor L2 is shorted to the ground;

[0164] After the second stage, it enters the third stage. The fourth switch S4, the seventh switch S7, the eighth switch S8, and the ninth switch S9 are closed, and the first switch S1, the second switch S2, the third switch S3, the fifth switch S5, the sixth switch S6, and the tenth switch S 10 are opened, and one ends of the first inductor L1 and the second inductor L2 are shorted to the ground;

[0165] After the third stage, it enters the fourth stage. The seventh switch S7, the eighth switch S8, and the tenth switch S 10Closed, the first switch S1, the second switch S2, the third switch S3, the fourth switch S4, the fifth switch S5, the sixth switch S6, and the ninth switch S9 are opened, and one ends of the first inductor L1, the second inductor L2, and the third inductor L3 are shorted to the ground;

[0166] After the fourth stage ends, it enters the fifth stage, and the second switch S2, the third switch S3, the sixth switch S6, the seventh switch S7, and the tenth switch S 10 Closed, the first switch S1, the fourth switch S4, the fifth switch S5, the eighth switch S8, and the ninth switch S9 are opened, and one ends of the first inductor L1 and the third inductor L3 are shorted to the ground;

[0167] After the fifth stage ends, it enters the sixth stage, and the second switch S2, the third switch S3, the sixth switch S6, the seventh switch S7, and the ninth switch S9 are closed, and the first switch S1, the fourth switch S4, the fifth switch S5, the eighth switch S8, and the tenth switch S 10 Opened, and one end of the first inductor L1 is shorted to the ground;

[0168] After the sixth stage ends, it enters the seventh stage, and the third switch S3, the seventh switch S7, the eighth switch S8, and the ninth switch S9 are closed, and the first switch S1, the second switch S2, the fourth switch S4, the fifth switch S5, the sixth switch S6, and the tenth switch S 10 Opened, and one ends of the first inductor L1 and the second inductor L2 are shorted to the ground;

[0169] After the seventh stage ends, it enters the eighth stage, and the seventh switch S7, the eighth switch S8, and the tenth switch S 10 Closed, the first switch S1, the second switch S2, the third switch S3, the fourth switch S4, the fifth switch S5, the sixth switch S6, and the ninth switch S9 are opened, and one ends of the first inductor L1, the second inductor L2, and the third inductor L3 are shorted to the ground;

[0170] After the eighth stage ends, it enters the first stage, and the behaviors of the switches and inductors cycle in this order.

[0171] Optionally, the output voltage V of the buck converter OUT has the following relationship with the input voltage V IN :

[0172] V OUT = D / 2 · V IN , where D is the ratio of the conduction time of the first switch S1 in one cycle to the cycle, that is, the duty cycle.

[0173] Optionally, the inductance values of the first inductor L1 and the second inductor L2 are the same, and the inductance value of the third inductor L3 is half of the inductance value of the first inductor L1.

[0174] To make the technical solution of the present invention clearer, the preferred embodiments of the present invention will now be described in detail. However, it should be understood that the described embodiments are exemplary only and not restrictive. Figures 1 - 8 The preferred embodiments of the present invention are described in detail below, but it should be understood that the described embodiments are exemplary only and not restrictive.

[0175] Figure 1 FIG. 6 shows the overall architecture of the voltage-controlled low-voltage stress three-inductor buck converter of the present invention. As described above, the converter includes a buck converter power stage 100, a controller module 200, a level shifter module 300, and a driver module 400.

[0176] The power input terminal of the buck converter power stage 100 is connected to the power supply voltage V IN , the reference ground terminal is grounded, the load terminal is connected to the load 500, the third voltage switching node output terminal and the fifth voltage switching node output terminal are respectively connected to the corresponding input terminals of the controller module 200, and the drive signal input terminal is connected to the drive signal output terminal of the driver module 400. As shown in the figure, the buck converter power stage 100 internally includes a buck converter switch circuit, three inductors L1, L2, and L3, two flying capacitors C F1 and C F2 , and an output capacitor C O . The inductor L1 is coupled between the third voltage switching node V3 and the load terminal, the inductor L2 is coupled between the fourth voltage switching node V4 and the load terminal, and the inductor L3 is coupled between the fifth voltage switching node V5 and the load terminal, jointly providing current for the load. The output capacitor C O is coupled between the load terminal and the reference ground to smooth the ripple of the output voltage V OUT and improve the stability of the output voltage.

[0177] The controller module 200 receives the output voltage V OUT of the buck converter power stage 100, the third voltage switching node voltage V3, and the fifth voltage switching node voltage V5, combines with the reference voltage V REF to generate a clock control signal V CLK1-10 , and outputs it to the level shifter module 300.

[0178] The level shifter module 300 converts the clock control signal V CLK1-10 output by the controller module 200 to a suitable voltage domain to generate an input signal V LS1-10 for the driver module 400.

[0179] The driver module 400 converts the output signal V LS1-10 of the level shifter module 300 into a drive signal V S1-10 capable of driving the power transistor, and provides it to the buck converter power stage 100.

[0180] When the entire system is operating, the buck converter power stage 100, under the control of the drive signal V S1-10 , generates the output voltage V IN based on the input voltage V F1 through the power transistors, flying capacitors C F2 and C OUT , as well as inductors L1, L2, and L3. The flying capacitors C F1 and C F2 bear part of the voltage stress, thereby reducing the breakdown voltage of the power transistors and allowing the use of power transistors with low voltage stress at high supply voltages. The three inductors L1, L2, and L3 cooperate to provide current to the load 500, which helps improve the efficiency at high load currents.

[0181] Figure 2 FIG. shows a schematic diagram of the controller module 200 of the buck converter disclosed in the present application. As Figure 2 shown, the controller module 200 includes a current balance module 210, a RAMP generation module 220, an error amplifier and compensation module 230, a PWM generation module 240, and a non-overlapping clock module 250.

[0182] The input terminal of the current balance module 210 receives the third voltage switching node voltage V3 and the fifth voltage switching node voltage V5. By detecting the voltages of these two nodes, the magnitude relationship of the currents in the inductors L1 and L3 is obtained, and a comparison signal V CAL is output. This comparison signal V CAL is connected to the input terminal of the RAMP generation module 220.

[0183] The RAMP generation module 220 receives the comparison signal V CAL output by the current balance module 210 and generates a first ramp signal V RAMP1 , a second ramp signal V RAMP2 , and a third ramp signal V RAMP3 . These three ramp signals are respectively connected to the corresponding input terminals of the PWM generation module 240.

[0184] The input terminal of the error amplifier and compensation module 230 receives the output voltage V OUT fed back by the buck converter power stage 100 and the reference voltage V REF . An error signal V EA is generated through the error amplifier and the compensation network, and this signal is connected to the error signal input terminal of the PWM generation module 240.

[0185] The PWM generation module 240 receives the error signal V EA output by the error amplifier and compensation module 230 and compares it with the first ramp signal VRAMP1 and the second ramp signal V RAMP2 are compared with the third ramp signal V RAMP3 . After logical processing, the PWM generation module 240 generates the first PWM signal V PWM1 , the second PWM signal V PWM2 and the third PWM signal V PWM3 , and these three signals are connected to the corresponding input terminals of the non-overlapping clock module 250.

[0186] The non-overlapping clock module 250 receives the first PWM signal V PWM1 , the second PWM signal V PWM2 and the third PWM signal V PWM3 output by the PWM generation module 240 and processes them to generate clock control signals V CLK1-10 for controlling the turning on and off of the power transistors, and these control signals will be output to the level shifter module 300.

[0187] This structural design of the controller module can effectively coordinate the working states of the three inductors, ensure that the power transistors are turned on or off at the appropriate timing, and at the same time ensure that the flying capacitors correctly bear part of the voltage stress, so as to achieve an efficient voltage conversion function.

[0188] Figure 3 shows a schematic structural diagram of the buck converter power stage 100 and the load 500 disclosed in the present application. As Figure 3 shown, the power stage includes a power switch circuit, two flying capacitors C F1 and C F2 , three inductors L1, L2 and L3, and an output capacitor C O .

[0189] The power switch circuit consists of ten switches S1 to S 10 . The first switch S1 is coupled between the power input terminal V IN and the output terminal V1 of the first voltage switching node, and receives a drive signal VS1 to control its switching state. The second switch S2 is coupled between the power input terminal V INBetween the second voltage switching node output terminal V2, it is controlled by receiving the driving signal VS2. The third switch S3 is coupled between the first voltage switching node output terminal V1 and the intermediate potential node VMID, and is controlled by receiving the driving signal VS3. The fourth switch S4 is coupled between the second voltage switching node output terminal V2 and the intermediate potential node VMID, and is controlled by receiving the driving signal VS4. The fifth switch S5 is coupled between the intermediate potential node VMID and the third voltage switching node output terminal V3, and is controlled by receiving the driving signal VS5. The sixth switch S6 is coupled between the intermediate potential node VMID and the fourth voltage switching node output terminal V4, and is controlled by receiving the driving signal VS6. The seventh switch S7 is coupled between the third voltage switching node output terminal V3 and the reference ground terminal, and is controlled by receiving the driving signal VS7. The eighth switch S8 is coupled between the fourth voltage switching node output terminal V4 and the reference ground terminal, and is controlled by receiving the driving signal VS8. The ninth switch S9 is coupled between the intermediate potential node VMID and the fifth voltage switching node output terminal V5, and is controlled by receiving the driving signal VS9. The tenth switch S 10 is coupled between the fifth voltage switching node output terminal V5 and the reference ground terminal, and receives the driving signal VS 10 control.

[0190] The first flying capacitor C F1 is coupled between the first voltage switching node output terminal V1 and the third voltage switching node output terminal V3. The second flying capacitor C F2 is coupled between the second voltage switching node output terminal V2 and the fourth voltage switching node output terminal V4. These two flying capacitors are used to bear part of the voltage stress and reduce the withstand voltage requirement of the power switch.

[0191] The first inductor L1 is coupled between the third voltage switching node output terminal V3 and the load terminal. The second inductor L2 is coupled between the fourth voltage switching node output terminal V4 and the load terminal. The third inductor L3 is coupled between the fifth voltage switching node output terminal V5 and the load terminal. These three inductors cooperate to provide current for the load 500 and improve the conversion efficiency under large load current.

[0192] The output capacitor C O is coupled between the load terminal and the reference ground terminal, and is used to smooth the ripple of the output voltage and improve the stability of the output voltage.

[0193] Under steady-state operation, the voltage across the first flying capacitor C F1 and the voltage across the second flying capacitor C F2 are maintained at half of the input voltage V IN , thus effectively reducing the withstand voltage requirement of the power switch, allowing the use of low-voltage stress power devices under high input voltage conditions, and improving the system performance.

[0194] Figure 4 The switching state diagram and inductor current schematic diagram of a buck converter according to an embodiment of the present application when the duty cycle is less than 0.25 are shown. This diagram shows the on / off states of each switch and the current changes of three inductors during a complete working cycle from the time dimension.

[0195] As Figure 4 shown, the switching state part (above the figure) shows the switching states of S1 to S 10 each switch within a period T. Among them, the horizontal axis represents time t, and the vertical axis "State" represents the switch state. A high level indicates that the switch is on (ON), and a low level indicates that the switch is off (OFF). As can be seen from the figure, S1 / S5 means that the first switch and the fifth switch have the same conduction mode, and the ratio of the conduction time to a period is defined as the duty cycle D. Similarly, S2 / S6 means that the second switch and the sixth switch also have the same conduction mode, but their conduction moments are staggered from S1 / S5. The on / off timings of other switches S3, S4, S7, S8, S9 and S 10 are also clearly shown in the figure, and they switch states in a specific order to ensure the normal operation of the converter.

[0196] The inductor current part (below the figure) shows the current change curves of three inductors L1, L2 and L3. Among them, IL1 represents the current in the first inductor L1, IL2 represents the current in the second inductor L2, and IL3 represents the current in the third inductor L3. It can be observed from the figure that:

[0197] The current of inductor L1 rises during the conduction of S1 / S5 and drops during the off period, showing a sawtooth wave pattern.

[0198] The current of inductor L2 rises during the conduction of S2 / S6 and drops during the off period, and its waveform has a phase difference from the current waveform of L1.

[0199] The current frequency of inductor L3 is twice the current frequencies of L1 and L2, rises during the conduction of S9, and drops during the off period of S9.

[0200] This specific switching timing and inductor current mode enable the converter to effectively utilize the flying capacitor to bear part of the voltage stress when the duty cycle is less than 0.25, and at the same time, the three inductors cooperate to provide current for the load to achieve efficient voltage conversion. The vertical dotted lines in the figure divide the entire period into multiple stages, corresponding to different working stages described in the claims, and each stage has a specific combination of switch states.

[0201] Figure 5Shows a schematic diagram of the working process of a buck converter according to an embodiment of the present application when the duty cycle is less than 0.25. This figure intuitively shows the switch states and current paths in each stage during a complete working cycle through eight consecutive circuit state diagrams.

[0202] As Figure 5 shown, the entire working process is divided into eight stages, and each stage is connected in sequence by arrows to form a cycle. In the circuit state diagram of each stage, the input voltage V IN , output voltage V OUT , the switch states of each switch (S1 to S 10 ), the positions of two flying capacitors (C F1 and C F2 ), and the connection conditions of three inductors (L1, L2, and L3) are clearly marked.

[0203] In the first stage (the upper left corner of the figure), the first switch S1, the fourth switch S4, the fifth switch S5, the eighth switch S8, and the tenth switch S 10 are in the conducting state, and the other switches are off. In this state, the flying capacitor C F1 is charged, while C F2 discharges, the current in inductor L1 rises, and the currents in inductors L2 and L3 decrease.

[0204] As the system enters the second stage (below the first stage), the switch states change: the fourth switch S4, the seventh switch S7, the eighth switch S8, and the tenth switch S 10 are conducting, and the other switches are off. At this time, one end of inductors L1, L2, and L3 is shorted to ground, and their currents are all decreasing.

[0205] In the third stage (below the second stage), the fourth switch S4, the seventh switch S7, the eighth switch S8, and the ninth switch S9 are conducting, and the other switches are off. At this time, the flying capacitor C F2 discharges, the current in inductor L3 rises, while the currents in inductors L1 and L2 decrease.

[0206] In the fourth stage (below the third stage), the seventh switch S7, the eighth switch S8, and the tenth switch S 10 are conducting, and the other switches are off. At this time, one end of all inductors is shorted to ground, and their currents are all decreasing.

[0207] In the fifth stage (to the right of the fourth stage), the second switch S2, the third switch S3, the sixth switch S6, the seventh switch S7, and the tenth switch S 10 are conducting, and the other switches are off. At this time, the flying capacitor C F1 discharges, C F2It is charged, the current in inductor L2 rises, while the currents in inductors L1 and L3 fall.

[0208] In the sixth to eighth stages, the switching states are changed similarly in sequence to complete a full operating cycle, and then return to the first stage to start the cycle again. Through this series of carefully designed switching sequences, the system can effectively control the charging and discharging process of the flying capacitor and the current paths of the three inductors to achieve efficient voltage conversion.

[0209] During the entire operating process, the flying capacitors C F1 and C F2 bear part of the voltage stress, effectively reducing the voltage withstand requirement of the power switch; at the same time, the three inductors L1, L2, and L3 cooperate to provide current for the load, improving the conversion efficiency under large load currents.

[0210] Figure 6 shows the switching state diagram and the inductor current schematic diagram of the buck converter according to an embodiment of the present application when the duty cycle is greater than 0.25 and less than 0.5. This figure is similar to Figure 4 but shows the operating states under different duty cycle conditions.

[0211] As Figure 6 shown, the switching state part (above the figure) shows the switching states of each switch from S1 to S 10 within one period T. The horizontal axis represents time t, and the vertical axis "State" represents the switching state. The high level indicates that the switch is on (ON), and the low level indicates that the switch is off (OFF). S1 / S5 means that the first switch and the fifth switch have the same conduction mode, and the ratio of their conduction time to one period (duty cycle D) is greater than 0.25 and less than 0.5. S2 / S6 means that the second switch and the sixth switch also have the same conduction mode, but their conduction moments are staggered from S1 / S5.

[0212] Compared with Figure 4 , Figure 6 the conduction time of S1 / S5 in 10 is significantly increased, which reflects the characteristic of the increasing duty cycle. In addition, the conduction / turn-off timings of the other switches S3, S4, S7, S8, S9, and S

[0213] The inductor current part (below the figure) shows the current change curves of the three inductors L1, L2, and L3. Among them, IL1 represents the current in the first inductor L1, IL2 represents the current in the second inductor L2, and IL3 represents the current in the third inductor L3. Similar to Figure 4 , the currents of the three inductors all show a sawtooth wave form, but due to the increase in the duty cycle, the characteristics of the current waveform also change accordingly:

[0214] The current of inductor L1 has an increased rising amplitude during the conduction of S1 / S5 due to the extended conduction time.

[0215] The current of inductor L2 rises during the conduction of S2 / S6, and the rising amplitude also varies with the increase of the duty cycle.

[0216] The changing frequency of the current of inductor L3 is still twice that of the currents of L1 and L2. It rises during the conduction of S9 and falls during the turn-off of S9.

[0217] The vertical dashed lines in the figure divide the entire period into multiple stages, corresponding to the different operating stages described in the claims. When the duty cycle is greater than 0.25 and less than 0.5, through this specific switching timing and inductor current mode, the converter can still effectively utilize the flying capacitor to bear part of the voltage stress. At the same time, the three inductors cooperate to provide current for the load, achieving efficient voltage conversion, and the ratio of the output voltage to the input voltage can reach a larger value.

[0218] Figure 7 The schematic diagram shows the working process of a buck converter according to an embodiment of the present application when the duty cycle is greater than 0.25 and less than 0.5. Similar to Figure 5 Similar, Figure 7 The switching states and current paths of each stage in a complete operating cycle are intuitively shown through eight consecutive circuit state diagrams, but corresponding to different duty cycle conditions.

[0219] As Figure 7 shown, the entire working process is also divided into eight stages. Each stage is connected in sequence by arrows to form a cycle. In the circuit state diagram of each stage, the input voltage V IN , output voltage V OUT , the switching states of each switch (S1 to S 10 ), the positions of the two flying capacitors (C F1 and C F2 ), and the connection conditions of the three inductors (L1, L2, and L3) are clearly marked.

[0220] In the first stage (the upper left corner of the figure), the first switch S1, the fourth switch S4, the fifth switch S5, the eighth switch S8, and the tenth switch S 10 are in the conduction state, and the other switches are off. In this state, the flying capacitor C F1 is charged, while C F2 discharges, the current in inductor L1 rises, and the currents in inductors L2 and L3 fall.

[0221] Different from Figure 5 the second stage of Figure 7In the second stage (below the first stage), the first switch S1, the fourth switch S4, the fifth switch S5, the eighth switch S8, and the ninth switch S9 are turned on, and the other switches are turned off. This change reflects the adjustment when the duty cycle increases. At this time, the currents in the inductors L1 and L3 increase, while the current in the inductor L2 decreases.

[0222] In the third stage (below the second stage), the fourth switch S4, the seventh switch S7, the eighth switch S8, and the ninth switch S9 are turned on, and the other switches are turned off. At this time, the flying capacitor C F2 discharges, the current in the inductor L3 increases, while the currents in the inductors L1 and L2 decrease.

[0223] In the fourth stage (below the third stage), the seventh switch S7, the eighth switch S8, and the tenth switch S 10 are turned on, and the other switches are turned off. At this time, one end of all the inductors is short-circuited to the ground, and their currents are all decreasing.

[0224] In the fifth stage (to the right of the fourth stage), the second switch S2, the third switch S3, the sixth switch S6, the seventh switch S7, and the tenth switch S 10 are turned on, and the other switches are turned off. At this time, the flying capacitor C F1 discharges, C F2 is charged, the current in the inductor L2 increases, while the currents in the inductors L1 and L3 decrease.

[0225] Figure 7 The sixth stage of also has significant differences compared with Figure 5 : The second switch S2, the third switch S3, the sixth switch S6, the seventh switch S7, and the ninth switch S9 are turned on, and the other switches are turned off. At this time, the currents in the inductors L2 and L3 increase, and the current in L1 decreases. This change also reflects the characteristics when the duty cycle increases.

[0226] The seventh and eighth stages change the switch states similarly in sequence to complete a full working cycle, and then return to the first stage to start a new cycle. Through this series of specific switch sequences for the case where the duty cycle is greater than 0.25 and less than 0.5, the system can more flexibly control the ratio of the output voltage to the input voltage, while maintaining the advantages that the flying capacitor effectively bears part of the voltage stress and the three inductors cooperate to provide current for the load.

[0227] Figure 8 shows the working flow chart of the buck converter according to an embodiment of the present application. The flow chart clearly presents the overall working process of the system and the signal transmission relationship between the functional modules in the form of a block diagram.

[0228] As Figure 8As shown, the entire workflow 600 includes multiple functional steps that are interconnected to form a closed-loop control system. First, step 610 represents the process of the power stage converting the input voltage into the output voltage. At the same time, step 620 is responsible for generating a comparison signal based on the voltage of the voltage switching node of the power stage. These two steps respectively transmit their output signals to the subsequent processing links.

[0229] Step 640 receives the comparison signal generated by step 620 and generates a ramp signal based on it. In parallel, step 630 receives the output voltage and the reference voltage and generates an error signal. These two signals are combined in step 650 to generate a pulse width modulation signal according to the error signal and the ramp signal.

[0230] Next, step 660 generates a non-overlapping clock control signal according to the pulse width modulation signal to ensure the safe switching of the power switch without short circuit. Step 670 converts the clock control signal into a control signal in a suitable voltage domain to meet the working requirements of the driver. Step 680 generates a drive signal capable of driving the power transistor according to the control signal.

[0231] Finally, step 690 controls the on and off of the power transistor according to the drive signal, determines the working state of the power stage, thereby affecting the output voltage, and completes the entire control loop. The arrows in the figure clearly indicate the signal flow direction, showing how each part of the system works together to achieve the precise voltage conversion function.

[0232] From Figure 8 the process, it can be seen that the buck converter of this application adopts an advanced closed-loop control strategy. Through the voltage information of the voltage switching node to assist in control and combined with the traditional feedback control based on the output voltage, it realizes the precise regulation of the cooperative work of the flying capacitor and the three inductors, thereby achieving the purpose of reducing the voltage stress of the power transistor and improving the efficiency under large load current.

[0233] Working principle:

[0234] Next, in conjunction with the drawings and embodiments, the working principle of the voltage-controlled low-voltage stress three-inductor buck converter will be described in detail.

[0235] The working principle of the power stage 100 of the buck converter is as follows:

[0236] Referring to Figure 3 , the power stage 100 includes ten power switches S1 - S 10 , two flying capacitors C F1 , C F2and three inductors L1, L2, and L3. Among them, the first switch S1 is coupled between the power input terminal and the output terminal of the first voltage switching node V1, and the second switch S2 is coupled between the power input terminal and the output terminal of the second voltage switching node V2. The third switch S3 and the fourth switch S4 are respectively coupled between V1, V2 and the intermediate potential node VMID. The fifth switch S5 and the sixth switch S6 are respectively coupled between VMID and the output terminal of the third voltage switching node V3, the output terminal of the fourth voltage switching node V4. The seventh switch S7 and the eighth switch S8 are respectively coupled between V3, V4 and the reference ground terminal. The ninth switch S9 is coupled between VMID and the output terminal of the fifth voltage switching node V5, and the tenth switch S 10 is coupled between V5 and the reference ground terminal. Each switch S1 - S 10 respectively receives drive signals VS1 - VS 10 to control its switching state.

[0237] In steady - state operation, the voltages across the first flying capacitor C F1 and the second flying capacitor C F2 are maintained at half of the input voltage V IN . When the power switches are operating, the first switch S1 and the second switch S2 conduct once in a cycle, and the conduction times are approximately equal. The ninth switch S9 conducts twice in a cycle, and each conduction time is about half of the conduction time of the first switch S1. Among them, the conduction times of the first switch S1 and the second switch S2 differ by half a cycle, and the conduction time of the ninth switch S9 and the first switch S1 differ by a quarter of a cycle.

[0238] When the duty cycle D is less than 0.25, as Figure 4 and Figure 5 shown, the system operates in an eight - stage cycle. In the first stage, S1, S4, S5, S8, S 10 conduct, and one end of the second inductor L2 and the third inductor L3 is short - circuited to the ground; in the second stage, S4, S7, S8, S 10 conduct, and one end of all three inductors is short - circuited to the ground; in the third stage, S4, S7, S8, S9 conduct, and one end of the first inductor L1 and the second inductor L2 is short - circuited to the ground; the fourth to eighth stages work in sequence according to the Figure 5 shown switch combinations, and finally return to the first stage to start a new cycle.

[0239] When the duty cycle D is equal to 0.25, the system completes one cycle through six working stages. In the first stage, the switch states are S1, S4, S5, S8, S 10 conduct, and then enter the other five stages, working according to a specific switch sequence.

[0240] When the duty cycle D is greater than 0.25 and less than 0.5, asFigure 6 and Figure 7 As shown, the system works in an eight-stage cycle. However, compared with when D < 0.25, there are significant differences in the switch combinations in the second stage and the sixth stage. In the second stage, S1, S4, S5, S8, and S9 are turned on. In the sixth stage, S2, S3, S6, S7, and S9 are turned on. These changes enable the system to adapt to the working requirements of a larger duty cycle.

[0241] By controlling the duty cycle D, the output voltage V of the system OUT and the input voltage V IN are related as follows: V OUT = (D / 2)·V IN .

[0242] The working principle of the controller module 200 is as follows:

[0243] Referring to Figure 2 , the controller module 200 includes a current balance module 210, a RAMP generation module 220, an error amplifier and compensation module 230, a PWM generation module 240, and a non-overlapping clock module 250. The current balance module 210 detects the voltages across V3 and V5 and outputs a voltage comparison signal V CAL . The RAMP generation module 220 generates three ramp signals V CAL , V RAMP1 , V RAMP2 , and V RAMP3 based on V OUT . The error amplifier and compensation module 230 compares the output voltage V REF with the reference voltage V EA and generates an error signal V EA . The PWM generation module 240 compares V PWM1 , V PWM2 , and V PWM3 with the three ramp signals and generates three PWM signals V CLK1-10 . The non-overlapping clock module 250 processes these PWM signals and generates a clock control signal V

[0244] The level shifter module 300 converts the control signal V CLK1-10 into a signal V LS1-10 in a suitable voltage domain. The driver module 400 further converts these signals into drive signals V S1-10 for driving the power switches.

[0245] Through the above working principle, the flying capacitors C F1 , C F2It undertakes part of the voltage stress, reducing the voltage withstand requirement of the power switch. The three inductors L1, L2, and L3 cooperate to provide current for the load, improving the efficiency under large load currents.

[0246] To better understand the technical solution of this application, a specific example is given below for illustration. The details listed in this example are mainly for easy understanding and do not limit the protection scope of this application.

[0247] In this example, a voltage-controlled low-voltage stress three-inductor buck converter is provided to meet the requirements of effectively reducing the voltage stress of power devices and improving the conversion efficiency under large load currents.

[0248] The voltage-controlled low-voltage stress three-inductor buck converter in this example includes:

[0249] A buck converter power stage for generating an output voltage based on an input voltage through a power transistor, two flying capacitors, and three inductors under the control of a drive signal.

[0250] A controller module for receiving the output voltage of the buck converter power stage and generating a clock control signal in combination with a reference voltage, a third voltage switching node voltage, and a fifth voltage switching node voltage.

[0251] A level shifter module for converting the clock control signal output by the controller module to a suitable voltage domain to generate an input signal for the driver module.

[0252] A driver module for converting the output signal of the level shifter module into a drive signal capable of driving the power transistor and providing it to the buck converter power stage.

[0253] In this example, optionally, the buck converter power stage includes:

[0254] A power input terminal, a reference ground terminal, a load terminal, a third voltage switching node output terminal, a fifth voltage switching node output terminal, and a drive signal input terminal. Among them, the power input terminal is connected to a power supply voltage, the reference ground terminal is grounded, the load terminal is connected to a load, the third voltage switching node output terminal and the fifth voltage switching node output terminal are connected to the third voltage switching node input terminal and the fifth voltage switching node input terminal of the controller module, and the drive signal input terminal is connected to the drive signal output terminal of the driver module.

[0255] Buck converter switching circuit, which is a set of power switches in a buck converter, including a power input terminal, a reference ground terminal, a load terminal, a first voltage switching node output terminal, a second voltage switching node output terminal, a third voltage switching node output terminal, a fourth voltage switching node output terminal, and a fifth voltage switching node output terminal;

[0256] A first flying capacitor, which is coupled between the first voltage switching node output terminal and the third voltage switching node output terminal;

[0257] A second flying capacitor, which is coupled between the second voltage switching node output terminal and the fourth voltage switching node output terminal;

[0258] A first inductor, which is coupled between the third voltage switching node output terminal and the load terminal;

[0259] A second inductor, which is coupled between the fourth voltage switching node output terminal and the load terminal;

[0260] A third inductor, which is coupled between the fifth voltage switching node output terminal and the load terminal;

[0261] An output capacitor, which is coupled between the load terminal and the reference ground terminal, and is used to smooth the ripple of the output voltage and improve the stability of the output voltage.

[0262] In this example, optionally, the buck converter switching circuit further includes:

[0263] A first switch, which is coupled between the power input terminal and the first voltage switching node output terminal;

[0264] A second switch, which is coupled between the power input terminal and the second voltage switching node output terminal;

[0265] A third switch, which is coupled between the first voltage switching node output terminal and an intermediate potential node;

[0266] A fourth switch, which is coupled between the second voltage switching node output terminal and the intermediate potential node;

[0267] A fifth switch, which is coupled between the intermediate potential node and the third voltage switching node output terminal;

[0268] A sixth switch, which is coupled between the intermediate potential node and the fourth voltage switching node output terminal;

[0269] A seventh switch, the seventh switch being coupled between the output terminal of the third voltage switching node and the reference ground terminal;

[0270] An eighth switch, the eighth switch being coupled between the output terminal of the fourth voltage switching node and the reference ground terminal;

[0271] A ninth switch, the ninth switch being coupled between the intermediate potential node and the output terminal of the fifth voltage switching node;

[0272] A tenth switch, the tenth switch being coupled between the output terminal of the fifth voltage switching node and the reference ground terminal.

[0273] In this example, optionally, the controller module includes:

[0274] An input terminal of the third voltage switching node, an input terminal of the fifth voltage switching node, a reference voltage input terminal, an output voltage input terminal, a clock control signal output terminal, wherein the input terminal of the third voltage switching node is connected to the output terminal of the third voltage switching node of the buck converter power stage, the input terminal of the fifth voltage switching node is connected to the output terminal of the fifth voltage switching node of the buck converter power stage, the reference voltage input terminal receives a reference voltage signal provided externally, the output voltage input terminal is connected to the load terminal, and the clock control signal output terminal is connected to the control signal input terminal of the level shifter;

[0275] A current balancing module for detecting the voltages of the third voltage switching node and the fifth voltage switching node and outputting a voltage comparison signal participating in ramp signal generation, including the input terminal of the third voltage switching node, the input terminal of the fifth voltage switching node, and a voltage comparison signal output terminal;

[0276] A RAMP generation module for receiving the comparison signal output by the current balancing module and generating a first ramp signal, a second ramp signal, and a third ramp signal, including a voltage comparison signal input terminal, a first ramp signal output terminal, a second ramp signal output terminal, and a third ramp signal output terminal, wherein the voltage comparison signal input terminal is connected to the voltage comparison signal output terminal;

[0277] An error amplifier and compensation module for detecting the output voltage of the buck converter power stage and the reference voltage and generating an error signal through an error amplifier and a compensation network, including the reference voltage input terminal, the output voltage input terminal, and an error signal output terminal;

[0278] The PWM generation module is used to receive the error signal output by the error amplifier and compensation module, and the first ramp signal, the second ramp signal, and the third ramp signal output by the RAMP generation module, and generate a first PWM signal, a second PWM signal, and a third PWM signal. It includes an error signal input terminal, a first ramp signal input terminal, a second ramp signal input terminal, a third ramp signal input terminal, a first PWM signal output terminal, a second PWM signal output terminal, and a third PWM signal output terminal. Among them, the error signal input terminal is connected to the error signal output terminal, the first ramp signal input terminal is connected to the first ramp signal output terminal, the second ramp signal input terminal is connected to the second ramp signal output terminal, and the second ramp signal input terminal is connected to the second ramp signal output terminal;

[0279] The non-overlapping clock module is used to receive the first PWM signal, the second PWM signal, and the third PWM signal output by the PWM generation module and process them to generate a clock control signal for controlling the opening and closing of the power tube. It includes a first PWM signal input terminal, a second PWM signal input terminal, a third PWM signal input terminal, and a clock control signal output terminal. Among them, the first PWM signal input terminal is connected to the first PWM signal output terminal, the second PWM signal input terminal is connected to the second PWM signal output terminal, and the second PWM signal input terminal is connected to the second PWM signal output terminal.

[0280] In this example, optionally, the level shifter module includes a control signal input terminal and a signal output terminal. The control signal input terminal is connected to the clock control signal output terminal of the controller module, and the signal output terminal is connected to the signal input terminal of the driver module;

[0281] The driver module includes a signal input terminal and a drive signal output terminal. The signal input terminal is connected to the signal output terminal of the level shifter, and the drive signal output terminal is connected to the drive signal input terminal of the buck converter power stage.

[0282] In this example, optionally, under steady-state operation, the voltages across the first flying capacitor and the second flying capacitor are maintained at one-half of the input voltage.

[0283] In this example, optionally, it includes the following working process:

[0284] When the duty cycle is less than 0.25,

[0285] In the first stage, the first switch, the fourth switch, the fifth switch, the eighth switch, and the tenth switch are closed, the second switch, the third switch, the sixth switch, the seventh switch, and the ninth switch are open, and one end of the second inductor and the third inductor is shorted to ground;

[0286] After the first stage ends, the second stage begins. The fourth, seventh, eighth, and tenth switches close, while the first, second, third, fifth, sixth, and ninth switches open. One end of the first inductor, the second inductor, and the third inductor is shorted to ground.

[0287] After the second stage ends, the third stage begins. The fourth, seventh, eighth, and ninth switches close, while the first, second, third, fifth, sixth, and tenth switches open. One end of the first inductor and the second inductor is shorted to ground.

[0288] After the third stage ends, the fourth stage begins. The seventh, eighth, and tenth switches close, while the first, second, third, fourth, fifth, sixth, and ninth switches open. One end of the first inductor, the second inductor, and the third inductor is shorted to ground.

[0289] After the fourth stage ends, the fifth stage begins. The second, third, sixth, seventh, and tenth switches close, while the first, fourth, fifth, eighth, and ninth switches open. One end of the first inductor and the third inductor is shorted to ground.

[0290] After the fifth stage ends, the sixth stage begins. The third, seventh, eighth, and tenth switches close, while the first, second, fourth, fifth, sixth, and ninth switches open. One end of the first inductor, the second inductor, and the third inductor is shorted to ground.

[0291] After the sixth stage ends, the seventh stage begins. The third, seventh, eighth, and ninth switches close, while the first, second, fourth, fifth, sixth, and tenth switches open. One end of the first inductor and the second inductor is shorted to ground.

[0292] After the seventh stage ends, the eighth stage begins. The seventh, eighth, and tenth switches close, while the first, second, third, fourth, fifth, sixth, and ninth switches open. One end of the first inductor, the second inductor, and the third inductor is shorted to ground.

[0293] After the eighth stage ends, the first stage begins again. The behavior of the switches and inductors cycles in this order.

[0294] In this example, optionally, the following working process is included:

[0295] When the duty cycle is 0.25,

[0296] In the first stage, the first switch, the fourth switch, the fifth switch, the eighth switch, and the tenth switch are closed, the second switch, the third switch, the sixth switch, the seventh switch, and the ninth switch are open, and one end of the second inductor and the third inductor is shorted to ground;

[0297] After the first stage, the second stage begins. The fourth switch, the seventh switch, the eighth switch, and the ninth switch are closed, the first switch, the second switch, the third switch, the fifth switch, the sixth switch, and the tenth switch are open, and one end of the first inductor and the second inductor is shorted to ground;

[0298] After the second stage, the third stage begins. The seventh switch, the eighth switch, and the tenth switch are closed, the first switch, the second switch, the third switch, the fourth switch, the fifth switch, the sixth switch, and the ninth switch are open, and one end of the first inductor, the second inductor, and the third inductor is shorted to ground;

[0299] After the third stage, the fourth stage begins. The second switch, the third switch, the sixth switch, the seventh switch, and the tenth switch are closed, the first switch, the fourth switch, the fifth switch, the eighth switch, and the ninth switch are open, and one end of the first inductor and the third inductor is shorted to ground;

[0300] After the fourth stage, the fifth stage begins. The third switch, the seventh switch, the eighth switch, and the ninth switch are closed, the first switch, the second switch, the fourth switch, the fifth switch, the sixth switch, and the tenth switch are open, and one end of the first inductor and the second inductor is shorted to ground;

[0301] After the fifth stage, the sixth stage begins. The seventh switch, the eighth switch, and the tenth switch are closed, the first switch, the second switch, the third switch, the fourth switch, the fifth switch, the sixth switch, and the ninth switch are open, and one end of the first inductor, the second inductor, and the third inductor is shorted to ground;

[0302] After the sixth stage, the first stage begins again, and the behavior of the switches and inductors cycles in this order.

[0303] Optionally, in this example, the following working process is included:

[0304] When the duty cycle is greater than 0.25 and less than 0.5,

[0305] In the first stage, the first switch, the fourth switch, the fifth switch, the eighth switch, and the tenth switch are closed, the second switch, the third switch, the sixth switch, the seventh switch, and the ninth switch are open, and one end of the second inductor and the third inductor is shorted to ground;

[0306] After the first stage ends, the second stage begins. The first switch, the fourth switch, the fifth switch, the eighth switch, and the ninth switch are closed, the second switch, the third switch, the sixth switch, the seventh switch, and the tenth switch are open, and one end of the second inductor is shorted to the ground;

[0307] After the second stage ends, the third stage begins. The fourth switch, the seventh switch, the eighth switch, and the ninth switch are closed, the first switch, the second switch, the third switch, the fifth switch, the sixth switch, and the tenth switch are open, and one ends of the first inductor and the second inductor are shorted to the ground;

[0308] After the third stage ends, the fourth stage begins. The seventh switch, the eighth switch, and the tenth switch are closed, the first switch, the second switch, the third switch, the fourth switch, the fifth switch, the sixth switch, and the ninth switch are open, and one ends of the first inductor, the second inductor, and the third inductor are shorted to the ground;

[0309] After the fourth stage ends, the fifth stage begins. The second switch, the third switch, the sixth switch, the seventh switch, and the tenth switch are closed, the first switch, the fourth switch, the fifth switch, the eighth switch, and the ninth switch are open, and one ends of the first inductor and the third inductor are shorted to the ground;

[0310] After the fifth stage ends, the sixth stage begins. The second switch, the third switch, the sixth switch, the seventh switch, and the ninth switch are closed, the first switch, the fourth switch, the fifth switch, the eighth switch, and the tenth switch are open, and one end of the first inductor is shorted to the ground;

[0311] After the sixth stage ends, the seventh stage begins. The third switch, the seventh switch, the eighth switch, and the ninth switch are closed, the first switch, the second switch, the fourth switch, the fifth switch, the sixth switch, and the tenth switch are open, and one ends of the first inductor and the second inductor are shorted to the ground;

[0312] After the seventh stage ends, the eighth stage begins. The seventh switch, the eighth switch, and the tenth switch are closed, the first switch, the second switch, the third switch, the fourth switch, the fifth switch, the sixth switch, and the ninth switch are open, and one ends of the first inductor, the second inductor, and the third inductor are shorted to the ground;

[0313] After the eighth stage ends, the first stage begins. The behaviors of the switches and inductors cycle in this order.

[0314] It should be noted that in the above example, by inserting flying capacitors in the power stage to bear part of the voltage stress, the breakdown voltage of the power transistors is reduced, allowing low-voltage-stress power transistors to be directly used under high supply voltages to achieve buck conversion and improve system performance; using three inductors to provide current to the load helps improve the efficiency under large load currents, achieving more efficient energy transfer and smoother output voltage.

[0315] The following further elaborates on this example in conjunction with the accompanying drawings.

[0316] As Figure 1 shown, the voltage-controlled low-voltage stress three-inductor buck converter of this example includes a buck converter power stage 100, a controller module 200, a level shifter module 300, and a driver module 400; the power input terminal of the buck converter power stage 100 is connected to the power supply voltage, the reference ground terminal is grounded, the load terminal is connected to the load 500, the third voltage switching node output terminal and the fifth voltage switching node output terminal are connected to the third voltage switching node input terminal and the fifth voltage switching node input terminal of the controller module 200, and the drive signal input terminal is connected to the drive signal output terminal of the driver module 400; the third voltage switching node input terminal of the controller module 200 is connected to the third voltage switching node output terminal of the buck converter power stage 100, the fifth voltage switching node input terminal is connected to the fifth voltage switching node output terminal of the buck converter power stage 100, the reference voltage input terminal receives the reference voltage signal provided by the outside, the output voltage input terminal is connected to the load terminal, and the clock control signal output terminal is connected to the control signal input terminal of the level shifter 300; the control signal input terminal of the level shifter module 300 is connected to the clock control signal output terminal of the controller module 200, and the signal output terminal is connected to the signal input terminal of the driver module 400; the signal input terminal of the driver module 400 is connected to the signal output terminal of the level shifter 300, and the drive signal output terminal is connected to the drive signal input terminal of the buck converter power stage 100.

[0317] The controller module 200 receives the output voltage V OUT of the buck converter power stage 100, the node voltages V3 and V5, and the reference voltage V REF , and generates a clock control signal V CLK1-10 carrying the power switch operating state information; the level shifter module 300 converts the clock control signal V CLK1-10 output by the controller module 200 to a suitable voltage domain to generate an input signal V LS1-10 for the driver module; the driver module 400 converts the output signal V LS1-10 of the level shifter module 300 into a drive signal V S1-10 capable of driving the power transistor and provides it to the buck converter power stage 100; the buck converter power stage 100 generates an output voltage V IN based on the input power supply voltage V F1 through the power transistor, the flying capacitors C F2 and C OUT and the inductors L1, L2, and L3; the output voltage V OUTIt will feedback to the controller module 200 to adjust the working state of the power tube, so as to keep the output voltage value at the target potential.

[0318] In this example, the structure of the controller module 200 of the buck converter is as Figure 2 shown, including a current balance module 210, a RAMP generation module 220, an error amplifier and compensation module 230, a PWM generation module 240, and a non-overlapping clock module 250; the voltage comparison signal output terminal of the current balance module 210 is connected to the voltage comparison signal input terminal of the RAMP generation module 220; the voltage comparison signal input terminal of the RAMP generation module 220 is connected to the voltage comparison signal output terminal of the current balance module 210, and the first ramp signal output terminal, the second ramp signal output terminal, and the third ramp signal output terminal are respectively connected to the first ramp signal input terminal, the second ramp signal input terminal, and the third ramp signal input terminal of the PWM generation module 240; the error signal output terminal of the error amplifier and compensation module 230 is connected to the error signal input terminal of the PWM generation module 240; the error signal input terminal of the PWM generation module 240 is connected to the error signal output terminal of the error amplifier and compensation module 230, the first ramp signal input terminal, the second ramp signal input terminal, and the third ramp signal input terminal are respectively connected to the first ramp signal output terminal, the second ramp signal output terminal, and the third ramp signal output terminal of the RAMP generation module 220, and the first PWM signal output terminal, the second PWM signal output terminal, and the third PWM signal output terminal are respectively connected to the first PWM signal input terminal, the second PWM signal input terminal, and the third PWM signal input terminal of the non-overlapping clock module 250; the first PWM signal input terminal, the second PWM signal input terminal, and the third PWM signal input terminal of the non-overlapping clock module 250 are respectively connected to the first PWM signal output terminal, the second PWM signal output terminal, and the third PWM signal output terminal of the PWM generation module 240.

[0319] The current balance module 210 detects the voltages V3 and V5 of the third voltage switching node and the fifth voltage switching node, obtains the magnitude relationship of the currents in the inductors L1 and L3, and outputs the signal V CAL ; the RAMP generation module 220 generates the first ramp signal V RAMP1 , the second ramp signal V RAMP2 , receives the comparison signal V output by the current balance module CAL and generates the third ramp signal V CAL based on V RAMP3 ; the error amplifier and compensation module 230 detects the output voltage V OUT fed back by the power stage 100 of the buck converter and the reference voltage V REF , and generates an error signal V EA through an error amplifier and a compensation network.; The PWM generation module 240 receives the error signal V output by the error amplifier and compensation module 230 EA , and compares it with the first ramp signal V output by the RAMP generation module 220 RAMP1 , the second ramp signal V RAMP2 and the third ramp signal V RAMP3 . After being processed by a logic device, it generates the first PWM signal V PWM1 , the second PWM signal V PWM2 and the third PWM signal V PWM3 ; The non-overlapping clock module 250 receives V output by the PWM generation module 240 PWM1 , V PWM2 and the third PWM signal V PWM3 and processes them to generate a clock control signal V CLK1-10 for controlling the turn-on and turn-off of the power transistors.

[0320] In this example, the buck converter power stage 100 and the load 500 are as Figure 3 shown. The power stage includes power transistors S1 to S10, flying capacitors C F1 to C2, inductors L1 to L3, and an output capacitor C O . The first flying capacitor C F1 is coupled between the output terminal of the first voltage switching node V1 and the output terminal of the third voltage switching node V3; the second flying capacitor C F2 is coupled between the output terminal of the second voltage switching node V2 and the output terminal of the fourth voltage switching node V4; the first inductor L1 is coupled between the output terminal of the third voltage switching node and the load terminal; the second inductor L2 is coupled between the output terminal of the fourth voltage switching node and the load terminal; the third inductor L3 is coupled between the output terminal of the fifth voltage switching node V5 and the load terminal; the output capacitor C O is coupled between the load terminal and the reference ground terminal; the first switch S1 is coupled between the power input terminal and the output terminal of the first voltage switching node; the second switch S2 is coupled between the power input terminal and the output terminal of the second voltage switching node; the third switch S3 is coupled between the output terminal of the first voltage switching node and the intermediate potential node VMID; the fourth switch S4 is coupled between the output terminal of the second voltage switching node and the intermediate potential node; the fifth switch S5 is coupled between the intermediate potential node and the output terminal of the third voltage switching node; the sixth switch S6 is coupled between the intermediate potential node and the output terminal of the fourth voltage switching node; the seventh switch S7 is coupled between the output terminal of the third voltage switching node and the reference ground terminal; the eighth switch S8 is coupled between the output terminal of the fourth voltage switching node and the reference ground terminal; the ninth switch S9 is coupled between the intermediate potential node and the output terminal of the fifth voltage switching node; the tenth switch S 10 is coupled between the output terminal of the fifth voltage switching node and the reference ground terminal.

[0321] The behavior of the power stage is controlled by the driving signal V S1-10 . The operation of the buck converter power stage 100 in this example will be described below.

[0322] Optionally, the first flying capacitor C F1 and the second flying capacitor C F2 have the same capacitance value; the first inductor L1 and the second inductor L2 have the same inductance value, and the inductance value of the third inductor L3 can be taken as half of the inductance value of the first inductor L1; under steady-state operation, the voltage across the first flying capacitor C F1 and the voltage across the second flying capacitor C F2 are maintained at half of the input voltage V IN ; the first switch S1 and the second switch S2 are turned on once in a cycle, and the conduction times are approximately equal. The ninth switch S9 is turned on twice in a cycle, and each conduction time is approximately half of the conduction time of the first switch S1; the conduction times of the first switch S1 and the second switch S2 differ by half a cycle, and the conduction time of the ninth switch S9 and the first switch S1 differ by a quarter of a cycle; the ratio of the conduction time of the first switch S1 in a cycle to the cycle is defined as the duty cycle D. Then, the operation of the buck converter power stage 100 and the output voltage are related to the duty cycle; the output voltage V OUT of the buck converter and the input voltage V IN are related as follows:

[0323]

[0324] Optionally, the buck converter power stage 100 includes the following operation: when the duty cycle is less than 0.25, the switch state diagram and the inductor current schematic diagram are as shown in Figure 4 , and the operation schematic diagram is as shown in Figure 5 . In the first stage, the first switch, the fourth switch, the fifth switch, the eighth switch, and the tenth switch are closed, and the second switch, the third switch, the sixth switch, the seventh switch, and the ninth switch are open. C F1 is charged, C F2 is discharged, the current in L1 rises, and the currents in L2 and L3 fall; after the first stage ends, it enters the second stage. The fourth switch, the seventh switch, the eighth switch, and the tenth switch are closed, and the first switch, the second switch, the third switch, the fifth switch, the sixth switch, and the ninth switch are open. The currents in L1, L2, and L3 fall; after the second stage ends, it enters the third stage. The fourth switch, the seventh switch, the eighth switch, and the ninth switch are closed, and the first switch, the second switch, the third switch, the fifth switch, the sixth switch, and the tenth switch are open. C F2Discharge, the current in L3 rises, and the currents in L1 and L2 fall; after the third stage, it enters the fourth stage. The seventh switch, the eighth switch, and the tenth switch are closed, and the first switch, the second switch, the third switch, the fourth switch, the fifth switch, the sixth switch, and the ninth switch are open. The currents in L1, L2, and L3 fall; after the fourth stage, it enters the fifth stage. The second switch, the third switch, the sixth switch, the seventh switch, and the tenth switch are closed, and the first switch, the fourth switch, the fifth switch, the eighth switch, and the ninth switch are open, C F1 Discharge, C F2 Is charged, the current in L2 rises, and the currents in L1 and L3 fall; after the fifth stage, it enters the sixth stage. The third switch, the seventh switch, the eighth switch, and the tenth switch are closed, and the first switch, the second switch, the fourth switch, the fifth switch, the sixth switch, and the ninth switch are open. The currents in L1, L2, and L3 fall; after the sixth stage, it enters the seventh stage. The third switch, the seventh switch, the eighth switch, and the ninth switch are closed, and the first switch, the second switch, the fourth switch, the fifth switch, the sixth switch, and the tenth switch are open, C F1 Discharge, the current in L3 rises, and the currents in L1 and L2 fall; after the seventh stage, it enters the eighth stage. The seventh switch, the eighth switch, and the tenth switch are closed, and the first switch, the second switch, the third switch, the fourth switch, the fifth switch, the sixth switch, and the ninth switch are open. The currents in L1, L2, and L3 fall; after the eighth stage, it enters the first stage, and the switch and inductor behaviors cycle in this order.

[0325] Optionally, the buck converter power stage includes the following operating process: when the duty cycle is 0.25, in the first stage, the first switch, the fourth switch, the fifth switch, the eighth switch, and the tenth switch are closed, and the second switch, the third switch, the sixth switch, the seventh switch, and the ninth switch are open, C F1 Is charged, C F2 Discharge, the current in L1 rises, and the currents in L2 and L3 fall; after the first stage, it enters the second stage. The fourth switch, the seventh switch, the eighth switch, and the ninth switch are closed, and the first switch, the second switch, the third switch, the fifth switch, the sixth switch, and the tenth switch are open, C F2 Discharge, the current in L3 rises, and the currents in L1 and L2 fall; after the second stage, it enters the third stage. The seventh switch, the eighth switch, and the tenth switch are closed, and the first switch, the second switch, the third switch, the fourth switch, the fifth switch, the sixth switch, and the ninth switch are open. The currents in L1, L2, and L3 fall; after the third stage, it enters the fourth stage. The second switch, the third switch, the sixth switch, the seventh switch, and the tenth switch are closed, and the first switch, the fourth switch, the fifth switch, the eighth switch, and the ninth switch are open, C F1 Discharge, C F2During charging, the current in L2 rises while the currents in L1 and L3 fall. After the fourth stage, the fifth stage begins. The third, seventh, eighth, and ninth switches close, while the first, second, fourth, fifth, sixth, and tenth switches open, and C F1 discharges, the current in L3 rises while the currents in L1 and L2 fall. After the fifth stage, the sixth stage begins. The seventh, eighth, and tenth switches close, while the first, second, third, fourth, fifth, sixth, and ninth switches open, and the currents in L1, L2, and L3 fall. After the sixth stage, the first stage begins again, and the switching and inductor behaviors cycle in this order.

[0326] Optionally, the buck converter power stage includes the following operating process: When the duty cycle is greater than 0.25 and less than 0.5, the switch state diagram and the inductor current schematic are as shown in Figure 6 and the operating process schematic is as shown in Figure 7 . In the first stage, the first, fourth, fifth, eighth, and tenth switches close, while the second, third, sixth, seventh, and ninth switches open, and C F1 is charged, and C F2 discharges, the current in L1 rises while the currents in L2 and L3 fall. After the first stage, the second stage begins. The first, fourth, fifth, eighth, and ninth switches close, while the second, third, sixth, seventh, and tenth switches open, and the currents in L1 and L3 rise while the current in L2 falls. After the second stage, the third stage begins. The fourth, seventh, eighth, and ninth switches close, while the first, second, third, fifth, sixth, and tenth switches open, and C F2 discharges, the current in L3 rises while the currents in L1 and L2 fall. After the third stage, the fourth stage begins. The seventh, eighth, and tenth switches close, while the first, second, third, fourth, fifth, sixth, and ninth switches open, and the currents in L1, L2, and L3 fall. After the fourth stage, the fifth stage begins. The second, third, sixth, seventh, and tenth switches close, while the first, fourth, fifth, eighth, and ninth switches open, and C F1 discharges, and C F2During charging, the current in L2 rises, while the currents in L1 and L3 fall. After the fifth stage, it enters the sixth stage. The second switch, third switch, sixth switch, seventh switch, and ninth switch are closed, while the first switch, fourth switch, fifth switch, eighth switch, and tenth switch are open. The currents in L2 and L3 rise, and the current in L3 falls. After the sixth stage, it enters the seventh stage. The third switch, seventh switch, eighth switch, and ninth switch are closed, while the first switch, second switch, fourth switch, fifth switch, sixth switch, and tenth switch are open, C F1 During discharging, the current in L3 rises, while the currents in L1 and L2 fall. After the seventh stage, it enters the eighth stage. The seventh switch, eighth switch, and tenth switch are closed, while the first switch, second switch, third switch, fourth switch, fifth switch, sixth switch, and ninth switch are open. The currents in L1, L2, and L3 fall. After the eighth stage, it enters the first stage, and the behavior of the switches and inductors cycles in this order.

[0327] The above embodiments have the following technical effects:

[0328] By introducing two flying capacitors C F1 and C F2 into the power stage, where C F1 is coupled between the first voltage switching node V1 and the third voltage switching node V3, and C F2 is coupled between the second voltage switching node V2 and the fourth voltage switching node V4. Under steady-state operation, the voltages across the first flying capacitor and the second flying capacitor are maintained at half of the input voltage V IN , thereby reducing the breakdown voltage of the power transistors and allowing low-voltage-stress power transistors to be directly used under a high supply voltage to achieve buck conversion.

[0329] Adopting a structure where the first inductor L1, the second inductor L2, and the third inductor L3 provide current for the load, where L1 is coupled between V3 and the load terminal, L2 is coupled between V4 and the load terminal, and L3 is coupled between V5 and the load terminal. This three-inductor design helps improve the efficiency under a large load current.

[0330] Through the collaborative work of the current balancing module 210, the RAMP generation module 220, the error amplifier and compensation module 230, the PWM generation module 240, and the non-overlapping clock module 250 in the controller module 200, the relationship between the output voltage V OUT and the input voltage V IN is V OUT =(D / 2)·V IN , ensuring the stable operation of the system under different duty cycles D.

[0331] The output capacitor C OCoupled between the load terminal and the reference ground terminal, it is used to smooth the ripple of the output voltage and improve the stability of the output voltage.

[0332] It should be noted that in the application documents of this patent, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the term "comprising", "including" or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, article or device comprising a series of elements not only includes those elements, but also includes other elements not expressly listed, or also includes elements inherent in such process, method, article or device. Without further limitation, an element defined by the statement "comprising one" does not exclude the presence of additional identical elements in the process, method, article or device comprising the element. In the application documents of this patent, if it is mentioned that an act is performed according to a certain element, it means that the act is performed at least according to the element, including two cases: the act is performed only according to the element, and the act is performed according to the element and other elements. Expressions such as multiple, multiple times, multiple types, etc. include 2, 2 times, 2 types, as well as more than 2, more than 2 times, more than 2 types.

[0333] All documents mentioned in this application are considered to be integrally included in the disclosure content of this application so that they can be used as a basis for modification if necessary. In addition, it should be understood that after reading the above disclosure content of this application, those skilled in the art can make various changes or modifications to this application, and these equivalent forms also fall within the scope of protection required by this application.

Claims

1. A voltage-controlled low-voltage stress three-inductor buck converter, characterized in that, Comprising: A buck converter power stage and associated control, level-shifting, and driving circuits; wherein, the buck converter power stage includes a power switch circuit, a first flying capacitor, a second flying capacitor, a first inductor, a second inductor, a third inductor, and an output capacitor. The power switch circuit includes a first switch to a tenth switch, its power input terminal is connected to the power supply voltage, the reference ground terminal is grounded, the load terminal is connected to the load, the third voltage switching node output terminal and the fifth voltage switching node output terminal are connected to the control, level-shifting, and driving associated circuits, and the drive signal input terminal is connected to the drive signal output terminal of the control, level-shifting, and driving associated circuits; wherein, the first flying capacitor is coupled between the first voltage switching node output terminal and the third voltage switching node output terminal; the second flying capacitor is coupled between the second voltage switching node output terminal and the fourth voltage switching node output terminal; the first inductor is coupled between the third voltage switching node output terminal and the load terminal; the second inductor is coupled between the fourth voltage switching node output terminal and the load terminal; the third inductor is coupled between the fifth voltage switching node output terminal and the load terminal; the output capacitor is coupled between the load terminal and the reference ground.

2. The voltage-controlled low-voltage stress three-inductor buck converter according to claim 1, wherein The control, level-shifting, and driving associated circuits include: a controller module for receiving the output voltage, the third voltage switching node voltage, and the fifth voltage switching node voltage of the buck converter power stage, and generating a clock control signal in combination with a reference voltage; a level shifter module for converting the clock control signal output by the controller module to a suitable voltage domain to generate an input signal for the driver module; a driver module for converting the output signal of the level shifter module into a drive signal capable of driving a power transistor and providing it to the buck converter power stage.

3. The voltage-controlled low-voltage stress three-inductor buck converter according to claim 1, wherein, In the power switch circuit of the buck converter power stage, the first switch is coupled between the power input terminal and the first voltage switching node output terminal; the second switch is coupled between the power input terminal and the second voltage switching node output terminal; The third switch is coupled between the first voltage switching node output terminal and the intermediate potential node; the fourth switch is coupled between the second voltage switching node output terminal and the intermediate potential node; The fifth switch is coupled between the intermediate potential node and the third voltage switching node output terminal; The sixth switch is coupled between the intermediate potential node and the fourth voltage switching node output terminal; The seventh switch is coupled between the third voltage switching node output terminal and the reference ground terminal; The eighth switch is coupled between the fourth voltage switching node output terminal and the reference ground terminal; The ninth switch is coupled between the intermediate potential node and the fifth voltage switching node output terminal; The tenth switch is coupled between the fifth voltage switching node output terminal and the reference ground terminal.

4. The voltage-controlled low-voltage stress three-inductor buck converter according to claim 2, wherein Under steady-state operation, the voltage across the first flying capacitor and the voltage across the second flying capacitor are maintained at one-half of the input voltage.

5. The voltage-controlled low-voltage stress three-inductor buck converter according to claim 2, wherein The controller module includes: A current balance module for detecting the voltages of a third voltage switching node and a fifth voltage switching node and outputting a voltage comparison signal for participating in ramp signal generation; A RAMP generation module for receiving the comparison signal output by the current balance module and generating a first ramp signal, a second ramp signal, and a third ramp signal; An error amplifier and compensation module for detecting the output voltage of the buck converter power stage and the reference voltage and generating an error signal through an error amplifier and a compensation network; A PWM generation module for receiving the error signal output by the error amplifier and compensation module and the first ramp signal, the second ramp signal, and the third ramp signal output by the RAMP generation module and generating a first PWM signal, a second PWM signal, and a third PWM signal; A non-overlapping clock module for receiving the first PWM signal, the second PWM signal, and the third PWM signal output by the PWM generation module and processing them to generate a clock control signal for controlling the turning on and off of the power transistors.

6. The voltage-controlled low-voltage stress three-inductor buck converter according to claim 2, wherein: The level shifter module includes a control signal input terminal and a signal output terminal. Among them, the control signal input terminal is connected to the clock control signal output terminal of the controller module, and the signal output terminal is connected to the signal input terminal of the driver module for level-shifting the clock control signal to generate an input signal for the driver module; The driver module includes a signal input terminal and a drive signal output terminal. Among them, the signal input terminal is connected to the signal output terminal of the level shifter module, and the drive signal output terminal is connected to the drive signal input terminal of the buck converter power stage for converting the input signal into a drive signal with appropriate driving ability and providing it to the buck converter power stage.

7. The voltage-controlled low-voltage stress three-inductor buck converter according to claim 2, wherein The buck converter power stage includes the following working process: When the duty cycle is less than 0.25, In the first stage, the first switch, the fourth switch, the fifth switch, the eighth switch, and the tenth switch are closed, the second switch, the third switch, the sixth switch, the seventh switch, and the ninth switch are open, and one ends of the second inductor and the third inductor are shorted to ground; After the first stage ends, it enters the second stage. The fourth switch, the seventh switch, the eighth switch, and the tenth switch are closed, the first switch, the second switch, the third switch, the fifth switch, the sixth switch, and the ninth switch are open, and one ends of the first inductor, the second inductor, and the third inductor are shorted to ground; After the second stage ends, it enters the third stage. The fourth switch, the seventh switch, the eighth switch, and the ninth switch are closed, the first switch, the second switch, the third switch, the fifth switch, the sixth switch, and the tenth switch are open, and one ends of the first inductor and the second inductor are shorted to ground; After the third stage ends, it enters the fourth stage. The seventh switch, the eighth switch, and the tenth switch are closed, the first switch, the second switch, the third switch, the fourth switch, the fifth switch, the sixth switch, and the ninth switch are open, and one ends of the first inductor, the second inductor, and the third inductor are shorted to ground; After the fourth stage, it enters the fifth stage. The second switch, the third switch, the sixth switch, the seventh switch, and the tenth switch are closed. The first switch, the fourth switch, the fifth switch, the eighth switch, and the ninth switch are open. One end of the first inductor and the third inductor is shorted to the ground. After the fifth stage, it enters the sixth stage. The third switch, the seventh switch, the eighth switch, and the tenth switch are closed. The first switch, the second switch, the fourth switch, the fifth switch, the sixth switch, and the ninth switch are open. One end of the first inductor, the second inductor, and the third inductor is shorted to the ground. After the sixth stage, it enters the seventh stage. The third switch, the seventh switch, the eighth switch, and the ninth switch are closed. The first switch, the second switch, the fourth switch, the fifth switch, the sixth switch, and the tenth switch are open. One end of the first inductor and the second inductor is shorted to the ground. After the seventh stage, it enters the eighth stage. The seventh switch, the eighth switch, and the tenth switch are closed. The first switch, the second switch, the third switch, the fourth switch, the fifth switch, the sixth switch, and the ninth switch are open. One end of the first inductor, the second inductor, and the third inductor is shorted to the ground. After the eighth stage, it enters the first stage. The behavior of the switches and inductors cycles in this order.

8. The voltage-controlled low-voltage stress triple-inductor buck converter according to claim 2, wherein, The power stage of the buck converter includes the following working processes: When the duty cycle is 0.25, In the first stage, the first switch, the fourth switch, the fifth switch, the eighth switch, and the tenth switch are closed. The second switch, the third switch, the sixth switch, the seventh switch, and the ninth switch are open. One end of the second inductor and the third inductor is shorted to the ground. After the first stage, it enters the second stage. The fourth switch, the seventh switch, the eighth switch, and the ninth switch are closed. The first switch, the second switch, the third switch, the fifth switch, the sixth switch, and the tenth switch are open. One end of the first inductor and the second inductor is shorted to the ground. After the second stage, it enters the third stage. The seventh switch, the eighth switch, and the tenth switch are closed. The first switch, the second switch, the third switch, the fourth switch, the fifth switch, the sixth switch, and the ninth switch are open. One end of the first inductor, the second inductor, and the third inductor is shorted to the ground. After the third stage, it enters the fourth stage. The second switch, the third switch, the sixth switch, the seventh switch, and the tenth switch are closed. The first switch, the fourth switch, the fifth switch, the eighth switch, and the ninth switch are open. One end of the first inductor and the third inductor is shorted to the ground. After the fourth stage, it enters the fifth stage. The third switch, the seventh switch, the eighth switch, and the ninth switch are closed. The first switch, the second switch, the fourth switch, the fifth switch, the sixth switch, and the tenth switch are open. One end of the first inductor and the second inductor is shorted to the ground. After the fifth stage, it enters the sixth stage. The seventh switch, the eighth switch, and the tenth switch are closed. The first switch, the second switch, the third switch, the fourth switch, the fifth switch, the sixth switch, and the ninth switch are open. One end of the first inductor, the second inductor, and the third inductor is shorted to the ground. After the sixth stage, it enters the first stage. The behavior of the switches and inductors cycles in this order.

9. The voltage-controlled low-voltage stress three-inductor buck converter according to claim 2, wherein, The power stage of the buck converter includes the following working processes: When the duty cycle is greater than 0.25 and less than 0.5, In the first stage, the first switch, the fourth switch, the fifth switch, the eighth switch, and the tenth switch are closed, the second switch, the third switch, the sixth switch, the seventh switch, and the ninth switch are open, and one end of the second inductor and the third inductor is shorted to ground; After the first stage ends and enters the second stage, the first switch, the fourth switch, the fifth switch, the eighth switch, and the ninth switch are closed, the second switch, the third switch, the sixth switch, the seventh switch, and the tenth switch are open, and one end of the second inductor is shorted to ground; After the second stage ends and enters the third stage, the fourth switch, the seventh switch, the eighth switch, and the ninth switch are closed, the first switch, the second switch, the third switch, the fifth switch, the sixth switch, and the tenth switch are open, and one end of the first inductor and the second inductor is shorted to ground; After the third stage ends and enters the fourth stage, the seventh switch, the eighth switch, and the tenth switch are closed, the first switch, the second switch, the third switch, the fourth switch, the fifth switch, the sixth switch, and the ninth switch are open, and one end of the first inductor, the second inductor, and the third inductor is shorted to ground; After the fourth stage ends and enters the fifth stage, the second switch, the third switch, the sixth switch, the seventh switch, and the tenth switch are closed, the first switch, the fourth switch, the fifth switch, the eighth switch, and the ninth switch are open, and one end of the first inductor and the third inductor is shorted to ground; After the fifth stage ends and enters the sixth stage, the second switch, the third switch, the sixth switch, the seventh switch, and the ninth switch are closed, the first switch, the fourth switch, the fifth switch, the eighth switch, and the tenth switch are open, and one end of the first inductor is shorted to ground; After the sixth stage ends and enters the seventh stage, the third switch, the seventh switch, the eighth switch, and the ninth switch are closed, the first switch, the second switch, the fourth switch, the fifth switch, the sixth switch, and the tenth switch are open, and one end of the first inductor and the second inductor is shorted to ground; After the seventh stage ends and enters the eighth stage, the seventh switch, the eighth switch, and the tenth switch are closed, the first switch, the second switch, the third switch, the fourth switch, the fifth switch, the sixth switch, and the ninth switch are open, and one end of the first inductor, the second inductor, and the third inductor is shorted to ground; After the eighth stage ends and enters the first stage, the behavior of the switches and inductors cycles in this order.

10. The voltage-controlled low-voltage stress three-inductor buck converter according to claim 1, wherein, The relationship between the output voltage and the input voltage of the buck converter is as follows: V OUT = (D / 2)·V IN , where D is the proportion of the conduction time of the first switch in one cycle to the cycle, that is, the duty cycle.

11. The voltage-controlled low-voltage stress triple-inductor buck converter according to claim 1, wherein The inductance values of the first inductor and the second inductor are the same, and the inductance value of the third inductor is half of the inductance value of the first inductor.

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