Voltage controlled low voltage stress three-inductor buck converter

Abstract

The application relates to the field of DC-DC converters, and discloses a low-voltage stress three-inductor step-down converter controlled by voltage. The step-down converter comprises a step-down converter power stage and control, level conversion and driving related circuits matched with the step-down converter power stage; wherein the step-down converter power stage contains a power switch, two flying capacitors and three inductors. The technical feature of the application is that the flying capacitors are inserted in the traditional step-down converter power stage to bear part of the voltage stress, the on and off timing of the power switch is controlled, the voltage across the flying capacitors is kept at half of the input voltage, the power tube withstand voltage is reduced, and the low-voltage stress power tube is allowed to directly realize step-down conversion under high power voltage; meanwhile, the three inductors are used to provide current for the load, the problem of reduced efficiency caused by the single inductor bearing all the load current is avoided, and the efficiency under large load current is improved.

Description

Technical Field

[0001] This application relates to the field of power conversion, and in particular to DC-DC buck converter technology. Background Technology

[0002] DC-DC buck converters are widely used in various electronic devices to convert higher DC voltages to lower DC voltages to meet the needs of different loads. Traditional buck converters typically employ a single-inductor structure, reducing voltage by controlling the on / off state of a switching transistor. However, as electronic devices increasingly demand higher power efficiency, power density, load current, and voltage conversion ratio, traditional single-inductor buck converters are gradually revealing some performance limitations.

[0003] Multi-inductor buck converters have gradually become a research hotspot due to their potential advantages in efficiency, ripple suppression, and power density. Multi-inductor structures can achieve more efficient energy transfer and smoother output voltages through reasonable control strategies. However, existing multi-inductor buck converters are often complex in design and control, and there is still room for improvement in reducing voltage stress on power devices. Voltage stress on power devices directly affects the size and efficiency of the converter; using power transistors with low voltage stress helps improve system performance.

[0004] In high input voltage applications, the power switches of traditional buck converters need to withstand the entire input voltage. This requires the use of high-voltage power devices, which typically have higher on-resistance, leading to increased switching losses and reduced efficiency. Furthermore, when the load current is large, the inductor in a single-inductor structure needs to handle the entire load current, increasing inductor losses and also causing a decrease in efficiency.

[0005] While existing research has attempted to address these issues by improving circuit topology or control strategies, a solution that can simultaneously and effectively reduce voltage stress on power devices and improve efficiency under high load current remains lacking. Therefore, designing a buck converter that can both reduce voltage stress on power devices and maintain high efficiency under high load current conditions is of great significance for improving the energy efficiency and reliability of electronic devices. Summary of the Invention

[0006] The purpose of this application is to provide a voltage-controlled, low-voltage-stress, three-inductor buck converter to solve the problems mentioned in the background art.

[0007] This application discloses a voltage-controlled, low-voltage-stress, three-inductor buck converter, comprising: a buck converter power stage and corresponding control, level shifting, and drive-related circuitry; wherein, the buck converter power stage includes a power switching circuit, a first flying capacitor, a second flying capacitor, a first inductor, a second inductor, a third inductor, and an output capacitor; the power switching circuit includes a first switch to a tenth switch, its power input terminal connected to the power supply voltage, its reference ground terminal grounded, its load terminal connected to the load, and its third voltage switching node output terminal and fifth voltage switching node output terminal connected to the control, level shifting, and drive-related circuitry; the drive signal input terminal is connected to the drive signal output terminal of the control, level shifting, and drive-related circuitry; wherein, the first flying capacitor is coupled between the first voltage switching node output terminal and the third voltage switching node output terminal; the second flying capacitor is coupled between the second voltage switching node output terminal and the fourth voltage switching node output terminal; the first inductor is coupled between the third voltage switching node output terminal and the load terminal; and the second inductor is coupled between the fourth voltage switching node output terminal and the load terminal;

[0008] The third inductor is coupled between the output of the fifth voltage switching node and the load; the output capacitor is coupled between the load and the reference ground.

[0009] In a preferred embodiment, the control, level shifting, and drive-related circuitry includes: a controller module for receiving the output voltage of the buck converter power stage, the third voltage switching node voltage, and the fifth voltage switching node voltage, and generating a clock control signal in conjunction with a reference voltage; a level shifter module for converting the clock control signal output by the controller module to a suitable voltage domain to generate an input signal for the driver module; and a driver module for converting the output signal of the level shifter module into a drive signal capable of driving the power transistor and providing it to the buck converter power stage.

[0010] In a preferred embodiment, in the power switching circuit of the buck converter power stage, a first switch is coupled between the power input terminal and the output terminal of the first voltage switching node; a second switch is coupled between the power input terminal and the output terminal of the second voltage switching node; a third switch is coupled between the output terminal of the first voltage switching node and an intermediate potential node; a fourth switch is coupled between the output terminal of the second voltage switching node and the intermediate potential node; a fifth switch is coupled between the intermediate potential node and the output terminal of the third voltage switching node; a sixth switch is coupled between the intermediate potential node and the output terminal of the fourth voltage switching node; a seventh switch is coupled between the output terminal of the third voltage switching node and the reference ground; an eighth switch is coupled between the output terminal of the fourth voltage switching node and the reference ground; a ninth switch is coupled between the intermediate potential node and the output terminal of the fifth voltage switching node; and a tenth switch is coupled between the output terminal of the fifth voltage switching node and the reference ground.

[0011] In a preferred embodiment, under steady-state operation, the voltages across the first and second flying capacitors are maintained at half the input voltage.

[0012] In a preferred embodiment, the controller module includes:

[0013] The current balancing module is used to detect the voltages of the third and fifth voltage switching nodes and output a voltage comparison signal that participates in the generation of the ramp signal.

[0014] The RAMP generation module is used to receive the comparison signal output by the current balance module and generate a first ramp signal, a second ramp signal and a third ramp signal;

[0015] An error amplifier and compensation module are used to detect the output voltage of the power stage of the buck converter and the reference voltage, and to generate an error signal through the error amplifier and compensation network;

[0016] The PWM generation module is used to receive the error signal output by the error amplifier and compensation module and the first ramp signal, the second ramp signal and the third ramp signal output by the RAMP generation module, and generate the first PWM signal, the second PWM signal and the third PWM signal;

[0017] The non-overlapping clock module is used to receive and process the first PWM signal, the second PWM signal and the third PWM signal output by the PWM generation module to generate clock control signals for controlling the power transistor to turn on and off.

[0018] In a preferred embodiment, the characteristic is that:

[0019] The level shifter module includes a control signal input terminal and a signal output terminal. The control signal input terminal is connected to the clock control signal output terminal of the controller module, and the signal output terminal is connected to the signal input terminal of the driver module. It is used to perform level conversion on the clock control signal to generate the input signal of the driver module.

[0020] The driver module includes a signal input terminal and a drive signal output terminal. The signal input terminal is connected to the signal output terminal of the level shifter module, and the drive signal output terminal is connected to the drive signal input terminal of the buck converter power stage. The driver module is used to convert the input signal into a drive signal with appropriate drive capability and provide it to the buck converter power stage.

[0021] In a preferred embodiment, the buck converter power stage includes the following operation:

[0022] When the duty cycle is less than 0.25,

[0023] In the first stage, the first, fourth, fifth, eighth and tenth switches are closed, the second, third, sixth, seventh and ninth switches are open, and one end of the second and third inductors is short-circuited to ground;

[0024] After the first stage ends, the second stage begins. Switches 4, 7, 8 and 10 are closed, while switches 1, 2, 3, 5, 6 and 9 are opened. One end of inductor 1, inductor 2 and inductor 3 is shorted to ground.

[0025] After the second stage ends, the third stage begins. Switches four, seven, eight, and nine are closed, while switches one, two, three, five, six, and ten are open. One end of the first inductor and one end of the second inductor are shorted to ground.

[0026] After the third stage ends, the fourth stage begins. Switches seven, eight, and ten are closed, while switches one, two, three, four, five, six, and nine are open. One end of inductor one, two, and three is short-circuited to ground.

[0027] After the fourth stage ends, the fifth stage begins. The second, third, sixth, seventh, and tenth switches are closed, while the first, fourth, fifth, eighth, and ninth switches are open. One end of the first and third inductors is short-circuited to ground.

[0028] After the fifth stage ends, the sixth stage begins. Switches three, seven, eight, and ten are closed, while switches one, two, four, five, six, and nine are opened. One end of inductor one, two, and three is short-circuited to ground.

[0029] After the sixth stage ends, the seventh stage begins. Switches three, seven, eight, and nine are closed, while switches one, two, four, five, six, and ten are open. One end of the first inductor and one end of the second inductor are shorted to ground.

[0030] After the seventh stage ends, the eighth stage begins. Switches seven, eight, and ten are closed, while switches one, two, three, four, five, six, and nine are opened. One end of inductor one, two, and three is short-circuited to ground.

[0031] After the eighth stage ends, the first stage begins, and the behavior of the switches and inductors cycles in this order.

[0032] In a preferred embodiment, the buck converter power stage includes the following operation:

[0033] When the duty cycle is 0.25,

[0034] In the first stage, the first, fourth, fifth, eighth and tenth switches are closed, the second, third, sixth, seventh and ninth switches are open, and one end of the second and third inductors is short-circuited to ground;

[0035] After the first stage ends, the second stage begins. Switches four, seven, eight, and nine are closed, while switches one, two, three, five, six, and ten are open. One end of the first inductor and one end of the second inductor are shorted to ground.

[0036] After the second stage ends, the third stage begins. Switches seven, eight, and ten are closed, while switches one, two, three, four, five, six, and nine are open. One end of inductor one, two, and three is short-circuited to ground.

[0037] After the third stage ends, the fourth stage begins. The second, third, sixth, seventh, and tenth switches are closed, while the first, fourth, fifth, eighth, and ninth switches are open. One end of the first and third inductors is short-circuited to ground.

[0038] After the fourth stage ends, the fifth stage begins. Switches three, seven, eight, and nine are closed, while switches one, two, four, five, six, and ten are open. One end of the first inductor and one end of the second inductor are shorted to ground.

[0039] After the fifth stage ends, the sixth stage begins. Switches seven, eight, and ten are closed, while switches one, two, three, four, five, six, and nine are opened. One end of inductor one, two, and three is short-circuited to ground.

[0040] After the sixth stage ends, the first stage begins, and the behavior of the switches and inductors cycles in this order.

[0041] In a preferred embodiment, the buck converter power stage includes the following operation:

[0042] When the duty cycle is greater than 0.25 and less than 0.5,

[0043] In the first stage, the first, fourth, fifth, eighth and tenth switches are closed, the second, third, sixth, seventh and ninth switches are open, and one end of the second and third inductors is short-circuited to ground;

[0044] After the first stage ends, the second stage begins. Switches 1, 4, 5, 8, and 9 are closed, while switches 2, 3, 6, 7, and 10 are open. One end of the second inductor is short-circuited to ground.

[0045] After the second stage ends, the third stage begins. Switches four, seven, eight, and nine are closed, while switches one, two, three, five, six, and ten are open. One end of the first inductor and one end of the second inductor are shorted to ground.

[0046] After the third stage ends, the fourth stage begins. Switches seven, eight, and ten are closed, while switches one, two, three, four, five, six, and nine are open. One end of inductor one, two, and three is short-circuited to ground.

[0047] After the fourth stage ends, the fifth stage begins. The second, third, sixth, seventh, and tenth switches are closed, while the first, fourth, fifth, eighth, and ninth switches are open. One end of the first and third inductors is short-circuited to ground.

[0048] After the fifth stage ends, the sixth stage begins. Switches 2, 3, 6, 7, and 9 are closed, while switches 1, 4, 5, 8, and 10 are open. One end of the first inductor is short-circuited to ground.

[0049] After the sixth stage ends, the seventh stage begins. Switches three, seven, eight, and nine are closed, while switches one, two, four, five, six, and ten are open. One end of the first inductor and one end of the second inductor are shorted to ground.

[0050] After the seventh stage ends, the eighth stage begins. Switches seven, eight, and ten are closed, while switches one, two, three, four, five, six, and nine are opened. One end of inductor one, two, and three is short-circuited to ground.

[0051] After the eighth stage ends, the first stage begins, and the behavior of the switches and inductors cycles in this order.

[0052] In a preferred embodiment, the relationship between the output voltage and the input voltage of the buck converter is as follows:

[0053] V OUT = (D / 2)·V IN , where D is the proportion of the conduction time of the first switch in one cycle to the total conduction time of that cycle, i.e., the duty cycle.

[0054] In a preferred embodiment, the first inductor and the second inductor have the same inductance value, and the third inductor has an inductance value that is half that of the first inductor.

[0055] Compared with the prior art, the voltage-controlled low-voltage-stress three-inductor buck converter disclosed in this application has the following advantages:

[0056] Beneficial effects:

[0057] By introducing two flying capacitors into the power stage, with the first flying capacitor coupled between the first and third voltage switching nodes, and the second flying capacitor coupled between the second and fourth voltage switching nodes, the voltage across the first and second flying capacitors remains at half the input voltage under steady-state operation. This reduces the power transistor's withstand voltage, allowing for direct buck conversion using a low-voltage-stress power transistor at high supply voltages.

[0058] A structure using a first inductor, a second inductor, and a third inductor to supply current to the load is described. The first inductor is coupled between the third voltage switching node and the load, the second inductor is coupled between the fourth voltage switching node and the load, and the third inductor is coupled between the fifth voltage switching node and the load. This three-inductor design helps improve efficiency under high load current.

[0059] Through the coordinated operation of the current balancing module, RAMP generation module, error amplifier and compensation module, PWM generation module and non-overlapping clock module in the controller module, the relationship between output voltage and input voltage is realized as output voltage = (duty cycle / 2)·input voltage, which ensures the stable operation of the system under different duty cycles.

[0060] The output capacitor is coupled between the load terminal and the reference ground terminal to smooth the ripple of the output voltage and improve the stability of the output voltage.

[0061] The specification of this application contains numerous technical features distributed across various technical solutions. Listing all possible combinations of these technical features (i.e., technical solutions) would make the specification excessively lengthy. To avoid this problem, the various technical features disclosed in the above-described invention, the various technical features disclosed in the following embodiments and examples, and the various technical features disclosed in the accompanying drawings can be freely combined to form various new technical solutions (all of which are considered to have been described in this specification), unless such a combination of technical features is technically infeasible. For example, one example discloses feature A+B+C, and another example discloses feature A+B+D+E. Features C and D are equivalent technical means that serve the same function, and technically only one needs to be used; they cannot be used simultaneously. Feature E can technically be combined with feature C. Therefore, the solution A+B+C+D should not be considered as described because it is technically infeasible, while the solution A+B+C+E should be considered as described. Attached Figure Description

[0062] Figure 1 This is a schematic diagram of the overall architecture of a voltage-controlled low-voltage stress three-inductor buck converter according to an embodiment of this application;

[0063] Figure 2 This is a schematic diagram of the controller module of a voltage-controlled low-voltage stress three-inductor buck converter according to an embodiment of this application;

[0064] Figure 3 This is a schematic diagram of the power stage and load of a voltage-controlled, low-voltage-stress, three-inductor buck converter according to an embodiment of this application;

[0065] Figure 4 This is a schematic diagram of the switching state and inductor current of a voltage-controlled low-voltage stress three-inductor buck converter according to an embodiment of this application when the duty cycle is less than 0.25;

[0066] Figure 5 This is a schematic diagram of the operation of a voltage-controlled low-voltage stress three-inductor buck converter according to an embodiment of this application when the duty cycle is less than 0.25.

[0067] Figure 6 This is a schematic diagram of the switching state and inductor current of a voltage-controlled low-voltage stress three-inductor buck converter according to an embodiment of this application when the duty cycle is greater than 0.25 and less than 0.5.

[0068] Figure 7 This is a schematic diagram of the operation process of a voltage-controlled low-voltage stress three-inductor buck converter according to an embodiment of this application when the duty cycle is greater than 0.25 and less than 0.5;

[0069] Figure 8 This is a schematic diagram of the operation of a voltage-controlled low-voltage stress three-inductor buck converter according to an embodiment of this application. Detailed Implementation

[0070] In the following description, many technical details are presented to help the reader better understand this application. However, those skilled in the art will understand that the technical solutions claimed in this application can be implemented even without these technical details and various variations and modifications based on the following embodiments.

[0071] Explanation of some concepts:

[0072] Flying capacitor: refers to a capacitor used in a power stage to bear part of the voltage stress. In this application, it specifically refers to a first flying capacitor coupled between a first voltage switching node and a third voltage switching node, and a second flying capacitor coupled between a second voltage switching node and a fourth voltage switching node.

[0073] Voltage switching node: refers to the node in the power stage used to connect power switches, flying capacitors and inductors, including the first to fifth voltage switching nodes in this application.

[0074] Duty cycle: refers to the proportion of the time the first switch is on within a switching cycle.

[0075] Intermediate potential node: refers to the intermediate potential point in a power stage used to connect multiple power switches.

[0076] The following is a brief summary of some of the innovative aspects of this application:

[0077] In summary, this application discloses a voltage-controlled, low-voltage-stress, three-inductor buck converter. Addressing the technical challenges of existing buck converters in high input voltage and high load current applications, it achieves outstanding technical results through innovative technical concepts.

[0078] Specifically, such as Figure 1 and Figure 3 As shown, this application introduces two flying capacitors C in power stage 100.F1 C F2 C F1 Coupled between the first voltage switching node V1 and the third voltage switching node V3, C F2 It is coupled between the second voltage switching node V2 and the fourth voltage switching node V4. During steady-state operation, the first flying capacitor C... F1 Second flight capacitor C F2 The voltage across the terminals remains at the input voltage V. IN Half of the power switching device S1-S 10 The withstand voltage requirement allows for the direct buck conversion using power transistors with low voltage stress at high supply voltages.

[0079] Simultaneously, this application employs three inductors L1, L2, and L3 to provide current to the load, where L1 is coupled between V3 and the load terminal, L2 is coupled between V4 and the load terminal, and L3 is coupled between the fifth voltage switching node V5 and the load terminal. This three-inductor structure helps improve efficiency under high load current. The flying capacitor in power stage 100 works in conjunction with the three inductors through a specific control strategy, such as... Figures 4-7 As shown, when the duty cycle D varies within different ranges, the clock control signal V output by the controller module 200... CLK1-10 The adjustable power transistor's turn-on timing allows the output voltage V to be adjusted. OUT With input voltage V IN Keep V OUT = (D / 2)·V IN The relationship.

[0080] In controller module 200, current balancing module 210 detects the voltages of the third voltage switching node V3 and the fifth voltage switching node V5, and outputs a voltage comparison signal V. CAL The RAMP generation module 220 receives this comparison signal and generates three ramp signals V. RAMP1 V RAMP2 and V RAMP3 Error amplifier and compensation module 230 detects output voltage V OUT and reference voltage V REF Generate error signal V EA The PWM generation module 240 and the non-overlapping clock module 250 generate the final control signal based on these signals.

[0081] This technical solution, by combining the use of a flying capacitor to bear part of the voltage stress with the coordinated power supply of three inductors, reduces the voltage stress on power devices while improving efficiency under high load current, demonstrating the inventiveness of this application.

[0082] To make the objectives, technical solutions, and advantages of this application clearer, the embodiments of this application will be described in further detail below with reference to the accompanying drawings.

[0083] In this application's specification, to make the description clearer and more concise, some technical features are represented using English letter codes. It should be clarified that the technical features represented solely by letter codes in this application have the same meaning as the corresponding technical features represented by their Chinese names plus letter codes. For example, "V" IN "and "input voltage V IN "Referring to the same technical feature, "V" OUT "and "output voltage V OUT "For the same technical feature, other similar technical features represented by English letter codes are equivalent to those represented by their corresponding Chinese names plus letter codes. When reading and understanding this application, please treat technical features represented solely by letter codes as equivalent to those represented by their corresponding Chinese names plus letter codes. The technical features involving English letter codes include, but are not limited to:"

[0084] Input voltage V IN ;

[0085] Output voltage V OUT ;

[0086] Reference voltage V REF ;

[0087] First voltage switching node voltage V1; Second voltage switching node voltage V2; Third voltage switching node voltage V3; Fourth voltage switching node voltage V4; Fifth voltage switching node voltage V5; Intermediate potential node voltage VMID;

[0088] First flying capacitor C F1 ;

[0089] Second flying capacitor C F2 ;

[0090] First inductor L1;

[0091] Second inductor L2;

[0092] Third inductor L3;

[0093] Output capacitor C O ;

[0094] First switch S1;

[0095] Second switch S2;

[0096] Third switch S3;

[0097] Fourth switch S4;

[0098] Fifth switch S5;

[0099] Sixth switch S6;

[0100] Seventh switch S7;

[0101] Eighth switch S8;

[0102] Ninth switch S9;

[0103] Tenth switch S 10 ;

[0104] Drive signal V S1-10 ;

[0105] Clock control signal V CLK1-10 ;

[0106] Driver module input signal V LS1-10 ;

[0107] Voltage comparison signal V CAL ;

[0108] First ramp signal V RAMP1 ;

[0109] Second ramp signal V RAMP2 ;

[0110] Third ramp signal V RAMP3 ;

[0111] Error signal V EA ;

[0112] First PWM signal V PWM1 ;

[0113] Second PWM signal V PWM2 ;

[0114] Third PWM signal V PWM3 ;

[0115] Duty cycle D.

[0116] The first embodiment of this application relates to a voltage-controlled, low-voltage-stress, three-inductor buck converter, such as... Figure 1 As shown, it includes:

[0117] The step-down converter power stage 100 and its associated control, level conversion, and drive circuitry; among which...

[0118] The buck converter power stage 100 includes a power switching circuit and a first flying capacitor C. F1 Second flying capacitor C F2The first inductor L1, the second inductor L2, the third inductor L3, and the output capacitor C O The power switching circuit includes a first switch S1 to a tenth switch S1. 10 Its power input terminal is connected to the power supply voltage V. IN The reference ground is grounded, the load terminal is connected to the load 500, the output terminal V3 of the third voltage switching node and the output terminal V5 of the fifth voltage switching node are connected to the control, level conversion and drive related circuit, and the drive signal input terminal is connected to the drive signal output terminal of the control, level conversion and drive related circuit.

[0119] The first flying capacitor C F1 Coupled between the output terminal V1 of the first voltage switching node and the output terminal V3 of the third voltage switching node;

[0120] The second flying capacitor C F2 Coupled between the output terminal V2 of the second voltage switching node and the output terminal V4 of the fourth voltage switching node;

[0121] The first inductor L1 is coupled between the output terminal V3 of the third voltage switching node and the load terminal;

[0122] The second inductor L2 is coupled between the output terminal V4 of the fourth voltage switching node and the load terminal;

[0123] The third inductor L3 is coupled between the output terminal V5 of the fifth voltage switching node and the load terminal;

[0124] The output capacitor C O Coupled between the load and reference ground;

[0125] Wherein, the first flying capacitor C F1 and the second flight capacitor C F2 The first inductor L1, the second inductor L2, and the third inductor L3 are used to borne part of the voltage stress, thereby reducing the voltage withstand requirement of the switch in the power switching circuit; the first inductor L1, the second inductor L2, and the third inductor L3 are used to work together to provide current to the load 500, thereby improving the conversion efficiency under large load current.

[0126] The control, level conversion, and drive-related circuits include:

[0127] Controller module 200 is used to receive the output voltage V of the buck converter power stage. OUT The third voltage switching node voltage V3 and the fifth voltage switching node voltage V5, combined with the reference voltage V REF Generate clock control signal V CLK1-10 ;

[0128] Level shifter module 300 is used to convert the clock control signal V output by the controller module into a frequency shifter signal. CLK1-10 The voltage is converted to a suitable voltage domain to generate the input signal V of the driver module. LS1-10 ;

[0129] Driver module 400 is used to convert the output signal V of the level shifter module into a signal output signal V. LS1-10 Converted into a drive signal V that can drive the power transistor. S1-10 And provide it to the power stage of the buck converter.

[0130] Optionally, in the power switching circuit of the buck converter power stage 100, a first switch S1 is coupled between the power input terminal and the output terminal V1 of the first voltage switching node; a second switch S2 is coupled between the power input terminal and the output terminal V2 of the second voltage switching node; a third switch S3 is coupled between the output terminal V1 of the first voltage switching node and the intermediate potential node VMID; a fourth switch S4 is coupled between the output terminal V2 of the second voltage switching node and the intermediate potential node VMID; a fifth switch S5 is coupled between the intermediate potential node VMID and the output terminal V3 of the third voltage switching node; a sixth switch S6 is coupled between the intermediate potential node VMID and the output terminal V4 of the fourth voltage switching node; a seventh switch S7 is coupled between the output terminal V3 of the third voltage switching node and the reference ground terminal; an eighth switch S8 is coupled between the output terminal V4 of the fourth voltage switching node and the reference ground terminal; a ninth switch S9 is coupled between the intermediate potential node VMID and the output terminal V5 of the fifth voltage switching node; and a tenth switch S1 is coupled between the power input terminal V1 and the reference ground terminal. 10 It is coupled between the output terminal V5 of the fifth voltage switching node and the reference ground terminal.

[0131] Optionally, under steady-state operation, the first flying capacitor C F1 The voltage across the terminals and the second flying capacitor C F2 The voltage across the terminals remains at the input voltage V. IN One-half of.

[0132] Optionally, the controller module 200 includes:

[0133] The current balancing module 210 is used to detect the voltages of the third voltage switching node V3 and the fifth voltage switching node V5, and outputs a voltage comparison signal V that participates in the generation of the ramp signal. CAL ;

[0134] RAMP generation module 220 is used to receive the comparison signal V output by the current balancing module 210. CAL Generate the first ramp signal V RAMP1Second ramp signal V RAMP2 and the third ramp signal V RAMP3 ;

[0135] Error amplifier and compensation module 230 are used to detect the output voltage V of buck converter power stage 100. OUT and the reference voltage V REF An error signal V is generated through an error amplifier and a compensation network. EA ;

[0136] PWM generation module 240 is used to receive the error signal V output by the error amplifier and compensation module 230. EA The first ramp signal V output by the RAMP generation module 220 RAMP1 The second ramp signal V RAMP2 and the third ramp signal V RAMP3 Generate the first PWM signal V PWM1 The second PWM signal V PWM2 and the third PWM signal V PWM3 ;

[0137] The non-overlapping clock module 250 is used to receive the first PWM signal V output by the PWM generation module 240. PWM1 The second PWM signal V PWM2 and the third PWM signal V PWM3 It then processes the data to generate a clock control signal V that controls the power transistor to turn on and off. CLK1-10 .

[0138] Optionally, the level shifter module 300 includes a control signal input terminal and a signal output terminal, wherein the control signal input terminal is connected to the clock control signal V of the controller module 200. CLK1-10 The output terminal is connected to the signal input terminal of the driver module 400, and is used to perform level conversion on the clock control signal to generate the input signal V of the driver module. LS1-10 ;

[0139] The driver module 400 includes a signal input terminal and a drive signal output terminal, wherein the signal input terminal is connected to the signal output terminal of the level shifter module 300, and the drive signal output terminal is connected to the drive signal V of the buck converter power stage 100. S1-10 The input terminal is used to convert the input signal into a drive signal with appropriate drive capability and provide it to the power stage of the buck converter.

[0140] Optionally, the buck converter power stage 100 includes the following operating process:

[0141] When the duty cycle is less than 0.25,

[0142] In the first stage, the first switch S1, the fourth switch S4, the fifth switch S5, the eighth switch S8, and the tenth switch S... 10 When closed, the second switch S2, the third switch S3, the sixth switch S6, the seventh switch S7 and the ninth switch S9 are opened, and one end of the second inductor L2 and the third inductor L3 are shorted to ground;

[0143] After the first phase ends, the second phase begins, involving the fourth switch S4, the seventh switch S7, the eighth switch S8, and the tenth switch S1. 10 When closed, the first switch S1, the second switch S2, the third switch S3, the fifth switch S5, the sixth switch S6 and the ninth switch S9 are opened, and one end of the first inductor L1, the second inductor L2 and the third inductor L3 are shorted to ground;

[0144] After the second stage ends, the third stage begins. Switches S4, S7, S8, and S9 are closed, and switches S1, S2, S3, S3, S5, S6, and S7 are closed. 10 Disconnect the circuit, and short-circuit one end of the first inductor L1 and the second inductor L2 to ground;

[0145] After the third stage ends, the fourth stage begins, involving the seventh switch S7, the eighth switch S8, and the tenth switch S1. 10 When closed, the first switch S1, the second switch S2, the third switch S3, the fourth switch S4, the fifth switch S5, the sixth switch S6 and the ninth switch S9 are opened, and one end of the first inductor L1, the second inductor L2 and the third inductor L3 are shorted to ground.

[0146] After the fourth stage ends, the fifth stage begins, involving the second switch S2, the third switch S3, the sixth switch S6, the seventh switch S7, and the tenth switch S1. 10 When closed, the first switch S1, the fourth switch S4, the fifth switch S5, the eighth switch S8 and the ninth switch S9 are opened, and one end of the first inductor L1 and the third inductor L3 are shorted to ground.

[0147] After the fifth stage ends, the sixth stage begins, involving the third switch S3, the seventh switch S7, the eighth switch S8, and the tenth switch S1. 10 When closed, the first switch S1, the second switch S2, the fourth switch S4, the fifth switch S5, the sixth switch S6 and the ninth switch S9 are opened, and one end of the first inductor L1, the second inductor L2 and the third inductor L3 are shorted to ground.

[0148] After the sixth stage ends, the seventh stage begins. Switches S3, S7, S8, and S9 are closed, while switches S1, S2, S4, S5, S6, and S7 are closed. 10 Disconnect the circuit, and short-circuit one end of the first inductor L1 and the second inductor L2 to ground;

[0149] After the seventh stage ends, the eighth stage begins, involving the seventh switch S7, the eighth switch S8, and the tenth switch S10. 10 When closed, the first switch S1, the second switch S2, the third switch S3, the fourth switch S4, the fifth switch S5, the sixth switch S6 and the ninth switch S9 are opened, and one end of the first inductor L1, the second inductor L2 and the third inductor L3 are shorted to ground.

[0150] After the eighth stage ends, the first stage begins, and the behavior of the switches and inductors cycles in this order.

[0151] Optionally, the buck converter power stage 100 includes the following operating process:

[0152] When the duty cycle is 0.25,

[0153] In the first stage, the first switch S1, the fourth switch S4, the fifth switch S5, the eighth switch S8, and the tenth switch S... 10 When closed, the second switch S2, the third switch S3, the sixth switch S6, the seventh switch S7 and the ninth switch S9 are opened, and one end of the second inductor L2 and the third inductor L3 are shorted to ground;

[0154] After the first stage ends, the second stage begins. Switches S4, S7, S8, and S9 are closed, and switches S1, S2, S3, S3, S5, S6, and S7 are closed. 10 Disconnect the circuit, and short-circuit one end of the first inductor L1 and the second inductor L2 to ground;

[0155] After the second phase ends, the third phase begins, involving the seventh switch S7, the eighth switch S8, and the tenth switch S1. 10 When closed, the first switch S1, the second switch S2, the third switch S3, the fourth switch S4, the fifth switch S5, the sixth switch S6 and the ninth switch S9 are opened, and one end of the first inductor L1, the second inductor L2 and the third inductor L3 are shorted to ground.

[0156] After the third stage ends, the fourth stage begins, involving the second switch S2, the third switch S3, the sixth switch S6, the seventh switch S7, and the tenth switch S1. 10 When closed, the first switch S1, the fourth switch S4, the fifth switch S5, the eighth switch S8 and the ninth switch S9 are opened, and one end of the first inductor L1 and the third inductor L3 are shorted to ground.

[0157] After the fourth stage ends, the fifth stage begins. Switches S3, S7, S8, and S9 are closed, while switches S1, S2, S4, S5, S6, and S7 are closed. 10 Disconnect the circuit, and short-circuit one end of the first inductor L1 and the second inductor L2 to ground;

[0158] After the fifth stage ends, the sixth stage begins, involving the seventh switch S7, the eighth switch S8, and the tenth switch S1. 10 When closed, the first switch S1, the second switch S2, the third switch S3, the fourth switch S4, the fifth switch S5, the sixth switch S6 and the ninth switch S9 are opened, and one end of the first inductor L1, the second inductor L2 and the third inductor L3 are shorted to ground.

[0159] After the sixth stage ends, the first stage begins, and the behavior of the switches and inductors cycles in this order.

[0160] Optionally, the buck converter power stage 100 includes the following operating process:

[0161] When the duty cycle is greater than 0.25 and less than 0.5,

[0162] In the first stage, the first switch S1, the fourth switch S4, the fifth switch S5, the eighth switch S8, and the tenth switch S... 10 When closed, the second switch S2, the third switch S3, the sixth switch S6, the seventh switch S7 and the ninth switch S9 are opened, and one end of the second inductor L2 and the third inductor L3 are shorted to ground;

[0163] After the first stage ends, the second stage begins. Switches S1, S4, S5, S8, and S9 are closed, while switches S2, S3, S6, S7, and S8 are closed. 10 Disconnect, and short-circuit one end of the second inductor L2 to ground;

[0164] After the second stage ends, the third stage begins. Switches S4, S7, S8, and S9 are closed, and switches S1, S2, S3, S3, S5, S6, and S7 are closed. 10 Disconnect the circuit, and short-circuit one end of the first inductor L1 and the second inductor L2 to ground;

[0165] After the third stage ends, the fourth stage begins, involving the seventh switch S7, the eighth switch S8, and the tenth switch S1. 10When closed, the first switch S1, the second switch S2, the third switch S3, the fourth switch S4, the fifth switch S5, the sixth switch S6 and the ninth switch S9 are opened, and one end of the first inductor L1, the second inductor L2 and the third inductor L3 are shorted to ground.

[0166] After the fourth stage ends, the fifth stage begins, involving the second switch S2, the third switch S3, the sixth switch S6, the seventh switch S7, and the tenth switch S1. 10 When closed, the first switch S1, the fourth switch S4, the fifth switch S5, the eighth switch S8 and the ninth switch S9 are opened, and one end of the first inductor L1 and the third inductor L3 are shorted to ground.

[0167] After the fifth stage ends, the sixth stage begins. Switches S2, S3, S6, S7, and S9 are closed, while switches S1, S4, S5, S8, and S9 are closed. 10 Disconnect, and short-circuit one end of the first inductor L1 to ground;

[0168] After the sixth stage ends, the seventh stage begins. Switches S3, S7, S8, and S9 are closed, while switches S1, S2, S4, S5, S6, and S7 are closed. 10 Disconnect the circuit, and short-circuit one end of the first inductor L1 and the second inductor L2 to ground;

[0169] After the seventh stage ends, the eighth stage begins, involving the seventh switch S7, the eighth switch S8, and the tenth switch S10. 10 When closed, the first switch S1, the second switch S2, the third switch S3, the fourth switch S4, the fifth switch S5, the sixth switch S6 and the ninth switch S9 are opened, and one end of the first inductor L1, the second inductor L2 and the third inductor L3 are shorted to ground.

[0170] After the eighth stage ends, the first stage begins, and the behavior of the switches and inductors cycles in this order.

[0171] Optionally, the buck converter output voltage V OUT With input voltage V IN The relationship is:

[0172] V OUT =D / 2·V IN , where D is the proportion of the conduction time of the first switch S1 in one cycle to that cycle, i.e., the duty cycle.

[0173] Optionally, the first inductor L1 and the second inductor L2 have the same inductance value, and the third inductor L3 has an inductance value of half that of the first inductor L1.

[0174] To make the technical solution of the present invention clearer and more understandable, it is now combined with Figures 1 to 8 Preferred embodiments of the present invention will be described in detail, but it should be understood that the described embodiments are merely exemplary and not restrictive.

[0175] Figure 1 The overall architecture of the voltage-controlled, low-voltage-stress, three-inductor buck converter of the present invention is shown. As described above, the converter includes a buck converter power stage 100, a controller module 200, a level shifter module 300, and a driver module 400.

[0176] The power input terminal of the buck converter power stage 100 is connected to the power supply voltage V. IN The reference ground is grounded, the load terminal is connected to load 500, the output terminals of the third and fifth voltage switching nodes are respectively connected to the corresponding input terminals of the controller module 200, and the drive signal input terminal is connected to the drive signal output terminal of the driver module 400. As shown in the figure, the buck converter power stage 100 internally includes a buck converter switching circuit, three inductors L1, L2 and L3, and two flying capacitors C. F1 and C F2 and output capacitor C O Inductor L1 is coupled between the third voltage switching node V3 and the load, inductor L2 is coupled between the fourth voltage switching node V4 and the load, and inductor L3 is coupled between the fifth voltage switching node V5 and the load, together providing current to the load. Output capacitor C... O Coupled between the load and reference ground to smooth the output voltage V OUT Reduce ripple and improve the stability of output voltage.

[0177] Controller module 200 receives the output voltage V of buck converter power stage 100. OUT The third voltage switching node voltage V3 and the fifth voltage switching node voltage V5, combined with the reference voltage V REF Generate clock control signal V CLK1-10 It is then output to the level shifter module 300.

[0178] The level shifter module 300 converts the clock control signal V output by the controller module 200 into a voltage level. CLK1-10 The voltage is converted to a suitable voltage domain to generate the input signal V of the driver module 400. LS1-10 .

[0179] The driver module 400 converts the output signal V of the level shifter module 300 into a signal V. LS1-10 Converted into a drive signal V that can drive the power transistor. S1-10 And provides 100 to the power stage of the buck converter.

[0180] When the entire system is working, the buck converter power stage 100 operates at the drive signal V. S1-10 Under the control of the input voltage V IN Through the power transistor and the flight capacitor C F1 and C F2 And inductors L1, L2 and L3 generate the output voltage V OUT Flight capacitor C F1 and C F2 By absorbing some of the voltage stress, the breakdown voltage of the power transistor is reduced, allowing the use of a power transistor with low voltage stress at high supply voltages. The three inductors L1, L2, and L3 work together to provide current to the load 500, contributing to improved efficiency under high load currents.

[0181] Figure 2 A schematic diagram of the controller module 200 of the buck converter disclosed in this application is shown. Figure 2 As shown, the controller module 200 includes a current balancing module 210, a RAMP generation module 220, an error amplifier and compensation module 230, a PWM generation module 240, and a non-overlapping clock module 250.

[0182] The input terminal of the current balancing module 210 receives the voltage V3 of the third voltage switching node and the voltage V5 of the fifth voltage switching node. By detecting the voltages of these two nodes, it obtains the relationship between the currents in inductors L1 and L3 and outputs a comparison signal V. CAL The comparison signal V CAL Connect to the input terminal of RAMP generation module 220.

[0183] RAMP generation module 220 receives the comparison signal V output by current balancing module 210. CAL Generate the first ramp signal V RAMP1 Second ramp signal V RAMP2 and the third ramp signal V RAMP3 These three ramp signals are connected to the corresponding input terminals of the PWM generation module 240, respectively.

[0184] The input of the error amplifier and compensation module 230 receives the output voltage V fed back from the power stage 100 of the buck converter. OUT and reference voltage V REF An error signal V is generated through an error amplifier and a compensation network. EA This signal is connected to the error signal input terminal of the PWM generation module 240.

[0185] PWM generation module 240 receives the error signal V output by error amplifier and compensation module 230. EA and compare it with the first ramp signal V output by the RAMP generation module 220.RAMP1 Second ramp signal V RAMP2 and the third ramp signal V RAMP3 The comparison is performed. After logical processing, the PWM generation module 240 generates the first PWM signal V. PWM1 The second PWM signal V PWM2 and the third PWM signal V PWM3 These three signals are connected to the corresponding input terminals of the non-overlapping clock module 250.

[0186] The non-overlapping clock module 250 receives the first PWM signal V output by the PWM generation module 240. PWM1 The second PWM signal V PWM2 and the third PWM signal V PWM3 It then processes the data to generate a clock control signal V that controls the power transistor to turn on and off. CLK1-10 These control signals will be output to the level shifter module 300.

[0187] The structural design of this controller module can effectively coordinate the working states of the three inductors, ensuring that the power transistor is turned on or off at the appropriate time, while ensuring that the flying capacitor correctly bears part of the voltage stress, thereby achieving efficient voltage conversion function.

[0188] Figure 3 A schematic diagram of the power stage 100 and load 500 of the buck converter disclosed in this application is shown. Figure 3 As shown, the power stage includes a power switching circuit and two flying capacitors C. F1 and C F2 Three inductors L1, L2, and L3, and an output capacitor C O .

[0189] The power switching circuit consists of ten switches S1 to S2. 10 Composition. The first switch S1 is coupled to the power input terminal V. IN Between the first voltage switching node output terminal V1 and the second switch S2, the drive signal VS1 is received to control its switching state. The second switch S2 is coupled to the power input terminal V. INThe first switch S1 is coupled between the output terminal V2 of the second voltage switching node and the intermediate potential node VMID, and is controlled by the drive signal VS2. The second switch S4 is coupled between the output terminal V2 of the second voltage switching node and the intermediate potential node VMID, and is controlled by the drive signal VS4. The third switch S5 is coupled between the intermediate potential node VMID and the output terminal V3 of the third voltage switching node, and is controlled by the drive signal VS5. The sixth switch S6 is coupled between the intermediate potential node VMID and the output terminal V4 of the fourth voltage switching node, and is controlled by the drive signal VS6. The seventh switch S7 is coupled between the output terminal V3 of the third voltage switching node and the reference ground, and is controlled by the drive signal VS7. The eighth switch S8 is coupled between the output terminal V4 of the fourth voltage switching node and the reference ground, and is controlled by the drive signal VS8. The ninth switch S9 is coupled between the intermediate potential node VMID and the output terminal V5 of the fifth voltage switching node, and is controlled by the drive signal VS9. The tenth switch S... 10 Coupled between the output terminal V5 of the fifth voltage switching node and the reference ground terminal, it receives the drive signal VS. 10 control.

[0190] First flying capacitor C F1 Coupled between the output terminal V1 of the first voltage switching node and the output terminal V3 of the third voltage switching node. Second flying capacitor C F2 These two flying capacitors are coupled between the output terminals V2 and V4 of the second and fourth voltage switching nodes. They are used to absorb some of the voltage stress, reducing the withstand voltage requirement of the power switch.

[0191] The first inductor L1 is coupled between the output terminal V3 of the third voltage switching node and the load terminal. The second inductor L2 is coupled between the output terminal V4 of the fourth voltage switching node and the load terminal. The third inductor L3 is coupled between the output terminal V5 of the fifth voltage switching node and the load terminal. These three inductors work together to provide current to the load 500, improving the conversion efficiency under high load current.

[0192] Output capacitor C O It is coupled between the load terminal and the reference ground terminal to smooth the ripple of the output voltage and improve the stability of the output voltage.

[0193] Under steady-state operation, the first flying capacitor C F1 Voltage across terminals and second flying capacitor C F2 The voltage across the terminals remains at the input voltage V. IN This reduces the voltage withstand requirement of the power switch by half, allowing the use of low-voltage-stress power devices under high input voltage conditions and improving system performance.

[0194] Figure 4 This illustration shows the switching state diagram and inductor current diagram of a buck converter according to an embodiment of this application when the duty cycle is less than 0.25. The diagram shows the on / off state of each switch and the current changes of the three inductors over a complete duty cycle.

[0195] like Figure 4 As shown, the switch status section (top of the figure) displays S1 to S2. 10 The diagram shows the switching states of each switch within one cycle T. The horizontal axis represents time t, and the vertical axis "State" represents the switch state. A high level indicates the switch is ON, and a low level indicates the switch is OFF. As shown in the diagram, S1 / S5 indicates that the first and fifth switches have the same conduction mode, and the proportion of their conduction time to one cycle is defined as the duty cycle D. Similarly, S2 / S6 indicates that the second and sixth switches also have the same conduction mode, but their conduction times are staggered from S1 / S5. Other switches S3, S4, S7, S8, S9, and S... 10 The on / off timing is also clearly shown in the figure. They switch states in a specific order to ensure the normal operation of the converter.

[0196] The inductor current section (below the figure) shows the current variation curves of the three inductors L1, L2, and L3. Here, IL1 represents the current in the first inductor L1, IL2 represents the current in the second inductor L2, and IL3 represents the current in the third inductor L3. From the figure, we can observe that:

[0197] The current in inductor L1 rises during the on-state of S1 / S5 and falls during the off-state, exhibiting a sawtooth wave pattern.

[0198] The current in inductor L2 rises during the on-state of S2 / S6 and falls during the off-state, and its waveform has a phase difference with the current waveform of L1.

[0199] The current frequency of inductor L3 is twice that of L1 and L2, rising during the on-state of S9 and falling during the off-state of S9.

[0200] This specific switching timing and inductor current mode enable the converter to effectively utilize the flying capacitor to bear part of the voltage stress when the duty cycle is less than 0.25, while the three inductors work together to provide current to the load, achieving efficient voltage conversion. The vertical dashed lines in the figure divide the entire cycle into multiple stages, corresponding to the different operating stages described in the claims, each stage having a specific combination of switching states.

[0201] Figure 5This diagram illustrates the operation of a buck converter according to an embodiment of this application when the duty cycle is less than 0.25. The diagram visually demonstrates the switching states and current paths at each stage of a complete operating cycle through eight consecutive circuit state diagrams.

[0202] like Figure 5 As shown, the entire working process is divided into eight stages, which are connected in sequence by arrows to form a loop. The input voltage V is clearly marked in the circuit state diagram for each stage. IN Output voltage V OUT Each switch (S1 to S2) 10 The switching state of ) and the two flying capacitors (C F1 and C F2 The location of the inductor and the connection of the three inductors (L1, L2 and L3).

[0203] In the first stage (top left of the diagram), the first switch S1, the fourth switch S4, the fifth switch S5, the eighth switch S8, and the tenth switch S... 10 It is in the ON state, and other switches are OFF. In this state, the flight capacitor C... F1 Being charged, and C F2 When discharging, the current in inductor L1 increases, while the current in inductors L2 and L3 decreases.

[0204] As the system enters the second phase (below the first phase), the switch states change: fourth switch S4, seventh switch S7, eighth switch S8, and tenth switch S1. 10 When the circuit is turned on, the other switches are turned off. At this time, one end of inductors L1, L2, and L3 is shorted to ground, and their currents all show a decreasing trend.

[0205] In the third stage (below the second stage), switches S4, S7, S8, and S9 are turned on, while the other switches are turned off. At this time, the flight capacitor C... F2 When discharging, the current in inductor L3 increases, while the current in inductors L1 and L2 decreases.

[0206] In the fourth stage (below the third stage), the seventh switch S7, the eighth switch S8, and the tenth switch S 10 When the circuit is turned on, all other switches are turned off. At this time, one end of all inductors is shorted to ground, and their currents all show a decreasing trend.

[0207] In the fifth stage (to the right of the fourth stage), the second switch S2, the third switch S3, the sixth switch S6, the seventh switch S7, and the tenth switch S... 10 The circuit is activated, and all other switches are deactivated. At this time, the flight capacitor C... F1 Discharge, C F2When charged, the current in inductor L2 increases, while the current in inductors L1 and L3 decreases.

[0208] The sixth to eighth stages sequentially change the switching states to complete a full working cycle, then return to the first stage to restart the cycle. Through this carefully designed series of switching sequences, the system can effectively control the charging and discharging process of the flight capacitor and the current paths of the three inductors, achieving efficient voltage conversion.

[0209] Throughout the entire operation, the flight capacitor C F1 and C F2 By bearing part of the voltage stress, the withstand voltage requirement of the power switch is effectively reduced; at the same time, the three inductors L1, L2 and L3 work together to provide current to the load, improving the conversion efficiency under large load current.

[0210] Figure 6 This illustration shows a switching state diagram and inductor current diagram of a buck converter according to an embodiment of this application when the duty cycle is greater than 0.25 and less than 0.5. This diagram is related to... Figure 4 Similarly, but showing the working status under different duty cycle conditions.

[0211] like Figure 6 As shown, the switch status section (top of the diagram) displays S1 to S2. 10 The switching state of each switch within one cycle T. The horizontal axis represents time t, and the vertical axis "State" represents the switch state. A high level indicates that the switch is on (ON), and a low level indicates that the switch is off (OFF). S1 / S5 indicates that the first and fifth switches have the same conduction mode, and their on-time as a percentage of one cycle (duty cycle D) is greater than 0.25 and less than 0.5. S2 / S6 indicates that the second and sixth switches also have the same conduction mode, but their on-time is staggered from S1 / S5.

[0212] and Figure 4 compared to, Figure 6 The on-time of switches S1 / S5 increases significantly, reflecting the characteristic of an increased duty cycle. Furthermore, the on-time of other switches S3, S4, S7, S8, S9, and S... 10 The on / off timing is also adjusted accordingly to adapt to the operating requirements of a larger duty cycle.

[0213] The inductor current section (below the figure) shows the current variation curves of the three inductors L1, L2, and L3. Here, IL1 represents the current in the first inductor L1, IL2 represents the current in the second inductor L2, and IL3 represents the current in the third inductor L3. Figure 4 Similarly, the current in all three inductors exhibits a sawtooth waveform, but due to the increase in duty cycle, the characteristics of the current waveform also change accordingly:

[0214] The current in inductor L1 increases significantly during the conduction period of S1 / S5 due to the extended conduction time.

[0215] The current in inductor L2 increases during the conduction of S2 / S6, and the magnitude of the increase varies with the increase of the duty cycle.

[0216] The frequency of current change in inductor L3 is still twice that of current change in L1 and L2, rising during the on-state of S9 and falling during the off-state of S9.

[0217] The vertical dashed lines in the diagram divide the entire cycle into multiple stages, corresponding to the different operating stages described in the claims. With a duty cycle greater than 0.25 and less than 0.5, the converter, through this specific switching sequence and inductor current mode, can still effectively utilize the flying capacitor to bear part of the voltage stress, while the three inductors work together to provide current to the load, achieving efficient voltage conversion, and the output voltage to input voltage ratio can reach a larger value.

[0218] Figure 7 This diagram illustrates the operation of a buck converter according to an embodiment of this application when the duty cycle is greater than 0.25 and less than 0.5. Figure 5 similar, Figure 7 The switching states and current paths at each stage of a complete operating cycle are visually represented by eight consecutive circuit state diagrams, but these correspond to different duty cycle conditions.

[0219] like Figure 7 As shown, the entire working process is also divided into eight stages, which are connected in sequence by arrows to form a loop. The input voltage V is clearly marked in the circuit state diagram of each stage. IN Output voltage V OUT Each switch (S1 to S2) 10 The switching state of ) and the two flying capacitors (C F1 and C F2 The location of the inductor and the connection of the three inductors (L1, L2 and L3).

[0220] In the first stage (top left of the diagram), the first switch S1, the fourth switch S4, the fifth switch S5, the eighth switch S8, and the tenth switch S... 10 It is in the ON state, and other switches are OFF. In this state, the flight capacitor C... F1 Being charged, and C F2 When discharging, the current in inductor L1 increases, while the current in inductors L2 and L3 decreases.

[0221] and Figure 5 The second phase is different. Figure 7In the second stage (below the first stage), switches S1, S4, S5, S8, and S9 are turned on, while the other switches are turned off. This change reflects the adjustment as the duty cycle increases. At this time, the current in inductors L1 and L3 increases, while the current in inductor L2 decreases.

[0222] In the third stage (below the second stage), switches S4, S7, S8, and S9 are turned on, while the other switches are turned off. At this time, the flight capacitor C... F2 When discharging, the current in inductor L3 increases, while the current in inductors L1 and L2 decreases.

[0223] In the fourth stage (below the third stage), the seventh switch S7, the eighth switch S8, and the tenth switch S 10 When the circuit is turned on, all other switches are turned off. At this time, one end of all inductors is shorted to ground, and their currents all show a decreasing trend.

[0224] In the fifth stage (to the right of the fourth stage), the second switch S2, the third switch S3, the sixth switch S6, the seventh switch S7, and the tenth switch S... 10 The circuit is activated, and all other switches are deactivated. At this time, the flight capacitor C... F1 Discharge, C F2 When charged, the current in inductor L2 increases, while the current in inductors L1 and L3 decreases.

[0225] Figure 7 The sixth stage and Figure 5 There are also significant differences: the second switch S2, the third switch S3, the sixth switch S6, the seventh switch S7, and the ninth switch S9 are turned on, while the other switches are turned off. At this time, the current in inductors L2 and L3 increases, while the current in L1 decreases. This change also reflects the characteristics when the duty cycle increases.

[0226] The seventh and eighth stages change the switching states sequentially to complete a full duty cycle, then return to the first stage to restart the cycle. Through this series of specific switching sequences for duty cycles greater than 0.25 and less than 0.5, the system can more flexibly control the ratio of output voltage to input voltage, while maintaining the advantages of the flying capacitor effectively bearing part of the voltage stress and the three inductors working together to provide current to the load.

[0227] Figure 8 A flowchart illustrating the operation of a buck converter according to an embodiment of this application is shown. The flowchart clearly presents the overall operation of the system and the signal transmission relationships between the functional modules in the form of a block diagram.

[0228] like Figure 8As shown, the entire workflow 600 comprises multiple functional steps that are interconnected to form a closed-loop control system. First, step 610 represents the process by which the power stage converts the input voltage into an output voltage. Simultaneously, step 620 is responsible for generating a comparison signal based on the voltage of the power stage's voltage switching node. These two steps then transmit their output signals to subsequent processing stages.

[0229] Step 640 receives the comparison signal generated in step 620 and generates a ramp signal accordingly. Simultaneously, step 630 receives the output voltage and reference voltage and generates an error signal. These two signals are combined in step 650 to generate a pulse width modulation signal based on the error signal and the ramp signal.

[0230] Next, step 660 generates a non-overlapping clock control signal based on the pulse width modulation signal to ensure safe switching of the power switch without short circuit. Step 670 converts the clock control signal into a control signal in a suitable voltage domain to meet the driver's operating requirements. Step 680 generates a drive signal capable of driving the power transistor based on the control signal.

[0231] Finally, step 690 controls the switching on and off of the power transistor based on the drive signal, determining the operating state of the power stage, thereby affecting the output voltage and completing the entire control closed loop. The arrows in the diagram clearly indicate the signal flow direction, demonstrating how the various parts of the system work together to achieve precise voltage conversion.

[0232] from Figure 8 As can be seen from the process, the buck converter of this application adopts an advanced closed-loop control strategy. By using the voltage information of the voltage switching node to assist control, combined with traditional feedback control based on the output voltage, it achieves precise adjustment of the coordinated operation of the flying capacitor and the three inductors, thereby reducing the voltage stress of the power tube and improving the efficiency under high load current.

[0233] Working principle:

[0234] The working principle of the voltage-controlled low-voltage stress three-inductor buck converter will be explained in detail below with reference to the accompanying drawings and embodiments.

[0235] The working principle of the step-down converter power stage 100 is as follows:

[0236] refer to Figure 3 The power stage 100 contains ten power switches S1-S 10 Two flying capacitors C F1 C F2And three inductors L1, L2, and L3. The first switch S1 is coupled between the power input terminal and the output terminal V1 of the first voltage switching node. The second switch S2 is coupled between the power input terminal and the output terminal V2 of the second voltage switching node. The third switch S3 and the fourth switch S4 are coupled between V1, V2, and the intermediate potential node VMID, respectively. The fifth switch S5 and the sixth switch S6 are coupled between VMID and the output terminals V3 and V4 of the third and fourth voltage switching nodes, respectively. The seventh switch S7 and the eighth switch S8 are coupled between V3, V4, and the reference ground terminal, respectively. The ninth switch S9 is coupled between VMID and the output terminal V5 of the fifth voltage switching node. The tenth switch S... 10 Coupled between V5 and the reference ground. Each switch S1-S 10 Receive drive signals VS1-VS respectively 10 To control its on / off state.

[0237] Under steady-state operation, the first flying capacitor C F1 Second flight capacitor C F2 The voltage across the terminals remains at the input voltage V. IN Half of the total time. When the power switches are operating, the first switch S1 and the second switch S2 conduct once within one cycle, and the conduction time is approximately equal. The ninth switch S9 conducts twice within one cycle, and the conduction time of each time is approximately half the conduction time of the first switch S1. Specifically, the conduction times of the first switch S1 and the second switch S2 differ by half a cycle, and the conduction time of the ninth switch S9 differs from that of the first switch S1 by a quarter of a cycle.

[0238] When the duty cycle D is less than 0.25, such as Figure 4 and Figure 5 As shown, the system operates in a cyclical manner across eight stages. In the first stage, S1, S4, S5, S8, S... 10 When the circuit is turned on, one end of the second inductor L2 and the third inductor L3 is shorted to ground; in the second stage, S4, S7, S8, and S... 10 In the first stage, all three inductors are shorted to ground at one end; in the second stage, S4, S7, S8, and S9 are turned on, and one end of the first inductor L1 and the second inductor L2 are shorted to ground; in the third stage, S4, S7, S8, and S9 are turned on, and one end of the first inductor L1 and the second inductor L2 are shorted to ground; in the fourth to eighth stages, according to... Figure 5 The switch combinations shown operate sequentially, eventually returning to the first stage to begin a new cycle.

[0239] When the duty cycle D equals 0.25, the system completes one cycle through six operating stages. The switching states in the first stage are S1, S4, S5, S8, and S... 10 Once activated, it then enters the other five stages, operating according to a specific switching sequence.

[0240] When the duty cycle D is greater than 0.25 and less than 0.5, such as Figure 6 and Figure 7 As shown, the system operates in an eight-stage cycle, but the switch combinations in the second and sixth stages differ significantly from those when D < 0.25. In the second stage, S1, S4, S5, S8, and S9 are on, while in the sixth stage, S2, S3, S6, S7, and S9 are on. These changes enable the system to adapt to operating requirements with larger duty cycles.

[0241] By controlling the duty cycle D, the system output voltage V OUT With input voltage V IN The relationship is: V OUT = (D / 2)·V IN .

[0242] The working principle of controller module 200 is as follows:

[0243] refer to Figure 2 The controller module 200 includes a current balancing module 210, a RAMP generation module 220, an error amplifier and compensation module 230, a PWM generation module 240, and a non-overlapping clock module 250. The current balancing module 210 detects the voltages across V3 and V5 and outputs a voltage comparison signal V. CAL RAMP generation module 220 is based on V CAL Generate three ramp signals V RAMP1 V RAMP2 and V RAMP3 The error amplifier and compensation module 230 will output voltage V. OUT With reference voltage V REF Compare and generate an error signal V EA The PWM generation module 240 will generate V EA Comparing with the three ramp signals, three PWM signals V are generated. PWM1 V PWM2 and V PWM3 The non-overlapping clock module 250 processes these PWM signals to generate the clock control signal V that controls the power switch. CLK1-10 .

[0244] The level shifter module 300 will control signal V CLK1-10 Converted to a signal V in the appropriate voltage domain LS1-10 The driver module 400 further converts these signals into drive signals V for driving the power switch. S1-10 .

[0245] Based on the above working principle, the flight capacitor C in this application F1 C F2By bearing part of the voltage stress, the withstand voltage requirement of the power switch is reduced. The three inductors L1, L2, and L3 work together to provide current to the load, thereby improving efficiency under high load current.

[0246] To better understand the technical solution of this application, a specific example is provided below. The details listed in this example are mainly for ease of understanding and are not intended to limit the scope of protection of this application.

[0247] This example provides a voltage-controlled, low-voltage-stress three-inductor buck converter to meet the requirements of effectively reducing voltage stress on power devices and improving conversion efficiency under high load current conditions.

[0248] This example of a voltage-controlled, low-voltage-stress, three-inductor buck converter includes:

[0249] The buck converter power stage is used to generate an output voltage based on the input voltage through a power transistor, two flying capacitors, and three inductors, under the control of a drive signal.

[0250] The controller module receives the output voltage of the buck converter power stage and generates a clock control signal by combining the reference voltage, the third voltage switching node voltage, and the fifth voltage switching node voltage.

[0251] A level shifter module is used to convert the clock control signal output by the controller module to a suitable voltage domain to generate the input signal of the driver module;

[0252] A driver module is used to convert the output signal of the level shifter module into a drive signal capable of driving the power transistor and provide it to the power stage of the buck converter.

[0253] In this example, optionally, the buck converter power stage includes:

[0254] The system includes a power input terminal, a reference ground terminal, a load terminal, a third voltage switching node output terminal, a fifth voltage switching node output terminal, and a drive signal input terminal. The power input terminal is connected to the power supply voltage, the reference ground terminal is grounded, the load terminal is connected to the load, the third voltage switching node output terminal and the fifth voltage switching node output terminal are connected to the third voltage switching node input terminal and the fifth voltage switching node input terminal of the controller module, and the drive signal input terminal is connected to the drive signal output terminal of the driver module.

[0255] A buck converter switching circuit, which is a collection of power switches in a buck converter, including a power input terminal, a reference ground terminal, a load terminal, a first voltage switching node output terminal, a second voltage switching node output terminal, a third voltage switching node output terminal, a fourth voltage switching node output terminal, and a fifth voltage switching node output terminal;

[0256] A first flying capacitor is coupled between the output of the first voltage switching node and the output of the third voltage switching node.

[0257] The second flying capacitor is coupled between the output of the second voltage switching node and the output of the fourth voltage switching node;

[0258] A first inductor is coupled between the output of the third voltage switching node and the load.

[0259] The second inductor is coupled between the output of the fourth voltage switching node and the load.

[0260] A third inductor is coupled between the output of the fifth voltage switching node and the load.

[0261] An output capacitor, coupled between the load terminal and the reference ground terminal, is used to smooth the ripple of the output voltage and improve the stability of the output voltage.

[0262] In this example, optionally, the buck converter switching circuit further includes:

[0263] A first switch is coupled between the power input terminal and the output terminal of the first voltage switching node.

[0264] The second switch is coupled between the power input terminal and the output terminal of the second voltage switching node.

[0265] A third switch is coupled between the output of the first voltage switching node and the intermediate potential node;

[0266] A fourth switch is coupled between the output of the second voltage switching node and the intermediate potential node;

[0267] The fifth switch is coupled between the intermediate potential node and the output terminal of the third voltage switching node;

[0268] The sixth switch is coupled between the intermediate potential node and the output of the fourth voltage switching node;

[0269] A seventh switch is coupled between the output of the third voltage switching node and the reference ground.

[0270] The eighth switch is coupled between the output of the fourth voltage switching node and the reference ground.

[0271] The ninth switch is coupled between the intermediate potential node and the output of the fifth voltage switching node;

[0272] The tenth switch is coupled between the output terminal of the fifth voltage switching node and the reference ground terminal.

[0273] In this example, optionally, the controller module includes:

[0274] The system includes a third voltage switching node input, a fifth voltage switching node input, a reference voltage input, an output voltage input, and a clock control signal output. The third voltage switching node input is connected to the third voltage switching node output of the buck converter power stage, the fifth voltage switching node input is connected to the fifth voltage switching node output of the buck converter power stage, the reference voltage input receives an externally provided reference voltage signal, the output voltage input is connected to the load terminal, and the clock control signal output is connected to the control signal input of the level shifter.

[0275] The current balancing module is used to detect the voltages of the third voltage switching node and the fifth voltage switching node, and output a voltage comparison signal that participates in the generation of the ramp signal. It includes the input terminal of the third voltage switching node, the input terminal of the fifth voltage switching node, and the voltage comparison signal output terminal.

[0276] The RAMP generation module is used to receive the comparison signal output by the current balance module and generate a first ramp signal, a second ramp signal and a third ramp signal. It includes a voltage comparison signal input terminal, a first ramp signal output terminal, a second ramp signal output terminal and a third ramp signal output terminal, wherein the voltage comparison signal input terminal is connected to the voltage comparison signal output terminal.

[0277] An error amplifier and compensation module are used to detect the output voltage of the power stage of the buck converter and the reference voltage, and generate an error signal through the error amplifier and compensation network, including the reference voltage input terminal, the output voltage input terminal, and the error signal output terminal.

[0278] The PWM generation module receives the error signal output by the error amplifier and compensation module and the first ramp signal, second ramp signal, and third ramp signal output by the RAMP generation module, and generates a first PWM signal, a second PWM signal, and a third PWM signal. It includes an error signal input terminal, a first ramp signal input terminal, a second ramp signal input terminal, a third ramp signal input terminal, a first PWM signal output terminal, a second PWM signal output terminal, and a third PWM signal output terminal. The error signal input terminal is connected to the error signal output terminal, the first ramp signal input terminal is connected to the first ramp signal output terminal, the second ramp signal input terminal is connected to the second ramp signal output terminal, and the second ramp signal input terminal is connected to the second ramp signal output terminal.

[0279] The non-overlapping clock module is used to receive and process the first PWM signal, the second PWM signal, and the third PWM signal output by the PWM generation module to generate a clock control signal for controlling the power transistor to turn on and off. It includes a first PWM signal input terminal, a second PWM signal input terminal, a third PWM signal input terminal, and a clock control signal output terminal, wherein the first PWM signal input terminal is connected to the first PWM signal output terminal, the second PWM signal input terminal is connected to the second PWM signal output terminal, and the second PWM signal input terminal is connected to the second PWM signal output terminal.

[0280] In this example, optionally, the level shifter module includes a control signal input terminal and a signal output terminal. The control signal input terminal is connected to the clock control signal output terminal of the controller module, and the signal output terminal is connected to the signal input terminal of the driver module.

[0281] The driver module includes a signal input terminal and a drive signal output terminal. The signal input terminal is connected to the signal output terminal of the level shifter, and the drive signal output terminal is connected to the drive signal input terminal of the power stage of the buck converter.

[0282] In this example, optionally, under steady-state operation, the voltage across the first flying capacitor and the voltage across the second flying capacitor are maintained at half the input voltage.

[0283] In this example, the following workflows are optional:

[0284] When the duty cycle is less than 0.25,

[0285] In the first stage, the first, fourth, fifth, eighth and tenth switches are closed, the second, third, sixth, seventh and ninth switches are open, and one end of the second and third inductors is short-circuited to ground.

[0286] After the first stage ends, the second stage begins. Switches 4, 7, 8 and 10 are closed, and switches 1, 2, 3, 5, 6 and 9 are opened. One end of inductor 1, inductor 2 and inductor 3 is short-circuited to ground.

[0287] After the second stage ends, the third stage begins. Switches four, seven, eight, and nine are closed, while switches one, two, three, five, six, and ten are open. One end of the first inductor and one end of the second inductor are shorted to ground.

[0288] After the third stage ends, the fourth stage begins. Switches seven, eight, and ten are closed, while switches one, two, three, four, five, six, and nine are opened. One end of inductor one, two, and three is short-circuited to ground.

[0289] After the fourth stage ends, the fifth stage begins. The second, third, sixth, seventh, and tenth switches are closed, while the first, fourth, fifth, eighth, and ninth switches are open. One end of the first and third inductors is short-circuited to ground.

[0290] After the fifth stage ends, the sixth stage begins. Switches three, seven, eight, and ten are closed, while switches one, two, four, five, six, and nine are opened. One end of inductor one, two, and three is short-circuited to ground.

[0291] After the sixth stage ends, the seventh stage begins. Switches three, seven, eight, and nine are closed, while switches one, two, four, five, six, and ten are open. One end of the first inductor and one end of the second inductor are shorted to ground.

[0292] After the seventh stage ends, the eighth stage begins. The seventh, eighth, and tenth switches are closed, while the first, second, third, fourth, fifth, sixth, and ninth switches are opened. One end of the first, second, and third inductors is short-circuited to ground.

[0293] After the eighth stage ends, the first stage begins, and the behavior of the switches and inductors cycles in this order.

[0294] In this example, the following workflows are optional:

[0295] When the duty cycle is 0.25,

[0296] In the first stage, the first, fourth, fifth, eighth and tenth switches are closed, the second, third, sixth, seventh and ninth switches are open, and one end of the second and third inductors is short-circuited to ground.

[0297] After the first stage ends, the second stage begins. Switches four, seven, eight, and nine are closed, while switches one, two, three, five, six, and ten are open. One end of the first inductor and one end of the second inductor are short-circuited to ground.

[0298] After the second stage ends, the third stage begins. Switches seven, eight, and ten are closed, while switches one, two, three, four, five, six, and nine are opened. One end of inductor one, two, and three is short-circuited to ground.

[0299] After the third stage ends, the fourth stage begins. The second, third, sixth, seventh, and tenth switches are closed, while the first, fourth, fifth, eighth, and ninth switches are open. One end of the first and third inductors is short-circuited to ground.

[0300] After the fourth stage ends, the fifth stage begins. Switches three, seven, eight, and nine are closed, while switches one, two, four, five, six, and ten are open. One end of the first inductor and one end of the second inductor are short-circuited to ground.

[0301] After the fifth stage ends, the sixth stage begins. Switches seven, eight, and ten are closed, while switches one, two, three, four, five, six, and nine are opened. One end of inductor one, two, and three is short-circuited to ground.

[0302] After the sixth stage ends, the first stage begins, and the behavior of the switches and inductors cycles in this order.

[0303] In this example, the following workflows are optional:

[0304] When the duty cycle is greater than 0.25 and less than 0.5,

[0305] In the first stage, the first, fourth, fifth, eighth and tenth switches are closed, the second, third, sixth, seventh and ninth switches are open, and one end of the second and third inductors is short-circuited to ground.

[0306] After the first stage ends, the second stage begins. Switches 1, 4, 5, 8, and 9 are closed, while switches 2, 3, 6, 7, and 10 are open. One end of the second inductor is short-circuited to ground.

[0307] After the second stage ends, the third stage begins. Switches four, seven, eight, and nine are closed, while switches one, two, three, five, six, and ten are open. One end of the first inductor and one end of the second inductor are shorted to ground.

[0308] After the third stage ends, the fourth stage begins. Switches seven, eight, and ten are closed, while switches one, two, three, four, five, six, and nine are opened. One end of inductor one, two, and three is short-circuited to ground.

[0309] After the fourth stage ends, the fifth stage begins. The second, third, sixth, seventh, and tenth switches are closed, while the first, fourth, fifth, eighth, and ninth switches are open. One end of the first and third inductors is short-circuited to ground.

[0310] After the fifth stage ends, the sixth stage begins. Switches 2, 3, 6, 7, and 9 are closed, while switches 1, 4, 5, 8, and 10 are open. One end of the first inductor is short-circuited to ground.

[0311] After the sixth stage ends, the seventh stage begins. Switches three, seven, eight, and nine are closed, while switches one, two, four, five, six, and ten are open. One end of the first inductor and one end of the second inductor are shorted to ground.

[0312] After the seventh stage ends, the eighth stage begins. The seventh, eighth, and tenth switches are closed, while the first, second, third, fourth, fifth, sixth, and ninth switches are opened. One end of the first, second, and third inductors is short-circuited to ground.

[0313] After the eighth stage ends, the first stage begins, and the behavior of the switches and inductors cycles in this order.

[0314] It should be noted that in the above example, by inserting a flying capacitor into the power stage to bear part of the voltage stress, the withstand voltage of the power transistor is reduced, allowing the use of a low-voltage-stress power transistor under high supply voltage to directly achieve step-down conversion and improve system performance; using three inductors to provide current to the load helps to improve efficiency under large load current, achieving more efficient energy transfer and a smoother output voltage.

[0315] The following detailed explanation of this example, in conjunction with the accompanying drawings, will be provided.

[0316] like Figure 1 As shown, this example of a voltage-controlled low-voltage-stress three-inductor buck converter includes a buck converter power stage 100, a controller module 200, a level shifter module 300, and a driver module 400. The power input terminal of the buck converter power stage 100 is connected to the power supply voltage, the reference ground terminal is grounded, the load terminal is connected to the load 500, the third voltage switching node output terminal and the fifth voltage switching node output terminal are connected to the third voltage switching node input terminal and the fifth voltage switching node input terminal of the controller module 200, and the drive signal input terminal is connected to the drive signal output terminal of the driver module 400. The third voltage switching node input terminal of the controller module 200 is connected to the third voltage switching node input terminal of the buck converter power stage 100. The voltage switching node output and the fifth voltage switching node input are connected to the fifth voltage switching node output of the buck converter power stage 100. The reference voltage input receives a reference voltage signal provided by the outside. The output voltage input is connected to the load terminal. The clock control signal output is connected to the control signal input of the level shifter 300. The control signal input of the level shifter module 300 is connected to the clock control signal output of the controller module 200. The signal output is connected to the signal input of the driver module 400. The signal input of the driver module 400 is connected to the signal output of the level shifter 300. The drive signal output is connected to the drive signal input of the buck converter power stage 100.

[0317] Controller module 200 receives the output voltage V of buck converter power stage 100. OUT Node voltages V3 and V5, reference voltage V REF Generates a clock control signal V that carries information about the power switch's operating status. CLK1-10 The level shifter module 300 will convert the clock control signal V output by the controller module 200 into a voltage level. CLK1-10 The voltage is converted to a suitable voltage domain to generate the input signal V of the driver module. LS1-10 The driver module 400 will convert the output signal V from the level shifter module 300. LS1-10 Converted into a drive signal V that can drive the power transistor. S1-10 And provides power to buck converter power stage 100; buck converter power stage 100, under the control of the drive signal, is based on the input power supply voltage V IN Through the power transistor and the flight capacitor C F1 and C F2 The output voltage V is generated by inductors L1, L2, and L3. OUT Output voltage V OUTThe feedback is sent to the controller module 200 to adjust the operating state of the power transistor, thereby keeping the output voltage value at the target potential.

[0318] In this example, the controller module 200 of the buck converter has the following structure: Figure 2 As shown, the system includes a current balancing module 210, a RAMP generation module 220, an error amplifier and compensation module 230, a PWM generation module 240, and a non-overlapping clock module 250. The voltage comparison signal output terminal of the current balancing module 210 is connected to the voltage comparison signal input terminal of the RAMP generation module 220. The voltage comparison signal input terminal of the RAMP generation module 220 is connected to the voltage comparison signal output terminal of the current balancing module 210. The first ramp signal output terminal, the second ramp signal output terminal, and the third ramp signal output terminal are respectively connected to the first ramp signal input terminal, the second ramp signal input terminal, and the third ramp signal input terminal of the PWM generation module 240. The error signal output terminal of the error amplifier and compensation module 230 is connected to the error signal input terminal of the PWM generation module 240. The PWM generation module 240... The error signal input terminal is connected to the error signal output terminal of the error amplifier and compensation module 230. The first ramp signal input terminal, the second ramp signal input terminal, and the third ramp signal input terminal are respectively connected to the first ramp signal output terminal, the second ramp signal output terminal, and the third ramp signal output terminal of the RAMP generation module 220. The first PWM signal output terminal, the second PWM signal output terminal, and the third PWM signal output terminal are respectively connected to the first PWM signal input terminal, the second PWM signal input terminal, and the third PWM signal input terminal of the non-overlapping clock module 250. The first PWM signal input terminal, the second PWM signal input terminal, and the third PWM signal input terminal of the non-overlapping clock module 250 are respectively connected to the first PWM signal output terminal, the second PWM signal output terminal, and the third PWM signal output terminal of the PWM generation module 240.

[0319] The current balancing module 210 detects the voltages V3 and V5 at the third and fifth voltage switching nodes, obtains the relationship between the currents in inductors L1 and L3, and outputs a signal V. CAL RAMP generation module 220 generates the first ramp signal V. RAMP1 Second ramp signal V RAMP2 Receive the comparison signal V output from the current balancing module CAL And based on V CAL Generate the third ramp signal V RAMP3 The error amplifier and compensation module 230 detects the output voltage V fed back from the power stage 100 of the buck converter. OUT and reference voltage V REF An error signal V is generated through an error amplifier and a compensation network. EA; The PWM generation module 240 receives the error signal V output by the error amplifier and compensation module 230. EA This is compared with the first ramp signal V output by the RAMP generation module 220. RAMP1 Second ramp signal V RAMP2 and the third ramp signal V RAMP3 The comparison is performed, and the first PWM signal V is generated after processing by the logic device. PWM1 The second PWM signal V PWM2 and the third PWM signal V PWM3 The non-overlapping clock module 250 receives the V output from the PWM generation module 240. PWM1 V PWM2 and the third PWM signal V PWM3 It then processes the data to generate a clock control signal V that controls the power transistor to turn on and off. CLK1-10 .

[0320] In this example, the buck converter power stage 100 and the load 500 are as follows: Figure 3 As shown, the power stage includes power transistors S1-10 and a flight capacitor C. F1 ~2, inductors L1~3 and output capacitor C O First flying capacitor C F1 Coupled between the output terminal V1 of the first voltage switching node and the output terminal V3 of the third voltage switching node; second flying capacitor C F2 The first inductor L1 is coupled between the output terminal V2 of the second voltage switching node and the output terminal V4 of the fourth voltage switching node; the second inductor L2 is coupled between the output terminal of the third voltage switching node and the load terminal; the third inductor L3 is coupled between the output terminal V5 of the fifth voltage switching node and the load terminal; and the output capacitor C is coupled between the output terminal V2 of the second voltage switching node and the load terminal. O The following switches are coupled between the load terminal and the reference ground terminal: First switch S1 is coupled between the power input terminal and the output terminal of the first voltage switching node; Second switch S2 is coupled between the power input terminal and the output terminal of the second voltage switching node; Third switch S3 is coupled between the output terminal of the first voltage switching node and the intermediate potential node VMID; Fourth switch S4 is coupled between the output terminal of the second voltage switching node and the intermediate potential node; Fifth switch S5 is coupled between the intermediate potential node and the output terminal of the third voltage switching node; Sixth switch S6 is coupled between the intermediate potential node and the output terminal of the fourth voltage switching node; Seventh switch S7 is coupled between the output terminal of the third voltage switching node and the reference ground terminal; Eighth switch S8 is coupled between the output terminal of the fourth voltage switching node and the reference ground terminal; Ninth switch S9 is coupled between the intermediate potential node and the output terminal of the fifth voltage switching node; Tenth switch S... 10 It is coupled between the output of the fifth voltage switching node and the reference ground.

[0321] The behavior of the power stage is influenced by the drive signal V. S1-10 The following describes the operation of the buck converter power stage 100 in this example.

[0322] Optional, first flying capacitor C F1 Second flight capacitor C F2 The capacitance values ​​are the same; the inductance values ​​of the first inductor L1 and the second inductor L2 are the same, and the inductance value of the third inductor L3 can be half the inductance value of the first inductor L1; under steady-state operation, the first flying capacitor C F1 Voltage across terminals and second flying capacitor C F2 The voltage across the terminals remains at the input voltage V. IN The first switch S1 and the second switch S2 conduct once in one cycle, and the conduction time is approximately equal. The ninth switch S9 conducts twice in one cycle, and the conduction time of each time is approximately half the conduction time of the first switch S1. The conduction times of the first switch S1 and the second switch S2 differ by half a cycle, and the conduction time of the ninth switch S9 differs by a quarter cycle from that of the first switch S1. The proportion of the conduction time of the first switch S1 in one cycle to that cycle is called the duty cycle D. Then, the operation process and output voltage of the buck converter power stage 100 are related to the duty cycle. The output voltage V of the buck converter OUT With input voltage V IN The relationship is:

[0323]

[0324] Optionally, the buck converter power stage 100 includes the following operating process: when the duty cycle is less than 0.25, the switching state diagram and inductor current diagram are as follows: Figure 4 As shown in the diagram, the working process is illustrated below. Figure 5 As shown, in the first stage, switches 1, 4, 5, 8, and 10 are closed, while switches 2, 3, 6, 7, and 9 are open. C F1 Being charged, C F2 Discharge occurs, the current in L1 increases, and the current in L2 and L3 decreases; after the first stage ends, the second stage begins, the fourth, seventh, eighth, and tenth switches close, and the first, second, third, fifth, sixth, and ninth switches open, causing the current in L1, L2, and L3 to decrease; after the second stage ends, the third stage begins, the fourth, seventh, eighth, and ninth switches close, and the first, second, third, fifth, sixth, and tenth switches open, C F2Discharge occurs, the current in L3 increases, and the current in L1 and L2 decreases; after the third stage ends, the fourth stage begins, the seventh, eighth, and tenth switches close, and the first, second, third, fourth, fifth, sixth, and ninth switches open, causing the current in L1, L2, and L3 to decrease; after the fourth stage ends, the fifth stage begins, the second, third, sixth, seventh, and tenth switches close, and the first, fourth, fifth, eighth, and ninth switches open, C F1 Discharge, C F2 When charging occurs, the current in L2 increases, while the current in L1 and L3 decreases. After the fifth stage ends, the sixth stage begins. Switches three, seven, eight, and ten close, while switches one, two, four, five, six, and nine open. The current in L1, L2, and L3 decreases. After the sixth stage ends, the seventh stage begins. Switches three, seven, eight, and nine close, while switches one, two, four, five, six, and ten open. C F1 Discharge occurs, the current in L3 increases, and the current in L1 and L2 decreases; after the seventh stage ends, the eighth stage begins, the seventh, eighth and tenth switches close, and the first, second, third, fourth, fifth, sixth and ninth switches open, and the current in L1, L2 and L3 decreases; after the eighth stage ends, the first stage begins, and the behavior of the switches and inductors cycles in this order.

[0325] Optionally, the buck converter power stage includes the following operating process: when the duty cycle is 0.25, in the first stage, the first, fourth, fifth, eighth, and tenth switches are closed, and the second, third, sixth, seventh, and ninth switches are open, C F1 Being charged, C F2 Discharge occurs, the current in L1 increases, and the current in L2 and L3 decreases; after the first stage ends, the second stage begins, the fourth, seventh, eighth, and ninth switches close, and the first, second, third, fifth, sixth, and tenth switches open, C F2 Discharge occurs, the current in L3 increases, and the current in L1 and L2 decreases; after the second stage ends, the third stage begins, the seventh, eighth, and tenth switches close, and the first, second, third, fourth, fifth, sixth, and ninth switches open, causing the current in L1, L2, and L3 to decrease; after the third stage ends, the fourth stage begins, the second, third, sixth, seventh, and tenth switches close, and the first, fourth, fifth, eighth, and ninth switches open, C F1 Discharge, C F2As charging begins, the current in L2 increases, while the current in L1 and L3 decreases. After the fourth stage ends, the fifth stage begins, with switches three, seven, eight, and nine closing, and switches one, two, four, five, six, and ten opening. C F1 Discharge occurs, the current in L3 increases, and the current in L1 and L2 decreases; after the fifth stage ends, the sixth stage begins, the seventh, eighth and tenth switches close, and the first, second, third, fourth, fifth, sixth and ninth switches open, and the current in L1, L2 and L3 decreases; after the sixth stage ends, the first stage begins, and the behavior of the switches and inductors cycles in this order.

[0326] Optionally, the buck converter power stage includes the following operating process: when the duty cycle is greater than 0.25 and less than 0.5, the switching state diagram and inductor current diagram are as follows: Figure 6 As shown in the diagram, the working process is illustrated below. Figure 7 As shown, in the first stage, switches 1, 4, 5, 8, and 10 are closed, while switches 2, 3, 6, 7, and 9 are open. C F1 Being charged, C F2 Discharge occurs, the current in L1 increases, and the current in L2 and L3 decreases; after the first stage ends, the second stage begins, the first, fourth, fifth, eighth, and ninth switches close, and the second, third, sixth, seventh, and tenth switches open, the current in L1 and L3 increases, and the current in L2 decreases; after the second stage ends, the third stage begins, the fourth, seventh, eighth, and ninth switches close, and the first, second, third, fifth, sixth, and tenth switches open, C F2 Discharge occurs, the current in L3 increases, and the current in L1 and L2 decreases; after the third stage ends, the fourth stage begins, the seventh, eighth, and tenth switches close, and the first, second, third, fourth, fifth, sixth, and ninth switches open, causing the current in L1, L2, and L3 to decrease; after the fourth stage ends, the fifth stage begins, the second, third, sixth, seventh, and tenth switches close, and the first, fourth, fifth, eighth, and ninth switches open, C F1 Discharge, C F2When charging occurs, the current in L2 increases, while the current in L1 and L3 decreases. After the fifth stage, the sixth stage begins, with switches 2, 3, 6, 7, and 9 closing, and switches 1, 4, 5, 8, and 10 opening. The current in L2 and L3 increases, while the current in L3 decreases. After the sixth stage, the seventh stage begins, with switches 3, 7, 8, and 9 closing, and switches 1, 2, 4, 5, 6, and 10 opening. C F1 Discharge occurs, the current in L3 increases, and the current in L1 and L2 decreases; after the seventh stage ends, the eighth stage begins, the seventh, eighth and tenth switches close, and the first, second, third, fourth, fifth, sixth and ninth switches open, and the current in L1, L2 and L3 decreases; after the eighth stage ends, the first stage begins, and the behavior of the switches and inductors cycles in this order.

[0327] The above embodiments have the following technical effects:

[0328] By introducing two flight capacitors C in the power stage F1 and C F2 C F1 Coupled between the first voltage switching node V1 and the third voltage switching node V3, C F2 Coupled between the second voltage switching node V2 and the fourth voltage switching node V4. Under steady-state operation, the voltage across the first and second flying capacitors remains constant at the input voltage V. IN This reduces the voltage withstand capability of the power transistor by half, allowing for direct buck conversion using a power transistor with low voltage stress at high supply voltages.

[0329] A structure using a first inductor L1, a second inductor L2, and a third inductor L3 to provide current to the load is employed. L1 is coupled between V3 and the load terminal, L2 is coupled between V4 and the load terminal, and L3 is coupled between V5 and the load terminal. This three-inductor design helps improve efficiency under high load current.

[0330] Through the coordinated operation of the current balance module 210, RAMP generation module 220, error amplifier and compensation module 230, PWM generation module 240 and non-overlapping clock module 250 in the controller module 200, the output voltage V is achieved. OUT With input voltage V IN The relationship is V OUT = (D / 2)·V IN This ensures the stable operation of the system under different duty cycles D.

[0331] Output capacitor C OIt is coupled between the load terminal and the reference ground terminal to smooth the ripple of the output voltage and improve the stability of the output voltage.

[0332] It should be noted that in this patent application, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one" does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element. In this patent application, if it refers to performing an action according to an element, it means performing the action at least according to that element, including two cases: performing the action only according to that element, and performing the action according to that element and other elements. Expressions such as "multiple," "repeatedly," and "various" include two, two times, two kinds, and more than two, more than two times, and more than two kinds.

[0333] All documents mentioned in this application are considered to be incorporated in their entirety into the disclosure of this application so that they can serve as a basis for modifications if necessary. Furthermore, it should be understood that after reading the foregoing disclosure of this application, those skilled in the art can make various alterations or modifications to this application, and these equivalent forms also fall within the scope of protection claimed in this application.

Claims

1. A voltage-controlled, low-voltage-stress, three-inductor buck converter, characterized in that, include: A buck converter power stage and associated control, level shifting, and drive circuitry are provided. The buck converter power stage includes a power switching circuit, a first flying capacitor, a second flying capacitor, a first inductor, a second inductor, a third inductor, and an output capacitor. The power switching circuit includes a first to a tenth switch, with its power input connected to the power supply voltage, its reference ground connected to ground, its load connected to the load, and its third and fifth voltage switching node outputs connected to the control, level shifting, and drive circuitry. Its drive signal input is connected to the drive signal output of the control, level shifting, and drive circuitry. The first flying capacitor is coupled between the first and third voltage switching node outputs; the second flying capacitor is coupled between the second and fourth voltage switching node outputs; the first inductor is coupled between the third voltage switching node output and the load; the second inductor is coupled between the fourth voltage switching node output and the load; the third inductor is coupled between the fifth voltage switching node output and the load; and the output capacitor is coupled between the load and the reference ground.

2. The voltage-controlled low-voltage-stress three-inductor buck converter according to claim 1, characterized in that, The control, level conversion, and drive-related circuitry includes: a controller module for receiving the output voltage of the buck converter power stage, the voltage of the third voltage switching node, and the voltage of the fifth voltage switching node, and generating a clock control signal in conjunction with a reference voltage; a level shifter module for converting the clock control signal output by the controller module to a suitable voltage domain to generate an input signal for the driver module; and a driver module for converting the output signal of the level shifter module into a drive signal capable of driving the power transistor, and providing it to the buck converter power stage.

3. The voltage-controlled low-voltage-stress three-inductor buck converter according to claim 1, characterized in that, In the power switching circuit of the buck converter power stage, a first switch is coupled between the power input terminal and the output terminal of the first voltage switching node; a second switch is coupled between the power input terminal and the output terminal of the second voltage switching node. A third switch is coupled between the output of the first voltage switching node and the intermediate potential node; a fourth switch is coupled between the output of the second voltage switching node and the intermediate potential node. The fifth switch is coupled between the intermediate potential node and the output terminal of the third voltage switching node; The sixth switch is coupled between the intermediate potential node and the output terminal of the fourth voltage switching node; The seventh switch is coupled between the output terminal of the third voltage switching node and the reference ground terminal; The eighth switch is coupled between the output of the fourth voltage switching node and the reference ground. The ninth switch is coupled between the intermediate potential node and the output terminal of the fifth voltage switching node; The tenth switch is coupled between the output of the fifth voltage switching node and the reference ground.

4. The voltage-controlled low-voltage-stress three-inductor buck converter according to claim 2, characterized in that, Under steady-state operation, the voltage across the first flight capacitor and the voltage across the second flight capacitor remain at half the input voltage.

5. The voltage-controlled low-voltage-stress three-inductor buck converter according to claim 2, characterized in that, The controller module includes: The current balancing module is used to detect the voltages of the third and fifth voltage switching nodes and output a voltage comparison signal that participates in the generation of the ramp signal. The RAMP generation module is used to receive the comparison signal output by the current balance module and generate a first ramp signal, a second ramp signal and a third ramp signal; An error amplifier and compensation module are used to detect the output voltage of the power stage of the buck converter and the reference voltage, and to generate an error signal through the error amplifier and compensation network; The PWM generation module is used to receive the error signal output by the error amplifier and compensation module and the first ramp signal, the second ramp signal and the third ramp signal output by the RAMP generation module, and generate the first PWM signal, the second PWM signal and the third PWM signal; The non-overlapping clock module is used to receive and process the first PWM signal, the second PWM signal and the third PWM signal output by the PWM generation module to generate clock control signals for controlling the power transistor to turn on and off.

6. The voltage-controlled low-voltage stress three-inductor buck converter according to claim 2, characterized in that: The level shifter module includes a control signal input terminal and a signal output terminal. The control signal input terminal is connected to the clock control signal output terminal of the controller module, and the signal output terminal is connected to the signal input terminal of the driver module. It is used to perform level conversion on the clock control signal to generate the input signal of the driver module. The driver module includes a signal input terminal and a drive signal output terminal. The signal input terminal is connected to the signal output terminal of the level shifter module, and the drive signal output terminal is connected to the drive signal input terminal of the buck converter power stage. The driver module is used to convert the input signal into a drive signal with appropriate drive capability and provide it to the buck converter power stage.

7. The voltage-controlled low-voltage-stress three-inductor buck converter according to claim 2, characterized in that, The buck converter power stage includes the following operating process: When the duty cycle is less than 0.25, In the first stage, the first, fourth, fifth, eighth and tenth switches are closed, the second, third, sixth, seventh and ninth switches are open, and one end of the second and third inductors is short-circuited to ground; After the first stage ends, the second stage begins. Switches 4, 7, 8 and 10 are closed, while switches 1, 2, 3, 5, 6 and 9 are opened. One end of inductor 1, inductor 2 and inductor 3 is shorted to ground. After the second stage ends, the third stage begins. Switches four, seven, eight, and nine are closed, while switches one, two, three, five, six, and ten are open. One end of the first inductor and one end of the second inductor are shorted to ground. After the third stage ends, the fourth stage begins. Switches seven, eight, and ten are closed, while switches one, two, three, four, five, six, and nine are open. One end of inductor one, two, and three is short-circuited to ground. After the fourth stage ends, the fifth stage begins. The second, third, sixth, seventh, and tenth switches are closed, while the first, fourth, fifth, eighth, and ninth switches are open. One end of the first and third inductors is short-circuited to ground. After the fifth stage ends, the sixth stage begins. Switches three, seven, eight, and ten are closed, while switches one, two, four, five, six, and nine are opened. One end of inductor one, two, and three is short-circuited to ground. After the sixth stage ends, the seventh stage begins. Switches three, seven, eight, and nine are closed, while switches one, two, four, five, six, and ten are open. One end of the first inductor and one end of the second inductor are shorted to ground. After the seventh stage ends, the eighth stage begins. Switches seven, eight, and ten are closed, while switches one, two, three, four, five, six, and nine are opened. One end of inductor one, two, and three is short-circuited to ground. After the eighth stage ends, the first stage begins, and the behavior of the switches and inductors cycles in this order.

8. The voltage-controlled low-voltage-stress three-inductor buck converter according to claim 2, characterized in that, The buck converter power stage includes the following operating process: When the duty cycle is 0.25, In the first stage, the first, fourth, fifth, eighth and tenth switches are closed, the second, third, sixth, seventh and ninth switches are open, and one end of the second and third inductors is short-circuited to ground; After the first stage ends, the second stage begins. Switches four, seven, eight, and nine are closed, while switches one, two, three, five, six, and ten are open. One end of the first inductor and one end of the second inductor are shorted to ground. After the second stage ends, the third stage begins. Switches seven, eight, and ten are closed, while switches one, two, three, four, five, six, and nine are open. One end of inductor one, two, and three is short-circuited to ground. After the third stage ends, the fourth stage begins. The second, third, sixth, seventh, and tenth switches are closed, while the first, fourth, fifth, eighth, and ninth switches are open. One end of the first and third inductors is short-circuited to ground. After the fourth stage ends, the fifth stage begins. Switches three, seven, eight, and nine are closed, while switches one, two, four, five, six, and ten are open. One end of the first inductor and one end of the second inductor are shorted to ground. After the fifth stage ends, the sixth stage begins. Switches seven, eight, and ten are closed, while switches one, two, three, four, five, six, and nine are opened. One end of inductor one, two, and three is short-circuited to ground. After the sixth stage ends, the first stage begins, and the behavior of the switches and inductors cycles in this order.

9. The voltage-controlled low-voltage-stress three-inductor buck converter according to claim 2, characterized in that, The buck converter power stage includes the following operating process: When the duty cycle is greater than 0.25 and less than 0.5, In the first stage, the first, fourth, fifth, eighth and tenth switches are closed, the second, third, sixth, seventh and ninth switches are open, and one end of the second and third inductors is short-circuited to ground; After the first stage ends, the second stage begins. Switches 1, 4, 5, 8, and 9 are closed, while switches 2, 3, 6, 7, and 10 are open. One end of the second inductor is short-circuited to ground. After the second stage ends, the third stage begins. Switches four, seven, eight, and nine are closed, while switches one, two, three, five, six, and ten are open. One end of the first inductor and one end of the second inductor are shorted to ground. After the third stage ends, the fourth stage begins. Switches seven, eight, and ten are closed, while switches one, two, three, four, five, six, and nine are open. One end of inductor one, two, and three is short-circuited to ground. After the fourth stage ends, the fifth stage begins. The second, third, sixth, seventh, and tenth switches are closed, while the first, fourth, fifth, eighth, and ninth switches are open. One end of the first and third inductors is short-circuited to ground. After the fifth stage ends, the sixth stage begins. Switches 2, 3, 6, 7, and 9 are closed, while switches 1, 4, 5, 8, and 10 are open. One end of the first inductor is short-circuited to ground. After the sixth stage ends, the seventh stage begins. Switches three, seven, eight, and nine are closed, while switches one, two, four, five, six, and ten are open. One end of the first inductor and one end of the second inductor are shorted to ground. After the seventh stage ends, the eighth stage begins. Switches seven, eight, and ten are closed, while switches one, two, three, four, five, six, and nine are opened. One end of inductor one, two, and three is short-circuited to ground. After the eighth stage ends, the first stage begins, and the behavior of the switches and inductors cycles in this order.

10. The voltage-controlled low-voltage-stress three-inductor buck converter according to claim 1, characterized in that, The relationship between the output voltage and the input voltage of the buck converter is as follows: V OUT = (D / 2)·V IN Where D is the proportion of the conduction time of the first switch in one cycle to the total conduction time of that cycle, i.e., the duty cycle.

11. The voltage-controlled low-voltage-stress three-inductor buck converter according to claim 1, characterized in that, The first inductor and the second inductor have the same inductance value, and the third inductor has an inductance value that is half that of the first inductor.

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