Preparation method of printed circuit board with high thickness-diameter ratio and printed circuit board with high thickness-diameter ratio
By making a circuit pattern on a high-thickness-biased printed circuit board and laminating it with the core board, and then drilling, electrically communicating with the cathode, the uniform deposition of metal ions on the conductive deposition layer is achieved, the problem of uneven hole filling is solved, and the electrical connection stability and heat dissipation efficiency are improved.
Patent Information
- Application Number
- CN202510416796.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-02
- Publication Date
- 2025-07-25
AI Technical Summary
During the hole filling process of a printed circuit board with a high thickness-to-diameter ratio, the difference in ion concentration and potential between the hole and the orifice leads to uneven deposition of the copper layer, affecting the stability of the electrical connection and heat dissipation efficiency.
By making a circuit pattern on a single-sided metal plate and laminating it with the core plate, drilling the holes and electrically communicating with the cathode, metal ions are uniformly deposited on the circuit pattern of the conductive deposition layer to ensure uniform filling in the holes.
The electrical connection stability and heat dissipation efficiency in the holes of the high-thickness-biased printed circuit board are improved, and the problem of uneven hole filling is solved.
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Figure CN120379170A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the technical field of printed circuit boards, and particularly to a method for manufacturing a printed circuit board with a high aspect ratio and a printed circuit board with a high aspect ratio. Background Art
[0002] In recent years, with the increasing miniaturization and integration of electronic devices, the miniaturization development of assembled components has promoted the continuous increase in the wiring density of printed circuit boards (PCBs). This trend has gradually brought the traditional planar density of aperture, line width, and line pitch close to the technical bottleneck. Therefore, via holes or blind buried holes are designed in the pads, that is, holes in pads, which can improve the connection performance and space utilization rate of the circuit board. The filling design of the holes in pads has thus emerged and become an important link in improving the performance of PCBs, especially in terms of improving heat dissipation performance.
[0003] Currently, the common filling process is to first perform electroless copper plating and then electroplating. However, when processing PCBs with a high aspect ratio, due to the ion concentration and potential difference between the inside and the orifice of the hole, copper preferentially deposits at the orifice during electroplating, resulting in an uneven copper layer. Especially in the central area of the hole, it is difficult to evenly distribute the plating solution, and it is difficult to achieve the expected plating thickness, which not only affects the electrical connection stability inside the hole but also reduces the heat dissipation efficiency. Summary of the Invention
[0004] The present application provides a method for manufacturing a printed circuit board with a high aspect ratio and a printed circuit board with a high aspect ratio, which can solve the technical problem of uneven hole filling of a printed circuit board with a high aspect ratio and improve the electrical connection stability and heat dissipation efficiency inside the hole.
[0005] One technical solution adopted by the present application is: providing a method for manufacturing a printed circuit board with a high aspect ratio, the method for manufacturing the printed circuit board with a high aspect ratio includes:
[0006] Obtaining a single-sided metal plate and a plurality of core boards;
[0007] Manufacturing a circuit pattern on the single-sided metal plate to use the single-sided metal plate as a conductive deposition layer;
[0008] Laminating the conductive deposition layer and the core board to obtain a multilayer circuit board including the conductive deposition layer;
[0009] Drilling the multilayer circuit board until the circuit pattern of the conductive deposition layer is exposed;
[0010] Electrically connecting the conductive deposition layer with a cathode, so that metal ions are electroplated and deposited based on the circuit pattern of the conductive deposition layer.
[0011] In some embodiments, fabricating a circuit pattern on the single-sided metal plate to use the single-sided metal plate as a conductive deposition layer includes:
[0012] Fabricating a plurality of hole regions and an edge region on the single-sided metal plate, and electrically connecting each of the hole regions to the edge region to use the single-sided metal plate as a conductive deposition layer.
[0013] In some embodiments, the area of the single-sided metal plate is larger than the area of the core board;
[0014] Laminating the conductive deposition layer with the core board to obtain a multilayer circuit board including the conductive deposition layer includes:
[0015] Placing the conductive deposition layer into any adjacent core board and laminating, and the edge region protruding outside the multilayer circuit board to obtain a multilayer circuit board including the conductive deposition layer.
[0016] In some embodiments, drilling the multilayer circuit board until the circuit pattern of the conductive deposition layer is exposed includes:
[0017] Performing depth-controlled drilling and laser drilling respectively from above and below the multilayer circuit board until the hole regions of the conductive deposition layer are exposed.
[0018] In some embodiments, electrically connecting the conductive deposition layer to a cathode such that metal ions are electroplated and deposited based on the circuit pattern of the conductive deposition layer includes:
[0019] Electrically connecting the edge region of the multilayer circuit board to the cathode such that metal ions are electroplated and deposited based on the hole regions of the conductive deposition layer.
[0020] In some embodiments, after electrically connecting the conductive deposition layer to a cathode such that metal ions are electroplated and deposited based on the circuit pattern of the conductive deposition layer, it includes:
[0021] Cutting the edge region such that there is no electrical connection between the filling holes.
[0022] Another technical solution adopted by this application is: providing a printed circuit board with a high aspect ratio, and the printed circuit board with a high aspect ratio is obtained by the preparation method of the printed circuit board as described above.
[0023] Another technical solution adopted by this application is: the preparation method of the printed circuit board with a high aspect ratio includes:
[0024] Obtaining a multilayer circuit board;
[0025] Cover a dry film under the bottom metal of the multi-layer circuit board and expose one area thereof as a cathode access area;
[0026] Drill the multi-layer circuit board until the bottom metal is exposed;
[0027] Electrically connect the cathode access area to a cathode so that metal ions are electroplated and deposited above the bottom metal.
[0028] In some embodiments, the step of drilling the multi-layer circuit board until the bottom metal is exposed includes:
[0029] Perform depth-controlled drilling and laser drilling from above the multi-layer circuit board until the bottom metal is exposed.
[0030] Another technical solution adopted in this application is: to provide a printed circuit board with a high aspect ratio, and the printed circuit board with a high aspect ratio is prepared by the preparation method of the printed circuit board as described above.
[0031] The embodiment of this application provides a preparation method of a printed circuit board with a high aspect ratio. The preparation method of the printed circuit board with a high aspect ratio includes: obtaining a single-sided metal plate and a plurality of core boards; making a circuit pattern on the single-sided metal plate to use the single-sided metal plate as a conductive deposition layer; laminating the conductive deposition layer with the core boards to obtain a multi-layer circuit board including the conductive deposition layer; drilling the multi-layer circuit board until the circuit pattern of the conductive deposition layer is exposed; electrically connecting the conductive deposition layer to a cathode so that metal ions are electroplated and deposited based on the circuit pattern of the conductive deposition layer.
[0032] By making a conductive deposition layer for conduction and metal ion deposition, laminating the conductive deposition layer with a plurality of core boards to obtain a multi-layer circuit board, then drilling the multi-layer circuit board until the circuit pattern of the conductive deposition layer is exposed, and electrically connecting the conductive deposition layer to a cathode, metal ions can be uniformly deposited on the circuit pattern, which can solve the technical problem of uneven hole filling in the printed circuit board with a high aspect ratio and improve the electrical connection stability and heat dissipation efficiency in the holes. BRIEF DESCRIPTION OF THE DRAWINGS
[0033] Figure 1 is a schematic flowchart of the first embodiment of the preparation method of the printed circuit board with a high aspect ratio in this application;
[0034] Figure 2 is a schematic flowchart of the second embodiment of the preparation method of the printed circuit board with a high aspect ratio in this application;
[0035] Figures 3a to 3hIt is a schematic process flow diagram of an exemplary method for manufacturing a printed circuit board with a high aspect ratio in this application;
[0036] Figure 4 It is a schematic process flow diagram of the third embodiment of the method for manufacturing a printed circuit board with a high aspect ratio in this application;
[0037] Figures 5a to 5f It is another schematic process flow diagram of an exemplary method for manufacturing a printed circuit board with a high aspect ratio in this application. Detailed implementation manners
[0038] The present application will be described in detail below in conjunction with the accompanying drawings and embodiments.
[0039] In some embodiments, please refer to Figure 1 , Figure 1 It is a schematic process flow diagram of the first embodiment of the method for manufacturing a printed circuit board with a high aspect ratio in this application. It should be noted that if there are substantially the same results, the method of this application is not limited to Figure 1 the process sequence shown. As shown in Figure 1 , the method for manufacturing the printed circuit board with a high aspect ratio includes:
[0040] Step S101, obtaining a single-sided metal plate and a plurality of core boards.
[0041] As an exemplary example, the single-sided metal plate can be a plate with a metal layer covered on one side, and the metal layer can be used to make a circuit pattern and provide electrical conductivity. Among them, the metal can be copper, aluminum, gold, silver, nickel, etc., and this embodiment does not make any limitations in this regard.
[0042] Step S102, making a circuit pattern on the single-sided metal plate to use the single-sided metal plate as a conductive deposition layer.
[0043] As an exemplary example, the circuit pattern can be used to provide a surface with electrical characteristics for subsequent metal ion deposition. The conductive deposition layer can serve as a substrate for metal ion deposition. The circuit pattern can be made on the metal layer of the single-sided metal plate through processes such as photolithography and etching.
[0044] Step S103, laminating the conductive deposition layer and the core board to obtain a multi-layer circuit board including the conductive deposition layer.
[0045] As an exemplary example, the conductive deposition layer and a plurality of core boards can be stacked into a whole by heating and pressing to form a multi-layer circuit board, realizing mechanical fixation and electrical connection between the conductive deposition layer and the core board.
[0046] Step S104, drilling the multi-layer circuit board until the circuit pattern of the conductive deposition layer is exposed.
[0047] As an exemplary example, a drilling operation can be performed on a multi-layer circuit board to form electroplated channels. These holes can be drilled through the multi-layer circuit board after lamination until the circuit pattern on the conductive deposition layer is exposed, for metal ion deposition.
[0048] Step S105: Electrically connect the conductive deposition layer to the cathode, so that metal ions are electroplated and deposited based on the circuit pattern of the conductive deposition layer.
[0049] As an exemplary example, during electroplating, the cathode electrode is connected to the conductive deposition layer, so that metal ions in the electroplating bath can, based on the action of the cathode, enable the cathode to attract metal ions using an electric current, causing the metal ions to be uniformly deposited on the conductive deposition layer with electrical characteristics on the surface, and converting the metal ions into solid metal, which is uniformly deposited in the conductive deposition layer within the channels. Thereby, the inside of the channels is gradually filled with metal, ensuring stable electrical connection.
[0050] In this embodiment, considering that the ratio of the hole depth to the hole diameter of a printed circuit board with a high aspect ratio is relatively large, in this case, it is difficult for traditional electroplating processes to achieve uniform hole filling. Therefore, in this embodiment, a conductive deposition layer for conduction and metal ion deposition is fabricated, and the conductive deposition layer is laminated with multiple core boards to obtain a multi-layer circuit board. Then, the multi-layer circuit board is drilled until the circuit pattern of the conductive deposition layer is exposed, and the conductive deposition layer is electrically connected to the cathode, so that metal ions can be uniformly deposited on the circuit pattern, which can solve the technical problem of non-uniform hole filling in printed circuit boards with a high aspect ratio, and improve the electrical connection stability and heat dissipation efficiency inside the holes.
[0051] Please refer to Figure 2 , Figure 2 which is a schematic flowchart of the second embodiment of the method for manufacturing a printed circuit board with a high aspect ratio in this application. The method includes the following steps:
[0052] Step S201: Obtain a single-sided metal plate and multiple core boards.
[0053] As an exemplary example, please refer to Figure 3a which shows a single-sided metal plate.
[0054] Step S202: Fabricate multiple hole regions and one edge region on the single-sided metal plate, and electrically connect each of the hole regions to the edge region to use the single-sided metal plate as a conductive deposition layer.
[0055] As an exemplary example, the circuit pattern can be a metal circuit, which can include a via region, an edge region, and a connection region. The via region can be the region where through-holes or blind vias are formed in a multilayer circuit board and is used for filling with metal. The edge region can be the edge part of a single-sided metal plate and is used for connecting to the cathode. The connection region is used for electrical connection between the via region and the edge region, so that during the electroplating process, conduction is carried out by connecting to the cathode through the edge region, and electrical connection is made between the via region and the connection region, so that there is also conductivity in the via region, and thus metal ions can be effectively deposited in these via regions, enhancing the uniformity of metal deposition.
[0056] Please refer to Figure 3b and Figure 3c , Figure 3b which shows the conductive deposition layer under a plan view. This conductive deposition layer includes a via region 1, an edge region 2, and a connection region 3. Figure 3c which shows the conductive deposition layer under a cross-sectional view, including the via region 1 and the edge region 2 under the cross-sectional view.
[0057] Step S203: Place the conductive deposition layer into any adjacent core board and perform lamination, and the edge region protrudes outside the multilayer circuit board to obtain a multilayer circuit board including the conductive deposition layer.
[0058] As an exemplary example, the conductive deposition layer and multiple core boards can be laminated together by heating and pressing to form a multilayer circuit board structure. During the lamination process, the edge region of the conductive deposition layer can protrude outside the multilayer circuit board, and the protruding edge region can be used as a contact point for connecting to the cathode. Please refer to Figure 3d the laminated multilayer circuit board shown in
[0059] Step S204: Perform depth-controlled drilling and laser drilling from above and below the multilayer circuit board until the via region of the conductive deposition layer is exposed.
[0060] As an exemplary example, performing depth-controlled drilling above and below the multilayer circuit board can control the depth of the holes. Please refer to Figure 3e the hole channel 4 shown in
[0061] The laser drilling technology can precisely control the hole depth, avoid uneven deposition in the holes, and by laser drilling the corresponding deep micro-hole region, the circuit pattern of the conductive deposition layer can be exposed inside the hole channel. Please refer to Figure 3f the hole channel 5 shown in
[0062] By drilling holes from above and below the multilayer circuit board respectively, during subsequent electroplating, metal ions can move from above to the hole area of the conductive deposition layer and grow evenly from bottom to top. At the same time, metal ions can also move from below to the hole area of the conductive deposition layer and grow evenly from top to bottom, reducing the risk that metal ions mainly deposit at the hole orifice.
[0063] In some exemplary embodiments, the rotational speed of the depth-controlled drilling is between 120,000 - 150,000 rpm, the feed rate is between 0.5 - 0.8 m / min, the pre-drilling depth is controlled at 3.8 - 3.9 mm or at any intermediate layer of the multilayer circuit board, and a resin layer of 0.1 - 0.2 mm is reserved for laser ablation drilling. The energy density of the laser ablation is between 3 - 5 J / cm2.
[0064] Step S205: Electrically connect the edge area of the multilayer circuit board to the cathode, so that metal ions are electroplated and deposited based on the hole area of the conductive deposition layer.
[0065] As an exemplary example, connect the edge area of the multilayer circuit board to the cathode in the electroplating bath. The cathode, as the current receiving end during electroplating, can ensure that metal ions deposit on the conductive deposition layer, especially inside the hole area. Through electrical connection, it is ensured that the electroplating process can proceed smoothly, metal ions deposit on the hole area of the conductive deposition layer, improving the metal filling uniformity in the hole, and thus providing good electrical connection. Please refer to Figure 3g the shown multilayer circuit board after filling is completed.
[0066] In some embodiments, step S205 may include: Electrically connect the edge area of the multilayer circuit board to the cathode, so that metal ions are pulse electroplated and direct current electroplated and deposited based on the hole area of the conductive deposition layer.
[0067] In some exemplary embodiments, during electroplating deposition, the forward current density of the pulse electroplating is 4 - 5 ASD, the reverse current density is 15 - 20 ASD; then direct current electroplating is performed, and the direct current density is 1.5 - 2 ASD.
[0068] Step S206: Cut the edge area so that there is no electrical connection between the filled holes.
[0069] As an exemplary example, the protruding edge area outside the multilayer circuit board can be cut so that there is electrical connection between different holes, improving the independence of metal filling in each hole, reducing the risk of electrical connection between multiple holes due to over-electroplating, and thus reducing the risk of short circuit or electrical interference. Please refer to Figure 3h the shown cut multilayer circuit board.
[0070] In this embodiment, by connecting the edge region to the cathode, the electroplating process can be more precisely controlled, enabling metal ions to be uniformly deposited in the high aspect ratio holes; by drilling holes from both sides of the multilayer circuit board, metal ions can start electroplating simultaneously from above and below the multilayer circuit board, reducing the risk of metal ions mainly depositing at the hole openings.
[0071] Please refer to Figure 4 , Figure 4 which is a schematic flowchart of the third embodiment of the method for manufacturing a high aspect ratio printed circuit board according to this application. The method includes the following steps:
[0072] Step S401, obtain a multilayer circuit board.
[0073] As an exemplary example, the multilayer circuit board can be a multilayer circuit board obtained by laminating multiple core boards after circuit pattern design and manufacturing. Among them, through process steps such as photolithography and etching, the circuit design can be transferred to the core board to form a circuit pattern. This multilayer circuit board can include metal layers for circuit connection and can also contain insulating layers for bearing and supporting. Please refer to Figure 5a the core board shown; after circuit pattern design and manufacturing of the core board, multiple core boards are laminated to obtain the multilayer circuit board as shown in Figure 5b .
[0074] Step S402, cover a dry film under the bottom metal of the multilayer circuit board and expose one area as the cathode access area.
[0075] As an exemplary example, the dry film can be used to provide insulating protection for the bottom metal. The bottom metal can be the bottommost metal layer in the multilayer circuit board and is used as the electroplating substrate during the metal ion deposition process. The cathode access area can be an area where a part of the dry film is exposed and removed through exposure to expose a part of the bottom metal as the electrical connection point during the electroplating process, providing a conductive path for subsequent metal deposition. Please refer to Figure 5c the dry film 6, the cathode access area 7, and the bottom metal 8 shown.
[0076] Step S403, drill holes in the multilayer circuit board until the bottom metal is exposed.
[0077] As an exemplary example, in order to uniformly deposit metal in the holes, especially for holes with a high aspect ratio, the multilayer circuit board can be drilled using a drilling process so that the bottom metal is exposed inside the holes. The bottom metal can be used for conducting electricity with the cathode and as the substrate for metal ion deposition.
[0078] In some embodiments, step S403 includes: performing depth-controlled drilling and laser drilling from above the multi-layer circuit board until the bottom metal is exposed.
[0079] As an exemplary example, please refer to Figure 5d the multi-layer circuit board after depth-controlled drilling shown. Figure 5e the multi-layer circuit board after laser drilling shown.
[0080] By drilling from above the multi-layer circuit board, during subsequent electroplating, metal ions can move from above to the bottom metal and uniformly form from bottom to top, reducing the risk that metal ions mainly deposit at the pore openings.
[0081] Step S404, electrically connect the cathode access area to the cathode, so that metal ions are electroplated and deposited above the bottom metal.
[0082] As an exemplary example, by electrically connecting the cathode in the electroplating tank to the cathode access area of the multi-layer circuit board, the cathode drives metal ions to deposit above the bottom metal through current, forming a uniform metal filling layer. Please refer to Figure 5f the multi-layer circuit board after deposition shown.
[0083] In this embodiment, by depositing metal above the bottom metal, the electroplating process can more precisely control the deposition uniformity; the exposure of the bottom metal enables metal ions to smoothly deposit gradually in the holes, and the cathode access area makes the metal deposition process more stable, reducing problems of over-deposition or insufficient deposition; through uniform metal filling, the metal deposition layer in the hole forms a stable electrical connection with the bottom metal, improving the conductive performance of the entire circuit board.
[0084] In addition, the embodiments of the present application also propose a printed circuit board with a high aspect ratio, and the printed circuit board with a high aspect ratio can be prepared by the preparation method of the printed circuit board as described above.
[0085] In several implementation manners provided by the present application, it should be understood that the disclosed methods, electronic devices, and storage media can be implemented in other ways. For example, the device implementation manners described above are only illustrative. For example, the division of the modules or units is only a logical function division, and there can be other division manners in actual implementation. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point, the displayed or discussed coupling or direct coupling or communication connection to each other can be through some interfaces, and the indirect coupling or communication connection of the devices or units can be in electrical, mechanical, or other forms.
[0086] The unit described as a separation component may or may not be physically separated. The component shown as a unit may or may not be a physical unit, that is, it may be located in one place or may be distributed over multiple network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of this embodiment.
[0087] In addition, each functional unit in various embodiments of the present application can be integrated in a processing unit, or each unit can exist physically alone, or two or more units can be integrated in one unit. The above-mentioned integrated unit can be implemented in the form of hardware or in the form of a software functional unit.
[0088] If the above-mentioned integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application, in essence, or the part that contributes to the prior art, or all or part of this technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to enable a computer device (which can be a personal computer, a server, or a network device, etc.) or a processor to execute all or part of the steps of the method for preparing a printed circuit board with a high aspect ratio described in various embodiments of the present application. The aforementioned storage medium includes: USB flash drives, mobile hard disks, read-only memories (ROM, Read-Only Memory), random access memories (RAM, Random Access Memory), magnetic disks, or optical discs and other various media that can store program codes.
[0089] The above description is only an embodiment of the present application and does not limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made by using the content of the specification and drawings of the present application, or directly or indirectly applied in other related technical fields, shall be equally included in the patent protection scope of the present application.
Claims
1. A method for preparing a printed circuit board with a high aspect ratio, characterized in that, The preparation method of the printed circuit board with a high aspect ratio includes: Obtaining a single-sided metal plate and a plurality of core boards; Manufacturing a circuit pattern on the single-sided metal plate to use the single-sided metal plate as a conductive deposition layer; Laminating the conductive deposition layer and the core board to obtain a multilayer circuit board including the conductive deposition layer; Drilling the multilayer circuit board until the circuit pattern of the conductive deposition layer is exposed; Electrically connecting the conductive deposition layer to a cathode so that metal ions are electroplated and deposited based on the circuit pattern of the conductive deposition layer.
2. The manufacturing method of the printed circuit board with a high aspect ratio according to claim 1, characterized in that, The manufacturing of the circuit pattern on the single-sided metal plate to use the single-sided metal plate as a conductive deposition layer includes: Manufacturing a plurality of hole regions and an edge region on the single-sided metal plate, and electrically connecting each of the hole regions to the edge region to use the single-sided metal plate as a conductive deposition layer.
3. The preparation method of the printed circuit board with a high aspect ratio according to claim 2, characterized in that, The area of the single-sided metal plate is larger than the area of the core board; The laminating of the conductive deposition layer and the core board to obtain a multilayer circuit board including the conductive deposition layer includes: Placing the conductive deposition layer into any adjacent core boards and performing lamination, and the edge region protruding outside the multilayer circuit board to obtain a multilayer circuit board including the conductive deposition layer.
4. The preparation method of the printed circuit board with a high aspect ratio according to claim 2, characterized in that, The drilling of the multilayer circuit board until the circuit pattern of the conductive deposition layer is exposed includes: Performing depth-controlled drilling and laser drilling from above and below the multilayer circuit board until the hole regions of the conductive deposition layer are exposed.
5. The manufacturing method of the printed circuit board with a high aspect ratio according to claim 2, characterized in that, The electrically connecting of the conductive deposition layer to a cathode so that metal ions are electroplated and deposited based on the circuit pattern of the conductive deposition layer includes: Electrically connecting the edge region of the multilayer circuit board to the cathode so that metal ions are electroplated and deposited based on the hole regions of the conductive deposition layer.
6. The preparation method of the printed circuit board with a high aspect ratio according to claim 2, wherein After electrically connecting the conductive deposition layer to a cathode so that metal ions are electroplated and deposited based on the circuit pattern of the conductive deposition layer, it includes: Cutting the edge region so that there is no electrical connection between the filling holes.
7. A printed circuit board with a high aspect ratio, characterized in that The printed circuit board with a high aspect ratio is prepared by the preparation method of the printed circuit board according to any one of claims 1-6.
8. A method for preparing a printed circuit board with a high aspect ratio, characterized in that, The preparation method of the printed circuit board with a high aspect ratio includes: Obtaining a multilayer circuit board; Covering a dry film under the bottom metal of the multilayer circuit board and exposing one region as a cathode access region; Drilling the multilayer circuit board until the bottom metal is exposed; Electrically connecting the cathode access region to a cathode so that metal ions are electroplated and deposited above the bottom metal.
9. The preparation method of the printed circuit board with a high aspect ratio according to claim 8, wherein, The drilling of the multilayer circuit board until the bottom metal is exposed includes: Performing depth-controlled drilling and laser drilling from above the multilayer circuit board until the bottom metal is exposed.
10. A printed circuit board with a high aspect ratio, characterized in that, The printed circuit board with a high aspect ratio is prepared by the preparation method of the printed circuit board according to any one of claims 8-9.