Oscillator crystal structure with internal etching-through function and wafer-level packaging structure of oscillator crystal formed by oscillator crystal structure

Abstract

The invention discloses an oscillator crystal structure with an internal etching-through function and a wafer-level packaging structure of an oscillator crystal formed by the oscillator crystal structure. The wafer-level packaging structure comprises a packaging base, the oscillator crystal and an upper cover body. An etching-through area is formed in the internal structure of the oscillator crystal and penetrates between the upper surface and the lower surface of the oscillator crystal, and the main oscillation area of the wafer is disconnected from the adjacent wafer structure through the etching-through area. The packaging base is provided with an upper plane, the upper cover body is provided with a lower plane, the oscillator crystal is arranged between the upper plane and the lower plane, and sealed upper and lower grooves are formed among the oscillator crystal, the packaging base and the upper cover body. And the upper packaging ring and the lower packaging ring are respectively arranged around the oscillator crystal in a surrounding manner, so that the oscillator crystal is sealed. According to the invention, the internal erosion penetration is formed in the oscillator crystal structure, so that the frequency offset after packaging can be reduced, and the oscillator has better impedance and element characteristics.

Description

Technical Field

[0001] The present invention relates to a wafer-level packaging structure for an oscillator crystal, in particular to a wafer-level packaging structure in which an etch-through area penetrating the upper and lower surfaces is formed in the oscillator crystal structure. Background Art

[0002] With the trend of system integration, clock components are provided in various modern electronic systems. Integrating clock components with sensing components into electronic systems is one of the mainstream semiconductor packaging technologies to date. Since using a quartz crystal piezoelectric element as an oscillator is currently one of the best choices in terms of accuracy and stability, most current practices use clock components provided by quartz crystals. According to the International Electrotechnical Commission (IEC), quartz crystal piezoelectric element oscillators are classified into four categories: simple package crystal oscillator (SPXO), voltage controlled crystal oscillator (VCXO), temperature compensated crystal oscillator (TCXO), and oven controlled crystal oscillator (OCXO). With the booming development of the electronics industry, electronic products tend to be developed in the direction of multi-function, high performance, and light weight. The existing packaging technology can no longer meet the packaging requirements of high integration and miniaturization of semiconductor chips, and the previous packaging technology is no longer sufficient.

[0003] Generally speaking, with the miniaturization of semiconductor piezoelectric devices, the existing technology mainly uses ceramic material packages to package quartz crystals and integrated circuits respectively, and then performs subsequent electrical connection operations. Among them, considering that the packaging material may melt due to heat and cause short circuits in the components, or the problem of the quartz crystal tilting down and contacting the lower base, most existing packaging structures will have a cavity on the surface of the lower base of the packaging structure and use the cavity to accommodate the quartz crystal. However, due to the limitation of the cavity space and the processability of the lower base, the contact area of the necessary electrical units in the piezoelectric element manufacturing process becomes very small, which will cause difficulties in testing the piezoelectric element during the testing process and result in a poor yield in testing.

[0004] In addition, the existing wafer-level packaging technology is generally defined as performing most or all of the packaging and testing procedures directly on the wafer, and then performing singulation to form individual components. Among them, the redistribution and bumping process technologies are the general choices for the signal input / output wiring layout. Due to the advantages of smaller package size and better electrical performance of the wafer-level packaging technology, it is currently mostly used in the packaging applications of consumer ICs that are mainly concerned with the thin, light, short, and small product requirements. As electronic products are moving towards the goals of being light, thin, short, and small and the user requirements are getting higher and higher, the sizes of the components inside the electronic packaging structure are also shrinking accordingly. In order to significantly reduce the disadvantages and limitations caused by traditional two-dimensional packaging technologies, in recent years, the packaging industry and research institutions have actively devoted efforts to the development of three-dimensional packaging technologies. In the field of three-dimensional packaging, the Through-Silicon Via (TSV) technology can effectively provide electrical connections between wafers in the thickness direction, thereby shortening the transmission distance, and has become a relatively prominent and important technology in this field. However, the reduction in geometric size causes the mismatch of the thermal expansion coefficients between the materials in the structure, resulting in heat dissipation problems under temperature loads and the phenomenon of thermal stress concentration in the package structure, which are still the problems that need to be faced and overcome currently.

[0005] Therefore, considering the many problem points listed above, it is extremely necessary to adopt various considerations. Thus, the inventor of the present invention is aware of the improvement of the above-mentioned deficiencies, and based on years of relevant experience in this field, carefully observes and studies, and combines the application of theory, and proposes a novel invention that can effectively improve the above-mentioned deficiencies. It provides a novel oscillator crystal structure and the wafer-level packaging structure formed thereby. Its specific architecture and implementation manner will be described in detail below. Summary of the Invention

[0006] To solve the problems existing in the prior art, an object of the present invention is to provide an oscillator crystal structure with internal etching and the wafer-level packaging structure of the oscillator crystal formed thereby. The improved oscillator crystal structure is a novel oscillator crystal structure with internal etching formed in the oscillator crystal structure.

[0007] The present invention provides an oscillator crystal structure with internal etching penetration, which includes a main oscillation region of a wafer, a first adjacent region adjacent to one side of the main oscillation region of the wafer, and a second adjacent region adjacent to the other side of the main oscillation region of the wafer relative to the first adjacent region. The main oscillation region of the wafer has an upper surface and a lower surface relative to the upper surface. The maximum thickness of the first adjacent region and the second adjacent region is greater than the wafer thickness of the main oscillation region of the wafer, so that an upper groove is formed between an upper top surface of the first adjacent region and the second adjacent region and the upper surface of the main oscillation region of the wafer. At the same time, a lower groove is formed between a lower bottom surface of the first adjacent region and the second adjacent region and the lower surface of the main oscillation region of the wafer.

[0008] At least one etching penetration region is formed between the main oscillation region of the wafer and the adjacent first adjacent region or the second adjacent region, so that the main oscillation region of the wafer and the first adjacent region or the second adjacent region on both sides thereof are separated.

[0009] According to the present invention, the etching penetration region can be formed, for example, by adopting a dry etching process or a wet etching process.

[0010] Specifically, according to an embodiment of the present invention, an etching penetration region is optionally formed between the main oscillation region of the wafer and the first adjacent region to space the main oscillation region of the wafer and the first adjacent region.

[0011] Or, according to another embodiment of the present invention, an etching penetration region is also optionally formed between the main oscillation region of the wafer and the second adjacent region on the other side to space the main oscillation region of the wafer and the second adjacent region.

[0012] Or, according to still another embodiment of the present invention, the internal etching penetration region formed in the oscillator crystal structure provided by the present invention is also optionally formed between the main oscillation region of the wafer and the first adjacent region and between the main oscillation region of the wafer and the second adjacent region at the same time, so that the main oscillation region of the wafer is spaced from the first adjacent region and the second adjacent region at the same time.

[0013] In practical terms, the etched-through region formed by the present invention extends from the upper surface to the lower surface of the main oscillation region of the wafer of the oscillator crystal structure, thereby forming a penetration between the upper surface and the lower surface of the oscillator crystal structure. And, according to a feasible embodiment of the present invention, specifically, the etched-through width of the etched-through region can be selectively adjusted. For example, in one embodiment, when the etched-through region is designed to have a first etched-through width, the first adjacent region or the second adjacent region has a protrusion on the side close to the main oscillation region of the wafer. On the other hand, when the etched-through region is designed to have a second etched-through width, the first adjacent region or the second adjacent region can be made straight on the side close to the main oscillation region of the wafer. The width of the second etched-through width is greater than the width of the first etched-through width, so that the formed etched-through region has an adjustable etched-through width, that is, the first adjacent region or the second adjacent region can selectively have different edge shapes on the side close to the main oscillation region of the wafer, such as: having a protrusion, being straight, or even forming a concave structure, etc. However, it is worth reminding that the present invention is of course not limited to such embodiments. In other feasible embodiments of the present invention, the etched-through region formed in the oscillator crystal structure may also optionally have a narrower etched-through width. In view of this, in summary, it is worth reminding that according to the above-provided embodiments of the present invention and their optional alternative embodiments, the present invention is not limited to the disclosed embodiments. In other words, for those skilled in the art and those with ordinary knowledge and technical background of the present invention, when making modifications or decorations under different structural configuration requirements without departing from the scope of the present invention, the modified embodiments and / or the implementation manners of the oscillator crystal structure should still fall within the scope of the claims of the present invention.

[0014] In addition, the present invention also discloses an innovative wafer-level package structure for an oscillator crystal. This novel wafer-level package (WLP) structure aims to use a planar-designed package base and an upper cover to encapsulate the oscillator crystal structure, effectively avoiding the limitations encountered in the processability of the lower base in the prior art and simultaneously solving the problem that the contact area between the electrical unit of the piezoelectric material and the lower base is too small, making it difficult to conduct tests. According to the present invention, this novel wafer-level package structure includes: a package base, an upper cover, and an oscillator crystal. The package base has an upper plane, the upper cover has a lower plane, and the oscillator crystal is disposed between the package base and the upper cover, and the oscillator crystal contacts the upper plane of the package base and the lower plane of the upper cover respectively. The oscillator crystal has a main wafer oscillation region, the main wafer oscillation region has an upper surface and a lower surface opposite to the upper surface; a first adjacent region, adjacent to one side of the main wafer oscillation region; and a second adjacent region, opposite to the first adjacent region, the second adjacent region is adjacent to the other side of the main wafer oscillation region. Among them, the maximum thickness of the first adjacent region and the second adjacent region is greater than the wafer thickness of the main wafer oscillation region, so that an upper groove is formed between the upper top surfaces of the first adjacent region and the second adjacent region and the upper surface of the main wafer oscillation region, and a lower groove is formed between the lower bottom surfaces of the first adjacent region and the second adjacent region and the lower surface of the main wafer oscillation region. And at least one etched-through region is formed between the main wafer oscillation region and the adjacent first adjacent region or the second adjacent region, so that the main wafer oscillation region is disconnected from the first adjacent region or the second adjacent region on both sides of it. At the same time, a sealed upper groove is formed between the upper surface of the main wafer oscillation region and the lower plane of the upper cover, and a sealed lower groove is formed between the lower surface of the main wafer oscillation region and the upper plane of the package base, thus completing the encapsulation of the oscillator crystal.

[0015] Specifically, according to an embodiment of the present invention, an upper seal ring may be formed between the lower plane of the upper cover and the oscillator crystal, and a lower seal ring may also be formed between the upper plane of the package base and the oscillator crystal. The upper seal ring and the lower seal ring are respectively disposed around the oscillator crystal, so that the upper cover and the package base further complete the sealing of the oscillator crystal through the upper seal ring and the lower seal ring.

[0016] In detail, the upper seal ring is formed between the lower plane of the upper cover and the upper top surfaces of the first adjacent region and the second adjacent region of the oscillator crystal, the lower seal ring is formed between the upper plane of the package base and the lower bottom surfaces of the first adjacent region and the second adjacent region of the oscillator crystal, and the upper seal ring and the lower seal ring are respectively disposed around the main wafer oscillation region of the oscillator crystal.

[0017] Wherein, the upper encapsulation ring and the lower encapsulation ring respectively include two interface metal layers and a bonding metal layer. The interface metal layers in the upper encapsulation ring are respectively connected to the upper top surface of the oscillator crystal and the lower plane of the upper cover body. The interface metal layers in the lower encapsulation ring are respectively connected to the lower bottom surface of the oscillator crystal and the upper plane of the encapsulation base. A diffusion barrier layer is formed between each interface metal layer and the bonding metal layer. This diffusion barrier layer can be constituted by one of the materials such as ruthenium, titanium or their alloys, organic polymers or oxides.

[0018] For example, the material of the interface metal layer can be chromium (Cr) for example, and the material of the bonding metal layer can be gold (Au), tin (Sn) or their alloy (Au - Sn alloy) for example.

[0019] Another object of the present invention is to provide a wafer - level packaging structure for an oscillator crystal, and a foregoing diffusion barrier layer (diffusion barrier layer) is provided between the interface metal layer and the bonding metal layer of its encapsulation ring, and the material is ruthenium (Ru), titanium (Ti) or their alloy (Ru - Ti alloy), organic polymer or oxide, so as to avoid the problem of interface diffusion between bonding metals.

[0020] Furthermore, another object of the present invention is to control the thermal expansion coefficients of the upper cover body, the oscillator crystal and the encapsulation base to be close to or the same, so as to achieve the optimization of the thermal stress design of the packaging structure. For example, in a preferred embodiment of the present invention, for the optimization of the stress intensity of the packaging structure, according to an embodiment of the present invention, by selecting the upper cover body and the encapsulation base with similar thermal expansion coefficients, the problem of thermal stress during hermetic packaging is further prevented. For example, the thermal expansion coefficients of the upper cover body and the encapsulation base selected by the present invention can be between 2×10 -7 / K and 9×10 -7 / K. Moreover, in an embodiment of the present invention, for the wafer - level packaging structure of the oscillator crystal provided by the present invention, wherein, the upper cover body, the oscillator crystal and the encapsulation base can all be selected as quartz materials simultaneously, so as to achieve the optimization of the stress intensity of the packaging structure.

[0021] Furthermore, the present invention can further incorporate the Through Quartz via (TQV) technology to form at least one metal via, which penetrates the electrical connections or electrodes of the wafer substrate, so as to provide high-density wiring between the process chips and provide a more optimized integration technology between the wafer manufacturing in the front-end process and the packaging technology in the back-end process. For example, according to a feasible embodiment of the present invention, an upper excitation electrode and a lower excitation electrode can be respectively formed on the upper surface and the lower surface of the oscillator crystal provided by the present invention, and they are respectively disposed in the sealed upper groove and the sealed lower groove. A bottom metal layer is formed on the lower plane of the packaging base, and at least one through hole penetrates the packaging base, so that the bottom metal layer can extend upward to fill the at least one through hole to form at least one metal conduction column, and is electrically connected to the upper excitation electrode, the lower excitation electrode, and the bottom metal layer to provide signal input and output. In one embodiment, the material of the bottom metal layer can be selected as copper, for example. Through the above structural configuration, the present invention realizes an effective electrical connection of a wafer-level packaging structure of an oscillator crystal.

[0022] In view of this, in summary, based on the technical solution provided by the present invention, it can be clearly seen that the present invention is designed through precise and meticulous design, and discloses an oscillator crystal structure with great innovation and improvement and the wafer-level packaging structure formed by the oscillator crystal. This improved oscillator crystal structure has at least one etched-through area inside its structure, and through this etched-through area, the main oscillation area of the chip is disconnected from the adjacent chip structure. By forming internal etching in the oscillator crystal structure, the present invention can reduce the frequency offset after packaging and has better impedance and component characteristics. In view of this, it is obvious that by adopting the oscillator crystal and its packaging structure disclosed by the present invention, it can be seen that the present invention has many advantages. Therefore, it can be believed that the technical solution disclosed by the present invention is beneficial, and compared with the prior art, it is extremely conducive to improving its existing deficiencies.

[0023] Hereinafter, the present invention will be further described in detail through specific embodiments in conjunction with the accompanying drawings, and it will be easier to understand the purpose, technical content, features and achieved effects of the present invention. Description of the Drawings

[0024] Figure 1 It is a schematic cross-sectional view of an oscillator crystal structure with internal etching according to a first embodiment of the present invention.

[0025] Figure 2 It is a schematic cross-sectional view of an oscillator crystal structure with internal etching according to a second embodiment of the present invention.

[0026] Figure 3Schematic cross-sectional view of an oscillator crystal structure with internal etching through according to a third embodiment of the present invention.

[0027] Figure 4 According to the present invention Figure 1 Schematic cross-sectional view of the wafer-level packaging structure of the oscillator crystal shown.

[0028] Figure 5 Schematic cross-sectional view of an upper encapsulation ring according to an embodiment of the present invention.

[0029] Figure 6 Schematic cross-sectional view of a lower encapsulation ring according to an embodiment of the present invention.

[0030] Figure 7 According to the present invention Figure 2 Schematic cross-sectional view of the wafer-level packaging structure of the oscillator crystal shown.

[0031] Figure 8 According to the present invention Figure 3 Schematic cross-sectional view of the wafer-level packaging structure of the oscillator crystal shown.

[0032] Explanation of reference numerals: 10 - packaging base; 11 - oscillator crystal; 12 - oscillator crystal; 13 - oscillator crystal; 14A, 14B etching-through regions; 24 - upper excitation electrode; 26 - lower excitation electrode; 28 - bottom metal layer; 30 - upper cover body; 42 - upper encapsulation ring; 44 - lower encapsulation ring; 71 - upper groove; 72 - lower groove; 210 - main oscillation region of the wafer; 211 - first adjacent region; 212 - second adjacent region; 311 - upper surface; 312 - lower surface; 402 - interface metal layer; 404 - bonding metal layer; 406 - diffusion barrier layer; 411 - upper top surface; 412 - lower bottom surface; 616 - wafer-level packaging structure; 717 - wafer-level packaging structure; 818 - wafer-level packaging structure; D12 - maximum thickness; D10 - wafer thickness; W1, W2, W2’, W3 - etching-through width; P1, P2, P2’ - protrusions. Detailed implementation manners

[0033] The above description of the content of the present invention, together with the following embodiments, is used to demonstrate and explain the spirit and principle of the present invention, and to provide a further explanation of the claims of the present invention. Please refer in detail to the preferred embodiments of the present invention, which are illustrated in the accompanying drawings. And, whenever possible, the same reference numerals will be used in the drawings and description of the present invention to refer to the same or similar elements. It should be understood that in the drawings, for clarity and convenience, the present invention may be enlarged with respect to shape and thickness, and elements not specifically shown or described may take various forms well known to those skilled in the art. Once informed by the present invention, such alternative and modified examples will be obvious to those skilled in the art.

[0034] To illustrate the technical content and features of the present invention and enable those of ordinary skill in the art to understand, make, and use the present invention, the following provides numerous examples of the present invention. However, it should be noted that these examples are not used to limit the scope covered by the present invention. Therefore, any equivalent modifications or changes made in accordance with the spirit of the present invention should be included within the protection scope of the present invention.

[0035] Unless otherwise specified, some conditional clauses or words, such as "may" or "might", are generally used to attempt to indicate that embodiments of the present invention "have", but can also be interpreted as features, elements, or steps that are not required. In other embodiments, these features, elements, or steps may not be required.

[0036] In the embodiments described in the specification of the present invention, the reference to "one embodiment" or "in one embodiment" means that the specific features, structures, or characteristics described in connection with that embodiment are included in at least one embodiment. Therefore, the appearances of "one embodiment" or "in one embodiment" throughout the specification of the present invention do not necessarily refer to the same embodiment.

[0037] In the embodiments and claims of the present invention, specific terms are used to refer to specific elements. Those of ordinary skill in the art should understand that the same element can be referred to by different names. The present invention does not distinguish between elements with different names but the same function. In the specification and claims of the present invention, "comprising" is used in an open-ended manner and should thus be interpreted as "including but not limited to". "Coupled to" is intended to cover any indirect or direct connection. In other words, if a first device is provided in the present invention to be coupled to a second device, it means that the first device can be connected to the second device directly or indirectly through other intermediate devices or connection means by means of electrical connection, wireless communication, optical communication, or other signal connections, whether there is a signal or not.

[0038] The present invention is described in detail through the following embodiments, which are only illustrative examples. Those of ordinary skill in the art can easily make appropriate modifications and changes to devices and methods while retaining the teaching ideas of the present invention. Therefore, the content disclosed in the present invention below should be construed as being limited only by the boundaries of the appended claims. Throughout the patent application and claims, unless clearly described otherwise, the meanings of "a" and "the" include "one or at least one" of the elements or components. Also, throughout the patent application and claims, unless it can be clearly excluded from the context that there are multiple elements, the singular also includes the description of multiple elements or components. Throughout the specification and claims, unless the content clearly defines the meaning of certain words, the word "wherein" means "among" or "above". Generally, the meaning of each term used in the claims and specification of the present invention refers to the common meaning known to those of ordinary skill in the art, unless otherwise noted. Some terms used to describe the present invention and terms that can guide those skilled in the art to understand the present invention will be discussed. Each illustrative example in the specification of the present invention cannot be used to limit the protection scope of the present invention.

[0039] Words such as "substantially", "about", "approximately", and "roughly" can refer to a value within 20% of a given value or range, preferably within 10%. In addition, the quantities or numbers provided in the present invention can be approximate values, and if not specifically stated, they can be described using the above words. When a quantity, density, or other parameter includes a specified range, preferred range, or listed ideal value, their values can be regarded as any number within the given range.

[0040] As described in the prior art section of the present invention, in order to effectively fabricate a wafer-level package structure with better component characteristics for an oscillator crystal while maintaining a relatively low complexity of the manufacturing process, in view of these deficiencies to be improved and aiming to solve these existing problems, the present invention proposes an oscillator crystal structure with both novelty and creativity. The technical feature of the improved oscillator crystal structure disclosed in the present invention is that at least one etched-through region is formed inside the oscillator crystal. Through simulation analysis, in the oscillator crystal with an internal etched-through region formed, better internal thermal stress can be obtained, thereby reducing the frequency offset after component packaging. Regarding the specific architecture of the oscillator crystal structure provided by the present invention and the wafer-level package structure of the oscillator crystal formed thereby, the present invention will provide relevant detailed descriptions through multiple variant embodiments described in the following sections for reference.

[0041] First, please refer to Figure 1 shown, which discloses a cross-sectional schematic diagram of an oscillator crystal structure with internal etching in a first embodiment of the present invention, asFigure 1 As shown, the wafer structure of the oscillator crystal 11 mainly includes: a main oscillation region 210 of the wafer, a first adjacent region 211, and a second adjacent region 212. Among them, the main oscillation region 210 of the wafer has an upper surface 311 and a lower surface 312 opposite to the upper surface 311. The first adjacent region 211 is adjacently arranged on one side of the main oscillation region 210 of the wafer, and the second adjacent region 212 is arranged on the other side of the main oscillation region 210 of the wafer relative to the first adjacent region 211. As Figure 1 shown, the first adjacent region 211 and the second adjacent region 212 have an upper top surface 411 and a lower bottom surface 412, and a maximum thickness D12 of the first adjacent region 211 and the second adjacent region 212 is defined between the upper top surface 411 and the lower bottom surface 412. From Figure 1 it can be clearly seen that the maximum thickness D12 of the first adjacent region 211 and the second adjacent region 212 is greater than the wafer thickness D10 of the main oscillation region 210 of the wafer, so that an upper groove 71 is formed between the upper top surface 411 of the first adjacent region 211 and the second adjacent region 212 and the upper surface 311 of the main oscillation region 210 of the wafer. At the same time, a lower groove 72 is formed between the lower bottom surface 412 of the first adjacent region 211 and the second adjacent region 212 and the lower surface 312 of the main oscillation region 210 of the wafer. And, an etched-through region 14A is formed between the main oscillation region 210 of the wafer and the adjacent first adjacent region 211, so that the main oscillation region 210 of the wafer and the adjacent first adjacent region 211 are disconnected, and thus the main oscillation region 210 of the wafer and the first adjacent region 211 are spaced apart by the etched-through region 14A.

[0042] Similarly, an etched-through region 14B is formed between the main oscillation region 210 of the wafer and the adjacent second adjacent region 212, so that the main oscillation region 210 of the wafer and the adjacent second adjacent region 212 are disconnected, and thus the main oscillation region 210 of the wafer and the second adjacent region 212 are spaced apart by the etched-through region 14B. In the oscillator crystal 11 illustrated in the first embodiment of the present invention, it is an illustrative example for explaining the technical idea of the present invention that two etched-through regions 14A and 14B are simultaneously formed inside the oscillator crystal for illustration. However, the present invention is not limited thereto. One or more etched-through regions can be selectively arranged inside the oscillator crystal. The present invention is not limited by the number of the formed etched-through regions or their set positions. Those skilled in the art in the technical field to which the present invention pertains and having ordinary knowledge can appropriately modify and select the number, width, and set positions of the etched-through regions formed inside the oscillator crystal according to their actual design specifications and requirements. That is to say, any modification or change based on the spirit of the present invention should still fall within the scope of the invention of the present invention, so that the present invention covers its modified examples and their equivalent embodiments.

[0043] Specifically, the etched-through regions 14A and 14B designed and formed in the present invention extend from the upper surface 311 to the lower surface 312 of the oscillator crystal 11, thereby forming a penetration between the upper surface 311 and the lower surface 312. Generally speaking, such etched-through regions 14A and 14B can be formed, for example, by using a dry etching process or a wet etching process. In addition, for the etched-through regions 14A and 14B designed and adopted in the present invention, the etched-through width of the etched-through region can be selectively adjusted to Figure 1 Taking the illustrated embodiment as an example, when the etched-through regions 14A and 14B respectively have a first etched-through width W1 and W2, the first adjacent region 211 and the second adjacent region 212 have a protrusion P1 and P2 on the side close to the main oscillation region 210 of the wafer. And such an etched-through width can be adjusted. Please refer to Figure 2 As shown, it discloses a cross-sectional schematic diagram of an oscillator crystal structure with internal etching in the second embodiment of the present invention. As Figure 2 shown, the same as the previous embodiment, the oscillator crystal 12 includes: a main oscillation region 210 of the wafer, a first adjacent region 211, a second adjacent region 212, an upper groove 71, a lower groove 72, and two etched-through regions 14A and 14B. The present invention will not repeat it here. However, different from the previous embodiment, in the second embodiment of the present invention, the etched-through region 14B may have another etched-through width W2' slightly wider than the aforementioned etched-through width W2. In this case, compared with the protrusion P2 of the first embodiment ( Figure 1 ), the protrusion P2' of the second adjacent region 212 in the second embodiment will be slightly shortened and have a shallower protrusion width.

[0044] Looking further, in the present invention Figure 3 Further discloses a cross-sectional schematic diagram of an oscillator crystal structure with internal etching in a third embodiment of the present invention. The same as the previous first and second embodiments, Figure 3The oscillator crystal 13 shown includes: a main oscillation region 210 of the wafer, a first adjacent region 211, a second adjacent region 212, an upper groove 71, a lower groove 72, and two etched-through regions 14A, 14B. However, in this third embodiment, the etched-through region 14B may further have a wider etched-through width W3, such that the second adjacent region 212 is in a straight state (without the generation of protrusions) on the side close to the main oscillation region 210 of the wafer, and thus can also be used to achieve the inventive effects of the present invention. The present invention fully illustrates various variations of the etched-through region that can be provided by the above three embodiments. It should be understood that each illustrative example in the specification of the present invention cannot be used to limit the protection scope of the present invention. Generally speaking, the present invention improves the wafer structure of the oscillator crystal by forming an internally etched-through region in the structure of the oscillator crystal. At the same time, in the following paragraphs, the present invention further describes and elaborates on the wafer-level packaging structure of such an improved oscillator crystal structure. Moreover, through simulation analysis and subsequent frequency measurement of the packaging structure, relevant data are provided as evidence, confirming that the technical solution provided by the present invention is effective and can solve problems such as thermal stress and frequency offset encountered in the wafer-level oscillator crystal packaging structure of the prior art, thereby achieving better component characteristics.

[0045] First, please refer to Figure 4 shown, which is a cross-sectional schematic diagram of the wafer-level packaging (WLP) structure of the oscillator crystal according to Figure 1 the present invention. Such a wafer-level packaging structure 616 of the oscillator crystal includes: a packaging base (bottom layer) 10, an upper cover (Capping layer) 30, and the oscillator crystal (oscillator crystal) 11 of the aforementioned first embodiment, so as to complete the packaging of the oscillator crystal 11 through the provided packaging base 10 and upper cover 30. According to an embodiment of the present invention, the oscillator crystal 11 may be, for example, a quartz crystal oscillator such as a temperature-stable cut angle (AT-cut) quartz crystal oscillator, a tuning fork type quartz crystal oscillator, or other mechanical resonance type oscillators.

[0046] According to an embodiment of the present invention, the packaging base 10 has an upper plane, the upper cover 30 has a lower plane, the oscillator crystal 11 is disposed between the packaging base 10 and the upper cover 30, and the oscillator crystal 11 is in contact with the upper plane of the packaging base 10 and the lower plane of the upper cover 30, respectively. Continuing from what was said in the first embodiment of the present invention, the wafer structure of the oscillator crystal 11 mainly includes a main oscillation region 210 of the wafer, a first adjacent region 211, a second adjacent region 212, and one or more etched-through regions 14A, 14B formed inside thereof. Please refer to Figure 1As shown, an upper groove 71 is formed between the upper top surface 411 of the first adjacent region 211 and the second adjacent region 212 and the upper surface 311 of the wafer main oscillation region 210, and a lower groove 72 is formed between the lower bottom surface 412 of the first adjacent region 211 and the second adjacent region 212 and the lower surface 312 of the wafer main oscillation region 210. Therefore, during encapsulation, a sealed upper groove 71 can be further formed between the upper surface 311 of the wafer main oscillation region 210 and the lower plane of the upper cover 30. At the same time, a sealed lower groove 72 can be further formed between the lower surface 312 of the wafer main oscillation region 210 and the upper plane of the encapsulation base 10. The internal environment in the sealed state can be, for example, a vacuum or filled with helium. Thus, by directly welding (direct bond) the upper cover 30 and the encapsulation base 10, the upper cover 30 and the encapsulation base 10 complete the sealing of the oscillator crystal 11 through the lower plane of the upper cover 30 and the upper plane of the encapsulation base 10, realizing the wafer-level packaging structure 616 for encapsulating the oscillator crystal 11.

[0047] Generally speaking, upper and lower electrodes can be respectively formed on the upper and lower surfaces of the oscillator crystal 11 as excitation electrodes and are electrically connected to the metal pads of the encapsulation base 10 through conductive bumps (bump) to excite the oscillator crystal 11 (details will be described later). In an embodiment, the conductive bump can be, for example, a metal composed of one of gold, copper, tin, silver, indium or their alloys, or a conductive adhesive material composed of silver powder particles and resin, etc.

[0048] An upper encapsulation ring 42 is formed between the lower plane of the upper cover 30 and the upper top surface 411 of the oscillator crystal 11, and a lower encapsulation ring 44 is formed between the upper plane of the encapsulation base 10 and the lower bottom surface 412 of the oscillator crystal 20. The upper encapsulation ring 42 and the lower encapsulation ring 44 are respectively disposed around the wafer main oscillation region 210 of the oscillator crystal 11, so that the upper cover 30 and the encapsulation base 10 complete the sealing of the oscillator crystal 11 through the upper encapsulation ring 42 and the lower encapsulation ring 44. Thus, the present invention simultaneously utilizes the upper encapsulation ring 42 of the upper cover 30 and the lower encapsulation ring 44 of the encapsulation base 10, and both simultaneously engage the oscillator crystal 11 to provide better airtightness when sealing the oscillator crystal 11. At the same time, upper and lower electrodes can be respectively formed on the upper and lower surfaces of the oscillator crystal 11, namely the upper excitation electrode 24 and the lower excitation electrode 26 shown in the figure, to excite the oscillator crystal 11. In other words, in the embodiment shown in the present invention Figure 4 In the embodiment shown, the present invention hermetically encapsulates the oscillator crystal 11 by using the upper cover 30 and the encapsulation base 10 through the upper encapsulation ring 42 and the lower encapsulation ring 44, and the internal environment can be, for example, a vacuum or filled with helium.

[0049] Based on the prior art, a U.S. Patent Publication No. 7,608,986 patent "Quartz crystal resonator" proposes a wafer-level packaging form, which mainly forms a sandwich structure by anodic bonding of the upper cover and the lower base made of glass material (blue plate glass) with the quartz crystal. However, due to the different thermal expansion coefficients of the base material and the quartz in this sandwich structure, when the temperature changes, thermal stress will be generated in the internal quartz crystal, and thus its piezoelectric oscillation frequency will shift with the temperature. Therefore, for the cut angle of the quartz crystal wafer and the thermal expansion coefficients of its upper cover and lower base materials, careful selection is required, and through special design and consideration, this difficulty can be overcome. However, this will also greatly increase the cost, man-hours, and labor requirements in production and cost. In view of this, based on the many problems stated in the aforementioned prior art, it is impossible to break away from the current dilemma of using ceramic base packaging. Not only is the product cost high and the supply unstable, but the thermal stress problem caused by the sandwich-shaped packaging structure still cannot be effectively solved. Therefore, in order to optimize the structural stress strength of the present invention, by selecting the upper cover body 30 and the packaging base 10 with similar thermal expansion coefficients, the thermal stress problem during hermetic packaging is further prevented. Specifically, the thermal expansion coefficients of the upper cover body 30 and the packaging base 10 selected in the present invention can be, for example, between 2*10 -7 / K and 9*10 -7 / K. Moreover, in an embodiment of the present invention, in the wafer-level packaging structure of the oscillator crystal provided by the present invention, the materials of the upper cover body 30, the oscillator crystal 11, and the packaging base 10 can all be selected as quartz at the same time to achieve the optimal design of the thermal stress of the packaging structure.

[0050] On the other hand, the upper excitation electrode 24 of the oscillator crystal 11 is disposed in the sealed upper groove 71, the lower excitation electrode 26 of the oscillator crystal 11 is disposed in the sealed lower groove 72, and a bottom metal layer 28 is formed on a lower plane of the packaging base 10. The present invention can further provide at least one through hole penetrating the packaging base 10, so that the bottom metal layer 28 can extend upward to fill the through hole and form at least one metal conduction column, thereby completing electrical connection with the upper excitation electrode 24, the lower excitation electrode 26, and the bottom metal layer 28 to provide input and output (I / O) of signals for the wafer-level packaging structure 616. In practice, the material of the bottom metal layer 28 provided in an embodiment of the present invention can be selected as, for example, copper.

[0051] Regarding the selection and setting of the upper packaging ring 42 and the lower packaging ring 44, please refer to Figure 5 and Figure 6As shown, the cross-sectional schematic diagrams of the upper encapsulation ring 42 and the lower encapsulation ring 44 of the embodiments of the present invention are respectively disclosed. Based on another object of the present invention, in order to avoid the problem of interfacial diffusion between metals, therefore, as Figure 5 drawn, the upper encapsulation ring 42 includes two interfacial metal layers 402 and a bonding metal layer 404. Among them, the two interfacial metal layers 402 are respectively connected to the upper cover body 30 and the oscillator crystal 11. And, there is a diffusion barrier layer 406 between each interfacial metal layer 402 and the bonding metal layer 404. This diffusion barrier layer 406 can be formed of one of the materials such as ruthenium (Ru), titanium (Ti), or their alloys, organic polymers, or oxides. Similarly, as Figure 6 shown, the lower encapsulation ring 44 includes two interfacial metal layers 402 and a bonding metal layer 404. Among them, the two interfacial metal layers 402 are respectively connected to the encapsulation base 10 and the oscillator crystal 11. And, there is a diffusion barrier layer 406 between each interfacial metal layer 402 and the bonding metal layer 404. This diffusion barrier layer 406 can be formed of one of the materials such as ruthenium (Ru), titanium (Ti), or their alloys, organic polymers, or oxides. The present invention can effectively prevent the problem of interfacial diffusion generated in the encapsulation rings 42 and 44 through such a structural configuration relationship of the interfacial metal layer 402, the bonding metal layer 404, and the diffusion barrier layer 406.

[0052] Specifically, according to the embodiments of the present invention, among them, the material of the interfacial metal layer 402 is chromium (Cr), and its thickness can be, for example, 10 nanometers; the material of the bonding metal layer 404 is gold (Au), tin (Sn), or their alloys, and its thickness can be, for example, 30 to 70 nanometers, and the thickness of the diffusion barrier layer 406 therebetween can be, for example, 10 nanometers. Those skilled in the art can adjust it according to the actual production requirements of their products. However, the present invention is not limited to this implementation mode.

[0053] Figure 7 Disclose the present invention according to Figure 2 shown, the cross-sectional schematic diagram of the wafer-level packaging (WLP) structure of the oscillator crystal. Such a wafer-level packaging structure 717 of the oscillator crystal includes: an encapsulation base 10, an upper cover body 30, and the oscillator crystal 12 of the foregoing second embodiment, so as to complete the encapsulation of the oscillator crystal 12 through the provided encapsulation base 10 and the upper cover body 30. Figure 8 Disclose the present invention according to Figure 3The cross-sectional schematic diagram of the wafer-level packaging (WLP) structure of the shown oscillator crystal. The wafer-level packaging structure 818 of such an oscillator crystal includes: a packaging base 10, an upper cover 30, and the oscillator crystal 13 of the aforementioned third embodiment, so as to complete the packaging of the oscillator crystal 13 through the provided packaging base 10 and upper cover 30. Therefore, according to the technical idea taught by the present invention, those of ordinary skill in the art can change their designs on the actual implementation level by themselves, and all fall within the scope of the present invention. The several exemplary examples listed in the foregoing paragraphs of the present invention are intended to better explain the main technical features of the present invention, so that those in the art can understand and implement it accordingly. However, the present invention is not limited to these exemplary examples.

[0054] In summary, in view of the many embodiments disclosed in the present invention, through thermal stress simulation analysis, the internal thermal stress distribution of its wafer-level packaging structure can be effectively reduced from the conventional 10.99 MPa to 2.41 MPa, indicating that the structure with an etched-through region formed inside the oscillator crystal can have a better internal thermal stress distribution. At the same time, the present invention also provides Table (I) below, which is a comparative analysis of the 76.8 M frequency measurement of the packaging structure of the oscillator crystal of the prior art and the packaging structure formed by the oscillator crystal with an internal etch-through of the present invention.

[0055] Table (I)

[0056]

[0057] It can also be confirmed from Table (I) that the technical solution provided by the present invention, the structure with an etched-through region formed inside the oscillator crystal can have better component characteristics, including: lower impedance and better Q value. At the same time, for the wafer-level packaging structure formed by the present invention, when performing frequency measurement, it can also significantly reduce the frequency offset problem caused by stress transmission due to external forces.

[0058] Therefore, in view of the above, it can be clearly seen that an oscillator crystal structure with internal etching penetration provided by the present invention and the wafer-level packaging structure formed thereby overcome the problem that the prior art is limited in the manufacturing process due to the need to provide grooves on the surface of the base of the packaging structure. At the same time, the present invention also improves the dilemma of the prior art that only ceramic base packaging can be used (including high product cost and unstable supply, etc.), and by selecting the upper cover, oscillator crystal and packaging base of the same material, the thermal stress problem caused by the sandwich packaging structure is improved. Compared with the prior art, the structure of the present invention with an etched-through area formed inside the oscillator crystal can have better product component characteristics, and further by designing a diffusion barrier layer in the packaging ring, the lack of interfacial diffusion in the traditional technology is avoided. Therefore, in summary, it is obvious that the wafer-level packaging structure of the oscillator crystal provided by the present invention indeed has excellent industrial applicability and competitiveness. At the same time, it is verified that the technical features, methods and means provided by the present invention and the achieved effects are significantly different from the current solutions, and it is really not easy for those familiar with this technology to complete.

[0059] The above-described embodiments are only for illustrating the technical ideas and features of the present invention, and the purpose is to enable those skilled in the art to understand the content of the present invention and implement it accordingly. It should not be used to limit the scope of the present invention, that is, all equivalent changes or modifications made in accordance with the spirit disclosed by the present invention should still be covered by the protection scope of the present invention.

Claims

1. An oscillator crystal structure with internal etching through, characterized in that, Comprising: A main vibrating region of a wafer, the main vibrating region of the wafer having an upper surface and a lower surface opposite to the upper surface; A first adjacent region, adjacently disposed on one side of the main vibrating region of the wafer; and A second adjacent region, relative to the first adjacent region, the second adjacent region being adjacently disposed on the other side of the main vibrating region of the wafer; Wherein, the maximum thickness of the first adjacent region and the second adjacent region is greater than the wafer thickness of the main vibrating region of the wafer, so that an upper groove is formed between an upper top surface of the first adjacent region and the second adjacent region and the upper surface of the main vibrating region of the wafer, and a lower groove is formed between a lower bottom surface of the first adjacent region and the second adjacent region and the lower surface of the main vibrating region of the wafer, and at least one etched-through region is formed between the main vibrating region of the wafer and the first adjacent region or the second adjacent region adjacent thereto, so that the main vibrating region of the wafer is disconnected from the first adjacent region or the second adjacent region located on both sides thereof.

2. The oscillator crystal structure with internal etching through as claimed in claim 1, characterized in that, One of the etched-through regions is formed between the main vibrating region of the wafer and the first adjacent region, thereby spacing the main vibrating region of the wafer and the first adjacent region.

3. The oscillator crystal structure with internal etching through as claimed in claim 1, wherein One of the etched-through regions is formed between the main vibrating region of the wafer and the second adjacent region, thereby spacing the main vibrating region of the wafer and the second adjacent region.

4. The oscillator crystal structure with internal etching through as claimed in claim 1, characterized in that, There are also two of the etched-through regions, wherein, one of the etched-through regions is formed between the main vibrating region of the wafer and the first adjacent region, and the other of the etched-through regions is formed between the main vibrating region of the wafer and the second adjacent region, such that the main vibrating region of the wafer is spaced from both the first adjacent region and the second adjacent region simultaneously.

5. The oscillator crystal structure with internal etching through as claimed in claim 1, characterized in that, The at least one etched-through region is formed extending from the upper surface of the main vibrating region of the wafer to the lower surface of the main vibrating region of the wafer, thereby forming a through hole between the upper surface and the lower surface.

6. The oscillator crystal structure with internal etching through as claimed in claim 1, characterized in that, The etched-through width of the at least one etched-through region is selectively adjustable, when the at least one etched-through region has a first etched-through width, the first adjacent region or the second adjacent region has a protrusion on a side close to the main vibrating region of the wafer.

7. The oscillator crystal structure with internal etching through as described in claim 6, characterized in that, The etched-through width of the at least one etched-through region is selectively adjustable, when the at least one etched-through region has a second etched-through width, the first adjacent region or the second adjacent region is straight on a side close to the main vibrating region of the wafer.

8. The oscillator crystal structure with internal etching through as claimed in claim 7, characterized in that, The second etched-through width is greater than the first etched-through width.

9. The oscillator crystal structure with internal etching through as claimed in claim 1, wherein The at least one etched-through region is formed by a dry etching process or a wet etching process.

10. The oscillator crystal structure with internal etching through as described in claim 1, characterized in that, The material of the oscillator crystal structure with internal etching is quartz.

11. A wafer-level packaging structure of an oscillator crystal, characterized in that, Comprising: A packaging base, the packaging base having an upper plane; An upper cover body, the upper cover body having a lower plane; and An oscillator crystal, the oscillator crystal being disposed between the packaging base and the upper cover body, and the oscillator crystal respectively contacting the upper plane of the packaging base and the lower plane of the upper cover body, wherein, the oscillator crystal includes: A main vibrating region of a wafer, the main vibrating region of the wafer having an upper surface and a lower surface opposite to the upper surface; A first adjacent region, adjacently disposed on one side of the main vibrating region of the wafer; and A second adjacent region, relative to the first adjacent region, the second adjacent region being adjacently disposed on the other side of the main vibrating region of the wafer; Wherein, the maximum thickness of the first adjacent region and the second adjacent region is greater than the wafer thickness of the main vibrating region of the wafer, so that an upper groove is formed between an upper top surface of the first adjacent region and the second adjacent region and the upper surface of the main vibrating region of the wafer, and a lower groove is formed between a lower bottom surface of the first adjacent region and the second adjacent region and the lower surface of the main vibrating region of the wafer. At least one etched-through region is formed between the main vibrating region of the wafer and the first adjacent region or the second adjacent region adjacent thereto, so that the main vibrating region of the wafer is disconnected from the first adjacent region or the second adjacent region on both sides thereof. Moreover, a sealed upper groove is formed between the upper surface of the main vibrating region of the wafer and the lower plane of the upper cover body, and a sealed lower groove is formed between the lower surface of the main vibrating region of the wafer and the upper plane of the encapsulation base, thereby completing the encapsulation of the oscillator crystal.

12. The wafer-level packaging structure of the oscillator crystal according to claim 11, characterized in that, It further includes: an upper encapsulation ring formed between the lower plane of the upper cover body and the upper top surface of the first adjacent region and the second adjacent region of the oscillator crystal; and a lower encapsulation ring formed between the upper plane of the encapsulation base and the lower bottom surface of the first adjacent region and the second adjacent region of the oscillator crystal; Moreover, the upper encapsulation ring and the lower encapsulation ring are respectively disposed around the main vibrating region of the wafer of the oscillator crystal, so that the upper cover body and the encapsulation base complete the sealing of the oscillator crystal through the upper encapsulation ring and the lower encapsulation ring.

13. The wafer-level packaging structure of the oscillator crystal according to claim 12, wherein The upper encapsulation ring includes two interface metal layers and a bonding metal layer. The two interface metal layers are respectively connected to the lower plane of the upper cover body and the upper top surface of the first adjacent region or the second adjacent region of the oscillator crystal. There is also a diffusion barrier layer between each interface metal layer and the bonding metal layer. The diffusion barrier layer is composed of one of the materials of ruthenium, titanium or its alloy, organic polymer or oxide.

14. The wafer-level packaging structure of the oscillator crystal according to claim 12, characterized in that, The lower encapsulation ring includes two interface metal layers and a bonding metal layer. The two interface metal layers are respectively connected to the upper plane of the encapsulation base and the lower bottom surface of the first adjacent region or the second adjacent region of the oscillator crystal. There is also a diffusion barrier layer between each interface metal layer and the bonding metal layer. The diffusion barrier layer is composed of one of the materials of ruthenium, titanium or its alloy, organic polymer or oxide.

15. The wafer-level packaging structure of the oscillator crystal according to claim 13 or 14, characterized in that, The material of each interface metal layer is chromium.

16. The wafer-level packaging structure of the oscillator crystal according to claim 13 or 14, characterized in that, The material of the bonding metal layer is gold, tin or its alloy.

17. The wafer-level packaging structure of the oscillator crystal according to claim 11, characterized in that, An upper excitation electrode and a lower excitation electrode are respectively formed on the upper surface and the lower surface of the oscillator crystal, and are respectively disposed in the sealed upper groove and the sealed lower groove. A bottom metal layer is formed on a lower plane of the encapsulation base. At least one through hole penetrates the encapsulation base, so that the bottom metal layer can extend upward to fill the at least one through hole to form at least one metal conduction column, and is electrically connected to the upper excitation electrode, the lower excitation electrode and the bottom metal layer to provide signal input and output.

18. The wafer-level packaging structure of the oscillator crystal according to claim 17, characterized in that, The material of the bottom metal layer is copper.

19. The wafer-level packaging structure of the oscillator crystal according to claim 11, characterized in that, The thermal expansion coefficients of the upper cover and the encapsulation base are between 2*10 -7 / K and 9*10 -7 / K.

20. The wafer-level packaging structure of the oscillator crystal as described in claim 11, wherein The materials of the upper cover body, the oscillator crystal and the encapsulation base are all quartz.

21. The wafer-level packaging structure of the oscillator crystal as described in claim 11, wherein, One etched-through region is formed between the main vibrating region of the wafer and the first adjacent region, thereby spacing the main vibrating region of the wafer and the first adjacent region.

22. The wafer-level packaging structure of the oscillator crystal according to claim 11, wherein, One of the etch-through regions is formed between the main oscillation region of the wafer and the second adjacent region, thereby spacing the main oscillation region of the wafer from the second adjacent region.

23. The wafer-level packaging structure of the oscillator crystal as described in claim 11, characterized in that, The oscillator crystal includes two of the etch-through regions, one etch-through region is formed between the main oscillation region of the wafer and the first adjacent region, and the other etch-through region is formed between the main oscillation region of the wafer and the second adjacent region, such that the main oscillation region of the wafer is spaced from both the first adjacent region and the second adjacent region simultaneously.

24. The wafer-level packaging structure of the oscillator crystal according to claim 11, wherein, The at least one etch-through region is formed extending from the upper surface of the main oscillation region of the wafer to the lower surface of the main oscillation region of the wafer, thereby forming a through-hole between the upper surface and the lower surface.

25. The wafer-level packaging structure of the oscillator crystal as described in claim 11, characterized in that, The etch width of the at least one etch-through region is selectively adjustable. When the at least one etch-through region has a first etch width, the first adjacent region or the second adjacent region has a protrusion on the side close to the main oscillation region of the wafer.

26. The wafer-level packaging structure of the oscillator crystal according to claim 25, characterized in that, The etch width of the at least one etch-through region is selectively adjustable. When the at least one etch-through region has a second etch width, the first adjacent region or the second adjacent region is straight on the side close to the main oscillation region of the wafer.

27. The wafer-level packaging structure of the oscillator crystal according to claim 26, characterized in that, The second etch width is greater than the first etch width.

28. The wafer-level packaging structure of the oscillator crystal according to claim 11, characterized in that, The at least one etch-through region is formed by a dry etching process or a wet etching process.

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