Switch board, switch and power-on method of switch

Abstract

The invention discloses a switch board, a switch and a switch power-on method, and relates to the technical field of computers, the switch board comprises a first layer board, a second layer board, a switch network chip and at least one group of connectors, the first layer board comprises at least one first expansion port; the second laminate comprises at least one second expansion port; the first layer plate and the second layer plate are connected through at least one group of connectors in a plug-in manner; and the switching network chip is arranged on the first laminate and is used for carrying out configuration management on the at least one first expansion port and / or carrying out configuration management on the at least one second expansion port through the at least one group of connectors. Therefore, through hierarchical design and plug-in connection of the connectors, the problem that the requirement of large model reasoning application for a high-capacity memory cannot be met due to the fact that the number of expansion ports in the prior art is limited is solved, and the technical effects of high-density expansion capacity, high signal transmission efficiency and the like are achieved.

Description

Technical Field

[0001] The present invention relates to the field of computer technology, and particularly to a switching board, a switch, and a power-on method for a switch. Background Art

[0002] With the explosive growth of artificial intelligence applications, the server memory system has gradually transformed from a traditional accessory role to a key factor determining the performance of AI systems. Modern artificial intelligence models, especially large models, impose extremely high requirements on the memory system, including characteristics such as high capacity, high bandwidth, and low latency, to better support complex inference computing tasks. Against this background, CXL (Compute Express Link) technology has emerged. CXL promotes the evolution of the server architecture from a fixed configuration to a dynamically composable one through memory sharing, heterogeneous resource integration, and modular design, becoming the core memory expansion technology for the next-generation data center.

[0003] In related technologies, a server usually extends its memory capacity by connecting an external MXC (Memory Expander Controller) chip through CXL. The MXC chip can be connected to the host through a PCIe (Peripheral Component Interconnect Express) interface and supports the expansion of a certain number of memory modules. For example, a common prior art solution is to expand the memory through an MXC in the form of a PCIe standard card. A single MXC chip can support up to 4 memory modules, thus achieving the expansion of memory capacity. However, the number of expansion ports allowed by this expansion method is limited and cannot meet the demand for high-capacity memory in large model inference applications, which urgently needs to be solved. Summary of the Invention

[0004] The present invention provides a switching board, a switch, and a power-on method for a switch, so as to at least solve the problem that the prior art mostly relies on a fixed load mode and cannot reflect the dynamic frequency / voltage regulation characteristics of the CPU (Central Processing Unit) in a real scenario, and achieve the technical effects of high test efficiency and high accuracy.

[0005] The present invention provides a switching board, including: a first-layer board, a second-layer board, a switching network chip, and at least one group of connectors, wherein, the first-layer board includes at least one first expansion port; the second-layer board includes at least one second expansion port; the first-layer board and the second-layer board are connected by plugging in at least one group of the connectors; The switching fabric chip is disposed on the first layer board, and the switching fabric chip is configured to manage at least one of the first expansion ports, and / or manage at least one of the second expansion ports through at least one set of the connectors.

[0006] The present invention further provides a switch, including: At least one of the above-mentioned switching boards; A management board, configured to obtain device configuration information of at least one of the switching boards, and send a configuration instruction to the switching fabric chip of at least one of the switching boards according to the device configuration information, so as to complete memory expansion configuration through the switching fabric chip of at least one of the switching boards.

[0007] The present invention further provides a power-on method for a switch, which is applied to the above-mentioned switch, and the method includes the following steps: When receiving a power-on instruction, controlling a structure manager to power on, and sending a switching board power-on signal to a baseboard management controller through the structure manager; Sending the switching board power-on signal to a programmable logic module through the baseboard management controller, so as to close a power supply channel of at least one of the switching boards through the programmable logic module, so that after at least one of the switching boards is powered on, an initialization action is performed.

[0008] The present invention further provides an electronic device, including: a memory, configured to store a computer program; a processor, configured to implement the steps of the power-on method of any one of the above-mentioned switches when executing the computer program.

[0009] The present invention further provides a non-volatile computer-readable storage medium, in which a computer program is stored, and when the computer program is executed by a processor, the steps of the power-on method of any one of the above-mentioned switches are implemented.

[0010] The present invention further provides a computer program product, including a computer program, and when the computer program is executed by a processor, the steps of the power-on method of any one of the above-mentioned switches are implemented.

[0011] Through the present invention, by using the hierarchical design of the switching board and the plug-in connection of the connectors, the problem that the number of expansion ports in the prior art is limited and cannot meet the demand for high-capacity memory in large model inference applications is solved, and technical effects such as high-density expansion ability and high signal transmission efficiency are achieved. Description of the Drawings

[0012] To more clearly illustrate the embodiments of the present invention, the following will briefly introduce the accompanying drawings required for the embodiments. Obviously, the accompanying drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other accompanying drawings can be obtained based on these drawings.

[0013] Figure 1 Topological schematic diagram of a switching board provided by an embodiment of the present invention; Figure 2 Structural schematic diagram of expanding memory through MXC in the related art; Figure 3 Schematic diagram of the specification dimensions of the switching board provided by an embodiment of the present invention; Figure 4 Interconnection schematic diagram of two-layer boards in the switching board provided by an embodiment of the present invention; Figure 5 Block diagram of the switching board provided by an embodiment of the present invention; Figure 6 Block diagram of a switch provided by an embodiment of the present invention; Figure 7 Topological schematic diagram of the switch provided by an embodiment of the present invention; Figure 8 Layout schematic diagram of the switch chassis provided by an embodiment of the present invention; Figure 9 Power supply topological schematic diagram of the switch system provided by an embodiment of the present invention; Figure 10 Flowchart of a power-on method for a switch provided by an embodiment of the present invention; Figure 11 Flowchart of the switch power-on timing provided by an embodiment of the present invention; Figure 12 Structural schematic diagram of the electronic device provided by an embodiment of the present invention. Detailed implementation manners

[0014] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, rather than all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the protection scope of the present invention.

[0015] It should be noted that in the description of the present invention, the terms "comprising", "including" or any other variant thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device comprising a series of elements not only includes those elements, but also includes other elements not expressly listed, or elements inherent to such process, method, article or device. The terms "first", "second", etc. in the present invention are used to distinguish similar objects and are not used to describe a specific order or sequence.

[0016] In order to enable those skilled in the art of the present technology to better understand the solution of the present invention, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0017] An embodiment of the present invention provides a switching board, and the switching board will be described in detail in combination with the topological structure of the switching board.

[0018] Figure 1 It is a topological schematic diagram of the switching board according to an embodiment of the present invention.

[0019] Before introducing the switching board proposed in the embodiment of the present invention, the relevant technical background will be briefly introduced.

[0020] In the related art, the schematic diagram of expanding memory through MXC can be as Figure 2 shown, and its form is designed as an expansion card in the PCIe standard. This card can be directly inserted into the CEM (Card Electro-Mechanical) connector of the host or the riser card (a hardware device used to expand the functions of a server or computer motherboard) through the x16 gold fingers for use. It supports two MXC chips, and each MXC chip can expand 4 DIMMs (Dual Inline Memory Modules), thereby greatly improving the memory capacity and performance. Thus, by using the CXL bus technology, the CPU can be interconnected with the MXC chip to achieve memory expansion.

[0021] However, the memory capacity expanded by the MXC chip is limited to a certain extent. It is mainly restricted by the number of PCIe interfaces in the system. The number of PCIe interfaces that can be supported in a system determines the number of MXC chips that can be interconnected, and thus limits the upper limit of memory expansion. At the current technical level, a maximum of 4 memory modules can be supported by one MXC chip. If a single 256GB memory module is used, the maximum memory capacity that one MXC chip can expand is 1024GB. Although this is already a quite remarkable figure, such a capacity is far from meeting the huge memory requirements for executing inference applications of large models.

[0022] Based on the above problems, the embodiment of the present invention proposes a switching board, which solves the problem that the number of expansion ports in the prior art is limited and cannot meet the demand for high-capacity memory in large model inference applications through hierarchical design and butt-joint connection of connectors, and realizes technical effects such as high-density expansion ability and high signal transmission efficiency.

[0023] The switching board proposed in the embodiment of the present invention will be elaborated in detail below.

[0024] Exemplarily, as Figure 1 shown, the switching board 10 includes: a first layer board 100, a second layer board 200, a switching network chip 300, and at least one group of connectors 400. Among them, the first layer board 100 includes at least one first expansion port 101; the second layer board 200 includes at least one second expansion port 201; the first layer board 100 and the second layer board 200 are butt-joint connected through at least one group of connectors 400; the switching network chip 300 is disposed on the first layer board 100, and the switching network chip 300 is used to configure and manage at least one first expansion port 101, and / or configure and manage at least one second expansion port 201 through at least one group of connectors 400.

[0025] Specifically, as Figure 1 shown, in order to achieve a more efficient and modular structural design, the embodiment of the present invention adopts a hierarchical design concept, and divides the switching board 10 (i.e., the Switch chip) into a first layer board 100 (i.e., the lower layer board) and a second layer board 200 (i.e., the upper layer board). As Figure 3 shown in (a) of, the size specification of the second layer board 200 (i.e., the upper layer board) is 417*96mm, and as Figure 3 shown in (b) of, the size specification of the first layer board 100 (i.e., the lower layer board) is 417*218mm.

[0026] Each layer board supports at least one expansion port respectively, that is, the first layer board 100 includes at least one first expansion port 101; the second layer board 200 includes at least one second expansion port 201. For example, in the embodiment of the present invention, a single switching board 10 includes a total of 16 expansion ports, the first layer board 100 includes 8 first expansion ports 101, and the second layer board 200 includes 8 second expansion ports 201.

[0027] In the design of the external interface, the switching board 10 further includes at least one set of connectors 400. In the embodiments of the present invention, the at least one set of connectors 400 selected is a CDFP (Compact Double Face Plug) connector that supports the PCIe Gen5 rate standard. This kind of connector not only has a fast transmission speed, but also has good compatibility and expandability. By adopting a plug-and-socket connection method, the at least one set of connectors 400 can effectively connect the first layer board 100 and the second layer board 200, and are interconnected through MCIO (Micro Coaxial Interconnect Option) cables to achieve signal transmission and resource sharing, greatly improving the connection density and making the integration of the entire system higher. In this way, at least one second expansion port 201 included in the second layer board 200 can be successfully led out to the first layer board 100, so that the functions of the entire switching board can be fully demonstrated.

[0028] In addition, the switching board 10 further includes a switching network chip 300. This chip is disposed on the first layer board 100 and can directly configure and manage at least one first expansion port 101 of the first layer board 100. In addition, it can also configure and manage at least one second expansion port 201 of the second layer board 200 through at least one set of connectors 400. Thus, through the management of the expansion ports by the switching network chip 300, the system can more flexibly configure and adjust the parameters of the expansion ports, improving the adaptability of the system.

[0029] It can be understood that the above hierarchical design method also has other significant advantages: First, it is conducive to the assembly and maintenance of the structure because each layer board can be operated independently, so that when troubleshooting or upgrading, it can be more convenient and fast. Second, this design is also conducive to the ventilation and heat dissipation of the whole machine system. Since the first layer board 100 and the second layer board 200 are connected through at least one set of connectors 400, there is a certain space between them, which helps air circulation, thereby effectively reducing the operating temperature of the entire system and improving the stability and service life of the device.

[0030] Optionally, in some embodiments, at least one set of connectors 400 adopts high-density connectors and / or mini-edge input / output cables.

[0031] It can be understood that all of the at least one set of connectors 400 in the embodiments of the present invention can be all high-density connectors, or all mini-edge input / output cables, or a combination of high-density connectors and mini-edge input / output cables.

[0032] For high-density connectors, as Figure 4 shown, at least one set of connectors 400 (such as Figure 4The high-density connectors _A1 and _A2, or high-density connectors _B1 and _B2) can adopt a hermaphroditic body type, such as the ExaMezz card-edge connector, which is laid out on the front side of the first-layer board 100 and on the back side of the second-layer board 200, thereby ensuring that they can be perfectly docked. For example, the high-density connector _A1 can be plugged into the high-density connector _B1, and the two are closely combined to form a stable connection. Similarly, the high-density connector _A2 can be plugged into the high-density connector _B2 to ensure that they can also be tightly snapped together.

[0033] For the mini-edge input / output cable (MCIO), this is a compact cable solution suitable for space-constrained environments. Using the mini-edge input / output cable can further optimize space utilization and make the entire system more compact. As for the MCIO connector, an MCIO with 16 lanes can be selected. In practical applications, MCIO_A1 can be connected to MCIO_B2 through a cable to achieve data and signal transmission. At the same time, MCIO_A2 can be connected to MCIO_B1, MCIO_A3 can be connected to MCIO_B4, and MCIO_A4 can be connected to MCIO_B3. Through this connection method, efficient interconnection between multiple MCIO connectors can be achieved.

[0034] Thus, by using high-density connectors and / or mini-edge input / output cables, the switching board 10 can provide more interfaces in a limited space to meet the requirements for high-capacity memory in high-performance computing and large model inference.

[0035] Optionally, in some embodiments, each group of connectors 400 includes a first connection unit and a second connection unit. Among them, the first connection unit of each group of connectors 400 is disposed on the first-layer board 100 and is connected to the switching network chip 300; the second connection unit of each group of connectors 400 is disposed on the second-layer board 200 and is correspondingly connected to at least one second expansion port 201; the first connection unit and the second connection unit of each group of connectors 400 are disposed in corresponding positions.

[0036] Specifically, each set of connectors 400 includes two parts, namely the first connection unit and the second connection unit. Among them, the first connection unit is disposed on the first layer board 100 and is connected to the switching fabric chip 300, which enables the switching fabric chip 300 to directly manage at least one first expansion port 101 through the first connection unit and communicate with at least one second expansion port 201 through the connector 400. The second connection unit is disposed on the second layer board 200 and is connected to at least one second expansion port 201, so that at least one second expansion port 201 can communicate with the first connection unit through the second connection unit, thereby realizing signal transmission between the upper and lower layer boards. The first connection unit and the second connection unit of each set of connectors 400 are arranged in corresponding positions, which means they are aligned in space and can be directly plugged in and connected. This design not only simplifies the assembly process but also ensures the stability and reliability of signal transmission.

[0037] Through the connectors arranged in corresponding positions, the signal transmission path is optimized. Signals can be transmitted from the switching fabric chip 300 on the first layer board 100 through the first connection unit to the second connection unit and then to at least one second expansion port 201, thereby reducing the signal transmission delay and improving the overall performance of the system.

[0038] Optionally, in some embodiments, the positions of at least one first expansion port 101 and at least one second expansion port 201 correspond one by one, and the corresponding first and second expansion ports are located in the same column.

[0039] That is to say, in the embodiments of the present invention, at least one first expansion port 101 on the first layer board 100 and at least one second expansion port 201 on the second layer board 200 correspond to each other in position, and the corresponding first and second expansion ports are located in the same column. Due to the corresponding positions of the expansion ports, the maintenance and replacement operations are more convenient. And through the corresponding position setting, signals can be directly transmitted from the first expansion port to the second expansion port, reducing the intermediate links of signal transmission and improving the signal transmission efficiency.

[0040] This layout design enables the expansion ports of the two layer boards to be directly plugged in and connected through at least one set of connectors 400. Without complex wiring or additional adapters, signals can be directly transmitted from the first expansion port to the second expansion port, shortening the transmission path while reducing signal delay and interference.

[0041] Optionally, in some embodiments, the above-mentioned switching board 10 further includes: an Ethernet physical layer interface module 500 and a network interface 600. Among them, the Ethernet physical layer interface module 500 is used to convert the received first signal into a second signal; the network interface 600 is connected to the Ethernet physical layer interface module 500, and remote system maintenance and remote management are carried out through the network interface 600, and / or, out-of-band remote maintenance and management are carried out.

[0042] Specifically, as Figure 5 shown, the switching board 10 further includes two key parts: an Ethernet physical layer interface (Physical Layer Interface Transceiver, abbreviated as PHY) module 500 and a network interface 600. The Ethernet physical layer interface module 500 is mainly responsible for completing the conversion of physical layer signals (converting digital signals into analog signals that can be transmitted on physical media, or vice versa converting analog signals into digital signals). That is, through the Ethernet physical layer interface module 500, the received first signal (such as an SGMII (Serial Gigabit Media Independent Interface) serial network signal) can be converted into a second signal that conforms to a specific standard (such as an MDI (Medium Dependent Interface) signal), and the second signal is connected to the network interface 600. The network interface 600 is connected to the Ethernet physical layer interface module 500 and is connected to an external network through the network interface 600 (such as an RJ45 Ethernet interface), enabling remote system maintenance and management. That is, an administrator can monitor, configure, and troubleshoot the switching board or the entire system from a distance through a network connection without directly contacting the device. In addition, out-of-band remote maintenance and management can also be carried out through the network interface 600. Among them, out-of-band management refers to system management through a dedicated management channel independent of the system main processor. This method is particularly important when the system fails or the main processor cannot work properly, and it allows the administrator to access and repair the system through a backup channel.

[0043] Thus, through the Ethernet physical layer interface module 500 and the network interface 600, the switching board 10 can support remote system maintenance and management, as well as out-of-band remote maintenance and management. This design enables the administrator to manage the device more flexibly. Whether the device is operating normally or not, it can be quickly repaired when the system fails, thereby improving the availability and reliability of the system.

[0044] Optionally, in some embodiments, the above-mentioned switching board 10 further includes: a serial peripheral interface multiplexer 700 and a storage unit 800. The serial peripheral interface multiplexer 700 is configured to determine a target communication device according to a control signal sent by the switching fabric chip 300; the storage unit 800 is configured to store firmware parameters and configuration parameters required for the operation of the switching fabric chip 300, so as to read the firmware parameters and configuration parameters from the storage unit when the switching fabric chip 300 performs an initialization operation.

[0045] Specifically, as Figure 5 shown, the switching board 10 further includes a serial peripheral interface multiplexer 700 and a storage unit 800. In a complex system, multiple peripherals may share the same SPI (Serial Peripheral Interface) bus. The serial peripheral interface multiplexer 700 can select the correct peripheral (i.e., the target communication device) for communication according to a control signal sent by the switching fabric chip 300. That is to say, when the switching fabric chip 300 needs to communicate with the target communication device, it sends a control signal to the serial peripheral interface multiplexer 700, and the serial peripheral interface multiplexer 700 can connect the SPI bus to the selected target communication device, thereby achieving efficient device management and signal transmission. The storage unit 800 (such as a Flash memory or other non-volatile storage devices) can store firmware parameters and configuration parameters required for the operation of the switching fabric chip 300. These parameters include information such as initialization settings, device configurations, firmware versions, etc., which are the basis for the normal operation of the switching fabric chip 300. When the switching fabric chip 300 performs an initialization operation, the control signal SPI_SEL on the switching board 10 defaults to a low signal, enabling the switching fabric chip 300 to communicate with the storage unit 800 through the SPI bus. Through the SPI bus, the switching fabric chip 300 can read the necessary firmware parameters and configuration parameters from the storage unit 800, thereby ensuring that the switching fabric chip 300 can complete its own initialization and enter the normal working state.

[0046] Thus, through the serial peripheral interface multiplexer 700 and the storage unit 800, the switching fabric chip 300 can flexibly communicate with multiple peripherals, improving the flexibility and scalability of the system. Through the storage unit 800, necessary firmware parameters and configuration parameters can be quickly loaded, ensuring that the switching fabric chip 300 can quickly complete initialization and enter the normal working state, reducing the initialization time and improving the startup efficiency of the system.

[0047] Optionally, in some embodiments, the above-mentioned switching board 10 further includes: a clock generator 900 and a clock buffer 1000. Among them, the clock generator 900 is used to generate a clock signal that meets the preset requirements; the clock buffer 1000 is used to process the clock signal to obtain a signal that meets the timing requirements of the switching fabric chip 300, so that the switching fabric chip 300 operates based on the signal that meets the timing requirements of the switching fabric chip 300.

[0048] Specifically, the switching board 10 further includes a clock generator 900 and a clock buffer 1000. The clock generator 900 on the switching board 10 can generate a clock signal with a frequency of 100 MHz (that is, meeting the preset requirements), and this frequency is the reference frequency required for the normal operation of the switching fabric chip 300. To ensure the stability and accuracy of the clock signal, the clock generator 900 usually adopts a high-precision oscillator, such as a crystal oscillator or a temperature-compensated crystal oscillator, and these oscillators can maintain a stable frequency output under different environmental conditions, reducing jitter and noise. The clock buffer 1000 can process the clock signal generated by the clock generator 900 to meet the timing requirements of the switching fabric chip 300. After passing through the clock buffer 1000, the clock signal can be divided into two forms: one is a single-ended 100 MHz clock signal (such as Figure 5 the shown CLK_SYS), and the other is 16 groups of differential clock signals (such as Figure 5 the shown 16*CLK_PORT). These signals are finally sent to the switching fabric chip 300 to ensure the normal operation of the chip. Through the processing of the clock buffer 1000, the clock signal can remain stable and accurate during transmission, reducing the influence of jitter and noise.

[0049] It can be understood that the core of this mechanism lies in the role of the clock signal, that is, the clock signal is similar to a "heartbeat" in a digital circuit, used to synchronize the operations of various parts. The stability and accuracy of the clock signal directly affect the performance and reliability of the system. If the clock signal is unstable or inaccurate, it may lead to data transmission errors, system performance degradation, or even system crashes. The difference between single-ended signals and differential signals lies in the transmission method. The use of differential signals improves the anti-interference ability of the system, is suitable for long-distance or high-precision transmission, and reduces interference during signal transmission.

[0050] Thus, through the collaborative work of the clock generator 900 and the clock buffer 1000, it is ensured that the switching fabric chip 300 can operate based on a stable and accurate clock signal, thereby improving the overall performance and reliability of the system.

[0051] The switching board proposed according to the embodiments of the present invention solves the problem in the prior art that the number of expansion ports is limited and cannot meet the demand for high-capacity memory in large model inference applications through hierarchical design and the plug-in connection of connectors, and achieves technical effects such as high-density expansion ability and high signal transmission efficiency.

[0052] Through the description of the above embodiments, those skilled in the art can clearly understand that the system according to the above embodiments can be implemented by means of software plus a necessary general hardware platform. Of course, it can also be implemented by hardware, but in many cases, the former is a better implementation method.

[0053] The embodiments of the present invention also provide a switch.

[0054] Figure 6 It is a topology schematic diagram of the switch according to an embodiment of the present invention.

[0055] As Figure 6 shown, the switch 1 includes: at least one switching board 10 and a management board 20. Among them, the management board 20 is used to obtain the device configuration information of at least one switching board 10, and send a configuration instruction to the switching network chip 300 of at least one switching board 10 according to the device configuration information, so as to complete the memory expansion configuration through the switching network chip 300 of at least one switching board 10.

[0056] Specifically, as Figure 6As shown in the figure, the switch 1 mainly consists of two switching boards 10 and a management board 20. The management board 20 is interconnected with the two switching boards 10 through a power connector and an MCIO cable, providing power supply, I2C, UART (Universal Asynchronous Receiver-Transmitter), PCIe, GPIO (General Purpose Input / Output), and other transmission control signals, enabling in-band and out-of-band management of the entire machine. The overall length of the management board 20 is set to 424 mm, and the width is 207 mm. The management board 20 is the control center of the switch 1, responsible for managing and configuring the entire switch system, and can realize functions such as system management, monitoring, configuration, and power-on / off control of the entire machine. It obtains device configuration information of at least one switching board 10 through the I2C (Inter-Integrated Circuit) bus, including the hardware status, port type, firmware version, etc. of the switching board 10. Based on the obtained device configuration information, the management board 20 can generate configuration instructions and send the configuration instructions to the switching network chip 300 through the PCIe interface. This configuration instruction is used to guide the switching network chip 300 on how to configure memory expansion, thereby achieving flexible allocation and optimized utilization of memory resources. That is, after receiving the configuration instruction from the management board 20, the switching network chip 300 can dynamically adjust the memory expansion configuration according to this configuration instruction to adapt to different application scenarios and requirements. This dynamic adjustment ability improves the flexibility and adaptability of the system.

[0057] In addition, the two switching boards 10 are independent in layout. Each switching board 10 is interconnected through MCIO cables and high-density connectors (i.e., at least one group of connectors 400) on the upper and lower two layers of boards (i.e., the first layer board 100 and the second layer board 200), and jointly provide services for 32 ports externally. Each switching board 10 serves as a node, supporting 16 ports, allowing arbitrary configuration of uplink and downlink connections. Each port has 16 lanes, with a rate of up to 32 Gb / s, so that the unidirectional data transmission capacity reaches 1024 GB / s, providing strong support for data transmission.

[0058] Thus, through the dynamic configuration management and comprehensive system monitoring of the management board 20, the flexibility, reliability, and performance of the system are improved.

[0059] Optionally, in some embodiments, the management board 20 includes: a structure manager 21 and a baseboard management controller 22. Among them, the structure manager 21 and the baseboard management controller 22 communicate through the first bus; the baseboard management controller 22 is used to control at least one switching board 10 to power on according to the power-on information of the structure manager 21.

[0060] Specifically, as Figure 7 shown, the management board 20 includes a Fabric Manager (FM) 21 and a Baseboard Management Controller (BMC) 22. Between the Fabric Manager 21 and the Baseboard Management Controller 22, the power-on information of the Fabric Manager 21 and the power-on and power-off signals for controlling the switching board 10 can be transmitted through a first bus (such as the LPC (Low Pin Count Bus) shown in Figure 5 ), so as to realize the communication between the Fabric Manager 21 and the Baseboard Management Controller 22, and the power-on control of at least one switching board 10 by the Baseboard Management Controller 22. As the management center of the system, the Baseboard Management Controller 22 undertakes the important responsibility of out-of-band management and control of the entire switch 1. It not only supports real-time monitoring and management of the out-of-band information of the whole machine, but also can monitor the status information of the Power Supply Unit (PSU), the status information of the power virtualization resources, and the overall temperature information of the switch 1.

[0061] In addition, the Baseboard Management Controller 22 also has the functions of implementing fan regulation and system display to ensure that the system runs in the best state. That is, the Baseboard Management Controller 22 can monitor the temperature inside the switch 1 in real time through built-in temperature sensors. These sensors are distributed near key components, such as the CPU, the switching network chip 300, etc., to ensure that the temperatures of each component can be accurately measured. According to the monitored temperature data, the Baseboard Management Controller 22 can intelligently adjust the fan speed. When the temperature is high, the Baseboard Management Controller 22 can automatically increase the fan speed to enhance heat dissipation; when the temperature is low, the Baseboard Management Controller 22 can reduce the fan speed to reduce noise and energy consumption. The Baseboard Management Controller 22 can also detect whether the fan is working properly. If a fan failure is detected, the Baseboard Management Controller 22 can issue an alarm and take other measures (such as increasing the speed of other fans) to ensure system heat dissipation. For the system display function, the Baseboard Management Controller 22 can display the key status information of the system (such as temperature, fan speed, power status, etc.) on the management interface or the physical display screen through the system display function, so that maintenance personnel can intuitively understand the operating status of the system. In the case where the Baseboard Management Controller 22 detects a fault, specific fault information can be displayed through the display screen or indicator lights, which helps maintenance personnel quickly locate and solve problems. The Baseboard Management Controller 22 can also record the operation logs of the system, including temperature changes, fan speed adjustments, fault alarms, etc. These logs can be used for subsequent analysis and maintenance.

[0062] The structure manager 21 plays a crucial role in the network structure or architecture management of the switch 1. It is not only responsible for collecting the operating status information of the switching board 10 (including but not limited to the health status, performance metrics, fault information, etc. of the device, which are crucial for real-time monitoring and maintaining the stable operation of the system), but also capable of identifying different types of ports and obtaining the firmware version information of the switching board 10. In addition, the structure manager 21 has the function of setting port routing, which is crucial for network configuration and optimization. By dynamically adjusting the port routing according to network traffic and device status, the network can automatically adapt to changes, improving the flexibility and reliability of the network. The structure manager 21 can also manage the memory devices of the downstream ports of the switching board 10 through the PCIe interface, including monitoring the capacity and rate of the memory devices. It should be noted that this memory device management function is applicable not only to processors with the x86 architecture but also to processors with the ARM (Advanced RISC Machine) architecture. That is, both of these processors can serve as the main control chips of the management board 20, responsible for running management software and processing data, improving the flexibility and adaptability of the system.

[0063] Thus, through the collaborative work of the structure manager 21 and the baseboard management controller 22, the management board 20 realizes the comprehensive monitoring and management of the switch 1. The structure manager 21 focuses on the optimization of the network structure and the collection of information to ensure the efficiency and stability of the network; while the baseboard management controller 22 focuses on the management and control at the hardware level, from power management, temperature monitoring to fan regulation. The two complement each other and jointly support the efficient operation and reliable guarantee of the switch 1. In addition, by the baseboard management controller 22 controlling the power-on process of the switching board 10 according to the power-on information of the structure manager 21, the system can perform more flexible startup and power-on control, improving the overall performance of the system.

[0064] Optionally, in some embodiments, the structure manager 21 includes: at least one management interface and at least one transmission interface. Among them, the structure manager 21 obtains the device configuration information of at least one switching board 10 through at least one management interface; the structure manager 21 sends configuration instructions to the switching network chip 300 of at least one switching board 10 through at least one transmission interface.

[0065] That is to say, as Figure 7As shown in the figure, the structure manager 21 includes: at least one management interface (such as an I2C bus) and at least one transmission interface (such as a PCIe interface). The I2C bus is a low-speed, low-pin-count serial communication protocol suitable for the transmission of device status monitoring and configuration information, while the PCIe interface is a high-speed serial communication protocol suitable for high-speed data transmission and device configuration management. The structure manager 21 can obtain information such as the status, port type, and firmware version of the switching fabric chip 300 (i.e., the device configuration information of at least one switching board 10) through the I2C bus (i.e., at least one management interface), and can also send configuration instructions to the switching fabric chip 300 of at least one switching board 10 through the PCIe interface (i.e., at least one transmission interface). These configuration instructions are used to guide the switching fabric chip on how to configure memory expansion to ensure that the system can efficiently use memory resources.

[0066] Thus, through the management interface and transmission interface of the structure manager 21, flexible acquisition of device configuration information and efficient transmission of configuration instructions are achieved, improving the flexibility and performance of the system.

[0067] Optionally, in some embodiments, the management board 20 further includes: an Ethernet control module 23 and an Ethernet switch 24, where the Ethernet control module 23 is used to convert the received third signal into a fourth signal; the Ethernet switch 24 is used to convert the fourth signal into a first signal.

[0068] Specifically, in order to implement the switching of network port functions between two switching boards 10, the method of using an Ethernet switching chip (Ethernet Switch Chip, abbreviated as Eth SW) can be used to uniformly convert different types of network signals into SGMII serial network signals that support long transmission distances. Specifically, such as Figure 7As shown, the PCIe interface signal (i.e., the third signal) of the structure manager 21 can be converted into an MDI signal (i.e., the fourth signal) through the Ethernet control module 23 (such as the I210 chip), and then connected to the Ethernet switch 24 and converted into SGMII (i.e., the first signal); the RGMII (Reduced Gigabit Media Independent Interface) signal directly output by the baseboard management controller 22 can be converted into an MDI signal (i.e., the fourth signal) after passing through the Ethernet control module 23 (such as a PHY chip), and then connected to the Ethernet switch 24 and converted into SGMII (i.e., the first signal). Among them, the PHY chip can be of the 88E1512 model. 88E1512 is a high-performance PHY chip that supports Gigabit Ethernet transmission and is suitable for various network devices. The Ethernet switching chip of the Ethernet switch 24 can use the 88E6190 model. 88E6190 is a high-performance Ethernet switching chip that supports various network functions, including flow control, etc.

[0069] Thus, through the Ethernet control module 23 and the Ethernet switch 24, different types of network signals are uniformly converted into SGMII signals. This unified signal format enables the flexible switching of network port functions between the two switching boards 10 to adapt to different network configuration requirements. This design supports multiple network topologies, enabling the system to dynamically adjust the network configuration according to different application scenarios and requirements, improving the flexibility and adaptability of the system.

[0070] Optionally, in some embodiments, the management board 20 further includes: an expansion module 25 for expanding any management interface of the structure manager 21 into at least two management interfaces.

[0071] Specifically, the structure manager 21 serves as the control center of the switching board 10. In the case where there is only one set of I2C interfaces in the structure manager 21, the expansion module 25 (such as an I2C expander) can be used to expand the number of management interfaces (i.e., expand any management interface of the structure manager 21 into at least two management interfaces), enabling the structure manager 21 to connect to more devices. Through the expansion module 25, the structure manager 21 can be respectively connected to different switching boards 10, thereby realizing real-time monitoring of the status of each switching board 10, including obtaining information such as port type and firmware version. In addition, the expansion module 25 not only supports static connection but also dynamic configuration. This means that the system can dynamically adjust the number of connected devices according to needs, thereby improving the flexibility and adaptability of the system.

[0072] Thus, the introduction of the expansion module 25 enhances the scalability and maintainability of the system. When it is necessary to add a management interface, there is no need to replace the original structure manager 21, and only the expansion module 25 needs to be added, which greatly saves costs and time.

[0073] Optionally, in some embodiments, the management board 20 further includes: a programmable logic module 26 and a first heat dissipation component 27. The programmable logic module 26 is configured to obtain the actual rotation speed of the first heat dissipation component 27 to adjust the PWM signal of the first heat dissipation component 27 according to the actual rotation speed.

[0074] Specifically, as Figure 7 shown, the programmable logic module 26 is connected to the baseboard management controller 22 through the I2C bus. The baseboard management controller 22 can upgrade the firmware of the programmable logic module 26 through the I2C bus. This firmware upgrade function ensures that the programmable logic module 26 can run the latest control logic, support new functions or fix known problems. The baseboard management controller 22 can also transmit power-on and power-off instructions to the programmable logic module 26 to control the power state of the switching fabric chip 300. The baseboard management controller 22 can also send instructions to the programmable logic module 26 to control the enabling of the clock signal of the switching fabric chip 300 and switch the SPI link channel to ensure that the switching fabric chip 300 can work properly and support the efficient operation of the system. The programmable logic module 26 can also obtain the actual rotation speed of the first heat dissipation component 27 (such as a fan) through a TACH (Tachometer) signal (a signal used to measure the rotation speed of a motor, usually generated by the motor of a fan), and adjust the duty cycle of the PWM (Pulse Width Modulation) signal according to the actual rotation speed to achieve the rotation speed control of the first heat dissipation component 27. The PWM signal is a method of controlling the rotation speed of a motor by changing the pulse width. By adjusting the duty cycle of the PWM signal, precise control of the rotation speed of the first heat dissipation component 27 can be achieved, thereby optimizing the heat dissipation performance of the system.

[0075] Thus, by precisely controlling the rotation speed of the first heat dissipation component 27, the system can dynamically adjust the heat dissipation performance according to actual needs, ensuring sufficient heat dissipation under high loads and reducing noise and energy consumption under low loads. By optimizing the heat dissipation performance, the operating time of the hardware at high temperatures can be reduced, and the service life of the hardware can be extended.

[0076] Optionally, in some embodiments, the above-mentioned switch 1 further includes: a switch chassis body. In the case where the switch 1 includes two switching boards 10, the two switching boards 10 are arranged overlappingly, and after the overlapping arrangement, they are arranged along the first direction with the management board 20 in the switch chassis body. The first direction is the direction from the tail of the switch chassis to the front of the switch chassis.

[0077] Specifically, the switch 1 further includes a switch chassis body. The switch chassis body has a height of 2U (U is the unit of the height of rack-mounted servers and chassis, and 1U is equal to 1.75 inches (about 44.45 mm)), and it can support being mounted on front and rear cabinets, facilitating daily maintenance. This design enables the switch 1 to be conveniently installed in a standard cabinet while maintaining good heat dissipation performance. As Figure 8 shown, when the switch 1 includes two switching boards 10, the two switching boards 10 are designed to be overlapped to effectively utilize space, reduce the overall size of the switch chassis body, and maintain the high performance of the system. The two overlapped switching boards 10 and the management board 20 are sequentially arranged in the switch chassis body along the direction from the tail of the switch chassis to the front of the switch chassis. Thus, when maintenance or component replacement is required, operations can be conveniently carried out.

[0078] Furthermore, the front window part of the switch chassis body includes left and right hanging ears, network ports, and CDFP (Common Data Form Factor Pluggable) connectors. The left and right hanging ears are used to fix the structural components of the chassis, and they ensure that the chassis can be firmly installed in the appropriate position. The network port part consists of a system network port and a management network port, which respectively undertake different network communication tasks. The PWR button (Power Button) is the power on / off button for the entire system. When starting the system, simply press this button briefly; while if the system needs to be shut down, long-press this button to achieve the shutdown operation. The system network port is the network signal output through the structure manager 21, which is crucial for remote system maintenance and management. On the other hand, the management network port is the network signal output through the baseboard management controller 22, and it supports out-of-band remote maintenance and management functions. There is also a VGA (Video Graphics Array Interface) interface in the right hanging ear part, which can be directly connected to a monitor to provide visual output for users; at the same time, the USB (Universal Serial Bus) interface can be connected to a keyboard and a mouse, and the access of these peripherals makes the daily KVM (Keyboard, Video, Mouse) management simple and convenient. It should be noted that the system network port and the management network port are respectively arranged on two different switching boards 10, and the system network port and the management network port can be physically interchanged.

[0079] Optionally, in some embodiments, the two switching boards 10 are respectively arranged on a first switching board tray and a second switching board tray, and the first switching board tray and the second switching board tray are locked and fixed to the switch chassis body through a locking mechanism.

[0080] Specifically, in order to further improve the convenience of maintenance and assembly, an exchange board tray with a forward pulling function (including a first exchange board tray and a second exchange board tray) is provided, and two exchange boards 10 can be respectively arranged on the first exchange board tray and the second exchange board tray. Each exchange board tray is equipped with handles on both sides, enabling users to easily perform the pulling operation individually to pull out or push in the exchange board tray from the switch chassis body. During the installation process, once the exchange board tray is pushed into the appropriate position, by locking the locking mechanism, the exchange board tray can be firmly fixed to the switch chassis body.

[0081] Thus, through the design of the exchange board tray, the convenience of maintenance and assembly is greatly improved. Especially when it is necessary to inspect, repair, or replace the exchange board, the exchange board can be quickly accessed, reducing the maintenance time and workload. The design of the locking mechanism ensures the stability and reliability of the exchange board tray in the chassis, preventing the tray from loosening due to vibration or other external forces, thus ensuring the stable operation of the system.

[0082] Optionally, in some embodiments, the above-mentioned switch 1 further includes: a first power supply component 30 and a second power supply component 40 arranged on the switch chassis body; in the case of a failure of the first power supply component 30, at least one exchange board 10 is powered by the second power supply component 40.

[0083] That is to say, in the embodiment of the present invention, two power supply components (such as PSU power supplies) are also arranged at the rear window part of the switch chassis body, namely the first power supply component 30 and the second power supply component 40, which support a 1+1 redundant design. When one of the power supply components fails, the other power supply component can immediately take over the entire system load and continue to power at least one exchange board 10. Thus, the continuous and stable operation of the switch 1 can be ensured, avoiding system downtime or service interruption caused by a single power supply component failure. This redundant design not only improves the reliability of the system but also reduces the maintenance cost.

[0084] Optionally, in some embodiments, the above-mentioned switch 1 further includes: a second heat dissipation component arranged on the switch chassis body, wherein the second heat dissipation component includes a first heat dissipation unit and a second heat dissipation unit, and the first heat dissipation unit and the second heat dissipation unit dissipate heat for at least one switch 1 simultaneously, or, in the case of a failure of the first heat dissipation unit, at least one switch 1 is dissipated heat by the second heat dissipation unit.

[0085] Specifically, the switch 1 also includes some other important components, namely the second heat dissipation component, which is arranged at the rear window part of the switch chassis body to ensure that the heat generated during the operation of the switch 1 can be effectively dissipated, so as to maintain the normal operating temperature of the device.

[0086] In addition, the design of the second heat dissipation component also takes redundancy into account. The second heat dissipation component further includes two key parts, namely the first heat dissipation unit and the second heat dissipation unit. Each heat dissipation unit can include two fans, and the fans support a 2+2 redundancy design. That is, if the first heat dissipation unit fails, the second heat dissipation unit can independently take on the responsibility of heat dissipation to ensure that at least one switch 1 can still be fully cooled, thus avoiding equipment failures or performance degradation caused by overheating.

[0087] Optionally, in some embodiments, the above-mentioned switch 1 further includes: an overcurrent monitoring unit 50, which is used to send an overcurrent signal to the programmable logic module 26 when there is an overcurrent fault in any switching board 10, so as to disconnect the power supply channel of the switching board 10 corresponding to the overcurrent signal through the programmable logic module 26.

[0088] It can be understood that, in order to ensure the stable operation and safety of the system, an overcurrent monitoring unit 50 can be specifically added to the link in the embodiments of the present invention. In this way, the baseboard management controller 22 can use the I2C signal to monitor the magnitude of the current in real time. Once it is detected that the current exceeds the preset safety threshold, that is, there is an overcurrent fault, the baseboard management controller 22 can immediately send an instruction to the programmable logic module 26 through the I2C communication protocol. After receiving the instruction, the programmable logic module 26 will perform the operation of turning off the P12V_SW unit (the power supply unit that provides 12V voltage for the switching board 10) to disconnect the power supply channel of the switching board 10 corresponding to the overcurrent signal, thereby effectively protecting the entire system from overcurrent damage.

[0089] Furthermore, the system topology of the entire switch 1 can be as Figure 9 shown. The P12V_PSU voltage output by the first power supply component 30 and the second power supply component 40 is transmitted to the P12V_STBY (Power 12 Volt Standby Unit, a module that provides standby power) unit, which can directly convert the P12V_PSU voltage into P5V_STBY, P3V3_STBY, and P1V2_STBY voltages. These voltages can then be used by the management board 20 and the switching board 10. The P12V_STBY unit can ensure that the system can operate stably during startup or in the low-power mode, reducing startup failures or system instability caused by power problems.

[0090] In addition, the P12V_PSU voltage can also supply the P12V_SW unit, and the programmable logic module 26 can enable the P12V_SW unit through the control signals P12V_SW0_EN and P12V_SW1_EN. This design allows the system to dynamically enable or disable the P12V_SW unit as needed, improving the flexibility of power management. Once the P12V_SW unit is activated, it can output the P12V_SW0 and P12V_SW1 voltages. These voltages will then be further converted into the P1V2_SW, P1V0_SW, and P10V9_SW voltages to meet different power requirements.

[0091] Since different components in switch 1 may require different power supply voltages, through the conversion of the P12V_STBY unit and the P12V_SW unit, the system can generate multiple voltages to meet the different requirements of the management board 20 and the switch board 10. Through the control of the programmable logic module 26, the system can dynamically adjust the enabling and disabling of the power supply according to the actual needs, optimize the power management, and reduce unnecessary power consumption.

[0092] In summary, the switch proposed in the embodiment of the present invention has at least the following beneficial effects: (1) In the present invention, in a 2U high switch chassis, on the basis of ensuring that the heat dissipation performance is not affected, two CXL switch switching nodes (i.e., two switch boards) are carefully designed. These nodes not only provide extremely high switching computing power density, but also can externally provide up to 32 high-speed interconnection interfaces. These interfaces support bandwidth data transmission of up to 2048 GB / s, providing a solid technical foundation and hardware guarantee for high-performance computing, data analysis, and other application scenarios that require strong computing power support.

[0093] (2) In the present invention, the uplink port of the switch can be connected to the server host, and the downlink port can be connected to the memory expansion card. This design allows a single host to connect multiple CXL memory expansion cards, so that under the condition of limited PCIe interface numbers, higher bandwidth and higher capacity memory resources can still be obtained, effectively breaking through the limitation of the number of traditional motherboard PCIe physical interfaces, and providing users with more flexible and powerful memory expansion capabilities.

[0094] (3) The switch in the embodiment of the present invention follows the standard 19-inch rack size, which enables it to perfectly adapt to the front and back rack installation requirements in the computer room. Its design not only takes into account the convenience of device installation, but also considers the daily deployment and maintenance work, ensuring the efficient operation and long-term stability of the device.

[0095] The switch proposed according to the embodiments of the present invention integrates an advanced configuration that supports two switching boards 10 in a switch chassis body with a 2U height, enabling the chassis to externally provide up to 32 high-speed interconnection interfaces. These high-speed interconnection interfaces can support a bandwidth of up to 2048 GB / s, bringing users an unprecedented data transmission speed. In addition, this design allows a single host to easily connect multiple CXL memory expansion cards, thus effectively breaking through the limitation of the number of traditional motherboard PCIe physical interfaces. Through this innovative connection method, users can make full use of the excellent performance of the CXL bus, obtain high-bandwidth and high-capacity memory resources, and greatly improve the overall performance and expansion ability of the system.

[0096] The embodiments of the present invention also provide a power-on method for a switch.

[0097] As Figure 10 shown, the power-on method of this switch is applied to the switch of the Figure 6 embodiment, and the method includes the following steps: In step S1001, when a power-on instruction is received, the control structure manager is powered on, and a switching board power-on signal is sent to the baseboard management controller through the structure manager.

[0098] It can be understood that the power-on instruction is usually triggered by the user through the management interface or a physical button (i.e., the PWR button (power button) of the management board).

[0099] Specifically, when the user presses the PWR button, the management board can receive the power-on instruction. After receiving the power-on instruction, the management board can control the structure manager to be powered on. After the structure manager is powered on, a power-on signal will be generated and sent to the baseboard management controller through the LPC bus or other communication interfaces.

[0100] In step S1002, the baseboard management controller sends a switching board power-on signal to the programmable logic module to close the power supply channels of at least one switching board through the programmable logic module, so that at least one switching board performs an initialization action after being powered on.

[0101] The baseboard management controller is responsible for the out-of-band management and control of the entire switch system. It supports the monitoring and management of out-of-band information of the whole machine, such as monitoring the status information of the PSU, the status information of the Power VR (Power Voltage Regulator), and the temperature information of the whole machine. The programmable logic module can control the power supply channel of the switch board. The programmable logic module communicates with the baseboard management controller through the I2C bus and receives control instructions (i.e., the switch board power-on signal) from the baseboard management controller. The programmable logic module closes the power supply channel by controlling the enable signals of the P12V_SW unit (such as P12V_SW0_EN, P12V_SW1_EN). These enable signals control the output of the P12V_SW unit, thereby providing 12V power for the switch board. Once the power supply channel is closed, the switch board will perform initialization actions after power-on. The initialization actions include loading firmware, configuring memory devices, checking hardware status, etc., to ensure that the switch board can work properly.

[0102] Further, in some embodiments, after at least one switch board completes the initialization actions, it further includes: in the case where any switch board has an overcurrent fault, sending an overcurrent signal to the programmable logic module to disconnect the power supply channel of the switch board corresponding to the overcurrent signal through the programmable logic module.

[0103] Specifically, after the switch board completes the initialization actions, the system continuously monitors the current situation of each switch board. If an overcurrent fault is detected in a certain switch board, that is, the current exceeds the preset safety threshold, the system will generate an overcurrent signal. This signal indicates that there is an abnormal situation in this switch board and measures need to be taken to prevent further damage. The overcurrent signal can be sent to the programmable logic module through the baseboard management controller. The programmable logic module closes the output of the P12V_SW unit by controlling the enable signals of the P12V_SW unit (such as P12V_SW0_EN, P12V_SW1_EN) according to the received overcurrent signal, and disconnects the power supply channel of the corresponding switch board.

[0104] Further, in some embodiments, after determining that any switch board has an overcurrent fault, it further includes: generating an overcurrent fault reminder instruction based on the overcurrent signal; performing an acoustic overcurrent reminder and / or an optical overcurrent reminder according to the overcurrent fault reminder instruction.

[0105] Specifically, the baseboard management controller can generate an overcurrent fault reminder instruction based on the overcurrent signal. This instruction is used to notify the system administrator or maintenance personnel so that they can quickly take measures to solve the problem. The overcurrent fault reminder instruction can include specific information about the fault, such as the switchboard number of the fault, the fault type (overcurrent), the fault time, etc. This information helps to quickly locate and solve the problem. In addition, according to the overcurrent fault reminder instruction, the system can trigger an acoustic reminder (such as a buzzer or alarm emitting a specific sound signal), and can also trigger an optical reminder (such as emitting a specific light signal through one or more indicator lights) to attract the attention of the system administrator or maintenance personnel.

[0106] To facilitate a further understanding of the power-on method of the switch proposed in the embodiments of the present invention, the following will be combined with Figure 11 for further illustration.

[0107] As Figure 11 shown, the power-on method of the switch may further include the following steps: Step S1101, connect the power supply unit (PSU) to the 220V AC power supply.

[0108] Step S1102, the system will output standby (STBY) power, and the baseboard management controller will start reading its internal FLASH memory to complete its own initialization process. At the same time, the programmable logic module will also be powered on and complete its initialization.

[0109] Step S1103, after pressing the power-on button on the front window panel of the switch chassis, the structure manager starts to be powered on.

[0110] Step S1104, after the system enters the main operation state, send a switchboard power-on instruction to the baseboard management controller through the low pin count (LPC) interface. The baseboard management controller converts the power-on instruction into an I2C signal and sends it to the programmable logic module, thereby controlling the switchboard to complete the initialization action after being powered on.

[0111] According to the power-on method of the switch proposed in the embodiments of the present invention, an efficient, stable, and safe startup and operation of the switch system are achieved. This method not only improves the reliability and availability of the system, but also provides a more convenient and intelligent management means for network administrators.

[0112] Figure 12 The following is a schematic structural diagram of the electronic device provided by the embodiments of the present invention. The electronic device may include: A memory 1201, a processor 1202, and a computer program stored on the memory 1201 and executable on the processor 1202.

[0113] When the processor 1202 executes a program, it implements the steps in any of the above-described embodiments of the power-on method for a switch.

[0114] Furthermore, the electronic device further includes: A communication interface 1203 for communication between the memory 1201 and the processor 1202.

[0115] A memory 1201 for storing a computer program that can run on the processor 1202.

[0116] The memory 1201 may include a high-speed RAM (Random Access Memory) memory, and may also include a non-volatile memory, such as at least one disk memory.

[0117] If the memory 1201, the processor 1202, and the communication interface 1203 are implemented independently, the communication interface 1203, the memory 1201, and the processor 1202 can be interconnected via a bus to complete communication with each other. The bus can be an ISA (Industry Standard Architecture) bus, a PCI (Peripheral Component Interconnect) bus, or an EISA (Extended Industry Standard Architecture) bus, etc. The bus can be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Figure 12 only a thick line is shown in the figure, but it does not mean that there is only one bus or one type of bus.

[0118] Optionally, in a specific implementation, if the memory 1201, the processor 1202, and the communication interface 1203 are integrated on a single chip, the memory 1201, the processor 1202, and the communication interface 1203 can complete communication with each other through an internal interface.

[0119] The processor 1202 may be a CPU, or an ASIC (Application Specific Integrated Circuit), or one or more integrated circuits configured to implement the embodiments of the present invention.

[0120] Embodiments of the present invention also provide a non-volatile computer-readable storage medium, in which a computer program is stored, and the computer program is configured to execute the steps in any of the above-described embodiments of the power-on method for a switch when running.

[0121] In an exemplary embodiment, the above non-volatile computer-readable storage medium may include, but is not limited to: various media that can store computer programs, such as USB flash drives, read-only memory (ROM for short), random access memory, external hard drives, magnetic disks, or optical discs.

[0122] Embodiments of the present invention further provide a computer program product. The above computer program product includes a computer program, and when the computer program is executed by a processor, it implements the steps in any of the above embodiments of the power-on method for a switch.

[0123] Embodiments of the present invention further provide another computer program product, including a non-volatile computer-readable storage medium. The non-volatile computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, it implements the steps in any of the above embodiments of the power-on method for a switch.

[0124] Those skilled in the art can further realize that the units and algorithm steps of each example described in combination with the embodiments disclosed herein can be implemented by electronic hardware, computer software, or a combination of the two. To clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described according to functions in the above description. Whether these functions are executed in a hardware or software manner depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered to exceed the scope of the present invention.

[0125] The above has introduced in detail a power-on method for a switch provided by the present invention. Specific examples are used herein to elaborate on the principle and implementation manner of the present invention. The description of the above embodiments is only used to help understand the method and its core idea of the present invention. It should be noted that for those of ordinary skill in the art in the technical field, without departing from the principle of the present invention, several improvements and modifications can be made to the present invention, and these improvements and modifications also fall within the protection scope of the claims of the present invention.

Claims

1. An exchange board, characterized in that, Comprising: A first layer board, a second layer board, a switching fabric chip, and at least one set of connectors, wherein, The first layer board includes at least one first expansion port; The second layer board includes at least one second expansion port; The first layer board and the second layer board are connected in a pluggable manner through at least one set of the connectors; The switching fabric chip is disposed on the first layer board, and the switching fabric chip is used to configure and manage at least one of the first expansion ports, and / or configure and manage at least one of the second expansion ports through at least one set of the connectors.

2. The switching board according to claim 1, characterized in that, Each set of connectors includes a first connection unit and a second connection unit, wherein, The first connection unit of each set of connectors is disposed on the first layer board and is connected to the switching fabric chip; The second connection unit of each set of connectors is disposed on the second layer board and is correspondingly connected to at least one of the second expansion ports; The first connection unit and the second connection unit of each set of connectors are disposed in corresponding positions.

3. The switching board according to claim 1 or 2, characterized in that, At least one set of the connectors adopts high-density connectors and / or mini edge input / output cables.

4. The switching board according to claim 1, characterized in that, The positions of at least one of the first expansion ports and at least one of the second expansion ports correspond one by one, and the correspondingly positioned first expansion port and second expansion port are located in the same column.

5. The switching board according to claim 1, characterized in that, Further comprising: An Ethernet physical layer interface module for converting a received first signal into a second signal; A network interface, the network interface is connected to the Ethernet physical layer interface module, and remote system maintenance and remote management are performed through the network interface, and / or out-of-band remote maintenance and management are performed.

6. The switching board according to claim 1, wherein Further comprising: A serial peripheral interface multiplexer for determining a target communication device according to a control signal issued by the switching fabric chip; A storage unit for storing firmware parameters and configuration parameters required for the operation of the switching fabric chip, so as to read the firmware parameters and the configuration parameters from the storage unit when the switching fabric chip performs an initialization operation.

7. The switching board according to claim 1, characterized in that, Further comprising: A clock generator for generating a clock signal that meets a preset requirement; A clock buffer for processing the clock signal to obtain a signal that meets the timing requirement of the switching fabric chip, so that the switching fabric chip operates based on the signal that meets the timing requirement of the switching fabric chip.

8. A switch, characterized in that, Comprising: At least one switching board as described in any one of claims 1-7; A management board for obtaining device configuration information of at least one of the switching boards, and sending a configuration instruction to the switching fabric chip of at least one of the switching boards according to the device configuration information, so as to complete memory expansion configuration through the switching fabric chip of at least one of the switching boards.

9. The switch according to claim 8, characterized in that, The management board includes: a structure manager and a baseboard management controller, wherein, Communication between the structure manager and the baseboard management controller is through a first bus; The baseboard management controller is used to control at least one of the switching boards to power on according to the power-on information of the structure manager.

10. The switch according to claim 9, wherein The structure manager includes: at least one management interface and at least one transmission interface, wherein, The structure manager obtains device configuration information of at least one of the switching boards through at least one of the management interfaces; The structure manager sends the configuration instruction to the switching network chip of at least one of the switching boards through at least one of the transmission interfaces.

11. The switch according to claim 8, characterized in that, The management board further includes: An Ethernet control module for converting a received third signal into a fourth signal; An Ethernet switch for converting the fourth signal into a first signal.

12. The switch according to claim 10, characterized in that, The management board further includes: An expansion module for expanding any one of the management interfaces of the structure manager into at least two management interfaces.

13. The switch according to claim 8, wherein The management board further includes a programmable logic module and a first heat dissipation component, wherein, The programmable logic module is used to obtain the actual rotation speed of the first heat dissipation component to adjust the PWM signal of the first heat dissipation component according to the actual rotation speed.

14. The switch according to claim 8, characterized in that, It further includes: a switch A chassis body, wherein, When the switch includes two switching boards, the two switching boards are arranged overlappingly, and after the overlapping arrangement, they are arranged in sequence with the management board in the first direction on the switch chassis body, and the first direction is the direction from the tail of the switch chassis to the front of the switch chassis.

15. The switch according to claim 14, characterized in that, The two switching boards are respectively arranged on a first switching board tray and a second switching board tray, and the first switching board tray and the second switching board tray are locked and fixed to the switch chassis body through a locking mechanism.

16. The switch according to claim 14, characterized in that, It further includes: A first power supply component and a second power supply component arranged on the switch chassis body; In the case of a failure of the first power supply component, the second power supply component is used to supply power to at least one of the switching boards.

17. The switch according to claim 14, wherein It further includes: A second heat dissipation component arranged on the switch chassis body, wherein, The second heat dissipation component includes a first heat dissipation unit and a second heat dissipation unit, wherein, The first heat dissipation unit and the second heat dissipation unit simultaneously dissipate heat for at least one of the switches, or, in the case of a failure of the first heat dissipation unit, the second heat dissipation unit is used to dissipate heat for at least one of the switches.

18. The switch according to claim 14, wherein, It further includes: An overcurrent monitoring unit for sending an overcurrent signal to the programmable logic module in the case of an overcurrent fault in any one of the switching boards, so as to disconnect the power supply channel of the switching board corresponding to the overcurrent signal through the programmable logic module.

19. A power-on method for a switch, characterized in that, The method is applied to the switch according to any one of claims 8-18, wherein the method includes the following steps: In the case of receiving a power-on instruction, control the structure manager to power on, and send a switching board power-on signal to the baseboard management controller through the structure manager; Send the switching board power-on signal to the programmable logic module through the baseboard management controller, so as to close the power supply channels of at least one of the switching boards through the programmable logic module, so that at least one of the switching boards performs an initialization action after powering on.

20. The method according to claim 19, wherein After at least one of the switching boards completes the initialization action, it further includes: In the case of an overcurrent fault in any one of the switching boards, send an overcurrent signal to the programmable logic module, so as to disconnect the power supply channel of the switching board corresponding to the overcurrent signal through the programmable logic module.

21. The method according to claim 20, wherein After determining that there is an overcurrent fault in any one of the switching boards, it further includes: Generate an overcurrent fault reminder instruction based on the overcurrent signal; Perform acoustic overcurrent reminder and / or optical overcurrent reminder according to the overcurrent fault reminder instruction.

22. An electronic device, characterized in that, Including: A memory, a processor, and a computer program stored on the memory and executable on the processor, where the processor executes the program to implement the power-on method of the switch according to any one of claims 19-21.

23. A non-volatile computer-readable storage medium having a computer program stored thereon, characterized in that, The program is executed by the processor to implement the power-on method of the switch according to any one of claims 19-21.

24. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by the processor, it implements the power-on method of the switch according to any one of claims 19-21.

Images