Fine circuit structure and manufacturing method thereof
By forming a recess in the fine line structure and filling the fixed layer, the stability problem caused by the reduction in the size of the line pattern is solved, and the prevention of micro short circuits and electron migration is achieved, and the reliability of the circuit is improved.
Patent Information
- Application Number
- CN202410118917.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-01-29
- Publication Date
- 2025-07-29
AI Technical Summary
In the fine line structure, the line pattern is prone to skew or collapse of external forces due to size reduction, and there are problems of micro short circuits and electron migration, especially during etching and cleaning, it is difficult to control particle residues.
A recessed portion is formed on the circuit substrate, and a fixed layer is filled therein. The fixing layer can be a thermosetting glue, a photosetting glue or a welding anti-welding paint. Through etching and curing material processing, a structure in which the circuit pattern is coplanar or semi-buried with the fixed layer is formed to avoid micro-short circuits and limit electron migration.
The micro-short circuit phenomenon is effectively avoided, and electron migration is restricted through the recessed structure, improving the stability and reliability of the line.
Smart Images
Figure CN120390348A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of circuit board manufacturing, and in particular to a fine line structure and a manufacturing method thereof. Background Art
[0002] With the evolution of wafer process technology, relatively, the requirements for wafer wiring density, transmission rate, signal interference and other performance are increased, which reduces the size of the terminal chip, and also reduces the pitch of the chip pins. Consequently, the circuit board industry is also developing in the direction of finer circuit size, multi-layered circuits, and three-dimensional stacking.
[0003] Since the circuit patterns exposed in the process stage / or the final stage on the circuit substrate are small in contact area with the substrate after size reduction, they are easily affected by external forces and cause skewing or even peeling, which affects the electrical properties of the final product. In addition, due to size reduction, more precise control of etching and cleaning is required. Currently in production, it is still found that there may be fine particles remaining in local areas, which may cause micro-shorts between circuits or electro-migration phenomena. Summary of the Invention
[0004] To solve the problems faced by the prior art, a fine line structure is provided herein. In some embodiments, the fine line structure includes a line substrate, a line pattern layer, and a fixing layer. The first surface of the line substrate has a plurality of recesses. The line pattern layer is formed on the first surface of the line substrate. The line pattern layer includes a plurality of line patterns, and the gap between the line patterns is less than 10 μm, and each line pattern is located between two of the recesses. The fixing layer is formed on the first surface of the line substrate and between the line patterns, wherein the second surface of the line pattern is exposed on the third surface of the fixing layer.
[0005] In some embodiments, the width of each line pattern is less than 10 μm.
[0006] In some embodiments, the fixing layer is selected from the group consisting of thermosetting glue, photocuring glue, or solder mask.
[0007] In some embodiments, the second surface of the line pattern is coplanar with the third surface of the fixing layer.
[0008] In some embodiments, the line pattern protrudes from the third surface of the fixing layer.
[0009] Here, a method for manufacturing a microcircuit structure is also provided. In some embodiments, the method for manufacturing a microcircuit structure includes: providing a circuit substrate; forming a circuit pattern layer on a first surface of the circuit substrate, the circuit pattern layer including a plurality of circuit patterns, and the gap between the circuit patterns being less than 10 μm; performing etching between the circuit patterns to remove a part of the first surface and form a recess between two of the circuit patterns; coating a curing material on the circuit substrate and the circuit pattern layer, the curing material filling into the gaps between the circuit patterns and the recesses; and removing a part of the curing material to form a fixing layer, such that a second surface of the circuit pattern is exposed on a third surface of the fixing layer.
[0010] In some embodiments, the width of each circuit pattern is less than 10 μm.
[0011] In some embodiments, the fixing layer is selected from the group consisting of thermosetting adhesives, photocuring adhesives, and solder masks.
[0012] In some embodiments, the second surface of the circuit pattern is coplanar with the third surface of the fixing layer.
[0013] In some embodiments, the circuit pattern protrudes from the third surface of the fixing layer.
[0014] In some embodiments, the etching is selected from the group consisting of laser etching, plasma etching, electron beam etching, and chemical etching.
[0015] In some embodiments, the step of removing a part of the curing material is selected from the group consisting of grinding, plasma etching, laser etching, and chemical etching.
[0016] As described in the foregoing embodiments, by forming a recess between the circuit patterns, residual metal particles or metal films are removed, thereby avoiding the occurrence of micro-short circuit phenomena, and further restricting electron migration through the structure of the recess. BRIEF DESCRIPTION OF THE DRAWINGS
[0017] Figure 1 A cross-sectional schematic view of a first embodiment of the microcircuit structure;
[0018] Figure 2 A cross-sectional schematic view of a second embodiment of the microcircuit structure;
[0019] Figures 3A to 3E A step-by-step cross-sectional schematic view of the method for manufacturing the microcircuit structure.
[0020] SYMBOL DESCRIPTION
[0021] 1: Microcircuit structure
[0022] 10: Circuit substrate
[0023] 10A: First surface
[0024] 11: Concave portion
[0025] 20: Circuit pattern layer
[0026] 21: Circuit pattern
[0027] 21A: Second surface
[0028] 30: Fixing layer
[0029] 30A: Third surface
[0030] 30’: Curing material
[0031] G: Gap Detailed implementation mode
[0032] It should be understood that when an element is referred to as being "disposed" on another element, it may mean that the element is directly on the other element, or there may also be an intermediate element connecting the element to the other element. Conversely, when an element is referred to as being "directly disposed on another element" or "directly disposed onto another element", it can be understood that there is no intermediate element defined at this time.
[0033] In addition, the terms "first", "second", "third" are only used to distinguish one element, component, region, layer or part from another element, component, region, layer or part, rather than indicating their necessary order. In addition, relative terms such as "lower" and "upper" may be used in this article to describe the relationship between one element and another element. It should be understood that the relative terms are intended to include different orientations of the device other than the orientations shown in the figures. For example, if the device in one figure is flipped, the element described as being on the "lower" side of other elements will be oriented on the "upper" side of other elements. This only represents the relative orientation relationship, rather than the absolute orientation relationship.
[0034] Figure 1 It is a cross-sectional schematic diagram of the first embodiment of the microcircuit structure. As Figure 1 shown, in some embodiments, the microcircuit structure 1 includes a circuit substrate 10, a circuit pattern layer 20, and a fixing layer 30. The circuit substrate 10 can be a part of the substrate in the process or the entire circuit substrate. Although not shown in the figure, it can be understood that it may include a multi-layer circuit of the inner layer. The first surface 10A of the circuit substrate 10 has a plurality of concave portions 11. The concave portions 11 can be formed by dry etching methods such as laser etching, plasma etching, or electron beam etching, or for chemical properties, chemical etching is used with the substrate material without damaging the circuit pattern 21. Its purpose is to remove residual metal particles or metal films, avoid the phenomenon of micro-short circuit, and limit electron migration through the concave structure.
[0035] The circuit pattern layer 20 is formed on the first surface 10A of the circuit board 10. The circuit pattern layer 20 includes a plurality of circuit patterns 21, and the gap G between the circuit patterns 21 is less than 10 μm, and each circuit pattern 21 is located between two of the recesses 11. More specifically, in some embodiments, the width of the circuit pattern 21 is less than 10 μm. Here, the circuit pattern 21 can be an inner layer circuit of the overall structure or the outermost circuit, such as a gold finger contact, a solder pad, etc.
[0036] The fixing layer 30 is formed on the first surface 10A of the circuit board 10 and between the circuit patterns 21, filling the recesses 11. Through the fixing layer 30, the circuit patterns 21 can be stabilized to prevent tipping or peeling off during subsequent processing. Here, the second surface 21A of each circuit pattern 21 is exposed on the third surface 30A of the fixing layer 30. In the first embodiment, the second surface 21A of the circuit pattern 21 and the third surface 30A of the fixing layer 30 are coplanar, that is, in the form of circuit embedding. More specifically, in some embodiments, the fixing layer 30 can be a thermosetting adhesive, a photocuring adhesive or a solder mask.
[0037] Figure 2 It is a cross-sectional schematic view of the second embodiment of the microcircuit structure. As Figure 2 shown, with reference to Figure 1 at the same time, the difference from the first embodiment is that the circuit pattern 21 of the second embodiment protrudes from the third surface 30A of the fixing layer 30. In other words, it is in the form of half-embedded fixation.
[0038] Figures 3A to 3D It is a step-by-step cross-sectional schematic view of the manufacturing method of the microcircuit structure. As Figure 3A shown, first, a circuit board 10 is provided; then, a circuit pattern layer 20 is formed on the first surface 10A of the circuit board 10. The circuit pattern layer 20 includes a plurality of circuit patterns 21, and the gap between the circuit patterns 21 is less than 10 μm. In some embodiments, the width of the circuit pattern 21 is less than 10 μm.
[0039] As Figure 3B shown, etching is performed between the circuit patterns 21 to remove a part of the first surface 10A, and recesses 11 are formed between two of the circuit patterns 21. Here, the etching technique can include dry etching or wet etching techniques. For example, dry etching can use laser etching, plasma etching or electron beam etching to remove residual metal films or metal particles through high energy. And wet etching etches the circuit board 10 according to different chemical properties and removes the metal films or metal particles thereon at the same time. By removing a part of the first surface 10A, the recesses 11 are formed, further restricting the migration of electrons. Then, as Figure 3CAs shown, a curing material 30' is coated on the circuit board 10 and the circuit pattern layer 20, and the curing material 30' is filled between the circuit patterns 21 and in the recessed portions 11. Herein, the curing material 30' can completely cover the upper surfaces of the circuit board 10 and the circuit pattern layer 20. Herein, the curing material 30' can be a thermosetting adhesive, a photo-curing adhesive or a solder mask.
[0040] As Figure 3D and Figure 3E shown, after the curing material 30' is cured, a part of the curing material 30' is removed to form a fixing layer 30, such that the second surface 21A of the circuit pattern 21 is exposed on the third surface 30A of the fixing layer 30. Herein, the entire curing material 30' can be thinned by means of debonding such as grinding, plasma etching or chemical etching to form the structure as Figure 1 and Figure 3D . The structure as Figure 2 and Figure 3E can also be formed by first thinning by grinding and then removing the material between the circuit patterns 21 by plasma or laser, such that the circuit patterns 21 protrude from the third surface 30A of the fixing layer 30.
[0041] In summary, by forming the recessed portions 11 between the circuit patterns, the residual metal particles or metal films are removed, so as to avoid the phenomenon of micro-short circuit caused by conduction with the circuit patterns 21, and further, the electron migration is restricted by the structure of the recessed portions 11.
[0042] Although the technical content of the present invention has been disclosed above with the preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art can make some modifications and refinements without departing from the spirit of the present invention, and all of them should be covered within the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the scope defined by the appended claims.
Claims
1. A fine circuit structure, characterized in that, Comprising: A circuit board, a first surface of the circuit board having a plurality of recesses; A circuit pattern layer formed on the first surface of the circuit board, the circuit pattern layer including a plurality of circuit patterns, and a gap between the circuit patterns being less than 10 μm, and each of the circuit patterns being located between two of the plurality of recesses; And A fixing layer formed on the first surface of the circuit board and between the plurality of circuit patterns, wherein a second surface of the circuit pattern is exposed on a third surface of the fixing layer.
2. The fine circuit structure according to claim 1, wherein The width of each of the circuit patterns is less than 10 μm.
3. The fine circuit structure according to claim 1, characterized in that, The fixing layer is selected from the group consisting of a thermosetting adhesive, a photocuring adhesive or a solder mask.
4. The fine circuit structure according to claim 1, characterized in that The second surface of the plurality of circuit patterns and the third surface of the fixing layer are coplanar.
5. The fine circuit structure according to claim 1, wherein The plurality of circuit patterns protrude from the third surface of the fixing layer.
6. A manufacturing method of a fine circuit structure, characterized in that, Comprising: Providing a circuit board; Forming a circuit pattern layer on a first surface of the circuit board, the circuit pattern layer including a plurality of circuit patterns, and a gap between the plurality of circuit patterns being less than 10 μm; Performing an etching between the plurality of circuit patterns to remove a part of the first surface and form a recess between two of the plurality of circuit patterns; Coating a curing material on the circuit board and the circuit pattern layer, the curing material filling between the plurality of circuit patterns and in the recess; And Removing a part of the curing material to form a fixing layer, such that a second surface of the circuit pattern is exposed on a third surface of the fixing layer.
7. The manufacturing method of the microcircuit structure according to claim 6, wherein The width of each of the circuit patterns is less than 10 μm.
8. The manufacturing method of the microcircuit structure according to claim 6, characterized in that, The fixing layer is selected from the group consisting of a thermosetting adhesive, a photocuring adhesive or a solder mask.
9. The manufacturing method of the fine circuit structure according to claim 6, characterized in that, The second surface of the plurality of circuit patterns and the third surface of the fixing layer are coplanar.
10. The manufacturing method of the microcircuit structure according to claim 6, characterized in that, The plurality of circuit patterns protrude from the third surface of the fixing layer.
11. The manufacturing method of the microcircuit structure according to claim 6, characterized in that, The etching is selected from the group consisting of laser etching, plasma etching, electron beam etching, and chemical etching.
12. The manufacturing method of the fine circuit structure according to claim 6, characterized in that, The step of removing a part of the curing material is selected from the group consisting of grinding, plasma etching, laser etching, and chemical etching.