Plugging device and signal transmission method

Abstract

The invention provides a plugging device and a signal transmission method, which can be applied to the technical field of hardware. The plugging device can comprise a board card which at least comprises an interconnection circuit and a clock circuit; the board card can be connected with at least one storage device and is configured to transmit an interconnection signal to the storage device through the interconnection line and transmit a clock signal to the storage device through the clock line.

Description

Technical Field

[0001] This application relates to the field of hardware technology, and particularly to a plugging device and a signal transmission method. Background Art

[0002] The M.2 interface is a host interface solution that can be compatible with multiple communication protocols such as Serial Attached Small Computer System Interface / Serial Advanced Technology Attachment (SAS / SATA) and Peripheral Component Interconnect express (PCIe). However, due to certain limitations of the M.2 interface, the development of disk redundancy technology for M.2 hard disks is restricted. Summary of the Invention

[0003] In view of the above problems, this application provides a plugging device and a signal transmission method.

[0004] According to the first aspect of this application, a plugging device is provided, including a board card, which at least includes an interconnect line and a clock line; the board card can be connected to at least one storage device and is configured to transmit an interconnect signal to the storage device via the interconnect line and transmit a clock signal to the storage device via the clock line.

[0005] The second aspect of this application provides a signal transmission method, including: the board card in the plugging device transmits an interconnect signal to the storage device via the interconnect line and transmits a clock signal to the storage device via the clock line.

[0006] According to the embodiments of this application, the board card can transmit signals to at least one storage device through at least one of the interconnect line and the clock line, so as to achieve compatibility with storage devices of different communication protocols, break through the limitations of some types of storage device interfaces (such as the M.2 interface), and improve the convenience of server maintenance. Brief Description of the Drawings

[0007] Through the following description of the embodiments of this application with reference to the drawings, the above content and other objects, features, and advantages of this application will become clearer. In the drawings:

[0008] Figure 1 A schematic diagram of the plugging device according to the embodiment of this application is shown.

[0009] Figure 2 A schematic diagram of the board card according to the embodiment of this application is shown.

[0010] Figure 3 Shows a schematic diagram of a board card according to another embodiment of the present application.

[0011] Figure 4 Shows a schematic diagram of a board card according to another embodiment of the present application.

[0012] Figure 5 Shows a schematic diagram of a board card according to another embodiment of the present application.

[0013] Figure 6 Shows a schematic diagram of a board card according to another embodiment of the present application.

[0014] Figure 7 Shows a schematic diagram of a board card according to another embodiment of the present application.

[0015] Figure 8 Shows a schematic diagram of a board card according to another embodiment of the present application.

[0016] Figure 9 Shows a schematic diagram of a board card according to another embodiment of the present application.

[0017] Figure 10 Shows a schematic diagram of a board card according to another embodiment of the present application.

[0018] Figure 11 Shows a schematic diagram of a carrier card according to an embodiment of the present application.

[0019] Figure 12A Shows a schematic diagram of a board card according to another embodiment of the present application.

[0020] Figure 12B Shows a schematic diagram of a board card according to another embodiment of the present application.

[0021] Figure 13 Shows a flowchart of a method for hot plugging a storage device according to an embodiment of the present application.

[0022] Figure 14 Shows a flowchart of a method for hot unplugging a storage device according to an embodiment of the present application.

[0023] Figure 15 Shows a front view and a side view of a carrier card according to another embodiment of the present application.

[0024] Figure 16 Shows a schematic perspective view of a carrier card according to another embodiment of the present application.

[0025] Figure 17 Shows a schematic perspective view of a carrier card according to another embodiment of the present application.

[0026] Figure 18Shows a schematic perspective view of a carrier card according to another embodiment of the present application.

[0027] Figure 19 Shows a schematic diagram of a plugging device according to another embodiment of the present application.

[0028] Figure 20 Shows a schematic diagram of a plugging device according to another embodiment of the present application.

[0029] Figure 21 Shows a front view and a side view of a plugging device according to another embodiment of the present application.

[0030] Figure 22 Shows a schematic perspective view of a plugging device according to another embodiment of the present application.

[0031] Figure 23 Shows a schematic perspective view of a plugging device according to another embodiment of the present application.

[0032] Figure 24 Shows a flowchart of a signal transmission method according to an embodiment of the present application. Detailed implementation manners

[0033] Hereinafter, embodiments of the present application will be described with reference to the accompanying drawings. However, it should be understood that these descriptions are merely exemplary and are not intended to limit the scope of the present application. In the following detailed description, for the sake of explanation, many specific details are set forth to provide a comprehensive understanding of the embodiments of the present application. However, obviously, one or more embodiments can also be implemented without these specific details. In addition, in the following description, descriptions of well-known structures and technologies are omitted to avoid unnecessarily confusing the concepts of the present application.

[0034] The terms used herein are merely for describing specific embodiments and are not intended to limit the present application. The terms "including", "comprising", etc. used herein indicate the presence of the described features, steps, operations, and / or components, but do not exclude the presence or addition of one or more other features, steps, operations, or components.

[0035] All terms used herein (including technical and scientific terms) have the meanings commonly understood by those skilled in the art, unless otherwise defined. It should be noted that the terms used herein should be interpreted as having a meaning consistent with the context of this specification and should not be interpreted in an idealized or overly rigid manner.

[0036] In the case of using expressions such as "at least one of A, B, and C, etc.", generally, it should be interpreted according to the meaning that those skilled in the art usually understand this expression (for example, "a system having at least one of A, B, and C" should include, but not be limited to, a system having only A, only B, only C, having A and B, having A and C, having B and C, and / or having A, B, and C, etc.).

[0037] It should be noted that the orientation or positional relationship indicated by terms such as "center", "longitudinal", "transverse", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc. is based on the orientation or positional relationship shown in the drawings. It is only for the convenience of describing this application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation. Therefore, it should not be construed as a limitation to this application. The terms "mounted", "connected", and "coupled" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be directly connected or indirectly connected through an intermediate medium, and it can be the communication inside two elements. The terms "parallel", "perpendicular", and "equal" include the described situations and situations similar to the described situations, and the range of the similar situations is within the acceptable deviation range, where the acceptable deviation range is determined by those of ordinary skill in the art considering the measurement being discussed and the errors related to the measurement of a specific quantity (i.e., the limitations of the measurement system). For example, "parallel" includes absolute parallel and approximate parallel, and the acceptable deviation range of approximate parallel can be, for example, within 5° deviation; "perpendicular" includes absolute perpendicular and approximate perpendicular, and the acceptable deviation range of approximate perpendicular can also be, for example, within 5° deviation. "Equal" includes absolute equality and approximate equality, and the acceptable deviation range of approximate equality can be, for example, that the difference between the two equal ones is less than or equal to 5% of either one of them. For those of ordinary skill in the art, the specific meanings of the above terms in this application can be understood according to specific situations.

[0038] In some solutions, the redundant array of independent disks (RAID) memory card or SATA memory card can be flexibly configured through the PCIe slot expansion on the server motherboard, and the hardware RAID function can be supported. The hardware RAID function can save the resources of the central processing unit (CPU) and operating system of the server system, thereby improving the performance of the server.

[0039] On this basis, the M.2 interface has gradually become an important option in server configurations. For example, M.2 hard drives are often used as the system boot drive. However, the M.2 interface has some limitations in use. M.2 hard drives can be divided into two types: Non-Volatile Memory express (NVME) and SATA. On this basis, it is difficult for the RAID card to achieve adaptive interconnection with M.2 hard drives of different communication protocols. If the RAID card is to be interconnected with M.2 hard drives of different communication protocols, it is usually necessary to replace the hard drive backplane at the same time. In this case, the unpacking operation of the server will bring difficulties in maintenance. In view of this, the present application provides a plugging device to support the hardware RAID function of storage devices with different communication protocols.

[0040] Figure 1 A schematic diagram of the plugging device according to an embodiment of the present application is shown.

[0041] As Figure 1 shown, the plugging device of this embodiment may include a board C. The board C may include a plurality of lines disposed within the board C, such as traces. In this way, the board C can be electrically connected to the storage device H, such as an M.2 hard drive, via the plurality of lines. It should be understood that the number of each device in the drawings of the present application is only for illustration. To achieve the disk redundancy function, there may be multiple storage devices H.

[0042] The plurality of lines may at least include a plurality of interconnection lines, but are not limited thereto. In other embodiments of the present application, there may also be lines such as clock lines. The board C can be interconnected with the storage device H via the interconnection lines. For example, the board C can perform read operations or write operations on the storage device H via the interconnection lines, thereby realizing the hardware RAID function. The board C can also send a clock signal to the storage device H via the clock line. It should be understood that the embodiments of the present application are not limited thereto. In other embodiments of the present application, the board C may also include lines such as a reset line. The board C can send a reset signal to the storage device H via the reset line. In another embodiment of the present application, the board C may also include other interconnection lines to interconnect the server motherboard MB and the storage device H, etc. It should be understood that the present application does not limit the number of various lines in the plurality of lines.

[0043] On this basis, the board C can have multiple modes. For example, the multiple modes can include but are not limited to the SATA mode and the NVMe mode. In different modes, the board C can transmit signals to the storage device H with different communication protocols through different lines among the multiple lines. For example, the interconnect line can be a PCIe / SAS bus. In one mode, for the storage device H that supports the SATA protocol, the board C can be interconnected with the storage device H via the interconnect line based on the signals of the corresponding protocol; while for the storage device H with the NVMe protocol, another mode is required, in which the clock signal can be transmitted via the clock line, and the interconnection is based on the PCIe signal via the interconnect line. In some embodiments, the clock signal can also be transmitted to the storage device H only via the clock line.

[0044] In this way, the board C in the present application can transmit signals to at least one storage device H through at least one of the interconnect line and the clock line, so as to achieve compatibility with storage devices H with different communication protocols, break through the limitations of some types of storage device H interfaces (such as the M.2 interface), and improve the convenience of server maintenance.

[0045] Figure 2 A schematic diagram of the board C according to an embodiment of the present application is shown.

[0046] As Figure 2 shown, the board C of this embodiment includes a first board 100 and a second board 200 that are electrically connected. The first board 100 can be used to connect the storage device H. The second board 200 can be used to connect the server motherboard MB. In the solution of the present application, the board that realizes the disk redundancy function can be the second board 200, and the first board 100 can electrically connect the storage device H and the second board 200. In this case, multiple lines are arranged in the first board 100, so that the second board 200 can be electrically connected to the storage device H via the multiple lines inside the first board 100. When the multiple lines are electrically connected to the storage device H, for storage devices H with different communication protocols, different modes can be respectively adopted to realize the hardware RAID function. For example, different communication protocols include the Serial Advanced Technology Attachment (SATA) protocol and the Non-Volatile Memory Express (NVMe) protocol. The multiple modes can include a first mode (for example, it can be the NVMe mode) and a second mode (for example, it can be the SATA mode). In the first mode, the board C can transmit signals to the storage device H via the interconnect line and the clock line. In the second mode, the disk redundancy can transmit signals to the storage device H via the interconnect line, and the clock signal may not be required. For example, the interconnect line can transmit signals of different communication protocols in different modes. Specifically, in the first mode, the interconnect line can transmit PCIe signals; in the second mode, the interconnect line can transmit SATA signals.

[0047] In addition, according to the requirements of the protocol specification, it is difficult for the M.2 interface to support the hot plugging and unplugging of the storage device H. If hot plugging and unplugging are performed, it may pose risks to the M.2 hard disk itself, the system platform of the server, and the personnel performing the operation. Thus, compared with the storage device H with other form interfaces, the maintainability of the storage device H with the M.2 interface is poor. In this application, however, the board C can support the hot plugging and unplugging operations of the storage device H with different communication protocols. For example, the board C can detect the communication protocol supported by the storage device H and the hot plugging and unplugging process of the storage device H, and then perform operations related to the storage device H on the storage device H based on the detection results. For example, for the hot insertion process, when the hot insertion process is in progress but not completed, it may not be interconnected with the storage device H until the hot insertion process of the storage device H is completed and then it is interconnected with the storage device H. For the hot removal process, it is not interconnected with the storage device H whether the hot removal process is in progress or completed. Thus, multiple modes of the board C can be respectively used to transmit different signals to the storage device H when the hot plugging and unplugging operations are performed on the storage device H with different communication protocols.

[0048] Thus, the second board 200 in this application can transmit signals to the storage device H with different communication protocols through different lines among multiple lines in the first board 100 in different modes, be compatible with the hot plugging and unplugging of the storage device H with different communication protocols, break through the limitations of the M.2 interface, and improve the maintainability of the server.

[0049] Figure 3 A schematic diagram of the board C according to another embodiment of this application is shown.

[0050] As Figure 3As shown, the first board 100 of this embodiment may include a first interface 10 and a second interface 20. The first interface 10 is used to electrically connect multiple lines to the storage device H. The second interface 20 may be electrically connected to the first interface 10 via multiple lines. The second board 200 may include a third interface 30, and the third interface 30 may be electrically connected to the second interface 20 of the first board 100. In this way, the electrical connection of the first board 100, the second board 200, and the storage device H can be realized. For example, the first interface 10 may support hot plugging of components connected to the first interface 10. In this embodiment, the component may be the storage device H, but the embodiments of the present application are not limited thereto, and the component may also be a device for carrying the storage device H (for example, the following carrier board). Specifically, the first interface 10 may be a General Non-Volatile Storage (GENZ) interface (for example, a GENZ connector). Correspondingly, the interface of the device for electrically connecting to the first interface 10 may also be a GENZ interface (for example, a GENZ gold finger). However, it should be understood that the embodiments of the present application are not limited thereto. In other embodiments of the present application, the first interface 10 may also be other interfaces that support hot plugging. Regarding the types of the second interface 20 of the first board 100 and the third interface 30 of the second board 200, the present application does not make any restrictions, as long as the solution of the present application can be implemented.

[0051] In this way, in the present application, the storage device H is electrically connected to the first board 100 by using the hot-pluggable first interface 10, and the first board 100 and the second board 200 are electrically connected through the second interface 20 of the first board 100 and the third interface 30 of the second board 200, that is, the second board is electrically connected to the non-hot-pluggable interface of the M.2 hard disk through the first board, that is, the non-hot-pluggable interface of the M.2 hard disk is transferred through the first board, so that the second board 200 can transmit signals to the storage device H with different communication protocols through different lines among the multiple lines in the first board 100 in different modes, be compatible with the hot plugging of the storage device H with different communication protocols, break through the limitations of the M.2 interface, and improve the maintainability of the server.

[0052] Figure 4 A schematic diagram of board C according to another embodiment of the present application is shown.

[0053] As Figure 4As shown, the first board card 100 of this embodiment may further include a judgment module 110. The judgment module 110 may be electrically connected to the first interface 10 of the first board card 100, and may judge whether to transmit signals with the first interface 10 for different communication protocols. Specifically, for the NVMe protocol, the judgment module 110 may transmit signals to the first interface 10, such as a reset signal. For the SATA protocol, the judgment module 110 may not transmit a reset signal to the first interface 10. In this way, the judgment module 110 provides signals or does not provide signals to the first interface 10 for storage devices H with different communication protocols, which can meet the signal requirements of storage devices H with different communication protocols, so as to be compatible with storage devices H with different communication protocols and break through the limitations of M.2 hard drives. Further, the judgment module 110 may detect the communication protocol supported by the storage device H, so as to judge whether to transmit signals with the first interface 10. In addition, the judgment module 110 may detect the hot plugging process of the storage device H and indicate to the second board card 200 whether the hot plugging process of the storage device H is completed. Then, the second board card 200 may transmit signals with the storage device H via multiple lines only when the hot insertion process is completed. In addition, in the drawings of the present application, other lines except for the multiple lines are only used to illustrate the electrical connection relationship and are not used to limit the number of lines for the actual electrical connection between multiple devices in the present application, which will not be elaborated one by one hereinafter.

[0054] Figure 5 The schematic diagram of board card C according to another embodiment of the present application is shown.

[0055] In the present application, the judgment module may include at least one isolation circuit among the first isolation circuit BF1 and the second isolation circuit and the first controller CT1. For example, the first isolation circuit BF1 and the second isolation circuit may be input / output buffer circuits (I / O Buffer). At least one isolation circuit is electrically connected to the first controller CT1 and the first interface 10. For example, as Figure 5 shown, the first board card 100 may include the first isolation circuit BF1, and the first isolation circuit BF1 may be electrically connected to the first controller CT1 and the first interface 10. For example, the first controller CT1 may be a Complex Programmable Logic Device (CPLD), etc.

[0056] On this basis, the first controller CT1 is electrically connected to the first interface 10 of the first board card 100, and may detect the communication protocol of the storage device H and the hot plugging process of the storage device H. For different communication protocols, the first controller CT1 may judge whether to transmit signals with the first interface 10 via at least one isolation circuit. For example, as Figure 5As shown, the first controller CT1 can transmit signals to and from the first interface 10 via the first isolation circuit BF1. In one embodiment, the first controller CT1 can be electrically connected to the first end and the enable end of the first isolation circuit BF1, and the second end of the first isolation circuit BF1 can be electrically connected to the first interface 10. In this way, when the communication protocol of the storage device H is detected, the first controller CT1 can first send a reset signal to the first end of the first isolation circuit BF1, and control the disconnection of the electrical connection between the first end of the first isolation circuit BF1 and the second end electrically connected to the first interface 10 through the enable end of the first isolation circuit BF1. Then, when the first controller CT1 detects that the hot insertion process of the storage device H is completed, it can send an enable signal to the enable end of the first isolation circuit BF1 to control the electrical connection between the first end and the second end of the first isolation circuit BF1, so that the reset signal is sent to the storage device H via the first end of the first isolation circuit BF1, the second end of the first isolation circuit BF1, and the first interface 10 to control the reset of the storage device H. In this way, providing signals to the storage device H via the first isolation circuit BF1 can avoid abnormal conditions of the storage device H caused by factors such as signal jitter, and thus realize the hot plug and play of the storage device H.

[0057] In this way, by electrically connecting the first controller CT1 to the first interface 10 of the first board 100, the communication protocol of the storage device H and the hot plug and play process of the storage device H can be detected. On this basis, the first controller CT1 is electrically connected to at least one of the first isolation circuit BF1 and the second isolation circuit, and the at least one isolation circuit is electrically connected to the first interface 10. In this way, based on the detected communication protocol of the storage device H and the hot plug and play process of the storage device H, the first controller CT1 can first send signals to the isolation circuit until the hot insertion process of the storage device H is completed, and then provide signals to the storage device H through the isolation circuit, avoiding abnormal conditions of the storage device H caused by factors such as signal jitter. In this way, the hot plug and play of the storage device H compatible with different communication protocols can be realized, breaking through the limitations of the M.2 interface and improving the maintainability of the server.

[0058] Figure 6 The schematic diagram of the board C according to another embodiment of the present application is shown.

[0059] As Figure 6As shown, the second board card 200 includes a second controller CT2. The second controller CT2 is electrically connected to the third interface 30 of the second board card 200 and is used to implement the disk redundancy function. For example, the second controller CT2 can be a RAID controller. The second controller CT2 can be electrically connected to multiple pins in the third interface 30 through multiple pins in the second interface 20. Multiple pins in the second interface 20 can be respectively electrically connected to one end of multiple lines, and the other ends of the multiple lines can be respectively electrically connected to multiple pins in the first interface 10, so as to be electrically connected to the storage device H through the multiple pins. On this basis, the second controller CT2 can remain powered on, and when the hot plugging of the storage device H with different communication protocols is completed, signals can be transmitted to the storage device H through multiple lines to implement read and write operations on the storage device H, so as to achieve the disk redundancy function. In this way, the hot plugging of the RAID controller compatible with M.2 hard disks with different communication protocols is realized, the limitation of the M.2 interface is broken through, and the maintainability of the server is improved.

[0060] Figure 7 The schematic diagram of the board card C according to another embodiment of the present application is shown.

[0061] As Figure 7 shown, the second isolation circuit BF2 is electrically connected to the first controller CT1, the first interface 10 and the second interface 20 of the first board card 100. For example, the first controller CT1 can be electrically connected to the enable end of the second isolation circuit BF2. The first end of the second isolation circuit BF2 can be electrically connected to the first interface 10, and the second end is electrically connected to the second interface 20. In this way, when the first controller CT1 controls the electrical connection between the first end and the second end of the second isolation circuit BF2, the second isolation circuit BF2 can also transmit signals between the second board card 200 and the storage device H. On this basis, when the storage device H is electrically connected to the first interface 10, the storage device H can first send the signal to the first end of the second isolation circuit BF2, and then when the hot insertion process of the storage device H is completed, the first controller CT1 controls the electrical connection between the first end and the second end of the second isolation circuit BF2, so that the signal from the storage device H can be sent to the second board card 200 through the second isolation circuit BF2, the second interface 20 and the third interface 30. In this way, by the storage device H first sending the signal to the first end of the second isolation circuit BF2 and then transmitting it to the second board card 200 when the first end and the second end of the second isolation circuit BF2 are electrically connected, it is possible to avoid directly sending the jittery signal to the second board card 200 and avoid abnormal conditions caused by factors such as signal jitter. In this way, the hot plugging of the storage device H compatible with different communication protocols can be realized, the limitation of the M.2 interface is broken through, and the maintainability of the server is improved.

[0062] Figure 8 The figure shows a schematic diagram of the board C according to another embodiment of the present application.

[0063] As Figure 8 shown, the second board 200 may further include a fourth interface 40. The fourth interface 40 may be electrically connected to the third interface 30 of the second board 200. For example, the fourth interface 40 and the motherboard interface of the server motherboard MB may be a PCIe gold finger and a PCIe slot respectively, and the fourth interface 40 may be used to electrically connect to the motherboard interface of the server motherboard MB. On this basis, the second isolation circuit BF2 is electrically connected to the management controller BC of the server motherboard MB via the third interface 30, the fourth interface 40, and the motherboard interface. For example, the management controller BC may be a baseboard management controller BC (Baseboard Management Controller, BMC). In this way, when the first controller CT1 controls the electrical connection between the first end and the second end of the second isolation circuit BF2, the second isolation circuit BF2 can also transmit signals between the server motherboard MB and the storage device H. For example, the signal may be a signal for monitoring the working condition of the storage device H, such as a data signal such as a log.

[0064] For example, when the storage device H is electrically connected to the first interface 10, the storage device H may first send a signal to the first end of the second isolation circuit BF2, and then when the hot plug-in process of the storage device H is completed, the first controller CT1 controls the electrical connection between the first end and the second end of the second isolation circuit BF2, so that the signal from the storage device H can be transmitted to the server motherboard MB via the second isolation circuit BF2, the second interface 20, the third interface 30, the fourth interface 40, and the motherboard interface. In this way, by the storage device H pre-sending the signal to the first end of the second isolation circuit BF2 and then transmitting it to the management controller BC of the server motherboard MB only when the first end and the second end of the second isolation circuit BF2 are electrically connected, it is possible to avoid directly sending the signal that causes jitter to the second board 200, avoiding abnormal conditions such as the management controller BC hanging due to factors such as signal jitter. In this way, the hot pluggability of the storage device H that is compatible with different communication protocols can be realized, breaking through the limitations of the M.2 interface, and improving the maintainability of the server.

[0065] Figure 9 The figure shows a schematic diagram of the board C according to another embodiment of the present application.

[0066] As Figure 9As shown, the plugging and unplugging device may further include a carrier card 300. The carrier card 300 can be used to carry storage devices H of various sizes. The carrier card 300 may include a fifth interface 50 and a sixth interface 60. The fifth interface 50 can be used to electrically connect to the storage device H. The sixth interface 60 can be used to electrically connect to the first interface 10 of the first board 100. In this way, the storage device H can transmit signals through multiple traces of the first board 100 via the fifth interface 50, the carrier card 300 (specifically, the traces inside the carrier card 300, such as routing), the sixth interface 60, and the first interface 10, or send signals to the first end of the second isolation circuit BF2. For example, traces for transmitting SATA protocol signals, PCIe protocol signals, reset signals, clock signals, and I2C protocol signals can be provided inside the carrier card 300, which will not be elaborated one by one.

[0067] In addition, the determination module may further include a switching unit. For example, the switching unit can be an I2C Switch. The second isolation circuit BF2 is electrically connected to the first controller CT1 and the third interface 30 via the switching unit. In this way, the first controller CT1 can send a control signal to the enable end of the second isolation circuit BF2 via the switching unit to control the electrical connection or disconnection between the first end and the second end of the second isolation circuit BF2.

[0068] In this way, when the first end and the second end of the second isolation circuit BF2 are electrically connected, the signals sent by the storage device H can be sent to the management controller BC via the fifth interface 50, the sixth interface 60, the first interface 10, the second isolation circuit BF2, the switching unit, the second interface 20, the third interface 30, the fourth interface 40, and the motherboard interface. For example, the switching unit can be electrically connected to the second interface 20 and the first controller CT1 through the System Management Bus (SMBus). The second interface 20, the third interface 30, and the fourth interface 40 can be electrically connected via the SMBus. The management controller BC can be electrically connected to the motherboard interface via the SMBus. The second controller CT2 can also be connected to this SMBus, so as to be interconnected with other devices via the SMBus. The switching unit can also be electrically connected to the second isolation circuit BF2 via the Inter-Integrated Circuit (I2C), and the second isolation circuit BF2 can be electrically connected to the first interface 10 via the I2C bus.

[0069] In addition, the server motherboard MB may further include a central processing unit CP. The central processing unit CP may be electrically connected to the motherboard interface via a PCIe bus to transmit PCIe signals, such as PCIe clock signals, etc., to the second controller CT2 via the motherboard interface and the fourth interface 40. It should be understood that the above connection to the interface may specifically be a connection to the corresponding pins in the interface, which will not be elaborated one by one.

[0070] Figure 10 FIG. shows a schematic diagram of a board card C according to another embodiment of the present application.

[0071] As Figure 10 shown, the second board card 200 may further include a clock buffer. The clock buffer may provide a clock signal to the clock line. Specifically, the second controller CT2 is electrically connected to the interconnection line via the third interface 30 of the second board card 200 and the second interface 20 of the first board card 100. The clock buffer is electrically connected to the second controller CT2 and is electrically connected to the clock line and the second controller CT2 via the third interface 30 of the second board card 200 and the second interface 20 of the first board card 100. Multiple output terminals of the clock buffer may be respectively electrically connected to multiple clock lines. In this way, when the second controller CT2 sends a clock signal to the clock buffer, the clock signal may be sent to multiple clock lines via multiple output terminals of the clock buffer to provide a clock signal to multiple storage devices H, so as to achieve compatibility with the hot plugging of multiple storage devices H compliant with the NVMe protocol, break through the limitations of the M.2 interface, and improve the maintainability of the server.

[0072] Figure 11 FIG. shows a schematic diagram of a carrier card according to an embodiment of the present application, Figure 12A FIG. shows a schematic diagram of a board card C according to another embodiment of the present application.

[0073] As Figure 11 shown, the carrier card may include a fifth interface 50 and a sixth interface 60. The sixth interface 60 includes a target pin and other pins longer than the target pin. For example, the target pin may be the 75th pin of the sixth interface 60. For example, the target pin is used to provide a storage device presence signal. Specifically, the target pin of the sixth interface 60 sends a storage device presence signal to indicate whether the storage device H is in the target position where the hot plugging process is completed.

[0074] On this basis, the target pin can be electrically connected to the first controller CT1 in the judgment module of the first board 100 via the corresponding pin in the first interface 10 of the first board 100, and can provide the storage device presence signal to the first controller CT1. In this way, the first controller CT1 can detect the hot-plugging process. For example, the target pin can be electrically connected to the ground terminal. In this way, when hot-plugging in, the target pin is finally connected to the first interface 10 and short-circuited with the ground signal of the ground terminal, so that the pin corresponding to the target pin in the first interface 10 is at a low level, that is, the storage device presence signal is at a low level. In this case, the first controller CT1 can determine that the storage device H has completed hot-plugging in; when hot-plugging out, the target pin will first disconnect from the first interface 10, and the corresponding pin in the first interface 10 will be pulled high to a high level due to the external power supply. In this case, the first controller CT1 can determine that the hot-plugging process is not completed. In this way, when the target pin in the sixth interface 60 is electrically connected to the corresponding pin in the first interface 10 corresponding to the target pin, it can be determined that the hot-plugging in process of the storage device H has been completed. In the case where other pins are electrically connected to the first interface 10 before the target pin, a storage device detection signal can be sent to the first controller CT1, so that the first controller CT1 can detect the protocol type of the storage device H in advance before the carrier card reaches the target position, so that the second controller CT2 can be controlled to be interconnected or stop being interconnected with the storage device H based on the protocol type. In this way, the hot-plugging of storage devices H with different communication protocols can be realized. And, when the target pin is electrically connected to the corresponding pin of the first interface 10, the level of the corresponding pin of the first interface 10 is pulled down based on the ground signal of the ground terminal to send the storage device presence signal to the first interface 10. By electrically connecting the target pin to the ground terminal, the level of this pin of the first board 100 can be pulled down to send the storage device presence signal to the first board 100 when the pin of the first interface 10 is electrically connected to the target pin. In this way, the hot-plugging of storage devices H with different communication protocols can be realized.

[0075] As Figure 11 and Figure 12A shown, there can be multiple other pins in the above-mentioned sixth interface 60. Some of the multiple other pins can be electrically connected to multiple lines respectively. On this basis, the first interface 10 can transmit a power supply signal, a high-speed signal (PCIe or SATA signal), and other signals to the sixth interface 60. For example, the other part of the multiple other pins except the above-mentioned part of the pins are respectively used to be electrically connected to the first isolation circuit BF1 or the second isolation circuit BF2 in the judgment module of the first board 100 via the corresponding pins in the first interface 10.

[0076] On this basis, the first controller CT1 can detect the communication protocol supported by the storage device H and the hot plugging process of the carrier card. The second controller CT2 can perform corresponding storage device H-related operations on the storage device H based on the detection results of the first controller CT1. For example, the storage device H-related operations include interconnecting with the storage device H according to the detected communication protocol type. Specifically, the second controller CT2 interconnects with the storage device H according to the detected communication protocol type in response to the electrical connection state of the first interface 10 indicating that the sixth interface 60 of the carrier board is electrically connected to the first board 100. In response to the electrical connection state of the first interface 10 indicating that the sixth interface 60 of the carrier board is electrically disconnected from the first board 100, the interconnection with the storage device H is stopped. Thus, based on whether the target pin is electrically connected or disconnected from the first interface 10, it can be determined whether the storage device H is properly connected to the first board 100, facilitating the hot plugging of the storage device H with different communication protocols.

[0077] Moreover, when other pins in the sixth interface 60 are electrically connected to the first interface 10, the first controller CT1 can read the storage device detection signal of the storage device H via the first interface 10 and other pins of the sixth interface 60 (such as detection pins, etc.). The storage device detection signal is used to indicate the communication protocol type of the storage device H. Then, the first controller CT1 can generate a storage device status signal based on the storage device detection signal and the storage device present signal from the second interface 20. Among them, the storage device present signal is used to indicate whether the storage device H is in the target position. The storage device status signal is used to indicate whether the storage device H is in the target position and to indicate the communication protocol of the storage device H. For example, when the carrier card 300 is in the target position on the first board 100, the storage device H on the carrier card 300 is electrically connected to the first interface 10 through the target pin and other pins in the sixth interface 60. On this basis, the second controller CT2 can receive the storage device status signal from the first controller CT1, and when the storage device status signal indicates that the storage device H is in the target position of the hot insertion completion, interconnect with the storage device H according to the communication protocol indicated by the storage device status signal, for example, through the interconnect pins connecting multiple traces. Thus, by the first controller CT1 sending the storage device status signal that can indicate the position of the storage device H and the protocol type of the storage device H to the second controller CT2, the second controller CT2 interconnects with the storage device H according to the communication protocol when the storage device H is in the target position. In this way, the hot plugging of the storage device H with different communication protocols can be realized.

[0078] In addition, the first isolation circuit BF1 can be electrically connected to the first data pins in the first interface 10 that are connected to some of the other pins of the sixth interface 60. When the target pin of the sixth interface 60 is electrically connected to the first interface 10 and the communication protocol is the first communication protocol (such as NVMe), the first controller CT1 performs operations in the first mode to control the first isolation circuit BF1 to electrically connect the management controller BC of the server motherboard MB to the first data pins of the first interface 10. It should be understood that if the data signal is directly provided to the management controller BC of the server motherboard MB by the carrier card 300, the management controller BC may have abnormal conditions (such as hanging) due to factors such as signal jitter of the data signal. Therefore, when the carrier card 300 is in the detection position, it can send a data signal of the third communication protocol (such as the I2C protocol) to the first isolation circuit BF1, so that when the carrier card 300 is in the target position, the first controller CT1 can control the first isolation circuit BF1 to send a data signal to the management controller BC of the server motherboard MB, avoiding the normal operation of the management controller BC being affected by factors such as signal jitter of the data signal, and realizing the stable hot plug of the storage device H that supports the first communication protocol.

[0079] For another example, when the target pin of the sixth interface 20 is disconnected from the first interface 10 and the communication protocol is the first communication protocol, the first controller CT1 can control the first isolation circuit BF1 to disconnect the management controller BC of the server motherboard MB from the first data pins of the first interface 10. In this way, when the carrier card 300 is not in the target position, the first controller CT1 controls the first isolation circuit BF1 to stop sending data signals to the management controller BC of the server motherboard MB, avoiding the normal operation of the management controller BC being affected by factors such as signal jitter of the data signal, and realizing the stable hot plug and hot unplug of the storage device H that supports the first communication protocol.

[0080] Specifically, under the control of the control signal from the first controller CT1 received via the switching unit by the first isolation circuit BF1, the first controller CT1 can electrically connect the switching unit to the first data pin of the first interface 10. In this way, the first controller CT1 sends a control signal to the first isolation circuit BF1 via the switching unit to control the first isolation circuit BF1 to send a data signal to the management controller BC via the switching unit when the carrier card 300 is in the target position, avoiding the normal operation of the management controller BC being affected by factors such as signal jitter of the data signal, and achieving stable hot insertion of the storage device H supporting the first type of communication protocol. For another example, when the first isolation circuit BF1 does not receive a control signal, the first controller CT1 can disconnect the switching unit from the first interface 10. In this way, the first isolation circuit BF1 disconnects the switching unit from the carrier card 300 when it does not receive a control signal to stop sending data signals. In this way, the normal operation of the management controller BC is avoided from being affected by factors such as signal jitter of the data signal, and stable hot plugging of the storage device H supporting the first communication protocol is achieved.

[0081] For example, the second isolation circuit BF2 is electrically connected to the first controller CT1 and the second data pins of the first interface 10 that are connected to other partial pins among the other pins of the sixth interface 60. When the communication protocol is the first communication protocol, the first controller CT1 can perform operations in the first mode to control the second isolation circuit BF2 to be electrically connected to the reset terminal of the second controller CT2, so that the second isolation circuit BF2 receives a reset signal from the reset terminal of the second controller CT2. Then, when the target pin of the sixth interface 60 is electrically connected to the sixth interface 60, the second isolation circuit BF2 is controlled to electrically connect the second data pin of the sixth interface 60 to the reset terminal of the second controller CT2. In this way, when the storage device detection signal indicates that the protocol type is the first type, the first controller CT1 receives a reset signal from the second controller CT2 and transmits the reset signal to the second isolation circuit BF2, so that when the storage device presence signal is received, the second isolation circuit BF2 can be controlled to send a stable reset signal to the storage device H via the carrier card 300 to control the reset of the storage device H, thereby avoiding the influence of unstable reset signals on the storage device H and realizing the stable hot insertion of the storage device H that supports the first communication protocol. Also for example, when the target pin of the sixth interface 60 is disconnected from the first interface 10, the first controller CT1 can control the second isolation circuit BF2 to disconnect the second data pin of the first interface 10 from the reset terminal of the second controller CT2. In this way, when the first controller CT1 does not receive the storage device presence signal, the second isolation circuit BF2 is controlled to be disconnected from the carrier card 300 to stop sending a reset signal to the storage device H, thereby realizing the stable hot removal of the storage device H that supports the first communication protocol.

[0082] For example, the second controller CT2 can transmit signals of the communication protocol via the interconnection line in the case of the first communication protocol or the second communication protocol. In this way, when the carrier card 300 is in the target position, the second controller CT2 is electrically connected to the carrier card 300 via the interconnection line, so that it can be interconnected with the storage device H via the interconnection line based on the first communication protocol or the second communication protocol. In this way, hot plugging of the storage device H supporting different data protocols can be achieved. Moreover, when the communication protocol is the first communication protocol, the second controller CT2 can also perform operations in the first mode to provide a clock signal to the storage device H via the clock line, the first interface 10, and the sixth interface 60, and perform interconnection with the storage device H based on the first communication protocol via the interconnection line and the sixth interface 60. In this way, when the carrier card 300 is in the target position, the second controller CT2 is electrically connected to the carrier card 300 via the clock line and the interconnection line. Thus, the second controller CT2 can provide a clock signal to the storage device H supporting the first communication protocol via the clock line and perform interconnection with the storage device H based on the first communication protocol via the interconnection line. In this way, hot plugging of the storage device H supporting the first communication protocol can be achieved.

[0083] Specifically, the second controller CT2 can be electrically connected to the clock buffer via a single line. The clock buffer is electrically connected to multiple carrier cards 300 via multiple clock lines respectively. The second controller CT2 sends a clock signal to the clock buffer via a single line, so that the clock buffer provides a clock signal to the storage devices H of multiple carrier cards 300 via multiple clock lines respectively based on the clock signal. In this way, the second controller CT2 controls the clock buffer to provide a clock signal to multiple carrier cards 300, so that hot plugging of multiple storage devices H supporting the first communication protocol can be supported. For another example, when the target pin of the sixth interface 60 is disconnected from the first interface 10 and the communication protocol is the first communication protocol, the second controller CT2 can stop providing a clock signal to the storage device H and stop interconnecting with the storage device H. In this way, when the carrier card 300 is not in the target position, the second controller CT2 stops providing a clock signal to the storage device H and stops interconnecting with the storage device H, so that hot unplugging of the storage device H supporting the first data protocol can be achieved.

[0084] On this basis, after the storage device in-position signal of the fifth interface 50 is transmitted to the first controller CT1 of the first board 100, it is used to inform the state of whether the storage device H is in position. In addition, the first controller CT1 can also read the storage device detection signal of the storage device H via the pins directly connected to the first controller CT1 in the first interface 10 to determine whether the storage device H supports SATA or NVMe. When the first controller CT1 determines that the storage device H is a SATA M.2 hard disk and the hot insertion is completed, the second controller CT2 outputs a signal of the corresponding protocol to the storage device H. Moreover, the first controller CT1 can also report information such as the in-position state of the storage device H to the management controller BC of the server motherboard MB through the SMbus bus; when the first controller CT1 determines that the storage device H is an NVMe M.2 hard disk, the first controller CT1 can control the first isolation circuit BF1 and the second isolation circuit BF2 (IO Buffer) to realize the on / off of the reset signal of each storage device H and the I2C bus signal of the storage device H, and the second controller CT2 outputs an NVMe signal to the storage device H and outputs a clock signal to the M.2 hard disk at the same time to realize the hot plugging of M.2 hard disks with different communication protocols.

[0085] Figure 12B The figure shows a schematic diagram of a board according to another embodiment of the present application.

[0086] As Figure 12B shown, the management card corresponds to the above-mentioned first board. The CPLD corresponds to the above-mentioned first controller, the I2C Switch corresponds to the above-mentioned switching unit, the IO Buffer connected to the CPLD corresponds to the above-mentioned first isolation circuit, and the IO Buffer connected to the I2C Switch corresponds to the above-mentioned second isolation circuit. The main card corresponds to the above-mentioned second board. The RAID controller corresponds to the above-mentioned second controller. The Clock Buffer corresponds to the above-mentioned clock buffer.

[0087] Based on this, the M.2 connector of the carrier card is connected to the SATA / NVMe M.2 hard disk, and the GENZ gold finger is connected to the GENZ connector of the management card. In this case, the CPLD can detect the storage device presence signal PRSNT_N and the storage device detection signal PEDET, and generate the storage device status signal SSD_ST. For example, the storage device status signal SSD_ST may include a BP_type signal or a CT_type signal. The BP_type signal and the CT_type signal may be signals for indicating the hard disk type, and are not limited thereto. Also, the CPLD can provide the control signal OE to the IO Buffer connected to itself and the IO Buffer connected to the I2C Switch, to control the IO Buffer connected to the CPLD to provide the reset signal PERST_N to the SATA / NVMe M.2 hard disk, and to control the IO Buffer connected to the I2C Switch to receive the data signal of the I2C protocol. When receiving the storage device status signal SSD_ST, the RAID controller can send a SATA signal or a PCIe signal to the storage device via the SAS / PCIe bus based on the communication protocol and the presence status of the storage device indicated by the storage device status signal SSD_ST. And when sending the PCIe signal, it provides the clock signal PCIE_CLK to the Clock Buffer, so that the Clock Buffer provides the multiplexed clock signal PECLK to multiple SATA / NVMe M.2 hard disks. In this way, the hot-swap operation of storage devices with different communication protocols can be realized. In addition, the RAID controller can also interact with the baseboard management controller of the server motherboard via the SMBus bus, can receive the clock signal PCIE_CLK from the central processor, and can interact through the PCIE_TX / RX signals. It should be noted that Figure 12B the PCIe gold finger, the snap-in card connector, the GENZ connector, the GENZ gold finger, and the M.2 connector in Figure 12A each correspond to the respective interfaces in

[0088] Figure 13 shows a flowchart of a method for hot-inserting a storage device according to an embodiment of the present application.

[0089] As Figure 13 shown, the method of this embodiment includes operations S1310 to S1380. For example, in the present application, the storage device may be a hard disk, and the following describes Figure 13 and Figure 14 each operation and each signal. For example, in the following, the hard disk detection signal may refer to the storage device detection signal for the hard disk, and the same applies to others, which will not be elaborated one by one.

[0090] In operation S1310, when some pins of the first interface and the sixth interface are connected, the first controller reads the hard disk detection signal of the hard disk. For example, when the hard disk detection signal is at a low level, it can be determined that the hard disk on the carrier card is a SATA M.2 hard disk; when the hard disk detection signal is at a high level, it can be determined that the hard disk on the carrier card is an NVMe M.2 hard disk.

[0091] In operation S1320, the first controller determines that the hard disk has reached the target position according to the hard disk present signal.

[0092] In operation S1330, when the hard disk on the carrier card is a SATA M.2 hard disk, the first controller provides a hard disk status signal to the second controller.

[0093] In operation S1340, the second controller sends a signal to the sixth interface via the interconnection line to interconnect with the hard disk.

[0094] In operation S1350, when the hard disk on the carrier card is an NVMe M.2 hard disk, the first controller enables the first isolation circuit and the second isolation circuit, so that the first end and the second end of the first isolation circuit are electrically connected, and the first end and the second end of the second isolation circuit are electrically connected.

[0095] In operation S1360, when the hard disk has reached the target position, the first controller provides a hard disk status signal to the second controller.

[0096] In operation S1370, the second controller sends a PCIe signal to the sixth interface via the interconnection line to interconnect with the hard disk, and sends a clock signal to the sixth interface via the clock line.

[0097] In operation S1380, the first controller reports information such as the hard disk present status to the management controller of the motherboard through the SMBus.

[0098] On this basis, the management controller can monitor the hard disk present status and access the out-of-band information of each NVMe M.2 hard disk, so as to achieve hot plugging.

[0099] Figure 14 The flowchart of the hot unplugging method of the storage device according to the embodiment of the present application is shown.

[0100] As Figure 14 shown, the method of this embodiment may include operations S1410 to S1470.

[0101] In operation S1410, the first controller determines that the hard disk has not reached the target position according to the hard disk present signal.

[0102] In operation S1420, when the hard disk on the carrier card is a SATA M.2 hard disk, the first controller provides a hard disk status signal to the second controller.

[0103] In operation S1430, the second controller stops sending signals to disconnect the interconnection.

[0104] In operation S1440, when the hard disk on the carrier card is an NVMe M.2 hard disk, the first controller disables the first isolation circuit and the second isolation circuit, such that the first end and the second end of the first isolation circuit are disconnected from the electrical connection, and the first end and the second end of the second isolation circuit are disconnected from the electrical connection.

[0105] In operation S1450, the first controller provides a hard disk status signal to the second controller.

[0106] In operation S1460, the second controller stops sending PCIe signals to stop the interconnection with the hard disk and stops sending clock signals.

[0107] In operation S1470, the first controller reports the status information that the hard disk is not in place to the management controller of the motherboard via the SMBus to achieve hot plugging.

[0108] Figure 15 A front view and a side view of a carrier card according to another embodiment of the present application are shown.

[0109] As Figure 15 shown, the carrier card as a whole may have a thickness in the first direction Z and extend in the second direction X. The carrier card includes a carrier portion, and a fifth interface of the carrier card is provided at one end of the carrier portion. The sixth interface of the carrier card may also be at the same end and beside the fifth interface. At the other end of the carrier portion where no interface is provided, a card hook may be provided, and the card hook may be used to hook the second board to fix the relative position between the second board and the carrier portion.

[0110] In addition, an indicator light is provided in the middle of the carrier portion, and a light guide column extending from the middle of the carrier portion to the other end to guide the optical signal emitted by the indicator light from the middle of the carrier portion to the observation point at the other end. For example, there may be multiple indicator lights distributed in the third direction Y. Correspondingly, there may be multiple observation points distributed in the third direction Y. For example, the optical signal of the indicator light may be used and is not limited to indicating states such as hot plugging. By providing an indicator light in the middle of the carrier portion of the carrier card and guiding the optical signal emitted by the indicator light to the observation hole at the other end of the carrier card through the light guide column, it is convenient to determine the position of the storage device through the optical signal during the process of inserting and removing the storage device driven by the carrier card. In this way, it is convenient to achieve hot plugging of storage devices with various sizes and various communication protocols.

[0111] Continue to refer toFigure 15 The fifth interface and the sixth interface can be located at the housing of the carrier card. Next to the housing, there are also detachable fixing posts provided at the position for setting the storage device, for fixing the relative position between the storage device and the carrier card.

[0112] There are a great variety of M.2 hard disk forms. Classified by size, they are Type 1113, 1216, 1620, 1630, 2024, 2226, 2228, 2230, 2242, 2260, 2280, 2828, 3026, 3030, 3042, 22110, and 25110. They have different length, width, and height dimensions respectively, and it is necessary to consider the scenarios of M.2 of various sizes being connected to the host. On this basis, the standard size of the RAID card is 167.65 mm in length × 68.90 mm in width, with an M.2 connector (about 6 mm) and a RAID controller (about 25 mm in length × 25 mm in width). Considering the routing fan-out space of the RAID controller, heat sinks, and other necessary electronic components, as well as the limited layout area design, it is simply difficult to achieve hot pluggability of multiple lengths of storage devices in the space layout within the server. Therefore, a new layout solution is needed to implement the full-size M.2 hard disk design. On this basis, in order to achieve hot pluggability of storage devices of various sizes, the present application designs a full-length carrier card. Figure 16 Fig. shows a schematic perspective view of a carrier card according to another embodiment of the present application. Figure 17 Fig. shows a schematic perspective view of a carrier card according to another embodiment of the present application. Figure 18 Fig. shows a schematic perspective view of a carrier card according to another embodiment of the present application.

[0113] Referring to Figure 16 it can be seen that in addition to the light guide column and the sixth interface on the carrier card, there are also fixing posts provided. Figure 17 and Figure 18 respectively show schematic diagrams of storage devices of different sizes being set on the carrier card of the present application that is compatible with full-length storage devices. On this basis, for the fixing posts provided on the carrying part, the distance between the fixing posts and the fifth interface (or the sixth interface) is adjustable. Thus, in the case where storage devices of various sizes are set on the carrying part, the relative position between the storage device and the carrying part can be fixed by adjusting the distance between the fixing posts and the fifth interface (or the sixth interface). In this way, by providing fixing posts on the carrier card, storage devices of different sizes can be fixed on the carrier card, so that storage devices of various sizes can be electrically connected to the fifth interface. Furthermore, hot pluggability of storage devices of various sizes and various protocol types can be achieved.

[0114] Figure 19 Fig. shows a schematic diagram of a plugging device according to another embodiment of the present application.

[0115] AsFigure 19 As shown, the second board further includes a guide rail. The guide rail can extend in the second direction so that the carrier card can be displaced relative to the board (specifically, the second board) along the guide rail in the second direction.

[0116] In terms of principle design, the board is divided into two parts: the first board and the second board. The second board serves as the main board, on which a guide rail is placed for the carrier card with a storage device to be inserted or removed along the guide rail. On the one hand, the second board is connected to the central processing unit on the main board through the main board interface (for example, specifically a PCIe slot) and the second controller on the board through the PCIe bus; on the other hand, the second board is also connected to the second interface on the first board through the third interface; where the second controller serves as the host end of the storage device and manages and implements various RAID functions with the help of its own cache and RAID algorithm logic.

[0117] The first board is an expansion card of the second board, which is connected to the second board through the second interface and can be installed and fixed above the second board and locked. Due to the limited space for arranging components on the second board, the layout space of components can be expanded on the first board; the first interface on the first board connects the interconnection line to the sixth interface of the carrier card, and the hot plugging of the storage device can be indirectly realized by inserting and removing the first interface and the sixth interface on the carrier card. The first controller on the first board is used for managing the hot plugging signal of the storage device, identifying the storage device in place, and controlling the lighting of the light-emitting diode (LED) signal lamp.

[0118] In addition, the solution for deploying M.2 hard disks in related technologies is relatively complex and requires a RAID card, cables, and a hard disk backplane to cooperate with the M.2 hard disk to achieve. Since the cables will extend from the card end to the hard disk backplane side, the cables are relatively long, which will occupy the chassis space and increase the deployment cost. Among them, since the hard disk backplane needs to provide power supply, signal transmission, management functions, and structural fixing devices for the M.2 hard disk, the position of the hard disk backplane in the chassis needs to be systematically planned. Limited by the possible installation of the hard disk backplane in different positions of the chassis, the space structure and heat dissipation requirements are different, so different types of hard disk backplanes need to be designed; the routing design of the cables will also be different, and cables of different lengths need to be developed. And in the solution of this application, Figure 20 shows a schematic diagram of a plugging and unplugging device according to another embodiment of the present application. As Figure 20As shown, the board can be installed on the main card interface of the motherboard as an external device of the server. For example, the storage device can be installed on the board through a structural device that cooperates with the carrier card through rails. On this basis, the storage device can be installed on the carrier card, and the carrier card can be inserted into or pulled out of the board through the rails. The second controller of the board is compatible with multi-mode protocols and is used to support the identification of storage devices using both the NVMe and SATA protocols and the RAID function. It also supports full-length storage devices (for example, it can be 110 mm), and can also support hot-pluggable maintenance and replacement of the RAID card without opening the server. In this way, the problem of cable layout is solved, and the space on the right side of the board (in some solutions, this space needs to be used for cable layout) is vacated, facilitating the reasonable planning of the internal space of the chassis. Figure 20 The space located on the right side of the board in

[0119] Figure 21 Fig. shows the front view and side view of the plugging and unplugging device according to another embodiment of the present application.

[0120] As Figure 21 shown, the first board and the second board are stacked, for example, the first board can be placed upside down on the second board to expand the placement of more components on the first board, and it can also realize the connection between the second interface of the first board and the third interface of the second board. For example, a heat dissipation layer can be provided between the stacked first board and the second board to dissipate heat from the first board and the second board. For example, the second controller of the second board is stacked with the first board in the first direction Z. The second controller is recessed relative to the first board in the second direction X that intersects the first direction Z. On this basis, the sixth interface of the carrier card is electrically connected to the first interface of the first board in the second direction X, so that there is a certain space between the carrier card and the second controller when the first interface and the sixth interface are electrically connected. In this way, by stacking the first board and the second board and setting the second controller to be recessed relative to the first interface in the second direction X, a certain space can be enclosed by the first interface, the sixth interface, the second board, and the first board when the first interface and the sixth interface are connected. In this way, other designs such as wiring can be carried out in this space, so as to make full use of the internal space of the server.

[0121] In addition, a stop piece is provided at one end of the rail of the first board away from the second controller to limit the moving direction of the carrier card relative to the rail. For example, it can be used to limit the carrier card from deviating in the third direction.

[0122] Figure 22 Fig. shows a schematic perspective view of the plugging and unplugging device according to another embodiment of the present application, Figure 23 Fig. shows a schematic perspective view of the plugging and unplugging device according to another embodiment of the present application.

[0123] In Figure 22 a schematic diagram of the board card is shown when the carrier card is in the target position. Figure 23 It is Figure 22 a partial schematic diagram of. Refer to Figure 22 and Figure 23 It can be known that card holes are provided at the guide rail. Specifically, card holes can be provided at one end of the guide rail away from the first board card. The carrier card can further include a pressing elastic piece at the other end of the carrying part, and a card hook is provided on the pressing elastic piece. The card hook can hook the card hole when the sixth interface of the carrier card is electrically connected to the first interface of the first board card, so as to fix the relative position between the carrying part and the guide rail. Then, when the pressing elastic piece is pressed, the pressing elastic piece can drive the card hook to disengage from the card hole, so as to realize maintenance and replacement without opening the chassis cover. In this way, the present application can realize the replacement and maintenance of the M.2 hard disk without opening the box and without power-off. This solution has flexible deployment, simple maintenance, strong versatility, and low design cost, and has good application value.

[0124] Figure 24 A flowchart of a signal transmission method according to an embodiment of the present application is shown.

[0125] As Figure 24 shown, the method of this embodiment includes operation S2410.

[0126] In operation S2410, the board card in the plugging and unplugging device transmits an interconnection signal to the storage device via the interconnection line, and transmits a clock signal to the storage device via the clock line.

[0127] For example, the first controller detects the communication protocol supported by the storage device and the hot plugging process of the carrier card. The second controller performs corresponding storage device-related operations on the storage device based on the detection result of the first controller. Among them, the storage device-related operations include interconnecting with the storage device according to the detected communication protocol type.

[0128] For example, the first controller determines the hot plugging process based on the electrical connection state of the first interface of the first board card. The second controller responds to the electrical connection state of the first interface indicating that the sixth interface of the carrier board is electrically connected to the first board card, and interconnects with the storage device according to the detected communication protocol type; responds to the electrical connection state of the first interface indicating that the sixth interface of the carrier board is electrically disconnected from the first board card, and stops interconnecting with the storage device.

[0129] For example, the target pin of the sixth interface sends a storage device presence signal to indicate whether the storage device is in the target position where the hot plugging process is completed.

[0130] For example, when the target pin is electrically connected to the corresponding pin of the first interface, the level of the corresponding pin of the first interface is pulled down based on the ground signal of the ground terminal to send the storage device presence signal to the first interface.

[0131] For example, when other pins in the sixth interface are electrically connected to the first interface, the first controller reads the storage device detection signal of the storage device via the first interface and the other pins of the sixth interface. The storage device detection signal is used to indicate the communication protocol type of the storage device.

[0132] For example, when the carrier card is in the target position on the guide rail of the first board, the sixth interface is electrically connected to the first interface through the target pin and other pins.

[0133] For example, the first controller generates a storage device status signal based on the storage device detection signal and the storage device presence signal from the sixth interface. The storage device presence signal is used to indicate whether the storage device is in the target position. The storage device status signal is used to indicate whether the storage device is in the target position and to indicate the communication protocol of the storage device. The second controller receives the storage device status signal from the first controller, and when the storage device status signal indicates that the storage device is in the target position, interconnects with the storage device according to the communication protocol indicated by the storage device status signal.

[0134] For example, when the target pin of the sixth interface is electrically connected to the first interface and the communication protocol is the first communication protocol, the first controller performs the operation of the first mode to control the first isolation circuit to electrically connect the management controller of the server motherboard to the first data pin of the first interface.

[0135] For example, when the target pin of the sixth interface is disconnected from the first interface and the communication protocol is the first communication protocol, the first controller controls the first isolation circuit to disconnect the management controller of the server motherboard from the first data pin of the first interface.

[0136] For example, under the control of the control signal from the first controller received via the switching unit, the first isolation circuit electrically connects the switching unit to the first data pin of the first interface.

[0137] For example, when no control signal is received, the first isolation circuit disconnects the switching unit from the first interface.

[0138] For example, when the communication protocol is the first communication protocol, the first controller performs the operation of the first mode to control the second isolation circuit to be electrically connected to the reset terminal of the second controller; when the target pin of the sixth interface is electrically connected to the sixth interface, the first controller controls the second isolation circuit to electrically connect the second data pin of the sixth interface to the reset terminal of the second controller.

[0139] For example, when the target pin of the sixth interface is disconnected from the first interface, the first controller controls the second isolation circuit to disconnect the second data pin of the first interface from the reset terminal of the second controller.

[0140] For example, the second controller transmits a signal of the communication protocol via the interconnection line when the communication protocol is the first communication protocol or the second communication protocol.

[0141] For example, when the communication protocol is the first communication protocol, the second controller performs an operation in the first mode to provide a clock signal to the storage device via the clock line, the first interface, and the sixth interface, and to interconnect with the storage device based on the first communication protocol via the interconnection line and the sixth interface.

[0142] For example, the second controller sends a clock signal to the clock buffer via a single line, so that the clock buffer provides the clock signal to the storage devices of multiple carrier cards via multiple clock lines respectively based on the clock signal.

[0143] For example, when the target pin of the sixth interface is disconnected from the first interface and the communication protocol is the first communication protocol, the second controller stops providing the clock signal to the storage device and stops interconnecting with the storage device.

[0144] It should be understood that the signal transmission method in the embodiments of the present application is not limited thereto. For specific reference, please refer to the foregoing description and details are not repeated herein.

[0145] The flowcharts and block diagrams in the accompanying drawings illustrate the possible architectures, functions, and operations of systems, methods, and computer program products according to various embodiments of the present application. In this regard, each block in the flowchart or block diagram may represent a module, a program segment, or a part of code, and the above-mentioned module, program segment, or part of code contains one or more executable instructions for implementing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the blocks may occur in a different order than marked in the accompanying drawings. For example, two consecutive blocks shown may actually be executed substantially in parallel, and they may sometimes be executed in the reverse order, depending on the functions involved. It should also be noted that each block in the block diagram or flowchart, and the combination of blocks in the block diagram or flowchart, can be implemented by a dedicated hardware-based system for performing the specified functions or operations, or can be implemented by a combination of dedicated hardware and computer instructions.

[0146] Those skilled in the art will understand that the features described in the various embodiments of the present application can be combined and / or combined in various ways, even if such combinations or combinations are not explicitly described in the present application. In particular, without departing from the spirit and teachings of the present application, the features described in the various embodiments of the present application can be combined and / or combined in various ways. All such combinations and / or combinations fall within the scope of the present application.

[0147] The embodiments of the present application have been described above. However, these embodiments are for illustrative purposes only and are not intended to limit the scope of the present application. Although the embodiments have been described separately above, this does not mean that the measures in the various embodiments cannot be used advantageously in combination. Without departing from the scope of the present application, those skilled in the art can make various substitutions and modifications, and all such substitutions and modifications should fall within the scope of the present application.

Claims

1. A plug-in device, characterized in that, Comprising: A board card, including at least an interconnect line and a clock line; The board card can be connected to at least one storage device and is configured to transmit an interconnect signal to the storage device via the interconnect line and transmit a clock signal to the storage device via the clock line.

2. The plug-in device according to claim 1, characterized in that, The board card includes a first board card and a second board card that are electrically connected; the first board card is used to connect to the storage device; the second board card is used to connect to the server motherboard.

3. The plug-in device according to claim 2, characterized in that, The interconnect line and the clock line are provided in the first board card.

4. The plugging device according to claim 2, characterized in that, The first board card includes a first interface and a second interface; the second board card includes a third interface; Wherein, the first interface is electrically connected to the second interface via the interconnect line and the clock line, and the second interface is electrically connected to the third interface.

5. The plugging device according to claim 4, characterized in that The first interface is a hot-pluggable interface.

6. The plugging device according to claim 5, characterized in that, The first interface is a universal non-volatile storage interface.

7. The plugging device according to any one of claims 2 to 6, characterized in that The first board card further includes a judgment module, electrically connected to the first interface; The judgment module is used to judge whether to transmit a signal to the first interface for different communication protocols.

8. The plugging device according to claim 7, characterized in that, The judgment module includes at least one isolation circuit and a first controller.

9. The plugging device according to claim 8, characterized in that, The first controller is electrically connected to the first interface and is configured to detect the communication protocol of the storage device and judge whether to transmit a signal to the first interface via the at least one isolation circuit for different communication protocols.

10. The plug-in device according to claim 8, wherein The at least one isolation circuit includes at least one of a first isolation circuit and a second isolation circuit; The first isolation circuit is electrically connected to the first controller and the first interface; The second isolation circuit is electrically connected to the first controller, the first interface and the second interface.

11. The plug-in device according to claim 10, wherein, The second board card further includes a fourth interface for electrically connecting the third interface and the motherboard interface of the server motherboard, so that the second isolation circuit is electrically connected to the management controller of the server motherboard via the third interface, the fourth interface and the motherboard interface.

12. The plug-in device according to claim 11, characterized in that, The judgment module further includes a switching unit; The second isolation circuit is electrically connected to the first controller and the third interface via the switching unit.

13. The plug-in device according to any one of claims 2 to 6, characterized in that, The second board card includes a second controller; the second controller is electrically connected to the interconnect line via the second interface and the third interface; the second controller is used to implement a disk redundancy function.

14. The plug-in device according to claim 13, characterized in that The second board card further includes a clock buffer for providing a clock signal to the clock line.

15. The plug-in device according to claim 14, characterized in that, The clock buffer is electrically connected to the second controller and is electrically connected to the clock line via the second interface and the third interface.

16. The plugging device according to any one of claims 1 to 6, characterized in that, It further includes a carrier card for carrying storage devices of various sizes; The carrier card includes a fifth interface and a sixth interface, the fifth interface is used to be electrically connected to the storage device; the sixth interface is used to be electrically connected to the board card.

17. The plug-in device according to claim 16, characterized in that, The sixth interface includes a target pin and other pins longer than the target pin.

18. The plugging device according to claim 17, characterized in that, The target pin is used to be electrically connected to the first controller via a corresponding pin in the first interface.

19. The plugging device according to claim 18, wherein The multiple other pins in the sixth interface, except for the target pin, are respectively used to be electrically connected to the interconnection line, the clock line, the first isolation circuit, and the second isolation circuit via the corresponding pins in the first interface.

20. The plug-in device according to claim 16, characterized in that, The first board and the second board are stacked.

21. The plugging device according to claim 20, characterized in that, A heat dissipation layer is provided between the first board and the second board.

22. The plugging device according to claim 21, characterized in that, The second controller of the second board is stacked with the first board in a first direction; The second controller is recessed relative to the first board in a second direction intersecting with the first direction.

23. The plugging device according to claim 22, characterized in that, The sixth interface of the carrier card is electrically connected to the first interface in the second direction; when the first interface and the sixth interface are electrically connected, there is a certain space between the carrier card and the second controller.

24. The plugging device according to claim 16, characterized in that, The board further includes a guide rail; the guide rail extends in the second direction so that the carrier card can be displaced relative to the board along the guide rail in the second direction.

25. The plug-in device according to claim 24, wherein, The guide rail is provided on the second board; a stop piece is provided at one end of the guide rail away from the second controller for restricting the moving direction of the carrier card relative to the guide rail.

26. The plug-in device according to claim 24, characterized in that The guide rail is provided with a card hole; The carrier card includes a carrying portion, the fifth interface is provided at one end of the carrying portion, the carrier card further includes a pressing elastic piece at the other end of the carrying portion, and the pressing elastic piece is provided with a hook; The hook can, when the sixth interface and the first interface are electrically connected, hook the card hole, thereby fixing the relative position between the carrying portion and the guide rail; The pressing elastic piece can drive the hook to disengage from the card hole when being pressed.

27. The plugging device according to claim 26, wherein, The carrier card further includes a fixing post provided on the carrying portion; The distance between the fixing post and the fifth interface is adjustable so that when storage devices of various sizes are provided on the carrying portion, the relative position between the storage device and the carrying portion can be fixed by adjusting the distance between the fixing post and the fifth interface.

28. The plugging device according to any one of claims 1 to 6, characterized in that, The multiple modes of the board are respectively used to transmit different signals to the storage device when a hot plug operation is performed on a storage device with different communication protocols.

29. The plugging device according to claim 28, wherein The multiple modes include a first mode and a second mode; wherein, in the first mode, the interconnection line transmits the interconnection signal, and the clock line transmits the clock signal; in the second mode, the interconnection line transmits the interconnection signal.

30. The plugging device according to any one of claims 1 to 6, characterized in that, The storage device is an M.2 hard disk.

31. The plugging device according to any one of claims 1 to 6, characterized in that The storage device supports the Serial Advanced Technology Attachment protocol or the Non-Volatile Memory Express protocol.

32. A signal transmission method, including: The board in the plug-and-play device transmits an interconnection signal to the storage device via an interconnection line and transmits a clock signal to the storage device via a clock line.

33. The signal transmission method according to claim 32, wherein The board includes a first board and a second board; the first board includes a first controller, and the second board includes a second controller; The method further includes: The first controller detects the communication protocol supported by the storage device and the hot plugging process of the carrier card; The second controller performs corresponding storage device-related operations on the storage device based on the detection result of the first controller; wherein, the storage device-related operations include interconnecting with the storage device according to the detected communication protocol type.

34. The signal transmission method according to claim 33, wherein The hot plug process is determined by the first controller based on the electrical connection state of the first interface of the first board. The method further includes: when the electrical connection state of the first interface indicates that the sixth interface of the carrier board is electrically connected to the first board, the second controller interconnects with the storage device according to the detected communication protocol type; when the electrical connection state of the first interface indicates that the sixth interface of the carrier board is electrically disconnected from the first board, the second controller stops interconnecting with the storage device.

35. The signal transmission method according to claim 34, wherein, The method further includes: The target pin of the sixth interface sends a storage device present signal to indicate whether the storage device is in the target position for completing the hot plug process.

36. The method according to claim 35, characterized in that, The target pin of the sixth interface sending a storage device present signal includes: When the target pin is electrically connected to the corresponding pin of the first interface, the target pin pulls down the level of the corresponding pin of the first interface based on the ground signal of the ground terminal to send the storage device present signal to the first interface.

37. The signal transmission method according to claim 36, characterized in that, The sixth interface further includes other pins other than the target pin. The first controller detecting the communication protocol type supported by the storage device includes: When the other pins in the sixth interface are electrically connected to the first interface, the first controller reads the storage device detection signal of the storage device via the first interface and the other pins of the sixth interface; the storage device detection signal is used to indicate the communication protocol type of the storage device.

38. The signal transmission method according to claim 37, wherein The method further includes: When the carrier card is in the target position on the guide rail of the first board, the sixth interface is electrically connected to the first interface through the target pin and the other pins.

39. The signal transmission method according to claim 38, wherein The method further includes: The first controller generates a storage device status signal based on the storage device detection signal and the storage device present signal from the sixth interface; the storage device present signal is used to indicate whether the storage device is in the target position; the storage device status signal is used to indicate whether the storage device is in the target position and to indicate the communication protocol of the storage device. The second controller performing corresponding storage device-related operations on the storage device based on the detection result of the first controller includes: The second controller receives the storage device status signal from the first controller, and when the storage device status signal indicates that the storage device is in the target position, interconnects with the storage device according to the communication protocol indicated by the storage device status signal.

40. The signal transmission method according to any one of claims 37 to 39, characterized in that, The first board further includes a first isolation circuit, which is electrically connected to the first data pins in the first interface that are connected to some of the other pins of the sixth interface, and the first controller. The method further includes: When the target pin of the sixth interface is electrically connected to the first interface and the communication protocol is the first communication protocol, the first controller performs operations in the first mode to control the first isolation circuit to electrically connect the management controller of the server motherboard to the first data pin of the first interface.

41. The signal transmission method according to claim 40, characterized in that, The method further includes: When the target pin of the sixth interface is disconnected from the first interface and the communication protocol is the first communication protocol, the first controller controls the first isolation circuit to disconnect the management controller of the server motherboard from the first data pin of the first interface.

42. The signal transmission method according to claim 41, wherein The first board further includes a switching unit electrically connected to the management controller and the first isolation circuit; The method further includes: Under the control of a control signal from the first controller received via the switching unit, the first isolation circuit electrically connects the switching unit to the first data pin of the first interface.

43. The signal transmission method according to claim 42, wherein The method further includes: When the control signal is not received, the first isolation circuit disconnects the switching unit from the first interface.

44. The signal transmission method according to any one of claims 37 to 39, characterized in that, The first board further includes a second isolation circuit electrically connected to the first controller and the second data pins of the first interface that are connected to other partial pins of the other pins of the sixth interface; The method further includes: When the communication protocol is the first communication protocol, the first controller performs operations in the first mode to control the second isolation circuit to be electrically connected to the reset terminal of the second controller; when the target pin of the sixth interface is electrically connected to the sixth interface, the first controller controls the second isolation circuit to electrically connect the second data pin of the sixth interface to the reset terminal of the second controller.

45. The signal transmission method according to claim 44, wherein The method further includes: When the target pin of the sixth interface is disconnected from the first interface, the first controller controls the second isolation circuit to disconnect the second data pin of the first interface from the reset terminal of the second controller.

46. The signal transmission method according to any one of claims 33 to 39, characterized in that The second controller is electrically connected to the first interface via the interconnection line; The board in the pluggable device transmits an interconnection signal to the storage device via the interconnection line and transmits a clock signal to the storage device via the clock line, including: The second controller transmits a signal of the communication protocol via the interconnection line when the communication protocol is the first communication protocol or the second communication protocol.

47. The signal transmission method according to claim 46, wherein The second controller is also electrically connected to the first interface via the clock line; The method further includes: When the communication protocol is the first communication protocol, the second controller performs operations in the first mode to provide a clock signal to the storage device via the clock line, the first interface, and the sixth interface, and perform interconnection with the storage device based on the first communication protocol via the interconnection line and the sixth interface.

48. The signal transmission method according to claim 47, wherein There are multiple carrier cards; each of the multiple carrier cards is provided with a storage device; there are multiple clock lines; The second board further includes a clock buffer; the second controller is electrically connected to the clock buffer via a single line; The clock buffer is electrically connected to a plurality of the carrier cards via a plurality of the clock lines respectively; Said providing a clock signal to the storage device includes: The second controller sends the clock signal to the clock buffer via the single line, so that the clock buffer provides the clock signal to the storage devices of the plurality of carrier cards via the plurality of clock lines based on the clock signal.

49. The signal transmission method according to claim 48, characterized in that, The method further includes: When the target pin of the sixth interface is disconnected from the first interface and the communication protocol is the first communication protocol, the second controller stops providing the clock signal to the storage device and stops interconnecting with the storage device.

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