PCB with built-in power chip and manufacturing method thereof

Abstract

The application relates to the technical field of printed circuit boards, and discloses a PCB with a built-in power chip and a manufacturing method thereof. The PCB comprises a subboard arranged along a first direction, a first insulating layer, a first circuit layer, an insulating part and a circuit part. The subboard is provided with the power chip on one side facing the first insulating layer. The power chip has a first bonding pad and a second bonding pad. The first circuit layer comprises a first part and a second part. The first part is electrically connected with the first bonding pad. The first part is electrically connected with the circuit part. One end of the second part is arranged in a spaced mode with the first part. The other end of the second part protrudes from the insulating part along a second direction and protrudes from the circuit part along the second direction. The second part is electrically connected with the second bonding pad. The second direction is perpendicular to the first direction. The PCB with the built-in power chip and the manufacturing method thereof can reduce the filling hole frequency and lower the production cost.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of printed circuit boards, and in particular to a PCB with a built-in power chip and a manufacturing method thereof. BACKGROUND

[0002] With the development of science and technology, various electric vehicles are developing towards high voltage, high conversion power and high efficiency. The traditional power chip packaging method has a large volume and cannot meet the requirement of device miniaturization. The embedded power chip technology integrates the power chip into the multi-layer structure of the PCB (Printed Circuit Board) with a built-in power chip, effectively reducing the size of the power module and saving space.

[0003] The current embedded core process on the PCB with a built-in power chip is mainly designed to laminate a copper foil on the power chip, and to lead out the functional pins of the power chip. Since the single-layer copper foil cannot take into account the current carrying and sufficient space for placing the control circuit, it is necessary to lead the electrodes to the edge of the board through the copper foil current carrying of the current layer, and then to perform layer increasing, connect the current layer and the top layer through the blind hole, and form the power network circuit on the top layer. Since the current carrying pad is led to the edge of the board, there is sufficient space for placing the control circuit in the middle.

[0004] In the related art, since the copper foil connected to the power chip has a requirement for excessive current, the thickness of each layer of copper foil is required (usually > 3oz), and the blind hole needs to be filled to ensure sufficient current carrying capacity. Therefore, filling the hole is required each time the power chip is increased in layers, which requires a large amount of filling capacity. SUMMARY

[0005] The present application provides a PCB with a built-in power chip and a manufacturing method thereof, which can reduce the number of filling holes and reduce production costs.

[0006] In a first aspect, an embodiment of the present application provides a PCB with a built-in power chip, comprising a sub-board, a first insulating layer, a first circuit layer, an insulating part and a circuit part which are sequentially and laminatedly arranged along a first direction, wherein the sub-board is provided with a power chip on a side facing the first insulating layer, and the power chip has a first pad and a second pad; the first circuit layer comprises a first part and a second part, the first part is in electrical conduction with the first pad, and the first part is in electrical conduction with the circuit part, one end of the second part is arranged in a spaced manner with the first part, the other end of the second part protrudes from the insulating part along a second direction and protrudes from the circuit part along the second direction, the second part is in electrical conduction with the second pad, and the second direction is perpendicular to the first direction.

[0007] In some embodiments, the first insulating layer is provided with a first hole and a second hole, an inner portion of the first hole is provided with a first conductive part, an inner portion of the second hole is provided with a second conductive part, the first part and the first pad are both connected with the first conductive part and electrically conductive, and the second part and the second pad are both connected with the second conductive part and electrically conductive.

[0008] In some embodiments, the insulating part is provided with a third hole, an inner portion of the third hole is provided with a third conductive part, and the circuit part and the first part are both connected with the third conductive part and electrically conductive.

[0009] In some embodiments, the second hole is provided with a plurality of second holes, and the plurality of second holes are distributed at intervals.

[0010] In some embodiments, the thickness of the first circuit layer is greater than the thickness of the circuit part.

[0011] In some embodiments, an inner portion of the sub-board is provided with a heat dissipation base, and the power chip is located on the heat dissipation base.

[0012] In some embodiments, the heat dissipation base is provided with a groove, and the power chip is located in the groove.

[0013] In some embodiments, the depth of the groove is greater than or equal to the thickness of the power chip.

[0014] In some embodiments, the second aspect of the present application provides a manufacturing method of a PCB with a built-in power chip, including:

[0015] The sub-board, the first insulating layer, the first circuit layer, the second insulating layer, and the second circuit layer are sequentially and laminatedly arranged along the first direction and are pressed together, the second insulating layer includes the insulating part and a first removal part, and the second circuit layer includes the circuit part and a second removal part.

[0016] The second removal part and the first removal part are removed, the remaining second circuit layer is the circuit part, and the remaining second insulating layer is the insulating part.

[0017] In some embodiments, a release film is arranged between the first removal part and the second part.

[0018] In some embodiments, before the sub-board, the first insulating layer, the first circuit layer, the second insulating layer, and the second circuit layer are sequentially and laminatedly arranged along the first direction and are pressed together, the insulating part and the first removal part are separated.

[0019] In some embodiments, the second removal portion and the first removal portion are removed by etching, mechanical controlled depth milling or laser controlled depth ablation.

[0020] In some embodiments, the first insulating layer is provided with a first hole and a second hole, the inside of the first hole is provided with a first conductive portion, the inside of the second hole is provided with a second conductive portion, the first portion and the first pad are both connected to the first conductive portion and electrically conductive, and the second portion and the second pad are both connected to the second conductive portion and electrically conductive; after the sub-plate, the first insulating layer, the first circuit layer, the second insulating layer and the second circuit layer are sequentially and laminatedly arranged along the first direction and are pressed together, the manufacturing method of the PCB with the built-in power chip further comprises:

[0021] A connecting hole is processed on the insulating portion and the circuit portion, the connecting hole comprises a third hole formed in the insulating portion and a fourth hole formed in the circuit portion;

[0022] A connecting conductive portion is arranged in the inside of the third hole and the fourth hole, the connecting conductive portion comprises a third conductive portion in the inside of the third hole and a fourth conductive portion in the inside of the fourth hole, and the circuit portion and the first portion are both connected to the third conductive portion and electrically conductive.

[0023] The PCB with the built-in power chip provided by the embodiments has the beneficial effects that: the PCB with the built-in power chip comprises a sub-plate, a first insulating layer, a first circuit layer, an insulating portion and a circuit portion which are sequentially and laminatedly arranged along a first direction, the sub-plate is provided with a power chip on the side facing the first insulating layer, the power chip has a first pad and a second pad, the first circuit layer comprises a first portion and a second portion, the first portion is electrically conductive with the first pad, and the first portion is electrically conductive with the circuit portion, one end of the second portion is arranged in a spaced manner with the first portion, the other end of the second portion protrudes from the insulating portion along a second direction and protrudes from the circuit portion along the second direction, the second portion is electrically conductive with the second pad, and the second direction is perpendicular to the first direction, so that the end of the second portion away from the first portion can be directly exposed and used as a power network circuit for excessive current, and a large number of blind holes do not need to be arranged on the insulating portion between the first circuit layer and the circuit portion and filled, thereby reducing the filling frequency and reducing the production cost.

[0024] The manufacturing method of the PCB with the built-in power chip provided by the embodiments has the beneficial effects compared with the prior art, which can be referred to the beneficial effects of the PCB with the built-in power chip provided by the embodiments compared with the prior art, which will not be repeated here. BRIEF DESCRIPTION OF DRAWINGS

[0025] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the embodiments or prior art description will be briefly introduced. Obviously, the drawings in the following description only constitute some embodiments of the present application, and other drawings can be obtained by those skilled in the art without any creative effort.

[0026] Figure 1 is a structural schematic diagram of a PCB with a built-in power chip in the prior art;

[0027] Figure 2 is a sectional view of the PCB with a built-in power chip in the prior art;

[0028] Figure 3 is a flow chart of a manufacturing method of the PCB with a built-in power chip in one of the embodiments of the present application;

[0029] Figure 4 is a sectional view of a sub-board, a first insulating layer, a first circuit layer, a second insulating layer and a second circuit layer in one of the embodiments of the present application;

[0030] Figure 5 is a schematic diagram of removing a second removal part of the second circuit layer shown in Figure 4 ;

[0031] Figure 6 is a schematic diagram of removing a first removal part of the second insulating layer shown in Figure 4 ;

[0032] Figure 7 is a schematic diagram after removing the first removal part of the second insulating layer shown in Figure 4 ;

[0033] Figure 8 is a structural schematic diagram of a sub-board, a first insulating layer, a first circuit layer, an insulating part and a circuit part in one of the embodiments of the present application;

[0034] Figure 9 is a structural schematic diagram of a layout including a plurality of second insulating layers in one of the embodiments of the present application.

[0035] The meanings of the marks in the drawings are as follows:

[0036] 1, PCB; 2, power chip; 3, copper foil; 4, power network circuit; 5, control network circuit;

[0037] 10, sub-board;

[0038] 101, first core board; 102, connecting layer; 103, second core board; 11, power chip; 12, heat dissipation base;

[0039] 20, first insulating layer;

[0040] 21, first conductive part; 22, second conductive part;

[0041] 30, first circuit layer;

[0042] 31, first part; 32, second part;

[0043] 40, second insulating layer;

[0044] 401, third hole; 402, separation groove; 403, process edge; 41, insulating part; 42, first removing part; 43, third conductive part;

[0045] 50, second circuit layer;

[0046] 501, fourth hole; 51, circuit part; 52, second removing part; 53, fourth conductive part;

[0047] 60, solder resist ink. DETAILED DESCRIPTION

[0048] In order to make the objects, technical solutions and advantages of the present application clearer, the present application will be further described in detail below with reference to the drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and should not be used to limit the present application.

[0049] It should be noted that when an element is referred to as being "fixed to" or "set on" another element, it can be directly on the other element or indirectly on the other element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or indirectly connected to the other element.

[0050] In addition, the terms "first", "second" are only used for descriptive purposes and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined with "first", "second" can explicitly or implicitly include one or more of the features. In the description of the present application, the meaning of "a plurality of" is two or more, unless otherwise specifically limited.

[0051] Reference to“one embodiment”,“some embodiments” or“an embodiment” in the present application description means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the application. The appearances of the phrases“in one embodiment”,“in some embodiments”,“in other embodiments”,“in additional embodiments” and so on in various places in the specification are not necessarily all referring to the same embodiment, but can refer to one or more but not all embodiments, unless otherwise specified. Furthermore, the particular features, structures, or characteristics can be combined in any suitable manner in one or more embodiments.

[0052] In order to illustrate the technical solutions of the present application, the following will be described in combination with specific drawings and embodiments.

[0053] With the development of technology, various types of electric vehicle drives are developing towards high voltage, high conversion power and high efficiency, etc. The traditional power chip packaging method has a large volume and cannot meet the requirement of device miniaturization. The embedded power chip technology integrates the power chip into the multi-layer structure of the PCB with built-in power chip, effectively reducing the size of the power module and saving space.

[0054] Among them, the embedded power chip technology can improve the system performance. The embedded power chip technology can shorten the current loop, reduce the interconnection resistance and parasitic inductance, which helps to reduce the conduction and switching loss, and improve the system level efficiency. For high-frequency and high-power electronic devices such as communication base stations and servers, reducing parasitic parameters can effectively reduce electromagnetic interference (EMI) and improve the stability and reliability of signal transmission.

[0055] Wide bandgap power semiconductor devices represented by silicon carbide (SiC) and gallium nitride (GaN) have superior performance such as high voltage resistance, high frequency and high efficiency, but the high frequency and high temperature characteristics of these new devices put higher requirements on packaging. The traditional packaging structure cannot meet the requirements of heat dissipation and electrical performance, while the embedded power chip technology uses thick copper substrate and optimized heat dissipation design to effectively solve the heat dissipation problem, and its low parasitic inductance characteristics can also better play the performance of wide bandgap devices.

[0056] Compared with the traditional packaging form, the embedded power chip technology can improve the current carrying capacity of the unit semiconductor, reduce the amount of semiconductor used, and is expected to reduce the material cost of the power module. At the same time, the embedded power chip technology simplifies the manufacturing process, reduces the use of packaging materials and processes, and further reduces the production cost.

[0057] The embedded power chip technology embeds the power chip into the PCB with the embedded power chip, so that the power chip is less affected by the external environment, and can effectively prevent the power chip from being damaged by mechanical impact, moisture, dust and other factors. Moreover, through reasonable design and process, the connection strength and stability between the power chip and the PCB with the embedded power chip can be improved, so as to improve the reliability and service life of the whole power module.

[0058] Please refer to Figure 1 and Figure 2 The current embedded chip process on the PCB1 with the embedded power chip is mainly designed to laminate a layer of copper foil 3 on the power chip 2, and the functional pins of the power chip 2 are led out. Since the single-layer copper foil 3 cannot consider both current carrying and sufficient space for placing control circuit, it is necessary to lead the electrodes to the edge of the board through the current carrying of the current layer of copper foil 3, and then increase the layer, connect the current layer with the top layer through the blind hole, and form the power network circuit 4 on the top layer. The power network circuit 4 has a large current connected, which requires a large current carrying capacity. Since the current carrying pad is led to the edge of the board, there is sufficient space in the middle to place the control circuit as the control network circuit 5. The power network circuit 4 and the control network circuit 5 are connected with the top layer circuit through the way of blind hole copper filling to the top layer. All pads are connected from the power chip 2 layer to the top layer. In the prior art, in order to make the power network circuit 4 better transmit heat, multiple blind holes are designed to connect the circuit, which increases the length of the power network circuit 4, resulting in increased resistance. Moreover, all the copper layers connected with the power network circuit 4 need to use thick copper design (such as >3oz) to increase the current carrying capacity of the power network.

[0059] In the related art, since the copper foil 3 connected with the power chip 2 has a large current requirement, the thickness of each layer of copper foil 3 is required (usually >3oz is required), and the blind hole needs to be filled to ensure sufficient current carrying capacity. Therefore, filling hole is needed every time the power chip 2 is increased. It needs to occupy a lot of filling hole production capacity. At the same time, in order to ensure the heat dissipation capacity of the bottom layer of the power chip 2, single-sided layer increasing is usually performed, which will cause the PCB1 structure to be asymmetric, causing the board surface to warp, and further affecting the product mounting and heat dissipation.

[0060] In view of this, the application provides a PCB with a built-in power chip and a manufacturing method thereof. The PCB with the built-in power chip comprises a sub-board, a first insulating layer, a first circuit layer, an insulating part and a circuit part arranged in sequence and in layers along a first direction. The sub-board is provided with a power chip on a side facing the first insulating layer. The power chip has a first pad and a second pad. The first circuit layer comprises a first part and a second part. The first part is in electrical conduction with the first pad, and the first part is in electrical conduction with the circuit part. One end of the second part is arranged in a spaced manner with the first part. The other end of the second part protrudes from the insulating part along a second direction and protrudes from the circuit part along the second direction. The second part is in electrical conduction with the second pad. The second direction is perpendicular to the first direction. Therefore, the one end of the second part away from the first part can be directly exposed and used as a power network circuit for excessive current. A large number of blind holes do not need to be arranged on the insulating part between the first circuit layer and the circuit part, and hole filling is not needed. Therefore, the number of hole filling times can be reduced, and the production cost can be reduced.

[0061] Please refer to Figures 3 to 8 In a first aspect, the application provides a PCB with a built-in power chip. The PCB comprises a sub-board 10, a first insulating layer 20, a first circuit layer 30, an insulating part 41 and a circuit part 51 arranged in sequence and in layers along a first direction. The sub-board 10 is provided with a power chip 11 on a side facing the first insulating layer 20. The power chip 11 has a first pad and a second pad.

[0062] The sub-board 10 can be provided with one or more circuit layers.

[0063] The material of the first insulating layer 20 and the material of the insulating part 41 can be PP (Prepreg, semi-cured sheet) or other materials. The material of the first circuit layer 30 and the material of the circuit part 51 can be copper, silver or aluminum. The first direction can be the direction indicated by the arrow M in the figure.

[0064] The first circuit layer 30 comprises a first part 31 and a second part 32. The first part 31 is in electrical conduction with the first pad, and the first part 31 is in electrical conduction with the circuit part 51. One end of the second part 32 is arranged in a spaced manner with the first part 31. The other end of the second part 32 protrudes from the insulating part 41 along a second direction and protrudes from the circuit part 51 along the second direction. The second part 32 is in electrical conduction with the second pad. The second direction is perpendicular to the first direction.

[0065] The second part 32 can be provided with one or more, and the second direction can be the direction indicated by the arrow N in the figure or other directions.

[0066] The circuit part 51 can be used as a control network (control layer) and does not need excessive current. The thickness thereof is generally small.

[0067] The second part 32 can be directly used as a power network line (current-carrying layer) at one end away from the first part 31. The power network line has a short path length, and the resistance does not increase because it needs to pass a large current. The thickness of the power network line is generally large, and thick copper design (such as > 3 oz) can be selected to increase the current-carrying capacity of the power network line. Other circuit layers (such as the circuit part 51) can not use thick copper design (such as 0.5 oz). Such design can not only reduce the high cost of thick copper investment, but also facilitate fine circuit design and improve circuit layout density to miniaturize the product.

[0068] The PCB with the built-in power chip provided in the embodiments of the present application includes the sub-board 10, the first insulating layer 20, the first circuit layer 30, the insulating part 41, and the circuit part 51 arranged in sequence and stacked along the first direction. The sub-board 10 is provided with the power chip 11 on the side facing the first insulating layer 20. The power chip 11 has the first pad and the second pad. The first circuit layer 30 includes the first part 31 and the second part 32. The first part 31 is in electrical conduction with the first pad, and the first part 31 is in electrical conduction with the circuit part 51. One end of the second part 32 is spaced apart from the first part 31. The other end of the second part 32 protrudes from the insulating part 41 along the second direction and protrudes from the circuit part 51 along the second direction. The second part 32 is in electrical conduction with the second pad. The second direction is perpendicular to the first direction. Therefore, the one end of the second part 32 away from the first part 31 can be directly exposed and used as a power network line for a large current. It is not necessary to set a large number of blind holes on the insulating part 41 between the first circuit layer 30 and the circuit part 51 and fill the holes. Therefore, the number of drilling and filling holes can be reduced, and the production cost can be reduced.

[0069] The PCB with the built-in power chip provided in the embodiments of the present application forms a stepped structure. Through the separation of the current-carrying layer and the control layer, the PCB path resistance of the built-in large power chip 11 can be reduced, the product energy efficiency can be improved, the heat transfer medium can be reduced, the product heat dissipation effect can be improved, the filling hole frequency can be reduced, the production cost can be reduced, the influence of the asymmetric structure on the product warping can be reduced, and the strong and weak electric networks can be separated. Therefore, the product has higher reliability.

[0070] Optionally, the thickness of the first circuit layer 30 is greater than the thickness of the circuit part 51.

[0071] In this way, the requirement of the first circuit layer 30 for a large current can be met, and the material of the circuit part 51 can be saved.

[0072] It can be understood that the thickness of the first part 31 and the thickness of the second part 32 are both greater than the thickness of the circuit part 51.

[0073] The sub-board 10 includes a first core plate 101, a connecting layer 102 and a second core plate 103 which are stacked, and the material of the connecting layer 102 can be PP. The first core plate 101 and the second core plate 103 can be optical core plates, or double-sided or single-sided core plates with circuit design, which are not specifically limited here.

[0074] As an implementation manner, the first insulating layer 20 is provided with a first hole and a second hole, the first hole is internally provided with a first conductive part 21, the second hole is internally provided with a second conductive part 22, the first part 31 and the first pad are both connected with the first conductive part 21 and electrically conductive, and the second part 32 and the second pad are both connected with the second conductive part 22 and electrically conductive.

[0075] By adopting the above scheme, the first part 31 and the first pad can be electrically conductive, and the second part 32 and the second pad can be electrically conductive.

[0076] It should be noted that the material of the first conductive part 21 and the material of the second conductive part 22 can be copper, silver or aluminum, etc.

[0077] Optionally, the insulating part 41 is provided with a third hole 401, the third hole 401 is internally provided with a third conductive part 43, and the circuit part 51 and the first part 31 are both connected with the third conductive part 43 and electrically conductive.

[0078] In this way, the first part 31 and the circuit part 51 can be electrically conductive.

[0079] Optionally, a plurality of second holes are provided, and the plurality of second holes are distributed at intervals.

[0080] In this way, the second part 32 and the second pad can be electrically conductive through the corresponding plurality of second conductive parts 22 in the plurality of second holes, and the requirement of large current can be met.

[0081] It can be understood that the second conductive part 22 is arranged in each second hole.

[0082] Optionally, the inside of the sub-board 10 is provided with a heat dissipation base 12, and the power chip 11 is located on the heat dissipation base 12.

[0083] In this way, the power chip 11 can be fixed through the heat dissipation base 12, and the heat generated by the power chip 11 can be dissipated through the heat dissipation base 12.

[0084] Please refer to Figures 3 to 8 , in a second aspect, the embodiment of the application provides a manufacturing method of the PCB with the built-in power chip as in the first aspect, comprising:

[0085] S100: sequentially and laminating the sub-plate 10, the first insulating layer 20, the first circuit layer 30, the second insulating layer 40 and the second circuit layer 50 along the first direction, and press together, the second insulating layer 40 includes the insulating part 41 and the first removal part 42, the second circuit layer 50 includes the circuit part 51 and the second removal part 52.

[0086] Specifically, the insulating part 41 and the circuit part 51 are correspondingly arranged, and the first removal part 42 and the second removal part 52 are correspondingly arranged. The sub-plate 10, the first insulating layer 20, the first circuit layer 30, the second insulating layer 40 and the second circuit layer 50 can be fixed by riveting.

[0087] The sub-plate 10, the first insulating layer 20, the first circuit layer 30, the second insulating layer 40 and the second circuit layer 50 are sequentially and laminated along the first direction, and press together to obtain the substrate.

[0088] S200: removing the second removal part 52 and the first removal part 42, the remaining second circuit layer 50 is the circuit part 51, and the remaining second insulating layer 40 is the insulating part 41.

[0089] Specifically, the second removal part 52 and the first removal part 42 can be removed by etching, mechanical depth control or laser depth control ablation. The second removal part 52 and the first removal part 42 can be removed together, or the second removal part 52 is removed first, and then the first removal part 42 is removed.

[0090] For example, the second removal part 52 can be removed by pasting film, exposure, development and etching. The first removal part 42 can be removed by mechanical depth control or laser depth control ablation, and the uncovering operation is completed. Since the second removal part 52 has been removed, the uncovering efficiency can be improved.

[0091] It should be noted that when the second removal part 52 is removed, the first core plate 101 can be removed away from the outer copper foil of the second core plate 103, so that the first core plate 101 forms a light plate. After removing the second removal part 52, AOI (Automated Optical Inspection) detection can be completed by a conventional method, and anti-soldering / character can be completed by a conventional method. When anti-soldering, the second removal part 52 can be windowed, that is, no anti-soldering ink 60 is applied.

[0092] The manufacturing method of the PCB with the built-in power chip provided in the embodiments of the present application can directly expose the end of the second part 32 away from the first part 31 and use it as a power network circuit for excessive current, without the need to set a large number of blind holes on the insulating part 41 between the first circuit layer 30 and the circuit part 51 and fill the holes, thereby reducing the number of hole filling and lowering the production cost.

[0093] The manufacturing method of the PCB with the built-in power chip provided in the embodiments of the present application exposes the second part 32 (power chip 11 conduction) of the first circuit layer 30 in the inner layer by uncovering, so that the power network circuit is routed from the inner layer, the power network circuit does not need to be electroplated and filled in the insulating part 41 of the outer layer and the circuit part 51 of the secondary outer layer, the product energy efficiency is improved, the product heat dissipation effect is improved, the number of drilling and filling holes is reduced, and the production cost is lowered.

[0094] It can be understood that in the manufacturing method of the PCB with the built-in power chip provided in the embodiments of the present application, the end of the second part 32 away from the first part 31 is exposed by uncovering, which increases the creepage distance due to the existence of the board surface difference, reduces the interference between circuits, improves the product reliability, and avoids the power network from being conducted to the outer layer through multiple blind holes, thereby avoiding the increase of thermal resistance and improving the heat dissipation effect of the PCB with the built-in power chip, and reducing the number of electroplated and filled holes corresponding to the outer layer control network circuit and the outer layer copper thickness, thereby effectively reducing the production cost.

[0095] Optionally, after the first removal part 42 is removed, the molding can be completed by a conventional method, and quality inspection can be completed by a conventional method until packaging and delivery.

[0096] Optionally, a release film is arranged between the first removal part 42 and the second part 32.

[0097] In this way, the first removal part 42 can be easily removed.

[0098] It can be understood that the release film can be attached to the first removal part 42 or attached to the second part 32.

[0099] Reference should also be made to Figure 9 In some embodiments, the sub-plate 10, the first insulating layer 20, the first circuit layer 30, the second insulating layer 40 and the second circuit layer 50 are sequentially and laminatedly arranged along the first direction, and before being pressed together, the insulating part 41 and the first removal part 42 are separated.

[0100] By adopting the above scheme, the second insulating layer 40 can be divided into the insulating part 41 and the first removal part 42, thereby avoiding the problem of warping of the substrate after pressing.

[0101] It should be noted that the part where the insulating part 41 and the first removal part 42 are connected is a cover line, and the second insulating layer 40 can be cut along the cover line. When the second insulating layer 40 is PP, the glass fiber on the cover line is in a broken state.

[0102] It can be understood that when the first removal part 42 is removed by mechanical depth-controlled milling or laser depth-controlled burning, since the cover line has been pre-cut before pressing, if the first removal part 42 is removed by mechanical depth-controlled milling, the depth-controlled milling only needs to mill the resin of the second insulating layer 40, and there is no problem of the milling cutter pulling the glass fiber. If the first removal part 42 is removed by laser depth-controlled burning, the laser only needs to ablate the resin of the second insulating layer 40, and does not need to ablate the glass fiber, thereby improving the efficiency of laser ablation.

[0103] Optionally, a plurality of sub-plates 10, first insulating layers 20, first circuit layers 30, second insulating layers 40 and second circuit layers 50 can be provided, and the sub-plates 10, the first insulating layers 20, the first circuit layers 30, the second insulating layers 40 and the second circuit layers 50 are provided in one-to-one correspondence. The plurality of second insulating layers 40 are combined into a panel, the edge of the panel is provided with a process edge 403, and the insulating part 41 and the first removal part 42 corresponding to each insulating layer are separated by a separation groove 402. The plurality of second insulating layers 40 of the panel are changed from one whole into a plurality of small units, and the insulating part 41 and the first removal part 42 corresponding to each insulating layer are connected by the process edge 403.

[0104] In this way, each second insulating layer 40 can be divided into the insulating part 41 and the first removal part 42, thereby avoiding the problem of warping of the substrate after pressing, and a plurality of second insulating layers 40 can be simultaneously aligned and pressed, which is simple and convenient to operate.

[0105] It should be noted that the sub-plate 10 has completed a compression once, and the sub-plate 10, the first insulating layer 20, the first circuit layer 30, the second insulating layer 40 and the second circuit layer 50 are sequentially and laminatedly arranged along the first direction and compressed together, and the sub-plate 10 is in a solidification state at this time, at this time only the second insulating layer 40 will shrink, and the shrinkage of the whole composed of the plurality of second insulating layers 40 when the large panel is compressed will cause the whole panel to warp. After the insulating part 41 and the first removal part 42 are separated, not only the warping problem can be solved, but also the problem of glass fiber pulling during uncovering can be solved while improving the uncovering efficiency.

[0106] Please refer to Figures 3 to 8 In some embodiments, the first insulating layer 20 is provided with a first hole and a second hole, the inside of the first hole is provided with a first conductive part 21, the inside of the second hole is provided with a second conductive part 22, the first part 31 and the first pad are connected with the first conductive part 21 and electrically conductive, and the second part 32 and the second pad are connected with the second conductive part 22 and electrically conductive.

[0107] After the sub-plate 10, the first insulating layer 20, the first circuit layer 30, the second insulating layer 40 and the second circuit layer 50 are sequentially and laminatedly arranged along the first direction and compressed together, the method for manufacturing the PCB with the built-in power chip further comprises:

[0108] First, connection holes are processed on the insulating part 41 and the circuit part 51, the connection holes include a third hole 401 formed on the insulating part 41 and a fourth hole 501 formed on the circuit part 51.

[0109] Specifically, the connection holes can be processed on the insulating part 41 and the circuit part 51 by mechanical drilling. At this time, the blind hole corresponding to the power network circuit does not need to be drilled.

[0110] Secondly, a connection conductive part is arranged in the inside of the third hole 401 and the fourth hole 501, the connection conductive part includes a third conductive part 43 located in the inside of the third hole 401 and a fourth conductive part 53 located in the inside of the fourth hole 501, and the circuit part 51 and the first part 31 are connected with the third conductive part 43 and electrically conductive.

[0111] Specifically, the connection conductive part can be arranged in the inside of the third hole 401 and the fourth hole 501 by copper plating.

[0112] By adopting the above scheme, the third hole 401 and the third conductive part 43 can be conveniently manufactured, and the circuit part 51 and the first part 31 are electrically conductive.

[0113] It can be understood that the fourth conductive part 53 in the inside of the fourth hole 501 can be part of the circuit part 51.

[0114] In some embodiments, the method for manufacturing the PCB with the built-in power chip further comprises:

[0115] First, the first core plate 101, the connecting layer 102, the second core plate 103, the first insulating layer 20, and the first circuit layer 30 are cut according to the designed size of the board.

[0116] Second, the copper layer on both sides of the first core plate 101 is etched to form a light core plate (the copper layer on both sides is removed by etching), and the copper layer on the side of the second core plate 103 away from the first core plate 101 is fully exposed by means of film pasting, exposure, and development, and the other side is etched to form a light plate, that is, only the copper layer on the side facing the first core plate 101 is etched, and the sides of the first core plate 101 and the side of the second core plate 103 facing the first core plate 101 are designed to have a circuit or not to be etched to form a light plate. The circuit layer is completed by means of film pasting, exposure, development, etching, and film stripping according to the circuit design.

[0117] Third, the first core plate 101, the connecting layer 102, and the second core plate 103 are cut to have a window shape consistent with the shape of the heat dissipation base 12 by means of punching or stamping, and the window is 0.15-0.2 mm larger than the overall shape of the heat dissipation base 12 to provide space for placing the heat dissipation base 12 and the power chip 11. The sum of the thicknesses of the first core plate 101, the connecting layer 102, and the second core plate 103 is the same as the thickness of the heat dissipation base.

[0118] The heat dissipation base 12 is provided with a groove for placing the power chip 11, and the power chip 11 is located in the groove, so that the power chip can be limited by the groove. The depth of the groove is greater than or equal to the thickness of the power chip 11, so that the power chip 11 can be prevented from being damaged during pressing.

[0119] Then, the first core plate 101, the connecting layer 102, the second core plate 103, the first insulating layer 20, the first circuit layer 30, the heat dissipation base 12, and the power chip 11 are stacked and pressed in sequence. A high-temperature resistant protective film is pasted on the side of the first core plate 101 away from the second core plate 103 to provide positioning for the heat dissipation base 12 and the power chip 11, and to prevent the heat dissipation base 12 and the power chip 11 from falling off.

[0120] Then, the first hole and the second hole are made in a conventional manner. If the second core plate 103 has a circuit design, blind holes can also be drilled from the first circuit layer 30 to the side of the second core plate 103 away from the first core plate 101.

[0121] Next, the first hole and the second hole are copperized and then copper-plated in a conventional copperizing and plating manner to obtain the first conductive part 21 and the second conductive part 22, so that the first part 31 is electrically connected to the first pad (control network), and the second part 32 is electrically connected to the second pad (power network).

[0122] Then, the inner layer circuit corresponding to the first circuit layer 30 is manufactured by means of pasting film, exposure, development and etching. In this step, the inner layer circuit corresponding to the control network circuit and the power network circuit are manufactured at the same time, and the power network circuit is led to the edge of the board, so that there is more space for the layout of the control network circuit in the unit.

[0123] Finally, the second insulating layer 40 and the second circuit layer 50 are opened according to the size of the product panel. After the second insulating layer 40 is opened, the cover line of the PP needs to be cut off, as shown in Figure 9 After the cover line is cut off, the second insulating layer 40 composed of a plurality of second insulating layers 40 becomes a plurality of small units with a separation groove 402.

[0124] The above examples are only used to illustrate the technical solutions of the present application, but not to limit it; although the present application has been described in detail with reference to the foregoing examples, those skilled in the art should understand that they can still modify the technical solutions recorded in the foregoing examples, or make equivalent replacement for part of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application, and should be included in the protection scope of the present application.

Claims

1. A PCB with built-in power chips, characterized by, The sub-board, the first insulating layer, the first circuit layer, the insulating part and the circuit part are sequentially and laminatedly arranged along the first direction, the sub-board is provided with the power chip on one side of the first insulating layer, the power chip has a first pad and a second pad; the first circuit layer comprises a first part and a second part, the first part is in electrical conduction with the first pad, and the first part is in electrical conduction with the circuit part, one end of the second part is arranged at intervals with the first part, the other end of the second part protrudes from the insulating part along the second direction and protrudes from the circuit part along the second direction, the second part is in electrical conduction with the second pad, and the second direction is perpendicular to the first direction; the first insulating layer is provided with a first hole and a second hole, the first hole is internally provided with a first conductive part, the second hole is internally provided with a second conductive part, the first part and the first pad are connected with the first conductive part and are in electrical conduction, and the second part and the second pad are connected with the second conductive part and are in electrical conduction; the insulating part is provided with a third hole, the third hole is internally provided with a third conductive part, and the circuit part and the first part are connected with the third conductive part and are in electrical conduction.

2. The PCB with built-in power chip of claim 1, wherein, The second hole is provided with a plurality of second holes, and the plurality of second holes are distributed at intervals.

3. The PCB with built-in power chip according to claim 1 or 2, characterized in that, The thickness of the first circuit layer is greater than the thickness of the circuit part.

4. The PCB with built-in power chips according to claim 1 or 2, wherein, The inside of the sub-board is provided with a heat dissipation base, and the power chip is located on the heat dissipation base.

5. The PCB with a built-in power chip of claim 4, wherein, The heat dissipation base is provided with a groove, and the power chip is located in the groove.

6. The PCB with a built-in power chip of claim 5, wherein, The depth of the groove is greater than or equal to the thickness of the power chip.

7. A method of manufacturing a PCB with a built-in power chip as claimed in any one of claims 1 to 6, characterized in that, Comprise: The sub-board, the first insulating layer, the first circuit layer, the second insulating layer and the second circuit layer are sequentially and laminatedly arranged along the first direction and are pressed together, the second insulating layer comprises the insulating part and a first removal part, and the second circuit layer comprises the circuit part and a second removal part; The second removal part and the first removal part are removed, the remaining second circuit layer is the circuit part, and the remaining second insulating layer is the insulating part.

8. The method of claim 7, wherein the method further comprises: The first removal part and the second part are provided with a release film.

9. The method of claim 7, wherein the method further comprises: Before the sub-board, the first insulating layer, the first circuit layer, the second insulating layer and the second circuit layer are sequentially and laminatedly arranged along the first direction and are pressed together, the insulating part and the first removal part are separated.

10. The method of claim 7, wherein the method further comprises: The second removal part and the first removal part are removed by etching, mechanical depth control or laser depth control ablation.

11. The method of claim 7, wherein the method further comprises: The first insulating layer is provided with a first hole and a second hole, an inside of the first hole is provided with a first conductive part, an inside of the second hole is provided with a second conductive part, the first part and the first pad are connected with the first conductive part and electrically conductive, the second part and the second pad are connected with the second conductive part and electrically conductive; after the sub-plate, the first insulating layer, the first circuit layer, the second insulating layer and the second circuit layer are sequentially and laminatedly arranged along the first direction and are pressed together, the manufacturing method of the PCB with the built-in power chip further comprises: Processing connecting holes on the insulating part and the circuit part, the connecting holes include a third hole formed on the insulating part and a fourth hole formed on the circuit part; Connecting conductive parts are arranged in the inside of the third hole and the fourth hole, the connecting conductive parts include a third conductive part located in the inside of the third hole and a fourth conductive part located in the inside of the fourth hole, the circuit part and the first part are connected with the third conductive part and electrically conductive.

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