Dipulse experiment platform circuit and press-fitting structure of thyristor enhanced switch

Abstract

The embodiment of the invention discloses a double-pulse experiment platform circuit and a press-fitting structure of a thyristor enhanced switch. The circuit comprises a common diode, a transient voltage suppressor (TVS), an insulated gate bipolar transistor (IGBT) module, a thyristor, a resistor (R1), a resistor (R), a switch (S1), a switch (S), a capacitor (C1), a capacitor (C) and a resonant capacitor (L). The TVS and the capacitor (C) are connected in parallel and are integrated on a printed circuit board (PCB); the capacitor (C1) is connected in parallel with the switch (S) and the resistor (R); the capacitor (C1) is connected in parallel with the common diode and the IGBT; one end of the TVS is connected with one end of the resonant capacitor, the other end of the TVS is connected with the anode of the thyristor, and the capacitor (C1) is connected with the resonant capacitor, the TVS and the thyristor in parallel; and the switch (S1) and the resistor (R1) are connected in parallel with the capacitor (C). According to the embodiment of the invention, the on-off safety of the thyristor enhanced switch can be improved, and the cost of a press-fitting structure is reduced.

Description

Technical Field

[0001] The present disclosure relates to the field of power electronics technology, and in particular to a double-pulse experimental platform circuit and a press-fit structure of a thyristor enhancement switch. Background Art

[0002] Voltage source converters in related technologies generally use insulated gate bipolar transistor modules as core power devices. Due to the thermal capacitance characteristics of semiconductor devices, their instantaneous overload capacity is usually less than twice the rated current.

[0003] In order to meet the current overload requirements of the converter under grid control, the relevant technology proposes a thyristor-enhanced switch for converters with large capacity and high transient current overload capacity. It is necessary to carry out double-pulse experiments to evaluate the performance of the thyristor-enhanced switch. During the construction of the double-pulse experimental platform for the thyristor-enhanced switch, it can be clearly observed that the overshoot and oscillation problems caused by parasitic parameters such as inductance and capacitance can be clearly observed, which may cause damage to the switch module, increase the electromagnetic interference of the platform, and lead to lower switching safety of the switch. Summary of the Invention

[0004] In view of this, the embodiments of the present disclosure provide a dual-pulse experimental platform circuit and a press-mounted structure for a thyristor-enhanced switch, which can optimize the design of the experimental platform circuit and reduce the stray parameters of the experimental platform circuit to avoid electromagnetic interference of the experimental platform circuit. The compactness of the press-mounted structure facilitates saving structural costs, making the dual-pulse experimental results of the thyristor-enhanced switch closer to the compact equipment working conditions of the converter sub-module, making the acquisition of the thyristor-enhanced switch characteristics safer, and controlling the turn-off overvoltage of the thyristor-enhanced switch within the rated voltage value of the device, thereby improving the opening safety of the thyristor-enhanced switch and ensuring the smooth progress of the dual-pulse experiment.

[0005] In a first aspect, an embodiment of the present disclosure provides a double-pulse experimental platform circuit for a thyristor enhancement mode switch, comprising a common diode, a transient voltage suppressor diode (TVS), an insulated gate bipolar transistor module (IGBT), a thyristor, a resistor (R1), a resistor (R), a switch (S1), a switch (S), a capacitor (C1), a capacitor (C), and a resonant capacitor (L);

[0006] The transient voltage suppressor diode (TVS) is connected in parallel with the capacitor (C) and integrated on a printed circuit board (PCB);

[0007] The switch (S) is connected in series with the resistor (R), and the capacitor (C1), the switch (S) and the resistor (R) are connected in parallel;

[0008] The capacitor (C1) is connected in parallel with the common diode and the insulated gate bipolar transistor module (IGBT), the insulated gate bipolar transistor module (IGBT) is connected in series with the common diode, and the insulated gate bipolar transistor module is connected to the anode of the common diode;

[0009] The resonant capacitor (L) is connected in series with the transient voltage suppressor diode (TVS) and the thyristor, one end of the resonant capacitor (L) is connected to one end of the transient voltage suppressor diode (TVS), the other end of the transient voltage suppressor diode (TVS) is connected to the anode of the thyristor, the cathode of the thyristor is grounded, and the capacitor (C1) is connected in parallel with the resonant capacitor (L), the transient voltage suppressor diode (TVS) and the thyristor;

[0010] The switch (S1) and the resistor (R1) are connected in series, and the switch (S1) and the resistor (R1) are connected in parallel with the capacitor (C).

[0011] In a second aspect, an embodiment of the present disclosure provides a press-fit structure for a thyristor enhancement mode switch, wherein the press-fit structure comprises, from top to bottom, a cathode heat sink of a common diode, a cathode of a common diode, an anode of a common diode, a collector heat sink of an insulated gate bipolar transistor module, a collector of an insulated gate bipolar transistor module, an emitter of an insulated gate bipolar transistor module, an emitter heat sink of an insulated gate bipolar transistor module, a cathode of a thyristor, an anode of a thyristor, and an anode heat sink of a thyristor;

[0012] The first busbar connects the cathode of the common diode, the cathode radiator of the common diode and the positive busbar of the capacitor (C1);

[0013] The second busbar connects the emitter of the insulated gate bipolar transistor module, the emitter heat sink of the insulated gate bipolar transistor module and the negative busbar of the capacitor (C1);

[0014] The third busbar connects the collector of the insulated gate bipolar transistor module, the collector heat sink of the insulated gate bipolar transistor module and the positive busbar of the capacitor (C);

[0015] The fourth busbar connects the anode of the thyristor, the anode radiator of the thyristor and the negative busbar of the capacitor (C).

[0016] In some embodiments, the press-fit structure further includes a transient voltage suppressor diode, and the transient voltage suppressor diode and the capacitor (C) are integrated on a printed circuit board.

[0017] In some embodiments, the third busbar and the fourth busbar are respectively connected to two ends of the printed circuit board.

[0018] In some embodiments, the first row of openings on the printed circuit board is fixedly connected to the third busbar via nuts; and the second row of openings on the printed circuit board is fixedly connected to the fourth busbar via nuts.

[0019] In some embodiments, the first busbar and the second busbar are arranged relatively close to each other, and the relative close distance between the first busbar and the second busbar is greater than the minimum insulation distance of the actual charging voltage of the capacitor (C1).

[0020] In some embodiments, the mutual inductance of current between the first busbar and the second busbar is used to offset a portion of stray inductance.

[0021] In some embodiments, the third busbar and the fourth busbar are arranged relatively close to each other, and the relative close distance between the third busbar and the fourth busbar is greater than the minimum insulation distance of the transient voltage suppressor diode for limiting voltage.

[0022] In some embodiments, the current mutual inductance between the third busbar and the fourth busbar is used to offset a portion of the stray inductance.

[0023] In some embodiments, the third busbar has the same structure as the fourth busbar.

[0024] The embodiments of the present disclosure provide a dual-pulse experimental platform circuit and a press-mounted structure for a thyristor-enhanced switch, which can optimize the design of the experimental platform circuit and reduce the stray parameters of the experimental platform circuit to avoid electromagnetic interference of the experimental platform circuit. The compactness of the press-mounted structure facilitates saving structural costs, making the dual-pulse experimental results of the thyristor-enhanced switch closer to the compact equipment working conditions of the converter sub-module, making the acquisition of the thyristor-enhanced switch characteristics safer, and controlling the turn-off overvoltage of the thyristor-enhanced switch within the rated voltage value of the device, thereby improving the opening safety of the thyristor-enhanced switch and ensuring the smooth progress of the dual-pulse experiment.

[0025] The above description is only an overview of the technical solution of the present disclosure. In order to more clearly understand the technical means of the present disclosure, it can be implemented in accordance with the contents of the specification. In order to make the above and other purposes, features and advantages of the present disclosure more obvious and easy to understand, the following specifically cites preferred embodiments and describes them in detail with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the following briefly introduces the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0027] Figure 1 A schematic structural diagram of a double-pulse experimental platform circuit for a thyristor enhancement mode switch provided in an embodiment of the present disclosure;

[0028] Figure 2 A schematic diagram of a press-fit structure of a thyristor enhancement type switch provided in an embodiment of the present disclosure;

[0029] Figure 3 A schematic diagram of the structure of the first busbar and the second busbar provided in an embodiment of the present disclosure;

[0030] Figure 4 A schematic structural diagram of the third busbar and the fourth busbar provided in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0031] The embodiments of the present disclosure are described in detail below with reference to the accompanying drawings.

[0032] It should be clear that the following embodiments of the present disclosure are described through specific concrete examples, and those skilled in the art can easily understand other advantages and effects of the present disclosure from the contents disclosed in this specification. Obviously, the described embodiments are only a part of the embodiments of the present disclosure, rather than all the embodiments. The present disclosure can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present disclosure. It should be noted that the following embodiments and features in the embodiments can be combined with each other in the absence of conflict. Based on the embodiments in the present disclosure, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present disclosure.

[0033] It should be noted that various aspects of the embodiments within the scope of the appended claims are described below. It should be apparent that the aspects described herein can be embodied in a wide variety of forms, and any specific structure and / or function described herein is merely illustrative. Based on this disclosure, it should be understood by those skilled in the art that an aspect described herein can be implemented independently of any other aspect, and two or more of these aspects can be combined in various ways. For example, any number of aspects described herein can be used to implement the device and / or practice the method. In addition, other structures and / or functionalities other than one or more of the aspects described herein can be used to implement this device and / or practice this method.

[0034] It should also be noted that the illustrations provided in the following embodiments are only schematic illustrations of the basic concept of the present disclosure. The illustrations only show components related to the present disclosure and are not drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component can be changed at will, and the component layout type may also be more complicated.

[0035] Additionally, in the following description, specific details are provided to provide a thorough understanding of the examples. However, one skilled in the art will appreciate that the aspects described can be practiced without these specific details.

[0036] like Figure 1 As shown, Figure 1 A schematic structural diagram of a double-pulse experimental platform circuit for a thyristor enhancement switch provided in an embodiment of the present disclosure. The present disclosure provides a double-pulse experimental platform circuit for a thyristor enhancement switch, comprising a common diode, a transient voltage suppressor diode (TVS), an insulated gate bipolar transistor module (IGBT), a thyristor, a resistor (R1), a resistor (R), a switch (S1), a switch (S), a capacitor (C1), a capacitor (C), and a resonant capacitor (L); the transient voltage suppressor diode (TVS) is connected in parallel with the capacitor (C) and integrated on a printed circuit board (PCB); the switch (S) is connected in series with the resistor (R), and the capacitor (C1) is connected in parallel with the switch (S) and the resistor (R); the capacitor (C1) is connected in parallel with the common diode and the insulated gate bipolar transistor module (IGBT), the insulated gate bipolar transistor module (IGBT) is connected in series with the common diode, and the insulated gate bipolar transistor module is connected to the anode of the common diode;

[0037] The resonant capacitor (L) is connected in series with the transient voltage suppressor diode (TVS) and the thyristor, one end of the resonant capacitor (L) is connected to one end of the transient voltage suppressor diode (TVS), the other end of the transient voltage suppressor diode (TVS) is connected to the anode of the thyristor, the cathode of the thyristor is grounded, and the capacitor (C1) is connected in parallel with the resonant capacitor (L), the transient voltage suppressor diode (TVS) and the thyristor;

[0038] The switch (S1) and the resistor (R1) are connected in series, and the switch (S1) and the resistor (R1) are connected in parallel with the capacitor (C).

[0039] The disclosed embodiment optimizes the design of the dual-pulse experimental platform circuit of the thyristor-enhanced switch and reduces the stray parameters of the experimental platform circuit, so that the dual-pulse experimental results of the thyristor-enhanced switch are closer to the compact equipment working conditions of the converter sub-module, making it safer to obtain the characteristics of the thyristor-enhanced switch. When a bus voltage equal to that of the converter sub-module is applied, the turn-off overvoltage of the thyristor-enhanced switch is controlled within the rated voltage value of the device, thereby improving the opening safety of the thyristor-enhanced switch and ensuring the smooth progress of the dual-pulse experiment.

[0040] like Figure 2 As shown, Figure 2 A schematic diagram of a press-fit structure of a thyristor enhancement-mode switch provided in an embodiment of the present disclosure. The present disclosure provides a press-fit structure of a thyristor enhancement-mode switch. The press-fit structure comprises, from top to bottom, a cathode heat sink of a common diode, a cathode of a common diode, an anode of a common diode, a collector heat sink of an insulated gate bipolar transistor module (IGBT), a collector of the IGBT module, an emitter of the IGBT module, an emitter heat sink of the IGBT module, a cathode of the thyristor, an anode of the thyristor, and an anode heat sink of the thyristor.

[0041] The first busbar (i.e. busbar 1) is connected to the cathode of the common diode, the cathode radiator of the common diode and the positive busbar of the capacitor (C1);

[0042] The second busbar (i.e., busbar 2) is connected to the emitter of the insulated gate bipolar transistor module, the emitter heat sink of the insulated gate bipolar transistor module, and the negative busbar of the capacitor (C1);

[0043] The third busbar (i.e., busbar 3) connects the collector of the IGBT module, the collector heat sink of the IGBT module, and the positive busbar of the capacitor (C);

[0044] The fourth busbar (ie busbar 4 ) is connected to the anode of the thyristor, the anode radiator of the thyristor and the negative busbar of the capacitor (C).

[0045] In some embodiments, the press-fit structure further includes a transient voltage suppressor diode (TVS), and the transient voltage suppressor diode (TVS) and the capacitor (C) are integrated on a printed circuit board (PCB).

[0046] It should be noted that the user can integrate the transient voltage suppressor diode (TVS) and the capacitor (C) on a printed circuit board (PCB) according to actual needs, and the embodiment of the present disclosure does not limit this integration method.

[0047] In some embodiments, the third busbar and the fourth busbar are respectively connected to two ends of the printed circuit board.

[0048] In some embodiments, the first row of openings on the printed circuit board is fixedly connected to the third busbar via nuts; and the second row of openings on the printed circuit board is fixedly connected to the fourth busbar via nuts.

[0049] It should be noted that the user can select the size and model of the nuts for fixing the first row of openings and the third busbar according to actual business needs, and the embodiments of the present disclosure do not limit this.

[0050] It should be noted that the user can select the size and model of the nuts for fixing the second row of openings and the fourth busbar according to actual business needs, and the embodiments of the present disclosure do not limit this.

[0051] It should be noted that the user can set the number of holes in the first row of openings and the number of holes in the second row of openings according to actual business needs, and the embodiments of the present disclosure do not limit this.

[0052] like Figure 3 As shown, Figure 3 A schematic structural diagram of the first busbar and the second busbar provided in an embodiment of the present disclosure. In some embodiments, the first busbar (busbar 1) and the second busbar (busbar 2) are arranged relatively close to each other, and the relative close distance between the first busbar and the second busbar is greater than the minimum insulation distance of the actual charging voltage of the capacitor (C1).

[0053] In some embodiments, the mutual inductance of current between the first busbar and the second busbar is used to offset a portion of stray inductance.

[0054] like Figure 4 As shown, Figure 4 A structural schematic diagram of the third busbar and the fourth busbar provided in an embodiment of the present disclosure. In some embodiments, the third busbar (busbar 3) and the fourth busbar (busbar 4) are arranged relatively close to each other, and the relative close distance between the third busbar and the fourth busbar is greater than the minimum insulation distance of the limiting voltage of the transient voltage suppressor diode (TVS).

[0055] In some embodiments, the current mutual inductance between the third busbar and the fourth busbar is used to offset a portion of the stray inductance.

[0056] In some embodiments, the third busbar has the same structure as the fourth busbar.

[0057] The embodiments of the present disclosure provide a dual-pulse experimental platform circuit and a press-mounted structure for a thyristor-enhanced switch, which can optimize the design of the experimental platform circuit and reduce the stray parameters of the experimental platform circuit to avoid electromagnetic interference of the experimental platform circuit. The compactness of the press-mounted structure facilitates saving structural costs, making the dual-pulse experimental results of the thyristor-enhanced switch closer to the compact equipment working conditions of the converter sub-module, making the acquisition of the thyristor-enhanced switch characteristics safer, and controlling the turn-off overvoltage of the thyristor-enhanced switch within the rated voltage value of the device, thereby improving the opening safety of the thyristor-enhanced switch and ensuring the smooth progress of the dual-pulse experiment.

[0058] The basic principles of the present disclosure have been described above in conjunction with specific embodiments. However, it should be noted that the advantages, strengths, and effects mentioned in this disclosure are merely illustrative and not restrictive, and should not be construed as necessarily possessed by each embodiment of the present disclosure. Furthermore, the specific details disclosed above are provided for illustrative purposes and to facilitate understanding, rather than as limitations. These details do not limit the present disclosure to necessarily being implemented using these specific details.

[0059] In the present disclosure, relational terms such as first and second, etc. are merely used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply that there is any such actual relationship or order between these entities or operations. The block diagrams of the devices, devices, equipment, and systems involved in the present disclosure are merely illustrative examples and are not intended to require or imply that they must be connected, arranged, or configured in the manner shown in the block diagrams. As will be appreciated by those skilled in the art, these devices, devices, equipment, and systems can be connected, arranged, or configured in any manner. Words such as "including," "comprising," "having," and the like are open-ended words, meaning "including but not limited to," and can be used interchangeably therewith. The words "or" and "and" used herein refer to the words "and / or" and can be used interchangeably therewith, unless the context clearly indicates otherwise. The word "such as" used herein refers to the phrase "such as but not limited to," and can be used interchangeably therewith.

[0060] Additionally, as used herein, "or" used in a list of items beginning with "at least one" indicates a separate list, so that, for example, a list of "at least one of A, B, or C" means A or B or C, or AB or AC or BC, or ABC (i.e., A and B and C). Furthermore, the word "exemplary" does not mean that the example described is preferred or better than other examples.

[0061] It should also be noted that in the system and method of the present disclosure, each component or each step can be decomposed and / or recombined. Such decomposition and / or recombination should be regarded as equivalent solutions of the present disclosure.

[0062] Various changes, substitutions, and modifications may be made to the technology described herein without departing from the teachings defined by the appended claims. Moreover, the scope of the claims of this disclosure is not limited to the specific aspects of the processes, machines, manufactures, compositions of things, means, methods, and actions described above. Currently existing or later developed processes, machines, manufactures, compositions of things, means, methods, or actions that perform substantially the same function or achieve substantially the same results as the corresponding aspects described herein may be utilized. Accordingly, the appended claims include within their scope such processes, machines, manufactures, compositions of things, means, methods, or actions.

[0063] The above description of the disclosed aspects is provided to enable any person skilled in the art to make or use the present disclosure. Various modifications to these aspects will be readily apparent to those skilled in the art, and the general principles defined herein may be applied to other aspects without departing from the scope of the present disclosure. Therefore, the present disclosure is not intended to be limited to the aspects shown herein, but rather to be accorded the widest scope consistent with the principles and novel features disclosed herein.

[0064] The above description has been provided for the purpose of illustration and description. In addition, this description is not intended to limit the embodiments of the present disclosure to the forms disclosed herein. Although a number of example aspects and embodiments have been discussed above, those skilled in the art will recognize certain variations, modifications, alterations, additions, and sub-combinations thereof.

Claims

1. A double pulse experimental platform circuit for thyristor enhancement mode switch, characterized in that: Including ordinary diodes, transient voltage suppression diodes (TVS), insulated gate bipolar transistor modules (IGBT), thyristors, resistors (R1), resistors (R), switches (S1), switches (S), capacitors (C1), capacitors (C) and resonant capacitors (L); The transient voltage suppressor diode (TVS) is connected in parallel with the capacitor (C) and integrated on a printed circuit board (PCB); The switch (S) is connected in series with the resistor (R), and the capacitor (C1), the switch (S) and the resistor (R) are connected in parallel; The capacitor (C1) is connected in parallel with the common diode and the insulated gate bipolar transistor module (IGBT), the insulated gate bipolar transistor module (IGBT) is connected in series with the common diode, and the insulated gate bipolar transistor module is connected to the anode of the common diode; The resonant capacitor (L) is connected in series with the transient voltage suppressor diode (TVS) and the thyristor, one end of the resonant capacitor (L) is connected to one end of the transient voltage suppressor diode (TVS), the other end of the transient voltage suppressor diode (TVS) is connected to the anode of the thyristor, the cathode of the thyristor is grounded, and the capacitor (C1) is connected in parallel with the resonant capacitor (L), the transient voltage suppressor diode (TVS) and the thyristor; The switch (S1) and the resistor (R1) are connected in series, and the switch (S1) and the resistor (R1) are connected in parallel with the capacitor (C).

2. A press-fit structure of a thyristor enhancement type switch, characterized in that: The press-fit structure comprises, from top to bottom, a cathode heat sink of a common diode, a cathode of a common diode, an anode of a common diode, a collector heat sink of an insulated gate bipolar transistor module, a collector of an insulated gate bipolar transistor module, an emitter of an insulated gate bipolar transistor module, an emitter heat sink of an insulated gate bipolar transistor module, a cathode of a thyristor, an anode of a thyristor and an anode heat sink of a thyristor; The first busbar connects the cathode of the common diode, the cathode radiator of the common diode and the positive busbar of the capacitor (C1); The second busbar connects the emitter of the insulated gate bipolar transistor module, the emitter heat sink of the insulated gate bipolar transistor module and the negative busbar of the capacitor (C1); The third busbar connects the collector of the insulated gate bipolar transistor module, the collector heat sink of the insulated gate bipolar transistor module and the positive busbar of the capacitor (C); The fourth busbar connects the anode of the thyristor, the anode radiator of the thyristor and the negative busbar of the capacitor (C).

3. The press-fit structure of the thyristor enhancement type switch according to claim 2, characterized in that: The press-fit structure further includes a transient voltage suppression diode, and the transient voltage suppression diode and the capacitor (C) are integrated on a printed circuit board.

4. The press-fit structure of the thyristor enhancement type switch according to claim 3, characterized in that: The third busbar and the fourth busbar are respectively connected to two ends of the printed circuit board.

5. The press-fit structure of the thyristor enhancement type switch according to claim 4, characterized in that: The first row of openings on the printed circuit board is fixedly connected to the third busbar via nuts; and the second row of openings on the printed circuit board is fixedly connected to the fourth busbar via nuts.

6. The press-fit structure of the thyristor enhancement type switch according to claim 2, characterized in that: The first busbar and the second busbar are arranged relatively close to each other, and the relative close distance between the first busbar and the second busbar is greater than the minimum insulation distance of the actual charging voltage of the capacitor (C1).

7. The press-fit structure of the thyristor enhancement type switch according to claim 6, characterized in that: The mutual inductance of current between the first busbar and the second busbar is used to offset a portion of stray inductance.

8. The press-fit structure of the thyristor enhancement type switch according to claim 3, characterized in that: The third busbar and the fourth busbar are arranged relatively close to each other, and the relative close distance between the third busbar and the fourth busbar is greater than the minimum insulation distance of the limiting voltage of the transient voltage suppressor diode.

9. The press-fit structure of the thyristor enhancement mode switch according to claim 8, characterized in that: The mutual current inductance between the third busbar and the fourth busbar is used to offset a portion of the stray inductance.

10. The press-fit structure of the thyristor enhancement mode switch according to claim 2, characterized in that: The third busbar has the same structure as the fourth busbar.

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