Zero-crossing commutation control method, electronic equipment and storage medium

By adopting a multi-segment linear open-loop pulse discharge strategy in the totem PFC circuit, the current stress and noise problems of the synchronous rectifier tube when the voltage polarity changes are solved, and a smoother discharge process and lower EMI interference is achieved.

CN120454516APending Publication Date: 2025-08-08HYNETEK SEMICON CO LTD
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Patent Information

Application Number
CN202510590067.3
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-05-08
Publication Date
2025-08-08

AI Technical Summary

Technical Problem

In the traditional totem PFC zero-crossing commutation control strategy, the equivalent parallel capacitor of the synchronous rectifier tube cannot be fully discharged when the voltage polarity changes, resulting in high current stress, noise and EMI problems.

Method used

The multi-segment linear open-loop pulse discharge strategy is adopted. By detecting the polarity of the input voltage, the active switching tube emits multiple open-loop pulses in open-loop cycles for discharge. The control parameters include different pulse width and step lengths to ensure that the synchronous rectifier tube conducts when the maximum pulse number is reached.

Benefits of technology

The current spikes caused by the open-loop pulse are reduced, the noise and voltage oscillation during zero-crossing commutation are reduced, and the capacitance of the synchronous rectifier tube is fully discharged, reducing EMI problems and current stress.

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Abstract

The embodiment of the invention discloses a zero-crossing commutation control method, electronic equipment and a storage medium. The method comprises the following steps: detecting a polarity change of an input voltage; in response to the polarity change, according to a preset control parameter, an open-loop pulse is emitted through a corresponding active switching tube, and discharging of a plurality of open-loop periods is carried out on a corresponding synchronous rectifier tube; the control parameters comprise at least two groups of different pulse width step lengths, and the width of the open-loop pulse changes along with the pulse width step length corresponding to each open-loop period; and when the open-loop pulse number reaches the preset maximum pulse number, the corresponding synchronous rectifier tube is conducted. By adopting a multi-section linear open-loop pulse discharge strategy, the discharge current peak can be reduced, the discharge process is smooth, the synchronous rectifier tube is ensured to be conducted at the minimum voltage, and the problems of EMI and voltage oscillation in a traditional totem PFC zero-crossing commutation scheme are effectively solved.
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Description

Technical Field

[0001] The embodiments of the present invention relate to the field of power factor correction, and in particular to a zero-crossing commutation control method, electronic equipment, and storage medium. Background Art

[0002] Compared to traditional bridge power factor correction (PFC) circuits, totem PFC offers the advantage of high efficiency and is increasingly being used in power supply applications. When the input voltage polarity changes from a positive half-cycle to a negative half-cycle, or vice versa, the corresponding synchronous rectifier switches from an off state to a conducting state. Because the voltage across the synchronous rectifier's equivalent parallel capacitor is high and close to the output voltage, turning the synchronous rectifier directly on generates very high current stress, which can also lead to noise and EMI issues.

[0003] To address the current stress caused by the hard-on of slow transistors during input voltage commutation, the traditional totem PFC zero-crossing commutation control strategy is as follows: when the input voltage polarity changes from negative to positive, or from positive to negative, the corresponding active switch first discharges the corresponding synchronous rectifier's equivalent parallel capacitor through a certain number of open-loop pulses. When the voltage drops to the desired value, the synchronous rectifier is turned on to reduce the current stress during turn-on.

[0004] However, the traditional zero-crossing commutation open-loop pulse width increases linearly. If the increase is too small, the equivalent parallel capacitance of the slow tube may not be fully discharged. If the increase is too large, the first few open-loop pulses may have very large current spikes. Summary of the Invention

[0005] The main technical problem solved by the embodiments of the present invention is to provide a zero-crossing commutation control method, electronic equipment and storage medium, which can solve at least some of the problems existing in the zero-crossing commutation of the existing power factor correction circuit.

[0006] In the first aspect, an embodiment of the present invention provides a zero-crossing commutation control method, which is applied to a power factor correction circuit including an active switching tube and a synchronous rectifier tube, including: detecting a polarity change of an input voltage; in response to the polarity change, according to preset control parameters, sending an open-loop pulse through the corresponding active switching tube to discharge the corresponding synchronous rectifier tube for multiple open-loop cycles; the control parameters include at least two groups of different pulse width steps, and the width of the open-loop pulse changes with the pulse width step corresponding to each open-loop cycle; when the number of open-loop pulses reaches a preset maximum number of pulses, turning on the corresponding synchronous rectifier tube.

[0007] Optionally, the width of the open-loop pulse of each open-loop period increases gradually according to the corresponding pulse width step; the width of the open-loop pulse does not exceed a preset maximum pulse width.

[0008] Optionally, the control parameters also include an initial pulse width, and according to the preset control parameters, an open-loop pulse is emitted by the corresponding active switching tube to discharge the corresponding synchronous rectifier tube for multiple open-loop cycles, including: initializing the number of open-loop pulses; causing the corresponding active switching tube to emit the open-loop pulse according to the initial pulse width to discharge the corresponding synchronous rectifier tube; within the corresponding open-loop cycle, based on the current open-loop pulse width, superimposing the corresponding pulse width step to generate the next open-loop pulse for the corresponding switching tube to emit, until the number of open-loop pulses reaches the maximum number of pulses; each open-loop cycle is provided with a preset number of open-loop pulses; and each time the corresponding active switching tube emits an open-loop pulse, the number of open-loop pulses is accumulated.

[0009] Optionally, within the corresponding open-loop cycle, based on the current open-loop pulse width, the corresponding pulse width step is superimposed to generate the next open-loop pulse for the corresponding switching tube to emit, and it also includes: after each superposition of the corresponding pulse width step to generate the next open-loop pulse, it is necessary to determine whether the width of the open-loop pulse is greater than the preset maximum open-loop pulse width; if so, limit the current open-loop pulse width to the maximum open-loop pulse width; stop superimposing the open-loop pulse width, so that the corresponding active switching tube discharges for multiple open-loop cycles according to the maximum open-loop pulse.

[0010] Optionally, the active switching tube includes a first active switching tube and a second active switching tube, and the synchronous rectifier tube includes a first synchronous rectifier tube and a second synchronous rectifier tube; when the input voltage is converted from the positive half cycle to the negative half cycle, the first synchronous rectifier tube is turned off, and the second synchronous rectifier tube is discharged through the second active switching tube; when the input voltage is converted from the negative half cycle to the positive half cycle, the second synchronous rectifier tube is turned off, and the first synchronous rectifier tube is discharged through the first active switching tube.

[0011] Optionally, the multiple open-loop cycles include the first open-loop cycle, the second open-loop cycle to the nth open-loop cycle in order from small to large, and the pulse width step corresponding to the previous open-loop cycle is smaller than the pulse width step corresponding to the next open-loop cycle.

[0012] Optionally, when the open-loop pulse number reaches a preset maximum pulse number, the corresponding synchronous rectifier tube is turned on, including: judging whether the open-loop pulse number is greater than or equal to the maximum pulse number; if so, turning on the corresponding synchronous rectifier tube; if not, within the corresponding open-loop cycle, based on the current open-loop pulse width, superimposing the corresponding pulse width step to generate the next open-loop pulse for the corresponding switching tube to emit; accumulating the open-loop pulse number, and returning to execute the judgment of the open-loop pulse number.

[0013] In a second aspect, an embodiment of the present invention further provides an electronic device, comprising: at least one processor; at least one network interface, the network interface being communicatively connected to the corresponding processor; and a memory being communicatively connected to the at least one processor; wherein the network interface is used to establish a communication connection between the processor and other external devices; the memory stores instructions that can be executed by the at least one processor, and the instructions are executed by the at least one processor so that the at least one processor can execute the zero-crossing commutation control method as described in the first aspect.

[0014] In a third aspect, an embodiment of the present invention provides a non-volatile computer storage medium, characterized in that the computer storage medium stores computer-executable instructions, which are executed by one or more processors, enabling the one or more processors to execute the zero-crossing commutation control method as described in the first aspect.

[0015] The beneficial effects of the embodiments of the present invention are as follows: different from the prior art, the embodiments of the present invention divide the entire open-loop pulse discharge process into different open-loop cycles, and separately set the pulse width step length increased by the open-loop pulse in each open-loop cycle, so that the synchronous rectifier tube is turned on after the discharge pulse ends, and the minimum voltage is turned on. It can reduce the current spike caused by the open-loop pulse, and reduce the noise during zero-crossing commutation, making the discharge smoother, reducing the oscillation of the voltage at both ends of the slow tube, reducing EMI problems, and making the capacitors at both ends of the synchronous rectifier tube discharge more fully, reducing the current stress when the synchronous rectifier tube is turned on. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] One or more embodiments are exemplarily illustrated by corresponding drawings, which do not constitute limitations on the embodiments. Elements with the same reference numerals in the drawings are represented as similar elements, and unless otherwise stated, the figures in the drawings do not constitute proportional limitations.

[0017] Figure 1 It is the topology of Totem PFC;

[0018] Figure 2 The figure shows the inductor excitation circuit of the totem PFC during the positive half cycle of the input voltage.

[0019] Figure 3 The figure shows the inductor demagnetization circuit of the totem PFC during the positive half cycle of the input voltage.

[0020] Figure 4 The figure shows the inductor excitation circuit of the totem PFC during the negative half cycle of the input voltage.

[0021] Figure 5 The figure shows the inductor demagnetization circuit of the totem PFC during the negative half cycle of the input voltage.

[0022] Figure 6 The zero-crossing commutation control strategy of the traditional totem PFC is shown;

[0023] Figure 7 The figure shows a current loop for discharging the equivalent parallel capacitance of the first rectifier tube through the first switching tube;

[0024] Figure 8 The figure shows a current loop for discharging the equivalent parallel capacitance of the second rectifier tube through the second switching tube;

[0025] Figure 9 1 is a flow chart of a zero-crossing commutation control method provided by an embodiment of the present invention;

[0026] Figure 10 The zero-crossing commutation multi-segment linear open-loop pulse discharge strategy is shown when the input voltage polarity changes from negative to positive;

[0027] Figure 11 The zero-crossing commutation multi-segment linear open-loop pulse discharge strategy is shown when the input voltage polarity changes from positive to negative;

[0028] Figure 12 It is a structural diagram of an electronic device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0029] In order to facilitate the understanding of the present application, the present application is described in more detail below in conjunction with the accompanying drawings and specific embodiments. It should be noted that when an element is described as being "fixed to" another element, it can be directly on the other element, or there can be one or more centered elements therebetween. When an element is described as being "connected to" another element, it can be directly connected to the other element, or there can be one or more centered elements therebetween. The terms "upper", "lower", "inner", "outer", "bottom" and the like used in this specification indicate an orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present application. In addition, the terms "first", "second", "third" and the like are used for descriptive purposes only and cannot be understood as indicating or implying relative importance.

[0030] Unless otherwise defined, all technical and scientific terms used in this specification have the same meanings as those commonly understood by those skilled in the art to which this application belongs. The terms used in this specification and in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application. The term "and / or" as used in this specification includes any and all combinations of one or more of the relevant listed items.

[0031] In addition, the technical features involved in different embodiments of the present application described below can be combined with each other as long as they do not conflict with each other.

[0032] The technical solution in this application will be described below with reference to the accompanying drawings.

[0033] The topology of Totem PFC is as follows Figure 1 As shown, L is the excitation inductor, Cout is the output capacitor, SR1 and SR2 are two slow tubes, and Q1 and Q2 are two fast tubes. SR1 is the anti-parallel diode of the slow tube SR1, C SR1 D is the equivalent parallel capacitance of the slow tube SR1. SR2 is the anti-parallel diode of the slow tube SR2, C SR2 D is the equivalent parallel capacitance of the slow tube SR2. Q1 is the anti-parallel diode of the fast tube Q1, C Q1 D is the equivalent parallel capacitance of the fast tube Q1. Q2 is the anti-parallel diode of the fast tube Q2, C Q2 is the equivalent parallel capacitance of the fast tube Q2.

[0034] In the positive half cycle of the input voltage, when Q2 is turned off and SR1 and Q1 are turned on, the excitation circuit of the inductor is as follows: Figure 2As shown, the inductor stores energy. When Q1 is turned off and Q2 and SR1 are turned on, the demagnetization circuit of the inductor is as follows Figure 3 As shown in Figure 1, the inductor transfers energy to the output. SR1 is a slow transistor that remains on during the positive half cycle of the input voltage.

[0035] From the above analysis, we can know that when the input voltage is in the positive half cycle and SR1 is turned on, the equivalent parallel capacitance C of SR2 tube is SR2 The voltage across the two ends V CSR2 =Equal to the output voltage Vout. If no special treatment is done, when the input voltage polarity changes from the positive half cycle to the negative half cycle, SR1 changes from the on state to the off state, and SR2 changes from the off state to the on state. SR2 The voltage V CSR2 It is relatively high, close to the output voltage. Directly turning on the SR2 tube will generate very large current stress, and will also cause noise and EMI problems.

[0036] Similarly, when the input voltage is in the negative half cycle and SR2 is turned on, the equivalent parallel capacitance C of SR1 tube SR1 The voltage across the two ends V CSR1 =Equal to the output voltage Vout. If no special treatment is done, when the input voltage polarity changes from the negative half cycle to the positive half cycle, SR2 changes from the on state to the off state, and SR1 changes from the off state to the on state. SR1 The voltage V CSR1 It is relatively high, close to the output voltage. Directly turning on the SR1 tube will generate very large current stress, and will also cause noise and EMI problems.

[0037] In order to solve the current stress problem caused by the hard opening of the slow tube when the input voltage is commutated, the traditional totem PFC zero-crossing commutation control strategy is as follows: Figure 6 As shown in the figure: When the input voltage polarity changes from negative to positive, Q1 tube first passes a certain number of open-loop pulses to the equivalent parallel capacitor C of SR1 tube. SR1 Discharge, when its voltage drops to the expected value, open SR1 again to reduce the current stress when opening. Through Q1 tube to SR1 tube equivalent parallel capacitance C SR1 The current circuit for discharge is as follows Figure 7 When the input voltage polarity changes from positive to negative, Q2 tube first passes a certain number of open-loop pulses to the equivalent parallel capacitor C of SR2 tube. SR2 Discharge, when the current voltage drops to the expected value, open SR2 to reduce the current stress when opening. SR2 The current circuit for discharge is as follows Figure 8 shown.

[0038] However, the traditional zero-crossing commutation open-loop pulse width increases linearly. If the increase is too small, the equivalent parallel capacitance of the slow tube may not be fully discharged. If the increase is too large, the first few open-loop pulses may have very large current spikes.

[0039] When the input voltage polarity of a Totem PFC system changes, the corresponding slow transistor that needs to be turned on also changes. Before the corresponding slow transistor is turned on, the voltage on the capacitor across the slow transistor must be discharged. In the initial discharge phase, the voltage across the slow transistor is too high, and a large discharge pulse will cause a large inductor current. As the number of discharge pulses increases, the voltage across the slow transistor decreases. Excessively small discharge pulses will prevent the slow transistor voltage from continuing to decrease.

[0040] To solve the above problems, the present invention proposes a zero-crossing commutation control method, which is applied to a power factor correction circuit including an active switch tube and a synchronous rectifier tube. The flow chart is shown in FIG. Figure 9 As shown, it is ensured that in the initial stage of the open-loop pulse discharge, the discharge pulse is small enough to reduce the discharge current and the voltage oscillation across the slow tube. At the same time, in the final stage of the open-loop pulse discharge, the discharge pulse is wide enough to still discharge the capacitors across the slow tube, minimizing the voltage across the slow tube when it is turned on. At the end of the discharge pulse, the slow tube is turned on so that it can be turned on when the voltage across the slow tube is minimum. Figure 1 For example, the active switch tube includes a first switch tube Q1 and a second switch tube Q2, and the synchronous rectifier tube includes a first rectifier tube SR1 and a second rectifier tube SR2. The method specifically includes the following steps:

[0041] Step S100: detecting a polarity change of an input voltage.

[0042] By sampling the input voltage, it is detected whether the input voltage polarity changes. Polarity change refers to the input voltage switching from the positive half cycle to the negative half cycle, or from the negative half cycle to the positive half cycle.

[0043] Step S200: In response to the polarity change, according to preset control parameters, an open-loop pulse is sent through the corresponding active switch tube to discharge the corresponding synchronous rectifier tube for multiple open-loop cycles.

[0044] When the polarity change is detected, the open-loop pulse discharge phase begins. The open-loop pulse refers to a fixed-width pulse signal output by the active switch tube without feedback control. The open-loop period is defined as the time interval between two adjacent open-loop pulse rising edges, expressed as T period Indicates that during each open-loop cycle, the width of the open-loop pulse is adjusted according to preset control parameters. The control parameters include an initial pulse width and multiple sets of pulse width steps, ensuring that the width of the open-loop pulse increases appropriately as the open-loop cycle progresses.

[0045] The width of the open-loop pulse is adjusted according to the following principles: the width of the open-loop pulse in each open-loop period is gradually increased according to the corresponding pulse width step; the width of the open-loop pulse does not exceed the preset maximum pulse width.

[0046] Specifically, when the input voltage converts from the positive half cycle to the negative half cycle, the first synchronous rectifier tube is turned off, and the second synchronous rectifier tube is discharged through the second active switch tube; when the input voltage converts from the negative half cycle to the positive half cycle, the second synchronous rectifier tube is turned off, and the first synchronous rectifier tube is discharged through the first active switch tube.

[0047] Step S300: When the number of open-loop pulses reaches a preset maximum number of pulses, the corresponding synchronous rectifier tube is turned on.

[0048] Continue to count the number of open-loop pulses that have been issued. When the number of pulses reaches the preset maximum number of pulses N max When , the equivalent parallel capacitance of the synchronous rectifier has been fully discharged. At this point, the corresponding synchronous rectifier is turned on, completing the zero-crossing commutation process. By limiting the maximum number of pulses, energy loss caused by excessive discharge can be avoided.

[0049] In some embodiments, step S200 specifically includes the following steps:

[0050] Step S210: Initialize the open-loop pulse number.

[0051] Initialize the open-loop pulse count. This resets the open-loop pulse counter to zero, providing an initial state for subsequent pulse counting. This initialization ensures that the open-loop pulse count starts from zero each time a change in input voltage polarity is detected, ensuring accurate counting.

[0052] Step S220: enabling the corresponding active switch tube to emit an open-loop pulse according to the initial pulse width to discharge the corresponding synchronous rectifier tube.

[0053] The active switching tube first outputs an open-loop pulse with a preset initial pulse width. When the input voltage changes from negative to positive, the first switching tube outputs an open-loop pulse with an initial width equal to the initial pulse width, discharging the equivalent parallel capacitance of the first rectifier tube. When the input voltage changes from positive to negative, the second switching tube outputs an open-loop pulse with an initial width equal to the initial pulse width, discharging the equivalent parallel capacitance of the second rectifier tube. The selection of the initial pulse width must take into account the current stress control requirements during the initial discharge phase to ensure that excessive current spikes are not generated.

[0054] Step S230: In the corresponding open-loop cycle, based on the current open-loop pulse width, the corresponding pulse width step is superimposed to generate the next open-loop pulse for the corresponding switch tube to emit, until the number of open-loop pulses reaches the maximum number of pulses.

[0055] By way of example and not limitation, the plurality of open-loop cycles sequentially include a first open-loop cycle, a second open-loop cycle, through an nth open-loop cycle, wherein, in ascending order, the pulse width step corresponding to a previous open-loop cycle is smaller than the pulse width step corresponding to a subsequent open-loop cycle. A preset number of open-loop pulses is provided within each open-loop cycle. It should be noted that the number of open-loop cycles and the number of open-loop pulses within each open-loop cycle can be designed as required.

[0056] The width of the open-loop pulse is dynamically adjusted. During the first open-loop cycle, the width of the open-loop pulse increases gradually based on the initial pulse width according to a first pulse width step size, which corresponds to the first open-loop cycle. When entering the second open-loop cycle, the width of the open-loop pulse increases according to a second pulse width step size, which corresponds to the second open-loop cycle. This continues until the nth open-loop cycle. Each open-loop cycle is set with a preset number of open-loop pulses, and the width of the open-loop pulse increases uniformly within the cycle. By adjusting the open-loop pulse width in multiple stages, smooth control of the discharge process is achieved, avoiding the problems of insufficient discharge or current spikes that may be caused by traditional single linear increase methods.

[0057] Step S240: After the next open-loop pulse is generated by superimposing the corresponding pulse width step each time, it is necessary to determine whether the width of the open-loop pulse is greater than the preset maximum open-loop pulse width.

[0058] Before each new open-loop pulse is generated, the open-loop pulse width must be determined. The calculated open-loop pulse width is compared with the preset maximum open-loop pulse width. The maximum open-loop pulse width is set to limit the growth range of the open-loop pulse to prevent excessive pulse widths from causing excessive discharge or affecting subsequent control.

[0059] Step S250 : When the open-loop pulse width is greater than the preset maximum open-loop pulse width, limiting the open-loop pulse width to the maximum open-loop pulse width.

[0060] When the open-loop pulse width exceeds the preset maximum open-loop pulse width, it needs to be corrected. The correction process limits the current open-loop pulse width to the preset maximum open-loop pulse width. This correction ensures that the open-loop pulse width remains within a reasonable range, preventing the discharge process from becoming uncontrolled.

[0061] Step S260: stop superimposing the open-loop pulse width, so that the corresponding active switch tube discharges for multiple open-loop cycles according to the maximum open-loop pulse.

[0062] Once the open-loop pulse width reaches its maximum value, dynamic pulse width adjustment ceases. At this point, the active switch continues to output open-loop pulses at the maximum open-loop pulse width, maintaining a stable discharge process. When the input voltage changes from negative to positive, the first switch discharges the first rectifier at the maximum open-loop pulse width. When the input voltage changes from positive to negative, the second switch discharges the second rectifier at the maximum open-loop pulse width. This fixed-width discharge method helps ensure sufficient discharge of the synchronous rectifier's equivalent parallel capacitance.

[0063] Step S270: accumulating the number of open-loop pulses each time the corresponding active switch emits an open-loop pulse.

[0064] Each open-loop pulse output is counted. Each time the active switch emits an open-loop pulse, the count value is incremented. The purpose of pulse counting is to monitor the progress of the discharge process and provide a basis for determining whether the maximum number of pulses has been reached. Accurate pulse counting allows for precise control of the discharge process, ensuring that zero-crossing commutation is completed at the appropriate time.

[0065] In some embodiments, step S300 specifically includes the following steps:

[0066] Step S310: Determine whether the open-loop pulse number is greater than or equal to a preset maximum pulse number.

[0067] Determine the number of open-loop pulses issued. Compare the accumulated open-loop pulse count with the preset maximum pulse count to determine whether it has reached or exceeded the maximum. Setting the maximum pulse count requires a comprehensive consideration of discharge efficiency and commutation time requirements, ensuring sufficient discharge while avoiding unnecessary delays. If yes, proceed to step S320; if no, proceed to step S330.

[0068] Step S320: Turn on the corresponding synchronous rectifier tube.

[0069] When the open-loop pulse count reaches or exceeds the maximum, the corresponding synchronous rectifier is turned on. When the input voltage changes from negative to positive, the first rectifier is turned on; when the input voltage changes from positive to negative, the second rectifier is turned on. Because the synchronous rectifier's equivalent parallel capacitance has been fully discharged at this point, the voltage across it drops to a low level, effectively suppressing current stress during the turn-on process.

[0070] Step S330: In the corresponding open-loop cycle, based on the current open-loop pulse width, the corresponding pulse width step is superimposed to generate the next open-loop pulse for the corresponding switch tube to emit.

[0071] If the open-loop pulse count has not reached the maximum, pulse width adjustment continues. Within the current open-loop cycle, the corresponding pulse width step is added to the current open-loop pulse width to generate a new open-loop pulse. Open-loop pulse width adjustment follows the principle of multi-segment linear increase to ensure a smooth discharge process.

[0072] Step S340: Accumulate the number of open-loop pulses and return to perform the judgment of the number of open-loop pulses.

[0073] After each new open-loop pulse is emitted, the open-loop pulse count is incremented, and the process returns to step S310 to repeat the pulse count determination. This cyclic control mechanism ensures the continuity of the discharge process until the conduction condition is met. This cyclic execution of pulse counting and determination enables precise control of the discharge process.

[0074] Apply the above zero-crossing commutation control method to Figure 1 The Totem PFC topology shown, Figure 10 The principle of zero-crossing commutation multi-segment linear open-loop pulse discharge when the input voltage polarity changes from negative to positive is shown. Specifically, the pulse width of the open-loop pulse initialization is set, that is, the width of the first open-loop pulse is the initial pulse width Ton1, and the step length of the open-loop pulse increase in each stage is the first pulse width step1, the second pulse width step2, ..., the nth pulse width step step n The time between two adjacent open-loop pulse rising edges is defined as an open-loop cycle, and its time is T period . n is the count of the number of open loop cycles. N max It is the maximum number of pulses set in advance. max The maximum open-loop pulse width is preset. When the open-loop pulse width gradually increases, the open-loop pulse width should be kept smaller than the maximum open-loop pulse width Ton. max x2, x3, ..., x n The starting point of each stage.

[0075] When the input voltage is in the negative half cycle, the second rectifier tube SR2 is turned on. As the input voltage gradually approaches zero, the second rectifier tube SR2 is turned off. When the input voltage changes from negative to positive, the polarity changes, and after a preset delay time, it enters the open-loop pulse discharge stage, and the equivalent parallel capacitor C of the first rectifier tube SR1 is supplied through the first switch tube Q1. SR1 Discharge.

[0076] In the first open-loop cycle, the width of the first open-loop pulse is the initial pulse width T on1 , then the width of the second open-loop pulse is T on2 =T on1 +step1. That is, the width of the next pulse is increased by the first pulse width step1 based on the width of the previous pulse.

[0077] When the number of open-loop cycles n=x2, the second open-loop cycle is entered. In this cycle, the step length of the open-loop pulse increase is the second pulse width step length step2.

[0078] When the number of open-loop cycles n = x n When the nth open-loop cycle is entered, the step length of the open-loop pulse increase is the nth pulse width step length step n .

[0079] When the number of open-loop pulses = N max When , the open-loop pulse ends, and after the current switching cycle ends, the first rectifier tube SR1 is turned on. The system enters closed-loop control.

[0080] When the input voltage polarity changes from positive to negative, the zero-crossing commutation discharge principle is as follows Figure 11 Specifically, when the input voltage is in the positive half cycle, the first rectifier tube SR1 is turned on. As the input voltage gradually approaches zero, the first rectifier tube SR1 is turned off. When the input voltage changes from positive to negative, the polarity changes, and after a preset delay time, it enters the open-loop pulse discharge stage, and the equivalent parallel capacitor C of the second rectifier tube SR2 is supplied through the second switch tube Q2. SR2 Discharge.

[0081] In the first open-loop cycle, the width of the first open-loop pulse is the initial pulse width T on1 , then the width of the second open-loop pulse is T on2 =T on1 +step1. That is, the width of the next pulse is increased by the first pulse width step1 based on the width of the previous pulse.

[0082] When the number of open-loop cycles n=x2, the second open-loop cycle is entered. In this cycle, the step length of the open-loop pulse increase is the second pulse width step length step2.

[0083] When the number of open-loop cycles n = x n When the nth stage is entered, the step length of the open-loop pulse increase is the nth pulse width step length step n .

[0084] When the number of open-loop pulses = N max When the open-loop pulse ends, the current switching cycle ends and the second rectifier SR2 is turned on. The system enters closed-loop control.

[0085] By setting x2, x3, ..., xn, the entire open-loop pulse discharge process is divided into different stages. By setting different open-loop pulse increment steps at different open-loop cycles, the open-loop pulse can be kept small enough in the initial stage of the open-loop pulse discharge to prevent excessive discharge current. Furthermore, in the later stages of the open-loop pulse discharge, the open-loop discharge pulse can be kept wide enough to continue discharging the capacitors at both ends of the slow tube.

[0086] Different from the prior art, the embodiment of the present invention divides the entire open-loop pulse discharge process into different open-loop cycles, and separately sets the pulse width step length increased by the open-loop pulse in each open-loop cycle, so that the synchronous rectifier tube is turned on after the discharge pulse ends, thereby achieving minimum voltage turn-on, reducing the current spike caused by the open-loop pulse, and reducing the noise during zero-crossing commutation, making the discharge smoother, reducing the oscillation of the voltage at both ends of the slow tube, reducing EMI problems, and making the discharge of the capacitors at both ends of the synchronous rectifier tube more sufficient, thereby reducing the current stress when the synchronous rectifier tube is turned on.

[0087] The embodiment of the present invention also provides an electronic device based on the above-mentioned zero-crossing commutation control method, the structural diagram of which is shown in FIG. Figure 12 As shown, the electronic device 20 includes:

[0088] One or more processors 210, network interface 220, and memory 230, Figure 12 In the figure, a processor 210, a network interface 220 and a memory 230 are taken as an example.

[0089] The network interface 220 is in communication with the corresponding processor 210, and the processor 210 and the memory 220 can be connected via a bus or other means. Figure 10 The bus connection is taken as an example.

[0090] The network interface 220 is used to establish a communication connection between the processor 210 and other external devices, and includes the following types of interfaces: RJ-45 interface, SC fiber interface, AUI interface, FDDI interface, and Console interface.

[0091] Memory 230, as a non-volatile computer-readable storage medium, can be used to store non-volatile software programs, non-volatile computer executable programs, and modules. Processor 210 executes the non-volatile software programs, instructions, and units stored in memory 230 to perform various functional applications and data processing of the electronic device, thereby implementing the zero-crossing commutation control method of the above-described method embodiment.

[0092] The memory 230 may include a program storage area and a data storage area, wherein the program storage area may store an operating system and applications required for at least one function; the data storage area may store data created based on the use of the electronic device, etc. In addition, the memory 230 may include a high-speed random access memory and may also include a non-volatile memory, such as at least one disk storage device, a flash memory device, or other non-volatile solid-state storage device. In some embodiments, the memory 230 may optionally include a memory remotely located relative to the processor 210, and these remote memories may be connected to the electronic device via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0093] The one or more units are stored in the memory 230, and when executed by one or more processors 210, perform the zero-crossing commutation control method in any of the above method embodiments, for example, perform the above described Figure 9 Method steps S100 to S300 in .

[0094] The electronic device can execute the zero-crossing commutation control method provided in the embodiment of the present invention, and has a program module and beneficial effects corresponding to the execution method. For technical details not fully described in the electronic device embodiment, please refer to the zero-crossing commutation control method provided in the embodiment of the present invention.

[0095] Embodiments of the present invention further provide a non-volatile computer-readable storage medium. This non-volatile computer-readable storage medium may be included in the device described in the above embodiments, or may exist independently and not incorporated into the device. This non-volatile computer-readable storage medium carries one or more programs. When executed, these one or more programs implement the zero-crossing commutation control method of the disclosed embodiments.

[0096] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Based on the idea of the present application, the technical features in the above embodiments or different embodiments can also be combined, the steps can be implemented in any order, and there are many other variations in different aspects of the present application as above, which are not provided in detail for the sake of simplicity. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. These modifications or replacements do not deviate the essence of the corresponding technical solutions from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A zero-crossing commutation control method, applied to a power factor correction circuit including an active switch tube and a synchronous rectifier tube, characterized in that: include: Detect polarity changes of input voltage; In response to the polarity change, an open-loop pulse is emitted through the corresponding active switch tube according to preset control parameters to discharge the corresponding synchronous rectifier tube for multiple open-loop cycles; the control parameters include at least two sets of different pulse width steps, and the width of the open-loop pulse changes with the pulse width step corresponding to each open-loop cycle; When the number of open-loop pulses reaches a preset maximum number of pulses, the corresponding synchronous rectifier tube is turned on.

2. The method according to claim 1, characterized in that The width of the open-loop pulse of each open-loop period gradually increases according to the corresponding pulse width step; the width of the open-loop pulse does not exceed the preset maximum pulse width.

3. The method according to claim 2, characterized in that The control parameters also include an initial pulse width. According to the preset control parameters, an open-loop pulse is emitted through the corresponding active switch tube to discharge the corresponding synchronous rectifier tube for multiple open-loop cycles, including: Initializing the open-loop pulse number; causing the corresponding active switch tube to emit the open-loop pulse according to the initial pulse width to discharge the corresponding synchronous rectifier tube; In a corresponding open-loop cycle, based on the current open-loop pulse width, the corresponding pulse width step is superimposed to generate the next open-loop pulse for emission by the corresponding switch tube until the number of open-loop pulses reaches the maximum number of pulses; each open-loop cycle is provided with a preset number of open-loop pulses; Each time the corresponding active switch tube sends an open-loop pulse, the number of open-loop pulses is accumulated.

4. The method according to claim 3, characterized in that After the corresponding open-loop cycle is performed based on the current open-loop pulse width and the corresponding pulse width step is superimposed to generate the next open-loop pulse for the corresponding switch tube to emit, the method further includes: After each superposition of the corresponding pulse width step to generate the next open-loop pulse, it is necessary to determine whether the width of the open-loop pulse is greater than the preset maximum open-loop pulse width; If yes, limiting the current open-loop pulse width to the maximum open-loop pulse width; The superposition of the open-loop pulse width is stopped, so that the corresponding active switch tube discharges for multiple open-loop cycles according to the maximum open-loop pulse.

5. The method according to claim 1, characterized in that The active switch tube includes a first active switch tube and a second active switch tube, and the synchronous rectifier tube includes a first synchronous rectifier tube and a second synchronous rectifier tube; When the input voltage switches from a positive half cycle to a negative half cycle, the first synchronous rectifier is turned off, and the second synchronous rectifier is discharged through the second active switch tube; When the input voltage switches from a negative half cycle to a positive half cycle, the second synchronous rectifier is turned off, and the first synchronous rectifier is discharged through the first active switch.

6. The method according to claim 1, characterized in that The multiple open-loop cycles include the first open-loop cycle, the second open-loop cycle to the nth open-loop cycle in order from small to large. The pulse width step corresponding to the previous open-loop cycle is smaller than the pulse width step corresponding to the next open-loop cycle.

7. The method according to claim 1, characterized in that When the number of open-loop pulses reaches a preset maximum number of pulses, turning on the corresponding synchronous rectifier tube includes: Determining whether the open-loop pulse number is greater than or equal to the maximum pulse number; If so, the corresponding synchronous rectifier is turned on; If not, then within the corresponding open-loop cycle, based on the current open-loop pulse width, the corresponding pulse width step is superimposed to generate the next open-loop pulse for the corresponding switch tube to emit; The open-loop pulse number is accumulated, and the judgment of the open-loop pulse number is returned.

8. An electronic device, characterized in that: include: at least one processor; at least one network interface, the network interface being communicatively connected to a corresponding processor; as well as, a memory communicatively connected to the at least one processor; wherein, The network interface is used to establish a communication connection between the processor and other external devices; The memory stores instructions that can be executed by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to perform the zero-crossing commutation control method according to any one of claims 1 to 7.

9. A non-volatile computer storage medium, characterized in that The computer storage medium stores computer-executable instructions, which are executed by one or more processors, enabling the one or more processors to execute the zero-crossing commutation control method according to any one of claims 1 to 7.