Integrated multi-component Hall effect sensor

Abstract

The invention relates to an integrated multi-component Hall effect sensor, and a sensing method. An exemplary integrated circuit device includes a substrate including a semiconductive host material having an upper surface; a focus contact on the upper surface, the focus contact connected to an embedded current focus within the host material through an electrically isolated path; one or more distributed current contacts on the upper surface, the one or more distributed current contacts working in conjunction with the embedded current focus to form a distributed current flow through the host material; and an arrangement of sense contacts on the upper surface, the arrangement of sense contacts for detecting a set of voltages representing Hall effect measurements of each three-dimensional vector component acting on the magnetic field of the distributed current flow.

Description

Technical Field

[0001] The present disclosure relates generally to integrated circuit electronics and, more particularly, to multi-component Hall effect sensors and sensing methods suitable for embedding within an integrated circuit of a semiconductor chip. Background Art

[0002] The manufacturing process for integrated circuits involves applying repeated patterning, deposition, and etching steps to semiconductor wafers or other substrates to form interconnect structures that operate as analog and / or digital components of electronic circuits. By embedding sensing technologies, particularly those that can be incorporated by adjusting existing steps in the manufacturing process, integrated circuits can be made more versatile and, therefore, more valuable, thereby avoiding any significant increase in manufacturing costs. Such embedding may require the use of existing process steps to achieve compact sensors. Summary of the Invention

[0003] Thus, disclosed herein are illustrative multi-component Hall-effect sensors and sensing methods suitable for embedding within integrated circuits, as well as illustrative integrated circuit fabrication methods that enable embedding of such sensors and sensing methods.

[0004] An exemplary integrated circuit device includes a substrate comprising a semiconductive body material having an upper surface; a focal contact on the upper surface connected to an embedded current focus within the body material by an electrically isolated path; one or more distributed current contacts on the upper surface operating in conjunction with the embedded current focus to form a distributed current flow through the body material; and an arrangement of sensing contacts on the upper surface for detecting a set of voltages representing a Hall effect measurement of each three-dimensional vector component of a magnetic field acting on the distributed current flow.

[0005] An exemplary sensing method includes: forming a distributed current flow between an embedded current focus and one or more distributed current contacts on a surface of a body, the distributed current flow exhibiting a Hall effect when subjected to a magnetic field; and detecting a set of voltages using an arrangement of sensing contacts on the surface of the body. The arrangement provides sensitivity capable of distinguishing between Hall effects induced by two components of the magnetic field parallel to the surface and a Hall effect induced by a component of the magnetic field perpendicular to the surface.

[0006] An exemplary sensor fabrication method includes forming an electrically isolated path into an embedded current focus within a semiconductive body material having an upper surface; and providing a set of contacts on the upper surface. The set of contacts includes a focus contact connected to the embedded current focus via the electrically isolated path; one or more distributed current contacts configured to form a distributed current flow through the body material to or from the embedded current focus; and a plurality of sensing contacts configured to provide a voltage sensitive to a Hall effect measurement of each three-dimensional vector component of a magnetic field acting on the distributed current flow.

[0007] Each of the above may be used alone or in combination and may include one or more of the following optional features in any suitable combination: 1. The semiconductive body material is one of the following: the bulk material of the substrate; an electrically isolated epitaxial material located on the substrate; and an electrically isolated semiconductor well. 2. The semiconductive body material is electrically isolated from the bulk material of the substrate using at least one of trench isolation and a reverse-biased PN junction. 3. The electrically isolated current path is electrically isolated from the bulk material using at least one of trench isolation and a reverse-biased PN junction. 4. The electrically isolated current path extends at least five microns perpendicular to the surface. 5. The one or more distributed current contacts are each separated from the focal contact by at least three microns. 6. The arrangement of the sensing contacts is located between the focal contact and the one or more distributed current contacts. 7. The arrangement of the sensing contacts and the one or more distributed current contacts each have four-fold rotational symmetry about the focal contact. 8. The semiconductive body material is substantially homogeneous. 9. The semiconductive body material has at least one of open pores or isolation barriers to enhance sensitivity to Hall effect measurements. 10. The semiconductive body material has a square mesh configuration having at least eight open pores around a filled center containing an embedded current focus. 11. The square mesh configuration includes a trench extending diagonally from the electrically isolated current path to the periphery of the mesh. 12. The method includes converting a set of voltages into measurements of two components of a magnetic field parallel to the surface and a component of a magnetic field perpendicular to the surface. 13. The method includes converting the set of voltages into a measurement of the magnitude of the magnetic field. 14. The magnitude measurement is a binary value indicating the presence or absence of a magnetic field having a magnitude exceeding a given threshold. 15. The distributed current flow is confined to a rectangular body region having a given depth and the surface of the rectangular body region being square. 16. The one or more distributed current contacts include four edge contacts, each edge contact being adjacent to a respective edge of the square. 17. The arrangement of sensing contacts comprises four pairs of sensing contacts, each pair of sensing contacts being positioned between a focal contact and a corresponding one of four edge contacts. 18. The sensing method of claim 15, wherein the arrangement of sensing contacts has dual vertical mirror symmetry. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Figure 1 is a block diagram of an exemplary BCD integrated circuit.

[0009] Figure 2 is a block diagram of an exemplary integrated Hall-effect sensor.

[0010] Figure 3 is an isometric view of a first exemplary multi-component Hall effect sensor transducer.

[0011] Figure 4 is a plan view of a first exemplary multi-component Hall effect sensor transducer.

[0012] Figures 5A to 5C is the vector diagram of the single-component Hall effect.

[0013] Figure 6 is an isometric view of a second exemplary multi-component Hall effect sensor transducer.

[0014] Figure 7 is a plan view of a second exemplary multi-component Hall effect sensor transducer.

[0015] Figure 8 is a flow chart of an exemplary manufacturing method.

[0016] Figure 9A is an exemplary initial cross section.

[0017] Figure 9B yes Figure 8 An exemplary cross section after step 806 of FIG.

[0018] Figure 9C yes Figure 8 An exemplary cross section after step 818 of .

[0019] Figure 9D yes Figure 8 An exemplary cross section after step 820 of .

[0020] Figure 9E yes Figure 8 An exemplary cross section after step 821 of .

[0021] Figure 9F yes Figure 8 An exemplary cross section during step 822 of . DETAILED DESCRIPTION

[0022] The following description and drawings are provided for purposes of explanation and not limitation of the present disclosure. Rather, they are intended to provide one of ordinary skill in the art with a basis for understanding all modifications, equivalents, and alternatives that fall within the scope of the claims.

[0023] For simplicity and clarity of illustration, the elements in the figures are not necessarily to scale, and the same reference numerals in different figures indicate the same elements. In addition, descriptions and details of well-known steps and elements have been omitted for clarity of description. Although the devices are described herein as having certain n-type or p-type doped regions, one of ordinary skill in the art will understand that complementary devices according to embodiments of the present invention may also be employed. One of ordinary skill in the art will understand that the terms "during," "at the same time," and "when" as used herein are not intended to imply that an action occurs immediately after the action is initiated, but rather that there may be some brief but reasonable delay, such as propagation delay, between the reaction initiated by the initial action. The use of the terms "approximately," "about," or "substantially" means that the parameter value of an element is expected to be very close to the stated value or position. However, as is well known in the art, there are always minor differences that prevent a value or position from being exactly the stated value or position. It is generally recognized in the art that deviations of up to about ten percent (10%) (and for semiconductor doping concentrations, up to twenty percent (20%)) are considered reasonable deviations from the ideal goal of being exactly as stated.

[0024] In this article, the term "oxide" is short for silicon oxide, or more precisely, short for silicon dioxide. "Nitride" can be used as short for silicon nitride, or more precisely, short for silicon nitride. "Silicide" can be used as a term for WSi2, TaSi2, CrSi2, NiSi or other metal-silicon compounds that can be deposited to act as surface contacts or as an interface between exposed silicon and metal surface contacts. As used herein, the term "vertical" means along the z-axis, which is generally oriented perpendicular to the surface of the substrate or device body. The term "horizontal" means along an axis perpendicular to the z-axis, and therefore means along an axis parallel to the surface of the substrate or device body. When the term is applied to a Cartesian coordinate system, the x-axis and y-axis are each a horizontal axis.

[0025] Figure 1FIG1 is a schematic diagram of an exemplary BCD (bipolar, CMOS, DMOS) integrated circuit 100 having a monolithic semiconductor substrate 101 carrying multiple semiconductor device technologies. Integrated circuit 100 may include analog circuitry 102 implemented using bipolar junction transistors and other bipolar junction devices (e.g., PN diodes, NPN transistors, PNP transistors, silicon-controlled rectifiers, JFETs), power management circuitry 104 implemented using double-diffused metal oxide semiconductor (DMOS) devices, digital circuitry 106 implemented using metal oxide semiconductor (MOS) devices (e.g., NMOS, PMOS, CMOS), and one or more embedded sensors 108, which may be implemented using the same steps used to form other devices on substrate 101. While the various device types may be isolated from each other by isolation trenches, buried layers, tubes, or other functionally similar isolation structures, they may also be interconnected via appropriately patterned metal or other conductive layers deposited on the surface of the substrate, as described below.

[0026] Figure 2 1 is a block diagram of an illustrative embedded sensor 108 having an interface logic circuit 110 that controls various signal lines of a sensing transducer 112, thereby enabling the interface logic circuit 110 to obtain sensor measurements. In this example, it is envisioned that the interface logic circuit 110 will provide a bias between a focus contact signal line and a current contact signal line to provide a distributed current within the sensing transducer. The measurement of the sensor contact signal line voltage can then be used to determine the vector components of the magnetic field. The interface logic circuit 110 can include a current source for providing the desired bias and various buffers with high input impedance for detecting the sensing contact voltage. One or more comparators or analog-to-digital converters can be provided to convert the detected voltage into a measurement of the magnetic field component or magnitude.

[0027] Figure 3FIG1 is an isometric view of an exemplary embodiment of a sensor transducer 112. It includes a volume of semiconductive body material 302 having an upper surface 304. The semiconductive body material 302 can be a bulk substrate material, but preferably, the semiconductive body material can be an electrically isolated volume of semiconductive body material. For example, such isolation can be achieved using a well or buried layer that is oppositely doped to the body material 302 to provide a PN junction that can be reverse biased to prevent current from escaping the isolated volume. Alternatively, the semiconductive body material 302 can be epitaxially deposited above an insulating layer or non-conductive substrate to prevent vertical current from flowing into or out of the body material. To prevent horizontal current from flowing into or out of the body material 302, the material can be surrounded by one or more isolation trenches extending from the surface 304 to the buried layer or underlying insulator. Optionally, such isolation trenches can be filled with an oxide or other insulating material to enable a conductive path to be formed between surface contacts on the semiconductive body material 302 and elsewhere on the substrate. Figure 3 This type of isolation structure is omitted in the following, but Figure 8 and Figure 9D Illustrative examples are further described.

[0028] A focal contact 306 is disposed in the middle of surface 304. An isolation trench or other isolation structure 308 extends downward from the periphery of focal contact 306, thereby forming an electrically isolated path between the focal contact and an embedded current focus 310 positioned within semiconductive body material 302. Embedded current focus 310 is an opening formed by isolation structure 308 that enables current to flow between the electrically isolated path and the surrounding material 302. The electrically isolated path extends vertically from upper surface 304, but as indicated by dimension line 312, isolation structure 308 does not reach the isolation boundary below semiconductive body material 302, as this would prevent current flow and thus would not provide embedded current focus 310. The interior of isolation structure 308 contains conductive or semiconductive material to facilitate current flow along the electrically isolated path.

[0029] One or more distributed current contacts 314 are disposed on the upper surface 304 and work in conjunction with the embedded current focus 310 to create a distributed current flow within the semiconductive body material 302. The distributed current flow includes a current flow component along each of the x-axis, the y-axis, and the z-axis. Figure 3 In the embodiment, four contacts 314 are provided, one along each edge of the square upper surface 304. An arrangement of sensing contacts 316 is also provided on the upper surface 304 to detect a set of voltages representing Hall effect measurements of each three-dimensional vector component of the magnetic field acting on the distributed current flow.

[0030] exist Figure 4, the focus contact 306 is marked as "C". The four distributed current contacts 314 are marked as "D1", "D2", "D3" and "D4". A pair of sensing contacts 316 are arranged between each distributed current contact 314 and the focus contact 306. The pair of sensing contacts "S11" and "S12" correspond to the current contact D1; the pair of sensing contacts "S21" and "S22" correspond to the current contact D2; the pair of sensing contacts "S31", "S32" and the pair of sensing contacts "S41", "S42" correspond to the current contacts D3 and D4 respectively. The current contacts can be electrically connected so as to obtain the same voltage, for example, the ground voltage. The voltage of the sensing contact Sij is represented as Vij below, for example, V31 is the voltage of the sensing contact S31.

[0031] When the semiconducting body material 302 has a p-type doping (resulting in valence band holes acting as majority charge carriers), the focal contact 306 is positively biased relative to the distributed current contact 314, thereby causing the majority charge carriers to travel outward and upward from the embedded current focus 310. In this case, the sensing contact 316 detects a positive voltage relative to the current contact 314. When the semiconducting body material is n-doped (resulting in conduction band electrons acting as majority charge carriers), the focal contact is negatively biased relative to the distributed current contact 314, thereby also causing the majority charge carriers to travel outward and upward from the embedded current focus 310. In this case, the sensing contact 316 detects a negative voltage relative to the current contact 314. In the following discussion, we assume p-type doping, but the calculations and directions of the magnetic field strength remain the same for both p-type and n-type semiconducting body materials.

[0032] like Figure 5A As shown, a magnetic field directed along the x-axis causes holes with a velocity component along the z-axis (i.e., traveling upward from the embedded current focus) to experience a force along the y-axis. This induces a Hall effect voltage proportional to the magnetic field strength: B x =k x ((V 31 +V 32 )-(V 11 +V 12 )).like Figure 5B As shown, a magnetic field directed along the y-axis causes these holes to experience a force along the negative x-axis, similarly inducing a Hall effect voltage proportional to the magnetic field strength: B y =k y ((V 41 +V 42 )-(V 21 +V 22 )).like Figure 5CAs shown, a magnetic field oriented along the z-axis causes holes with a horizontal velocity component (i.e., traveling outward from the embedded current focus) to experience a force clockwise around the embedded current focus. This also causes a Hall effect voltage proportional to the magnetic field strength: B z =k z ((V 11 -V 12 )+(V 21 -V 22 )+(V 31 -V 32 )+(V 41 -V 42 )). In these formulas, k x 、k y and k z is an empirically determined proportionality constant. From these formulas, it should be clear that this arrangement of sensing contacts provides sensitivity capable of distinguishing between the Hall effect induced by the two components of the magnetic field parallel to the upper surface and the Hall effect induced by the component of the magnetic field perpendicular to the upper surface. These formulas assume that the behavior of the transducer is substantially linear; in implementation, it may be desirable to model the response of the transducer to varying field strengths and orientations to derive a lookup table or other representation of the relationship between the set of voltages and the desired magnetic field or Hall effect measurement.

[0033] Transducer size is a design parameter that varies based on manufacturing constraints and desired sensitivity. Figure 3 An example can be shown where the horizontal dimension of the semiconductive body material 302 is 12 microns, the vertical dimension of the body material 302 is 10 microns, the horizontal dimension of the isolation path is 1 micron, the width of the isolation trench surrounding the isolation path is 0.5 microns, and the vertical dimension of the path and trench is 6 microns. A current contact is centered on each edge, which is 4 microns long and 0.3 microns wide. Each sensor contact is approximately 1 micron long and 0.3 micron wide and can be spaced approximately 1 micron apart from the corresponding current contact. A spacing of at least three microns can be provided between the distributed current contact and the focal contact, and the electrical isolation path can extend at least five microns perpendicular to the top surface. It should be noted that these dimensions are for proof of concept purposes, and it is expected that performance enhancements can be achieved through further optimization.

[0034] exist Figure 3 In the example of , the semiconductive body material 302 is substantially homogeneous. This is not a requirement, and Figure 6An example of a transducer 112 is shown that includes a pattern of at least eight grooves or filled openings 622 surrounding a filled center containing an embedded current focus. The openings 622 form ridges 624 having a square mesh configuration or "waffle" configuration. The openings 622 act as barriers to restrict and shape current flow, but the semiconductive host material may further include a floor 626 to enable current flow below the openings 622. In any case, current preferentially flows along the ridges.

[0035] and Figure 3 Like the transducer, Figure 6 The transducer includes a current focus contact 606 and an isolation trench or other isolation structure 608 that extends downwardly from the periphery of the focus contact to form an electrically isolated path to the embedded current focus. The majority current carriers travel upwardly and outwardly from the embedded current focus to reach the distributed current contacts 614 on each edge of the transducer. Diagonal trenches 28 may extend from the path isolation structure 608 to the periphery of the square mesh at the corners of the semiconducting body material to enhance sensitivity to the z-axis component of the magnetic field. Although in Figure 6 Not shown, but it is contemplated that the various openings and trenches will be filled with oxide or other insulating material to provide a smooth upper surface for supporting additional interconnect layers.

[0036] Figure 7 yes Figure 6 1 . A plan view of the transducer 112 is shown. For the first edge, the distributed current contacts 614 are labeled D11, D12, D13, D14; for the second edge, the distributed current contacts are labeled D21, D22, D23, and D24; for the third edge, the distributed current contacts are labeled D31, D32, D33, D34; and for the fourth edge, the distributed current contacts are labeled D41, D42, D43, and D44. As previously described, the distributed current contacts 614 can be interconnected and maintained at the same voltage. For the first edge, the sensing contacts 616 are labeled S11, S12; for the second edge, the sensing contacts are labeled S21, S22; for the third edge, the sensing contacts are labeled S31, S32; and for the fourth edge, the sensing contacts are labeled S41, S42. The current focus contact 606 is labeled C. The same principles and formulas as the previous transducer example apply, although enhanced sensitivity can be expected.

[0037] As previously mentioned, transducer size is a design parameter that varies based on manufacturing constraints and sensitivities. Figure 7An example can be shown in which the horizontal dimension of the transducer is approximately 140 microns, with the ridge being approximately 10 microns wide and the opening being approximately a 20 micron by 20 micron square. The current focus contact C can be an 8 micron by 8 micron square, and the grooves 608, 628 can be approximately 1 micron or 2 microns wide. The vertical dimension of the semiconductive body material can be approximately 10 microns, and the depth of the opening 622 and grooves 608, 628 can be approximately 8 microns. The size and placement of the contacts can be parameters that are optimized empirically, for example, through simulation.

[0038] The transducer examples provided herein each have fourfold rotational symmetry (and mirror symmetry across two perpendicular axes), which can facilitate deriving magnetic field components from sensing contact voltage measurement results. Other symmetries, including threefold rotational symmetry, are also feasible. The transducer geometry can be further simplified, although such simplifications may reduce sensitivity and / or increase the complexity of magnetic field component calculations. Instead of measuring magnetic field components, or in addition to measuring magnetic field components, sensing transducers can be used to determine the magnitude and direction of the magnetic field. In some contemplated examples, the calculated component or magnitude can be compared with a threshold value, and a binary output is used to indicate the presence or absence of a field strength above the threshold value.

[0039] Figure 8 is a flow chart showing a sequence of process operations that may be used in an exemplary integrated circuit fabrication method. When discussing the various blocks, reference will be made to the diagrams representing the steps of the method that form the sensor transducer. 9A to 9F The drawings are not drawn to scale; certain dimensions have been exaggerated to illustrate certain features. Figure 9A 902 before the manufacturing process begins. The substrate material can be a single crystal semiconductor material, a semiconductor-on-insulator substrate, a silicon layer on a glass plate, an epitaxial layer grown on a semiconductor substrate, a semiconductor material containing a Group 14 element (e.g., carbon, silicon, germanium, or a combination thereof), or another semiconductor material commonly used in the manufacture of semiconductor components. According to one embodiment, the semiconductor material is lightly doped with an impurity material of p-type conductivity, i.e., a p-type dopant. Alternatively, the semiconductor material can be doped with an impurity material of n-type conductivity.

[0040] Figure 8 A sequence of process operations 802 through 822 is shown for providing bipolar devices, CMOS devices, and DMOS devices on a monolithic integrated circuit substrate. Some of these operations can be utilized to fabricate sensing transducers in designated areas of the substrate. It is contemplated that many existing processes can be adapted in this manner to provide integrated magnetic field sensors without requiring any additional masks, implants, or thermal budgets.

[0041] The manufacturing process begins at block 802, where one or more shallow isolation structures, such as isolation trenches, are formed between different regions of a semiconductor substrate to provide isolation between the multiple regions. Trenches may be formed between any adjacent regions to maintain electrical isolation between these regions. Shallow trench isolation (STI), deep trench isolation, or local oxidation of silicon (LOCOS) techniques may be used to form the isolation trenches. During or after trench formation, a thin pad layer is formed on the surface of the semiconductor substrate using, for example, a wet oxidation technique (such as an in-situ steam generation (ISSG) operation). Although the pad layer is preferably silicon oxide, in practice the pad layer may be any suitable dielectric material including, for example, silicon nitride. In some cases, the pad layer may be supplemented with a stop layer, such as, for example, a polishing stop layer or an etch stop layer sequentially formed on or from a semiconductor substrate material using a thermal growth technique, a deposition technique, a combination of thermal growth techniques and deposition techniques. The pad layer may be the same material as the stop layer, or the pad layer may be a different material from the stop layer.

[0042] In block 804, deep ion implantation operations may be performed to create buried layers, wells, and field plates in those areas of the substrate where such features are desired, for example, at least one well or buried layer in each of at least one MOS device region and a non-volatile memory region. The ability to form wells and buried layers in each of the multiple regions is an advantage of the BCD process. Each feature type may be created using a corresponding photoresist layer coupled with a corresponding photolithography operation to pattern the layer, thereby creating a mask with exposed areas that direct the implanted ions only to the areas where those features are desired. Thus, a buried n-layer mask may be used to create Figure 9B , which exposes the sensing transducer region and any other areas of the n-layer that need to be buried. The n-well mask can be used to create an n-well in the bipolar region, power region, and other desired areas. The p-well mask 906 can be used to create a p-well 908 in the sensing transducer region and other desired areas. The buried layer, n-well, and p-well are doped with impurities ("dopants") that provide the desired conductivity type, which can be implanted ions. The associated masks are removed after use.

[0043] After these deep implant operations, an annealing cycle 806 may be performed to integrate the dopants into the crystal structure of the substrate while also repairing dislocations and other crystal damage caused during the implant process. In block 808, the pad layer may be removed, for example, using a wet etch, before depositing a new pad oxide or other suitable gate dielectric layer over the exposed silicon surface of the substrate. A photolithographic operation is performed to create a patterned mask layer with openings to remove the new pad oxide or other suitable dielectric layer where the gate dielectric is not desired. The exposed dielectric layer areas are removed, and the patterned mask layer is stripped. These steps may be repeated to provide additional gate oxide or dielectric layers where different thicknesses are desired (e.g., for operation under different voltage regimes).

[0044] In block 810, a layer of doped polysilicon (polycrystalline silicon) or another suitable conductive gate material is deposited. In block 812, another photolithography operation is performed to pattern a layer of photoresist material to create openings where gates are not needed to remove the gate material layer. Reactive ion etching can be used to perform the removal. In summary, blocks 808 through 812 are gate formation operations used to form gates above the gate dielectric layer at each location for the MOSFET device and the DMOS device. (The sensor transducer 112 does not include a transistor, and therefore no gate is formed in the transducer region.)

[0045] After stripping the photoresist, another photolithography operation is performed to create a source-drain mask in block 814 having openings to expose areas or other shallowly doped regions where the transistor source and drain are to be provided. Ion implantation can be used to create these shallowly doped regions. The existing gate structure can shield the channel region so that the source and drain regions can be self-aligned. Thereafter, the mask is stripped and optionally followed by deposition of a conformal oxide or a suitable dielectric layer, for example, about 20 nm to 500 nm, to insulate the sides of the gate electrode. If so, an etching operation or a polishing operation can be performed to expose at least a portion of the upper surface of the gate electrode.

[0046] In block 816, another photolithography operation is performed to create an n+ region mask, i.e., a patterned layer, exposing those areas where heavy n-type doping is required for ohmic contacts between the n-type region and the conductive capping layer. Ion implantation operations may be performed to create these n+ ohmic regions.

[0047] After stripping the patterned layer, similar operations may be performed in block 818 to form a p+ region mask 910 and provide heavily p-type doped regions 912, 914, as shown. Figure 9C As shown, an ohmic contact is used between the p-type region and the conductive cover layer.

[0048] In block 820, another photolithography operation with etching and oxidation is performed for later trench isolation in a manner similar to the operation of block 802. The trenches formed in block 820 may be wider and deeper than the shallow trenches of block 802, which could potentially lead to problems related to thermal expansion mismatch if performed earlier in the manufacturing process. Figure 9D Shown are an isolation trench 916 extending downward from the upper surface and toward the buried layer 904 to define an embedded current focus 917 just above the buried layer 904 and a deeper isolation trench 918 reaching the buried layer 904 to isolate the semiconductive body material 902 of the transducer from the bulk material of the substrate.

[0049] In block 821, as Figure 9E As shown, conductive surface contacts 920 and gate contacts can be formed after surface exposure etching using similar photolithography operations using silicide, refractory metals (e.g., nickel, titanium, platinum, cobalt, tungsten, iridium) or other suitable conductive contact materials. These surface contacts 920 connect to ohmic contacts in the transducer region and other device regions of the substrate.

[0050] Thereafter, in block 822, as Figure 9F As shown, a relatively thick oxide or other suitable dielectric layer 922, for example, 20 nm to about 500 nm, may be deposited and planarized before forming and filling vias 924 that provide electrical connections to surface contacts 920. Via filling may be performed simultaneously with the deposition of a first layer of metal or other conductive material, which may be patterned using standard photolithography operations to form connections between the transistor and other devices formed in the substrate.

[0051] Additional layers and "metal" layers may be provided in block 822 before forming a final passivation layer with openings for external connections to the integrated circuit. Standard packaging techniques, such as wire bonding, may be applied to the leadframe during the packaging process or during multi-chip fabrication, where the chip is bonded to another chip or to an interposer that provides additional wire routing.

[0052] We note here that Figure 9FAlso shown are dashed lines indicating the restricted current flow within the electrically isolated path defined by trench 916 to the embedded current focus 917, and further indicating the distributed current flow from the embedded current focus 917. The distributed current flow is directed upward along the z-axis and outward along the x- and y-axes to reach the distributed current contact. The dashed lines indicate the movement of holes in the p-type semiconducting material. In the n-type semiconducting material, the majority carriers would be electrons moving upward and outward in this manner. It is the effect of the magnetic field on this distributed current that generates a set of voltages that can be detected by the sensing contacts and converted into a measurement of the magnetic field.

Claims

1. An integrated circuit device, comprising: a substrate comprising a semiconductive body material having an upper surface; a focal contact on the upper surface, the focal contact connected to an embedded current focal point within the body material through an electrically isolated path; one or more distributed current contacts on the upper surface, the one or more distributed current contacts configured to operate in conjunction with the embedded current focus to create a distributed current flow through the body material; and An arrangement of sensing contacts is located on the upper surface, the arrangement of sensing contacts being configured to detect a set of voltages representing Hall effect measurements of each three-dimensional vector component of a magnetic field acting on the distributed current flow.

2. The integrated circuit device of claim 1, wherein the semiconducting body material is one of: a bulk material of the substrate; an electrically isolated epitaxial material located on the substrate; and an electrically isolated semiconductor well.

3. The integrated circuit device of claim 2, wherein the semiconducting body material is electrically isolated from a substrate bulk material using at least one of trench isolation and a reverse biased PN junction. 4 . The integrated circuit device of claim 1 , wherein the electrically isolated path is electrically isolated from a body material using at least one of trench isolation and a reverse biased PN junction. 5 . The integrated circuit device of claim 1 , wherein the electrically isolated path extends perpendicular to the upper surface for at least five microns.

6. The integrated circuit device of claim 1 , wherein the one or more distributed current contacts are each separated from the focal contact by at least three microns, and the arrangement of the sense contacts is located between the focal contact and the one or more distributed current contacts. 7 . The integrated circuit device of claim 1 , wherein the arrangement of the sensing contacts and the one or more distributed current contacts each have a four-fold rotational symmetry about the focal contact.

8. The integrated circuit device of claim 1, wherein the semiconductive body material has at least one of openings or isolation barriers to enhance sensitivity of the Hall Effect measurements.

9. The integrated circuit device of claim 8, wherein the semiconductive body material has a square mesh configuration having at least eight openings around a fill center containing the embedded current focus. 10 . The integrated circuit device of claim 9 , wherein the square mesh configuration includes a trench extending diagonally from the electrically isolated path to a periphery of the square mesh configuration.

11. A sensing method, comprising: forming a distributed current flow between the embedded current focus and one or more distributed current contacts on a surface of the body, the distributed current flow exhibiting a Hall effect when subjected to a magnetic field; as well as A set of voltages is detected using an arrangement of sensing contacts on the surface of the body, the arrangement providing distinguishable sensitivity to the Hall effect induced by two components of the magnetic field parallel to the surface and the Hall effect induced by a component of the magnetic field perpendicular to the surface.

12. The sensing method according to claim 11, further comprising: The set of voltages is converted into measurements of the two components of the magnetic field parallel to the surface and the component of the magnetic field perpendicular to the surface.

13. The sensing method according to claim 11, further comprising: The set of voltages is converted into a measurement of the magnitude of the magnetic field.

14. The sensing method of claim 13, wherein the measurement of the magnitude is a binary value indicating the presence or absence of a magnetic field having a magnitude exceeding a given threshold.

15. The sensing method of claim 11 , wherein the distributed current flow is confined within a rectangular main body region having a given depth and a surface that is a square, wherein the one or more distributed current contacts include four edge contacts, each edge contact being adjacent to a corresponding edge of the square, and wherein the arrangement of the sensing contacts includes four pairs of sensing contacts, each pair of sensing contacts being positioned between a focus contact and a corresponding one of the four edge contacts. The sensing method according to claim 15 , wherein the arrangement structure of the sensing contact elements has double vertical mirror symmetry.

17. A sensor manufacturing method, comprising: forming an electrically isolated path to an embedded current focus within a semiconductive body material having an upper surface; as well as A set of contact members is provided on the upper surface, the set of contact members comprising: a focus contact connected to the embedded current focus via the electrically isolated path; one or more distributed current contacts configured to create a distributed current flow through the body material to or away from the embedded current focus; and A plurality of sensing contacts are configured to provide a voltage sensitive to a Hall effect measurement of each three-dimensional vector component of a magnetic field acting on the distributed current flow.

18. The sensor manufacturing method of claim 17, wherein the semiconductive body material is substantially homogeneous.

19. The sensor manufacturing method of claim 17, wherein the semiconductive body material comprises openings and / or isolation barriers to shape the distributed current flow.

20. The sensor manufacturing method of claim 17, further comprising providing a square mesh configuration for the semiconductive body material by forming at least eight openings surrounding a filling center containing the embedded current focus.

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