Steady-state thermal resistance testing system and method

Abstract

The invention discloses a steady-state thermal resistance testing system and method. The testing system is configured to comprise a first switch Q1, a second switch Q2, a load inductor L1 and an on-resistor R1, the drain electrode of the first switch Q1 is connected with a first connecting end, the source electrode is connected with a low power supply through the on-resistor R1, and the grid electrode is used for controlling access of the logic PWM1; the drain electrode of the second switch Q2 serves as a second connecting end, the source electrode is connected with the drain electrode of the first switch Q1 through the load inductor L1, and the grid electrode is used for controlling access of the logic PWM2. According to the invention, the load inductor is equivalent to the current source to provide the current required by voltage drop measurement for the tested device, and a high-cost current source does not need to be configured, so that the test cost is reduced; the voltage source is used for supplying power, the current magnitude is obtained through the steady-state voltage of the on-resistance, a current source is replaced for use, and the testing cost is greatly reduced.

Description

Technical Field

[0001] The invention relates to a steady-state thermal resistance testing system and method. Background Art

[0002] Existing thermal resistance testing techniques face the following challenges: First, the testing cost is prohibitive. This is due to the ease with which constant heating can be achieved using thermostats and oil baths. However, since the junction-case temperature difference during thermal resistance testing is typically around 0.6°C, the temperature control system requires precise and stable temperature control. These thermostats and oil baths are relatively expensive, and currently, no cost-effective alternatives exist. Furthermore, the current source is expensive. Secondly, after increasing the power level for heating, a rapid switch to low-current voltage drop testing is required, which is difficult to control and affects test accuracy. Summary of the Invention

[0003] The purpose of the present invention is to provide a steady-state thermal resistance testing system, which can reduce testing costs and ensure testing accuracy.

[0004] The test system provided by the present invention is configured to include a first switch Q1, a second switch Q2, a load inductor L1, and an on-resistor R1. The drain of the first switch Q1 is connected to a first terminal, the source is connected to a low power supply via the on-resistor R1, and the gate is used for accessing the control logic PWM1. The drain of the second switch Q2 serves as a second terminal, the source is connected to the drain of the first switch Q1 via the load inductor L1, and the gate is used for accessing the control logic PWM2. When performing a steady-state thermal resistance test, the system includes:

[0005] Step 1: The drain and source of the device under test Q are connected to the second connection terminal and the first connection terminal respectively, the power supply voltage VCC is connected to the second connection terminal, and the gate of the device under test Q is connected to the control logic PWM;

[0006] Step 2: Place the device under test Q on a heating device. When the temperature of the heating device is raised until the bottom shell temperature of the device under test Q no longer changes, the temperature of the heating device is the initial junction temperature and the voltage drop V of the device under test is measured. F Each time the junction temperature is measured, a certain temperature gradient is set to obtain different junction temperatures T j The voltage drop V F ;

[0007] Different junction temperature T j When the current flowing through the on-resistor R1 reaches the requirement, the control logic PWM1 turns the first switch Q1 off, and the current on the load inductor L1 flows through the body diode of the device under test Q. The voltage drop V of the device under test Q during the flow is measured.F As the voltage drop at this junction temperature V F ;

[0008] Step 3: According to the junction temperature T j and voltage drop V F Get the temperature sensitivity coefficient relationship of the device under test;

[0009] Step 4: After the temperature of the heating device cools down to room temperature, control logic PWM1, control logic PWM2, and control logic PWM make the first switch Q1 in the on state, the second switch Q2 in the off state, and the device under test Q in the on state. When the temperature of the device under test Q reaches thermal equilibrium after a certain period of time, measure the shell temperature T of the device under test Q. C , voltage U across the on-resistance R1 R1 ;

[0010] Step 5: Control logic PWM1, control logic PWM2, and control logic PWM to change the states of the first switch Q1, the second switch Q2, and the device under test Q from the first switch Q1 being on, the second switch Q2 being off, and the device under test Q being on to the first switch Q1 being on, the second switch Q2 being on, and the device under test Q being off, and measure the voltage drop V of the device under test at this time. F1 ;

[0011] Step 6: Obtain the thermal resistance R of the device under test by the following method th jc ;

[0012]

[0013] Where, T j1 The voltage drop of the device under test is V F1 The junction temperature is obtained from the temperature sensitivity coefficient relationship; I D is the current flowing through the device under test, and U R1 / R1 is obtained.

[0014] The present invention also provides a steady-state thermal resistance test method, which measures the steady-state thermal resistance R of the device under test in the following manner: th jc ;

[0015]

[0016] Where, T j1 The voltage drop of the device under test is V F1 The junction temperature is obtained from the temperature sensitivity coefficient relationship; T C The case temperature of the device under test when it is in the on state and reaches thermal equilibrium; the voltage drop V F1 It is the voltage drop when the device under test is converted to the cut-off state at the instant when the device under test reaches thermal equilibrium in the on-state; I Dis the current flowing through the device under test;

[0017] The temperature sensitivity coefficient relationship is determined by the following steps:

[0018] Step 1: At different junction temperatures T j Under the double pulse test state, the voltage drop V when the current on the load inductor is freewheeling through the body diode of the device under test is measured. F ;

[0019] Step 2: According to the junction temperature T j and voltage drop V F Obtain the temperature sensitivity coefficient relationship of the device under test.

[0020] Beneficial effects of the present invention: The present invention utilizes the load inductance equivalent to a current source to provide the current required for measuring the voltage drop of the device under test, without configuring a high-cost current source, thereby reducing the test cost.

[0021] The present invention utilizes a voltage source for power supply and utilizes the steady-state voltage of the on-resistance to obtain the current magnitude, thereby replacing the current source and greatly reducing the test cost.

[0022] The present invention uses switches and control logic to control the state of the device under test. Its switching speed is fast and faster than the traditional current source output adjustment. The junction temperature corresponding to the measured VF is closer to the true value, ensuring the accuracy of the test. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] In order to more clearly illustrate the embodiments of the present application, the following briefly introduces the drawings required for or involved in the embodiments. Obviously, the drawings described below are only some embodiments of the present application. Without inventive work, other drawings can be obtained based on these drawings:

[0024] Figure 1 A partial schematic diagram of the test system provided by the present invention;

[0025] Figure 2 is the junction temperature T j -Voltage drop V F Relationship diagram. DETAILED DESCRIPTION

[0026] This section describes the present invention more fully with reference to the accompanying drawings, in which illustrative embodiments of the invention are shown. However, the present invention may be embodied in many different forms and should not be construed as limited to the embodiments described herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete and will fully convey the scope of the invention to those skilled in the art.

[0027] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the present invention. As used herein, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "include" and "comprising," when used herein, specify the presence of the recited features, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, steps, operations, elements, components, and / or combinations thereof.

[0028] Unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. It will be further understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and will not be interpreted according to an idealized or very formal meaning unless specifically defined herein.

[0029] Please refer to Figure 1 The steady-state thermal resistance test system provided by the present invention includes a first switch Q1, a second switch Q2, a load inductor L1, and an on-resistor R1. The drain of the first switch Q1 is connected to a first terminal, the source is connected to a low power supply via the on-resistor R1, and the gate is used for accessing the control logic PWM1. The drain of the second switch Q2 serves as a second terminal, the source is connected to the drain of the first switch Q1 via the load inductor L1, and the gate is used for accessing the control logic PWM2. When performing a steady-state thermal resistance test, the system includes:

[0030] Step 1: The drain and source of the device under test Q are connected to the second connection terminal and the first connection terminal respectively, the power supply VCC is connected to the second connection terminal, and the gate of the device under test Q is connected to the control logic PWM;

[0031] Step 2: Place the device under test Q on a heating device. Heat the device until the bottom shell temperature of the device under test Q stabilizes for 5 minutes without changing. The temperature of the heating device is the initial junction temperature. Start measuring the voltage drop V of the device under test. F Each time the junction temperature is measured, a certain temperature gradient is set to obtain different junction temperatures T j The voltage drop V F ;

[0032] Different junction temperature T j When the current flowing through the on-resistor R1 reaches the requirement, the control logic PWM1 turns the first switch Q1 off, and the current on the load inductor L1 flows through the body diode of the device under test Q. The voltage drop V of the device under test Q during the flow is measured. FAs the voltage drop at this junction temperature V F ;

[0033] Step 3: According to the junction temperature T j and voltage drop V F Get the temperature sensitivity coefficient relationship of the device under test, using the voltage drop V F The horizontal axis is the junction temperature T j As the vertical axis, different junction temperatures T j Voltage drop V F Fitting into a straight line, the slope of the straight line is the temperature sensitivity coefficient K, the temperature sensitivity coefficient relationship is as follows:

[0034] T j =KV F +B

[0035] Where: K is the temperature sensitivity coefficient, which is determined by the junction temperature T j and voltage drop V F Determine that B is a constant;

[0036] Step 4: After the temperature of the heating device cools down to room temperature, control logic PWM1, control logic PWM2, and control logic PWM make the first switch Q1 in the on state, the second switch Q2 in the off state, and the device under test Q in the on state. When the temperature of the device under test Q reaches thermal equilibrium after a certain period of time, measure the shell temperature T of the device under test Q. C , voltage U across the on-resistance R1 R1 ;

[0037] Step 5: Control logic PWM1, control logic PWM2, and control logic PWM to change the states of the first switch Q1, the second switch Q2, and the device under test Q from the first switch Q1 being on, the second switch Q2 being off, and the device under test Q being on to the first switch Q1 being on, the second switch Q2 being on, and the device under test Q being off, and measure the voltage drop V of the device under test at this time. F1 , the voltage drop V F1 Substituting the temperature sensitivity coefficient relationship into the equation, we can get the junction temperature T corresponding to the voltage drop. j1 ;

[0038] Step 6: Obtain the thermal resistance R of the device under test by the following method th jc ;

[0039]

[0040] Where, I D is the current flowing through the device under test, and U R1 / R1 is obtained.

[0041] The "thermal equilibrium" described in the above steps refers to the state when the temperature of the bottom shell of the device under test remains constant and the voltage across the on-resistance is stable. The thermal equilibrium discussed in this article involves either heating the bottom shell of the device under test to maintain constant temperature, in which case the device under test is in the off state; or a situation where the heating device does not heat the device but instead turns it into the on state. Current flows through the device, causing it to heat up and its junction temperature to increase, which persists for a period of time until thermal equilibrium is reached. "Steady-state thermal resistance" refers to the thermal resistance of the device under test when it reaches thermal equilibrium.

[0042] The control logic PWM1, the control logic PWM2, and the control logic PWM refer to logic signals for controlling the first switch Q1, the second switch Q2, and the device under test Q to be turned on or off, and are provided by an external control circuit.

[0043] During the steady-state thermal resistance test, the on-resistor cannot contact the heating device because when the voltage source VCC is connected to the second connection terminal, the on-resistor will generate a certain degree of heat. To prevent this heat from affecting the thermal balance, the on-resistor cannot contact the heating device to avoid heat transfer. The on-resistor is used to control the on-time of the first switch Q1. The on-time is the time it remains on, that is, the duration of the high level. According to I=U T / L is calculated, where U T is the VCC voltage value, T is the high level duration of the first switch Q1, and L is the inductance of the load inductor. Then, the turn-on time is adjusted according to the calculated current size. For example, if the calculated current size is 50mA, that is, when the current reaches 50mA, the first switch Q1 is turned off.

[0044] When the first switch Q1 is turned off, the device under test Q and the load inductor L1 form a freewheeling loop. The current of the load inductor L1 is freewheeling through the body diode of Q. The voltage drop V of the body diode of Q during freewheeling is measured. F , recorded as the corresponding voltage drop V at this temperature F After the first switch Q1 is turned off, the current stored in the load inductor L1 provides current for Q, replacing the high-cost current source used in existing tests.

[0045] The temperature of the bottom shell of the device under test Q is measured by a thermocouple. The heating device can be a temperature-adjustable oil bath. During the entire test process, the device under test Q should be continuously immersed in the oil bath, and the thermocouple is located at the bottom of the device under test Q. When the thermocouple shows that the temperature no longer changes, the voltage across the on-resistance is also stable, that is, thermal equilibrium is reached.

[0046] During the test, the junction temperature was set in 20°C steps for each measurement. Because the junction temperature changes slightly with temperature (typically 2mV / °C), a small temperature step results in insignificant changes and large test errors. Therefore, the step size was set to 20°C, and the temperature range was set from room temperature to 150°C.

[0047] During the test, the power supply voltage VCC, inductor size, and on-resistance are selected according to the test requirements. For example, the power supply voltage VCC is initially set at 10V and can be adjusted later according to the temperature rise. A large inductor is selected (because the current when measuring the voltage drop is relatively small, only 50mA requires a large inductor for continuous current, so a 1mH inductor is selected); the on-resistance is a power resistor of 20Ω.

[0048] During the test, it can be silicon-based MOSFET, IGBT, or it can be SiC, GaN and other types of MOSFET, IGBT.

[0049] The present disclosure has been described using the aforementioned embodiments. However, the aforementioned embodiments are merely exemplary embodiments of the present disclosure. It should be noted that the disclosed embodiments do not limit the scope of the present disclosure. On the contrary, modifications and alterations made without departing from the spirit and scope of the present disclosure are within the scope of patent protection of the present disclosure.

Claims

1. A steady-state thermal resistance test system, characterized by: The system is configured to include a first switch Q1, a second switch Q2, a load inductor L1, and an on-resistor R1; the drain of the first switch Q1 is connected to a first terminal, the source is connected to a low power supply via the on-resistor R1, and the gate is used for accessing the control logic PWM1; the drain of the second switch Q2 serves as a second terminal, the source is connected to the drain of the first switch Q1 via the load inductor L1, and the gate is used for accessing the control logic PWM2; The system performs steady-state thermal resistance testing, including: Step 1: The drain and source of the device under test Q are connected to the second connection terminal and the first connection terminal respectively, the power supply voltage VCC is connected to the second connection terminal, and the gate of the device under test Q is connected to the control logic PWM; Step 2: Place the device under test Q on a heating device. When the temperature of the heating device is raised until the bottom shell temperature of the device under test Q no longer changes, the temperature of the heating device is the initial junction temperature and the voltage drop V of the device under test is measured. F Each time the junction temperature is measured, a certain temperature gradient is set to obtain different junction temperatures T j The voltage drop V F ; Different junction temperature T j When the current flowing through the on-resistor R1 reaches the requirement, the control logic PWM1 turns the first switch Q1 off, and the current on the load inductor L1 flows through the body diode of the device under test Q. The voltage drop V of the device under test Q during the flow is measured. F As the voltage drop at this junction temperature V F ; Step 3: According to the junction temperature T j and voltage drop V F Get the temperature sensitivity coefficient relationship of the device under test; Step 4: After the temperature of the heating device cools down to room temperature, control logic PWM1, control logic PWM2, and control logic PWM make the first switch Q1 in the on state, the second switch Q2 in the off state, and the device under test Q in the on state. When the temperature of the device under test Q reaches thermal equilibrium after a certain period of time, measure the shell temperature T of the device under test Q. C , voltage U across the on-resistance R1 R1 ; Step 5: Control logic PWM1, control logic PWM2, and control logic PWM to change the states of the first switch Q1, the second switch Q2, and the device under test Q from the first switch Q1 being on, the second switch Q2 being off, and the device under test Q being on to the first switch Q1 being on, the second switch Q2 being on, and the device under test Q being off, and measure the voltage drop V of the device under test at this time. F1 ; Step 6: Obtain the thermal resistance R of the device under test by the following method thjc ; Where, T j1 The voltage drop of the device under test is V F1 The junction temperature is obtained from the temperature sensitivity coefficient relationship; I D is the current flowing through the device under test, and U R1 / R1 is obtained.

2. The steady-state thermal resistance testing system according to claim 1, characterized in that: The junction temperature was set in steps of 20°C for each measurement.

3. The steady-state thermal resistance testing system according to claim 1, characterized in that: The temperature sensitivity coefficient relationship is as follows: T j =KV F +B Where: K is the temperature sensitivity coefficient, which is determined by the junction temperature T j and voltage drop V F OK, B is a constant.

4. The steady-state thermal resistance testing system according to claim 1, characterized in that: The system also includes a heating device, which is an oil bath with adjustable temperature.

5. The steady-state thermal resistance testing system according to claim 1, characterized in that: The system also includes a measuring device for measuring the voltage drop and junction temperature of the device under test.

6. A steady-state thermal resistance test method, characterized in that: This method measures the steady-state thermal resistance R of the device under test in the following way thjc ; Where, T j1 The voltage drop of the device under test is V F1 The junction temperature is obtained from the temperature sensitivity coefficient relationship; T C The case temperature of the device under test when it is in the on state and reaches thermal equilibrium; the voltage drop V F1 It is the voltage drop when the device under test is converted to the cut-off state at the instant when the device under test reaches thermal equilibrium in the on-state; I D is the current flowing through the device under test; The temperature sensitivity coefficient relationship is determined by the following steps: Step 1: At different junction temperatures T j Under the double pulse test state, the voltage drop V when the current on the load inductor is freewheeling through the body diode of the device under test is measured. F ; Step 2: According to the junction temperature T j and voltage drop V F Obtain the temperature sensitivity coefficient relationship of the device under test.

7. The steady-state thermal resistance testing method according to claim 6, characterized in that: The junction temperature T j The device under test is placed in a heating device. When the heating device is heated up so that the temperature of the bottom shell of the device under test no longer changes, the voltage drop V of the device under test is measured starting from this temperature as the initial junction temperature. F Each time the junction temperature is measured, a certain temperature gradient is set to obtain different junction temperatures T j The voltage drop V F .

8. The steady-state thermal resistance testing method according to claim 7, characterized in that: The junction temperature was set in steps of 20°C for each measurement.

9. The steady-state thermal resistance testing method according to claim 6, characterized in that: The temperature sensitivity coefficient relationship is as follows: T j =KV F +B Where: K is the temperature sensitivity coefficient, which is determined by the junction temperature T j and voltage drop V F OK, B is a constant.

10. The steady-state thermal resistance testing method according to claim 6, characterized in that: The current I D It is the current flowing through the device under test when the device under test is in the on state and reaches thermal equilibrium.

Images