Compilation environment generation method and device, electronic equipment and storage medium

By obtaining the compilation requirements of the target chip and using preset configuration files to generate the compilation environment, the time-consuming and error-prone problem of the generation of the compilation environment in chip design is solved, and efficient and accurate compilation environment generation is achieved.

CN120493820APending Publication Date: 2025-08-15CHENGDU HAIGUANG INTEGRATED CIRCUIT DESIGN CO LTD
View PDF 0 Cites 0 Cited by

Patent Information

Application Number
CN202510614803.4
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-05-13
Publication Date
2025-08-15

AI Technical Summary

Technical Problem

During the chip design and development process, as the chip complexity increases, when a large number of functional modules are integrated into the compilation environment according to different needs, the generation of the compilation environment is time-consuming and error-prone.

Method used

By obtaining the compilation requirements of the target chip, the compilation environment is generated for the target chip based on the configuration information of the target module in different manifestations in the preset configuration file, and the compilation environment generation process is optimized using the tree logic structure and attribute list.

Benefits of technology

It improves the accuracy and efficiency of the compilation environment generation, reduces complex combing operations, and realizes structured storage and reuse of functional modules.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN120493820A_ABST
    Figure CN120493820A_ABST
Patent Text Reader

Abstract

The embodiment of the invention discloses a compiling environment generation method and device, electronic equipment and a storage medium. The accuracy and efficiency of compiling environment generation can be effectively improved. The method comprises the steps of obtaining a compiling demand of a target chip, wherein the compiling demand is used for indicating a to-be-compiled target module in the target chip and a target representation form of the target module; according to the compiling requirement, configuration information of the target module in the target representation form is obtained from a preset configuration file, target configuration information is obtained, the preset configuration file comprises configuration information of at least one function module of the target chip in at least one representation form, and the target configuration information comprises configuration information of at least one function module of the target chip in at least one representation form. The target representation form is one or more representation forms in the at least one representation form; and generating a compiling environment for the target chip according to the target configuration information of the target module. The method can be used for compiling environment generation.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The present invention relates to the field of computer technology, and in particular to a compilation environment generation method, device, electronic device and storage medium. Background Art

[0002] With the advancement of computer and semiconductor technology, chip circuit structures have become increasingly complex. To effectively design and develop chips, such as SoCs (systems on chips), circuit modules (i.e., functional modules) with the same functionality are typically implemented using different abstraction levels. For example, in descending order of abstraction levels, these abstraction levels can include behavioral model level, register-transfer level (RTL), gate-level netlist, and digital switch level. The higher the level of abstraction, the less hardware detail it represents, enabling faster and more concise modeling. Low-level abstraction designs, such as gate-level netlists and mathematical switch levels, describe the physical implementation of the circuit in greater detail, enabling more accurate predictions of circuit performance and behavior.

[0003] During chip design and development, it's often necessary to simulate and verify some or all of the chip's functional modules based on different requirements and purposes, resulting in multiple compilation requirements for these functional modules. For example, in the pre-simulation phase, a functional module uses the abstract form of RTL, while in the post-simulation phase, to accelerate simulation, some functional modules may use the abstract form of gate-level netlists. The requirements for functional modules vary during mixed simulation and performance simulation. Due to the different abstract forms of functional modules, the corresponding compilation environments also differ. Therefore, as chip complexity increases, integrating a large number of functional modules into the compilation environment based on different requirements requires extensive organization, making the generation of the compilation environment very time-consuming and error-prone. Summary of the Invention

[0004] In view of this, embodiments of the present invention provide a compilation environment generation method, apparatus, electronic device, and storage medium, which can effectively improve the accuracy and efficiency of compilation environment generation.

[0005] In a first aspect, an embodiment of the present invention provides a compilation environment generation method comprising: obtaining compilation requirements of a target chip, the compilation requirements being used to indicate a target module to be compiled in the target chip and a target representation of the target module; obtaining, according to the compilation requirements, configuration information of the target module under the target representation from a preset configuration file to obtain target configuration information, wherein the preset configuration file includes configuration information of at least one functional module of the target chip under at least one representation, and the target representation is one or more representations of the at least one representation; and generating a compilation environment for the target chip according to the target configuration information of the target module.

[0006] In one embodiment, the configuration information includes attributes of the functional module, and the attributes include at least one of the following: compiler name, compilation option, macro definition, file path, and sub-module set.

[0007] In one embodiment, in the preset configuration file, a tree-like logical structure is formed between the functional modules of the target chip, each functional module is a node of the tree-like logical structure, and the tree-like logical structure includes nodes of at least one level.

[0008] In one embodiment, the tree-like logical structure includes nodes of at least two levels, and in the nodes of any two adjacent levels, at least one functional module of the upper level serves as a parent module, and each parent module includes at least one functional module of the lower level as a child module; the affiliation between the parent module and the child module is indicated by the child module set in the attributes of the functional module serving as the parent module.

[0009] In one embodiment, the method of obtaining the configuration information of the target module under the target expression form from a preset configuration file according to the compilation requirement to obtain the target configuration information includes: determining the identifier of the target module and the target expression form according to the compilation requirement; searching the preset configuration file for a functional module corresponding to the identifier of the target module according to the identifier of the target module to obtain an alternative module; and selecting the configuration information under the target expression form from the configuration information under at least one expression form of the alternative module to obtain the target configuration information.

[0010] In one embodiment, after obtaining the target configuration information, the method further includes: storing the target configuration information in a database, wherein the database uses the target representation of the target module as the minimum granularity to achieve structured storage and reuse of the target module.

[0011] In one embodiment, generating a compilation environment for the target chip based on the target configuration information of the target module includes: obtaining an attribute list of the target configuration information based on the target configuration information of the target module, the attribute list including at least one attribute, the attribute including an attribute name and an attribute value corresponding to the attribute name; generating a compilation environment for the target chip based on the attribute name of each attribute in the attribute list and the attribute value corresponding to the attribute name.

[0012] In one embodiment, generating a compilation environment for the target chip according to the target configuration information of the target module includes: generating a compilation rule file and a file list of the target module according to the target description information of the target module.

[0013] In one embodiment, the compilation rule file includes the compilation target of the target module, the dependency conditions for achieving the compilation target, and commands for achieving the compilation target of the target module and the dependency conditions.

[0014] In one embodiment, the configuration information includes attributes of the functional module and a file list of the functional module, the attributes including: a submodule set; in the preset configuration file, a tree-like logical structure is formed between the functional modules of the target chip, each functional module is a node of the tree-like logical structure, and the tree-like logical structure includes at least one level of nodes; the tree-like logical structure includes at least two levels of nodes, and in any two adjacent levels of nodes, at least one functional module at the upper level serves as a parent module, and each parent module includes at least one functional module at the lower level as a child module; the affiliation between the parent module and the child modules is indicated by the submodule set in the attributes of the functional module serving as the parent module; generating the file list of the target module includes: determining, based on the target configuration information, a logical relationship between each parent module and each child module in the target module to form a structure tree of the target module, wherein each functional module in the structure tree has its own file list; and generating the file list of the target module based on the structure tree of the target module and a bottom-up dependency relationship.

[0015] In one embodiment, after generating a compilation environment for the target chip according to the target description information of the target module, the method further includes: performing compilation based on the compilation environment to obtain a compilation result, and the compilation result is used to implement the compilation requirement.

[0016] In a second aspect, an embodiment of the present invention further provides a compilation environment generation device, comprising: a first acquisition unit, configured to acquire the compilation requirements of a target chip, wherein the compilation requirements are used to indicate a target module to be compiled in the target chip and a target expression form of the target module; a second acquisition unit, configured to acquire, according to the compilation requirements, configuration information of the target module under the target expression form from a preset configuration file, to obtain target configuration information, wherein the preset configuration file includes configuration information of at least one functional module of the target chip under at least one expression form, and the target expression form is one or more expressions of the at least one expression form; and a generation unit, configured to generate a compilation environment for the target chip according to the target configuration information of the target module.

[0017] In one embodiment, the configuration information includes attributes of the functional module, and the attributes include at least one of the following: compiler name, compilation option, macro definition, file path, and sub-module set.

[0018] In one embodiment, in the preset configuration file, a tree-like logical structure is formed between the functional modules of the target chip, each functional module is a node of the tree-like logical structure, and the tree-like logical structure includes nodes of at least one level.

[0019] In one embodiment, the tree-like logical structure includes nodes of at least two levels, and in the nodes of any two adjacent levels, at least one functional module of the upper level serves as a parent module, and each parent module includes at least one functional module of the lower level as a child module; the affiliation between the parent module and the child module is indicated by the child module set in the attributes of the functional module serving as the parent module.

[0020] In one embodiment, the configuration unit is specifically used to: determine the identifier of the target module and the target expression form according to the compilation requirements; search the preset configuration file for the functional module corresponding to the identifier of the target module according to the identifier of the target module to obtain an alternative module; and select the configuration information under the target expression form from the configuration information under at least one expression form of the alternative module to obtain the target configuration information.

[0021] In one embodiment, the apparatus further comprises: a storing unit configured to store the target configuration information into a database, wherein the database uses the target representation of the target module as a minimum granularity to achieve structured storage and reuse of the target module.

[0022] In one embodiment, the compilation unit is specifically used to: obtain an attribute list of the target configuration information according to the target configuration information of the target module, wherein the attribute list includes at least one attribute, and the attribute includes an attribute name and an attribute value corresponding to the attribute name; generate a compilation environment for the target chip according to the attribute name of each attribute in the attribute list and the attribute value corresponding to the attribute name.

[0023] In one embodiment, the compilation unit is specifically configured to generate a compilation rule file and a file list of the target module according to the target description information of the target module.

[0024] In one embodiment, the compilation rule file includes the compilation target of the target module, the dependency conditions of the compilation target, and commands for implementing the compilation target and the dependency conditions.

[0025] In one embodiment, the configuration information includes attributes of the functional module and a file list of the functional module, the attributes including: a sub-module set; in the preset configuration file, a tree-like logical structure is formed between the functional modules of the target chip, each functional module is a node of the tree-like logical structure, and the tree-like logical structure includes at least one level of nodes; the tree-like logical structure includes at least two levels of nodes, and in any two adjacent levels of nodes, at least one functional module at the upper level serves as a parent module, and each parent module includes at least one functional module at the lower level as a child module; the affiliation between the parent module and the child modules is indicated by the sub-module set in the attributes of the functional module serving as the parent module; the compilation unit is specifically configured to: determine, based on the target configuration information, a logical relationship between each parent module and each child module in the target module to form a structure tree of the target module, wherein each functional module in the structure tree has its own file list; and generate, based on the structure tree of the target module and in accordance with the bottom-up dependency relationship, a file list of the target module.

[0026] In one embodiment, the apparatus further includes: a compilation unit, configured to perform compilation based on the compilation environment to obtain a compilation result, wherein the compilation result is used to implement the compilation requirement.

[0027] In a third aspect, an embodiment of the present invention further provides an electronic device, comprising: a housing, a processor, a memory, a circuit board, and a power supply circuit, wherein the circuit board is placed inside the space enclosed by the housing, and the processor and the memory are arranged on the circuit board; a power supply circuit for supplying power to various circuits or devices of the above-mentioned electronic device; the memory is used to store executable program code; the processor runs a program corresponding to the executable program code by reading the executable program code stored in the memory, and is used to execute the compilation environment generation method provided by any embodiment of the present invention.

[0028] In a fourth aspect, an embodiment of the present invention further provides a computer-readable storage medium, which stores one or more programs, and the one or more programs can be executed by one or more processors to implement the compilation environment generation method provided by any embodiment of the present invention.

[0029] The compilation environment generation method, apparatus, electronic device, and storage medium provided by embodiments of the present invention are capable of obtaining the compilation requirements of a target chip and, based on the compilation requirements, obtaining the configuration information of the target module in the target representation from a preset configuration file to obtain target configuration information, thereby generating a compilation environment for the target chip based on the target configuration information of the target module. The compilation requirements are used to indicate the target module to be compiled in the target chip and the target representation of the target module; the preset configuration file includes configuration information of at least one functional module of the target chip in at least one representation, and the target representation is one or more of the at least one representation. Since the preset configuration file includes the configuration information of at least one functional module of the target chip under at least one expression form, the preset configuration file can be used to provide the target module with configuration information under various expression forms. Since the target expression form is one or more of the at least one expression form, the required configuration information under the target expression form can be selected from the configuration information under various expression forms of the target module according to the compilation requirements to obtain the target configuration information, and a compilation environment can be generated for the target chip based on the target configuration information. There is no need to perform complicated combing operations during the entire process, thereby effectively improving the generation efficiency and accuracy of the compilation environment. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0031] Figure 1 A flow chart of a method for generating a compilation environment provided by an embodiment of the present invention; Figure 2 This is a schematic diagram of a configuration file for a functional module in an embodiment of the present invention; Figure 3 A flowchart of a method for generating a compilation environment provided by an embodiment of the present invention; Figure 4 This is a tree-like logical structure diagram of functional modules in an embodiment of the present invention; Figure 5 A flow chart of a method for generating a compilation environment provided by an embodiment of the present invention; Figure 6 A schematic diagram of storing target configuration information provided by an embodiment of the present invention in a database; Figure 7 A schematic structural diagram of a compiling device provided by an embodiment of the present invention; Figure 8 A schematic structural diagram of an electronic device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0032] The embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0033] It should be understood that the embodiments described are only a portion of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without creative work are within the scope of protection of the present invention.

[0034] In a first aspect, an embodiment of the present invention provides a compilation environment generation method, which can effectively improve the accuracy and efficiency of compilation environment generation.

[0035] like Figure 1 As shown, an embodiment of the present invention provides a compilation environment generation method, comprising: S11 , obtaining a compilation requirement of a target chip, where the compilation requirement is used to indicate a target module to be compiled in the target chip and a target expression form of the target module.

[0036] In this step, the compilation requirements of the target chip can be obtained. The compilation requirements of the target chip can be used to indicate the target module to be compiled and the target representation of the target module. In one example, the compilation requirements of the target chip can be presented in the form of a file. For example, JSON (JavaScript Object Notation) can be used to describe the compilation requirements of the target chip to form a compilation requirements file.

[0037] In an embodiment of the present invention, the target module to be compiled may be a functional module in the target chip, or may be multiple functional modules. The target module to be compiled may or may not include submodules. When the target module to be compiled includes submodules, the generated compilation environment may be used to compile the target module and its submodules.

[0038] The target representation of a target module can refer to the configuration of the target module. This configuration can be related to the abstraction level of the target module or the design stage of the target module, reflecting the specific compilation requirements of the functional module to be compiled. In one example, such specific compilation requirements can include the abstraction level requirements of the target functional module, such as the behavioral model level, RTL level, gate-level netlist, and digital switch level. In another example, such specific compilation requirements can also include the design stage requirements of the target functional module, such as synthesis, pre-simulation, post-simulation, performance simulation, performance evaluation, modeling, pre-simulation acceleration, etc. The target representation can be a single representation or a combination of multiple representations. In embodiments of the present invention, each functional module in the target chip can have multiple compilation requirements. For example, in the pre-simulation stage, a functional module may require compilation in RTL mode, while in the post-simulation stage, to accelerate simulation, some functional modules may be compiled in gate-level netlist form.

[0039] S12. According to the compilation requirement, obtain the configuration information of the target module in the target expression form from a preset configuration file to obtain target configuration information, wherein the preset configuration file includes the configuration information of at least one functional module of the target chip in at least one expression form, and the target expression form is one or more expression forms of the at least one expression form.

[0040] In this step, target configuration information can be obtained from a preset configuration file according to the compilation requirement obtained in step S11.

[0041] The preset configuration file can be a unified specification configuration file established for the functional modules of the target chip, which is used to describe the configuration information of the functional modules in different forms in a unified format. In an embodiment of the present invention, each functional module can have one or more forms, and the same functional module can have different configuration information in different forms. Optionally, in an embodiment of the present invention, the preset configuration file can be a separate configuration file, that is, the configuration information of all functional modules is recorded in the same preset configuration file, or each functional module can have its own preset configuration file.

[0042] In a specific implementation, the specific compilation requirements of the target chip can be determined by analyzing the target functional modules and target representation of the target chip. Based on the compilation requirements determined in step S11, the target module and the target representation of the target module are obtained from a preset configuration file to obtain target configuration information. In one example, the target configuration information may include information related to the compilation environment of the target module in the target representation.

[0043] S13: Generate a compilation environment for the target chip according to the target configuration information of the target module.

[0044] In this step, a compilation environment can be generated for the target chip based on the target configuration information of the target module obtained in step S12. The compilation environment generated for the target chip can refer to a compilation environment for compiling one or more functional modules in the target chip, or can refer to a system-level compilation environment for compiling the target chip at the system level. In one example, the configuration information of the preset configuration file can include information related to the compilation environment, and the target configuration information can include information related to the compilation environment of the target configuration information of the target module, thereby generating a compilation environment for the target chip based on the target configuration information.

[0045] The compilation environment generation method provided by an embodiment of the present invention can obtain the compilation requirements of a target chip and, based on the compilation requirements, obtain the configuration information of the target module in the target representation from a preset configuration file to obtain the target configuration information, thereby generating a compilation environment for the target chip based on the target configuration information of the target module. The compilation requirements are used to indicate the target module to be compiled in the target chip and the target representation of the target module; the preset configuration file includes the configuration information of at least one functional module of the target chip in at least one representation, and the target representation is one or more of the at least one representation. Because the preset configuration file includes the configuration information of at least one functional module of the target chip in at least one representation, the preset configuration file can be used to provide the target module with configuration information in various representations. Since the target representation is one or more of the at least one representation, the configuration information in the target representation can be selected from the configuration information of the target module in various representations based on the compilation requirements to obtain the target configuration information. The compilation environment is then generated for the target chip based on the target configuration information. The entire process does not require complex sorting operations, thereby effectively improving the efficiency and accuracy of compilation environment generation.

[0046] Specifically, in one embodiment of the present invention, after obtaining the compilation requirements of the target chip, in step S12, configuration information of the target module in the target representation is obtained from a preset configuration file based on the compilation requirements. The configuration information includes attributes of the functional module, which include at least one of the following: compiler name, compilation options, macro definition, file path, and submodule set.

[0047] For example, Figure 2 As shown, it is the configuration information of a functional module. The name before the quotation marks “<>” is the keyword in the configuration file, and the name inside the quotation marks “<>” is the configurable parameter. The module and the module terminator are used to distinguish the scope of the functional module file description, and the expression form and the expression form terminator divide the expression form space of the current functional module. For example, the expression form can be the abstract level of the functional module, such as system level, algorithm level, RTL level, gate-level netlist, switch level, etc. For another example, the expression form can be the different stages of the electronic design of the functional module, such as pre-simulation, post-simulation, mixed simulation, performance simulation, etc. Among them, the properties and file list of the functional module are defined in each expression form scope. In Figure 2 In [1], the attributes of a function module definition include the function module's macro definition, compiler name, file include path, and submodule set. The function module's file list may include a list of design source files for the function module. Exemplarily, the design source file list for the function module is defined within a range delimited by compilation options and a compilation option terminator. Compilation parameters define compilation-related options. The compiler name may be, for example, Javac, Eclipse, Ajc, or other related compiler names.

[0048] In another embodiment of the present invention, in the preset configuration file, a tree-like logical structure is formed between the functional modules of the target chip, each functional module is a node of the tree-like logical structure, and the tree-like logical structure includes nodes of at least one level.

[0049] In one embodiment of the present invention, the tree-like logical structure includes nodes of at least two levels, and in the nodes of any two adjacent levels, at least one functional module of the upper level serves as a parent module, and each parent module includes at least one functional module of the lower level as a child module; the affiliation between the parent module and the child module is indicated by the child module set in the attributes of the functional module serving as the parent module.

[0050] In practice, the configuration file format for each sub-module is consistent with the aforementioned functional module configuration file format. If a sub-module contains other sub-modules, the sub-module configuration file name can be further defined. A complex functional module file can be divided into multiple independent module configuration files according to the internal sub-modules, thereby establishing a configuration file tree structure. Figure 3 The figure shows a tree-like logical structure diagram of a function module configuration file.

[0051] In another embodiment of the present invention, obtaining the configuration information of the target module under the target expression form from a preset configuration file according to the compilation requirement to obtain the target configuration information includes: determining the identifier of the target module and the target expression form according to the compilation requirement; searching the preset configuration file for a functional module corresponding to the identifier of the target module according to the identifier of the target module to obtain an alternative module; and selecting the configuration information under the target expression form from the configuration information under at least one expression form of the alternative module to obtain the target configuration information.

[0052] For example, in a compilation environment generation scenario, based on compilation requirements, the target module identifier is first determined to be "sid103," and the corresponding target representation is "RTL." Next, the target module corresponding to the functional module identifier "sid103" is searched and determined from the preset configuration file. The representation defined as RTL is then selected from the target module's representations. Finally, the configuration information for this representation is obtained, which becomes the target configuration information.

[0053] In another embodiment of the present invention, after obtaining the target configuration information, the method further includes: storing the target configuration information in a database, wherein the database uses the target representation of the target module as the minimum granularity to achieve structured storage and reuse of the target module.

[0054] In an embodiment of the present invention, a database can be established with each functional module as a unit, with the expression form of the functional module as the minimum granularity of the database. A database query table can be constructed at the system level to achieve structured storage and reuse of functional modules according to different system configurations. In a specific implementation, the database query table can be queried to delete redundant particles in the database corresponding to each functional module, so that different system configurations only require building a system-level database once. For example, when building a database at the system level, if it is found that the database of the sub-module of the target functional module already exists by querying the database query table, the database of the sub-module will no longer be created. In an embodiment of the present invention, structured storage and reuse of functional modules can be achieved, thereby reducing the time for repeated database creation, increasing the reusability of functional modules, and improving the efficiency of compilation environment generation.

[0055] In another embodiment of the present invention, generating a compilation environment for the target chip based on the target configuration information of the target module includes: obtaining an attribute list of the target configuration information based on the target configuration information of the target module, the attribute list including at least one attribute, the attribute including an attribute name and an attribute value corresponding to the attribute name; generating a compilation environment for the target chip based on the attribute name of each attribute in the attribute list and the attribute value corresponding to the attribute name.

[0056] Specifically, the target configuration information may include various attributes of the target module. Each attribute may form an attribute list, which may include the attribute name and the attribute value corresponding to the attribute name. For example, these attributes may include compilation options, macro definitions, file paths, submodule sets, etc. In a specific implementation, the compiler can be configured and pre-compiled by determining whether the name of the attribute of the target module is a specific value, thereby generating a compilation environment for the target chip.

[0057] For example, if the name of the attribute of the target module is a macro definition, the compiler sets the macro name to the name of the attribute of the target module, and sets the value of the macro name to the value corresponding to the name of the attribute of the target module.<PI 3.14> " indicates that the macro defines PI as 3.14.

[0058] For example, if the name of the attribute of the target module is the compiler name, then the compiler is set to the value corresponding to the name of the attribute of the target module. For example, "compiler name += <gcc>” means the editor name is defined as gcc.

[0059] For example, if the name of the attribute of the target module is a file path, the file path of the compiler is set to the value corresponding to the name of the attribute of the target module. For example, "file include path +=" means that the file include path is defined as: / path / to / lib.

[0060] For example, if the name of the attribute of the target module is a submodule set, then the module whose module name is the value corresponding to the name of the attribute of the target module is added to the target module to be compiled. <dmac> = <rtl>" indicates the definition of the submodule set and the representation of the submodule: DMAC and RTL, respectively. Since the submodule set is defined, when the compilation environment is generated, it is necessary to compile the target functional module and the RTL representation of its submodule DMAC.

[0061] For example, if the name of the attribute of the target module is a compilation option, the compilation option is parsed to determine the compilation parameters and corresponding source files of the compilation option; and the compilation option of the compiler is set to the compilation parameters of the compilation option and the source files corresponding to the compilation parameters. <c><hello.c>The compiler option terminator " indicates that the compiler option is defined as: -c hello.c. If the compiler parameter does not have a corresponding source file, the source file is set to empty.

[0062] In one embodiment of the present invention, the compilation environment may include a compilation rule file of the target module and a file list of the target module. Based on this, generating a compilation environment for the target chip according to the target configuration information of the target module may include: generating a compilation rule file and a file list of the target module according to the target description information of the target module.

[0063] In this embodiment, a compilation data block can be generated based on attributes such as compilation options in the target configuration information and their corresponding attribute values. For example, a compilation options data block can be generated based on compilation parameters in the compilation options and the source files corresponding to the compilation parameters. In a specific implementation, a compilation rule file generation script can be called to write the compilation option data block and the source files of the functional modules into the compilation rule file, thereby obtaining the compilation rule file for the current compilation requirements.

[0064] In this embodiment, the file list can be automatically generated by processing file dependencies from bottom to top based on the tree-linked list format of the functional module configuration files. In one example, the file list of the target module can include the source code files of the target module in the target chip design. In another example, the file list of the target module can also include the output directory structure, such as the src directory for storing source code files and the bin directory for storing binary results.

[0065] In one embodiment of the present invention, the compilation rule file includes the compilation target of the target module, the dependency conditions for realizing the compilation target, and commands for realizing the compilation target of the target module and the dependency conditions.

[0066] In one embodiment of the present invention, the configuration information includes attributes of the functional module and a file list of the functional module, the attributes including a submodule set; in the preset configuration file, a tree-like logical structure is formed between the functional modules of the target chip, each functional module is a node of the tree-like logical structure, and the tree-like logical structure includes at least one level of nodes; the tree-like logical structure includes at least two levels of nodes, and in any two adjacent levels of nodes, at least one functional module at the upper level serves as a parent module, and each parent module includes at least one functional module at the lower level as a child module; the affiliation between the parent module and the child modules is indicated by the submodule set in the attributes of the functional module serving as the parent module; generating the file list of the target module includes: determining, based on the target configuration information, a logical relationship between each parent module and each child module in the target module to form a structure tree of the target module, wherein each functional module in the structure tree has its own file list; and generating the file list of the target module based on the structure tree of the target module and a bottom-up dependency relationship.

[0067] The following takes the generation of a system-level compilation environment for a target chip as an example to describe in detail the compilation environment generation method provided by the embodiment of the present invention. Figure 4 A flow chart of the compilation environment generation method provided by the present invention. Figure 4 As shown, first, a compilation requirement file can be constructed based on the compilation requirements. In specific implementation, json (JavaScript Object Notation) can be used to describe the system-level compilation requirement file. Secondly, a script is used to parse the compilation requirement file to obtain the target module to be compiled and the target representation corresponding to the target module, and to clarify the specific compilation requirements. Thirdly, the preset configuration file corresponding to the target module of the target chip is read in and the target representation is searched. Furthermore, the predicted configuration file of the target module can be processed by a python script, and the attributes under the target representation can be read and parsed and stored in the form of a hash structure.

[0068] In a specific implementation, a file parsing tool can also be developed, using a lexical analyzer (Lex) and a syntax parser (Yacc) to construct a lexical file and a syntax file based on the grammatical rules of the configuration file. The lexical analyzer parses the identifiers in the configuration file into corresponding phrase streams, and the syntax parser then performs grammatical interpretation on the phrase streams and converts them into a computer-readable data structure. If the target functional module contains sub-functional modules, the sub-functional module configuration files are further read and parsed using the file parsing tool.

[0069] Then, a database can be created for the target functional module, with the target representation as the minimum granularity for storage. If a data table for the target representation exists in the database, redundancy processing can be performed to delete unnecessary representation data in the target functional module.

[0070] Next, the compilation parameters are read and deduplicated to generate a parameter list. According to the tree-linked list format of the function module prediction configuration file, the file dependencies are processed from bottom to top, and a file list file is automatically generated. According to the compilation options and other attributes and corresponding attribute values in the function module prediction configuration file, a compilation data block is formed. The compilation rule file generation script is called to write the compilation data block and the source file of the target function module into the compilation rule file to obtain the compilation rule file under the current compilation requirement. At the same time, in order to distinguish different compilation requirements, the generation path of the compilation rule file can be distinguished by the compilation requirement file name. In this way, different compilation rule files can be flexibly and automatically generated, and calling different compilation rule files in the verification environment can achieve multiple compilation requirements.

[0071] The above embodiment provides a method for generating a compilation environment, but the embodiments of the present invention are not limited thereto. In other embodiments of the present invention, compilation may be performed based on the compilation environment to obtain a compilation result.

[0072] Specifically, in one embodiment of the present invention, after generating a compilation environment for the target chip according to the target description information of the target module, the method further includes: compiling based on the compilation environment to obtain a compilation result, and the compilation result is used to implement the compilation requirement.

[0073] In practice, to distinguish between different system configuration environments, the generation path of the compilation rule file is differentiated by the system description file name. This way, different system simulation configurations can flexibly and automatically generate different compilation rule files, and calling different compilation rule files can meet various compilation requirements.

[0074] The following describes in detail the compilation environment generation method provided by the embodiment of the present invention through a specific embodiment.

[0075] like Figure 5 As shown, the compilation environment generation method provided by the embodiment of the present invention may include: S401 : Obtain compilation requirements of a target chip, where the compilation requirements are used to indicate target modules to be compiled in the target chip and target representations of the target modules.

[0076] S402, according to the compilation requirement, obtaining configuration information of the target module in the target representation from a preset configuration file to obtain target configuration information; The preset configuration file includes configuration information of at least one functional module of the target chip in at least one representation form, and the target representation form is one or more representation forms among the at least one representation form.

[0077] S403, acquiring an attribute list of the target configuration information according to the target configuration information of the target module, wherein the attribute list includes at least one attribute, and the attribute includes an attribute name and an attribute value corresponding to the attribute name; The attributes include at least one of the following: compiler name, compilation options, macro definition, file path, and submodule set.

[0078] S404: storing the target configuration information into a database, wherein the database uses the target representation of the target module as the minimum granularity to achieve structured storage and reuse of the target module.

[0079] For example, a schematic diagram of storing target configuration information in a database can be as follows: Figure 6 shown.

[0080] S405, generating a compilation rule file according to the target description information of the target module; The compilation rule file includes the compilation target of the target module, the dependency conditions for realizing the compilation target, and commands for realizing the compilation target of the target module and the dependency conditions.

[0081] S406: Determine the logical relationship between each parent module and each child module in the target module according to the target configuration information, and form a structure tree of the target module. Each functional module in the structure tree has its own file list.

[0082] S407: Generate a file list of the target module according to the structure tree of the target module and the dependency relationship from bottom to top.

[0083] S408 : Compile based on the compilation rule file and the file list to obtain a compilation result, where the compilation result is used to achieve the compilation requirement.

[0084] In a second aspect, an embodiment of the present invention further provides a compilation environment generation device, which can effectively improve the accuracy and efficiency of compilation environment generation.

[0085] like Figure 7 As shown, an embodiment of the present invention further provides a compilation environment generation device, comprising: A first acquiring unit 61 is configured to acquire a compilation requirement of a target chip, where the compilation requirement indicates a target module to be compiled in the target chip and a target representation of the target module; a second obtaining unit 62, configured to obtain, according to the compilation requirement, configuration information of the target module in the target representation from a preset configuration file, to obtain target configuration information, wherein the preset configuration file includes configuration information of at least one functional module of the target chip in at least one representation, and the target representation is one or more of the at least one representation; The generating unit 63 is configured to generate a compilation environment for the target chip according to the target configuration information of the target module.

[0086] The compilation environment generation device provided by an embodiment of the present invention can obtain the compilation requirements of a target chip and, based on the compilation requirements, obtain the configuration information of the target module in the target representation from a preset configuration file to obtain target configuration information, thereby generating a compilation environment for the target chip based on the target configuration information of the target module. The compilation requirements are used to indicate the target module to be compiled in the target chip and the target representation of the target module; the preset configuration file includes the configuration information of at least one functional module of the target chip in at least one representation, and the target representation is one or more of the at least one representation. Because the preset configuration file includes the configuration information of at least one functional module of the target chip in at least one representation, the preset configuration file can provide the target module with configuration information in various representations. Since the target representation is one or more of the at least one representation, the configuration information in the target representation can be selected from the configuration information of the target module in various representations based on the compilation requirements to obtain the target configuration information. The compilation environment is then generated for the target chip based on the target configuration information. The entire process does not require complex sorting operations, thereby effectively improving the efficiency and accuracy of compilation environment generation.

[0087] In one embodiment, the configuration information includes attributes of the functional module, and the attributes include at least one of the following: compiler name, compilation option, macro definition, file path, and sub-module set.

[0088] In one embodiment, in the preset configuration file, a tree-like logical structure is formed between the functional modules of the target chip, each functional module is a node of the tree-like logical structure, and the tree-like logical structure includes nodes of at least one level.

[0089] In one embodiment, the tree-like logical structure includes nodes of at least two levels, and in the nodes of any two adjacent levels, at least one functional module of the upper level serves as a parent module, and each parent module includes at least one functional module of the lower level as a child module; the affiliation between the parent module and the child module is indicated by the child module set in the attributes of the functional module serving as the parent module.

[0090] In one embodiment, the second acquisition unit 62 is specifically used to: determine the identifier of the target module and the target expression form according to the compilation requirements; search the preset configuration file for the functional module corresponding to the identifier of the target module according to the identifier of the target module to obtain an alternative module; and select the configuration information under the target expression form from the configuration information under at least one expression form of the alternative module to obtain the target configuration information.

[0091] In one embodiment, the apparatus further comprises: a storing unit configured to store the target configuration information into a database, wherein the database uses the target representation of the target module as a minimum granularity to achieve structured storage and reuse of the target module.

[0092] In one embodiment, the generation unit 63 is specifically used to: obtain an attribute list of the target configuration information according to the target configuration information of the target module, the attribute list including at least one attribute, and the attribute including an attribute name and an attribute value corresponding to the attribute name; generate a compilation environment for the target chip according to the attribute name of each attribute in the attribute list and the attribute value corresponding to the attribute name.

[0093] In one embodiment, the generating unit 63 is specifically configured to generate a compilation rule file and a file list of the target module according to the target description information of the target module.

[0094] In one embodiment, the compilation rule file includes the compilation target of the target module, the dependency conditions of the compilation target, and commands for implementing the compilation target and the dependency conditions.

[0095] In one embodiment, the configuration information includes attributes of the functional module and a file list of the functional module, wherein the attributes include a submodule set. In the preset configuration file, a tree-like logical structure is formed between the functional modules of the target chip, wherein each functional module is a node of the tree-like logical structure, and the tree-like logical structure includes at least one level of nodes. The tree-like logical structure includes at least two levels of nodes, wherein at least one functional module at an upper level of any two adjacent levels of nodes serves as a parent module, and each parent module includes at least one functional module at a lower level as a child module. The affiliation between the parent module and the child modules is indicated by the submodule set in the attributes of the functional module serving as the parent module. The generating unit 63 is specifically configured to: determine, based on the target configuration information, a logical relationship between each parent module and each child module in the target module to form a structure tree of the target module, wherein each functional module in the structure tree has its own file list; and generate, based on the structure tree of the target module and in accordance with the bottom-up dependency relationship, a file list of the target module.

[0096] In one embodiment, the apparatus further includes: a compilation unit, configured to perform compilation based on the compilation environment to obtain a compilation result, wherein the compilation result is used to implement the compilation requirement.

[0097] In a third aspect, an embodiment of the present invention further provides an electronic device that can effectively improve the accuracy and efficiency of generating a compilation environment.

[0098] like Figure 8 As shown, the electronic device provided by an embodiment of the present invention may include: a shell 71, a processor 72, a memory 73, a circuit board 74 and a power supply circuit 75, wherein the circuit board 74 is placed inside the space enclosed by the shell 71, and the processor 72 and the memory 73 are set on the circuit board 74; the power supply circuit 75 is used to supply power to various circuits or devices of the above-mentioned electronic device; the memory 73 is used to store executable program code; the processor 72 runs the program corresponding to the executable program code by reading the executable program code stored in the memory 73, so as to execute the compilation environment generation method provided by any of the aforementioned embodiments.

[0099] The specific execution process of the above steps by the processor 72 and the steps further executed by the processor 72 by running the executable program code can be found in the description of the above embodiment and will not be repeated here.

[0100] In a fourth aspect, an embodiment of the present invention further provides a computer-readable storage medium, which stores one or more programs. The one or more programs can be executed by one or more processors to implement any one of the compilation environment generation methods provided in the aforementioned embodiments, thereby also achieving the corresponding technical effects. This has been described in detail above and will not be repeated here.

[0101] It should be noted that, in this document, relational terms such as first and second, etc., are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the terms "comprise," "include," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or device. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of other identical elements in the process, method, article, or device comprising the element.

[0102] Each embodiment in this specification is described in a related manner. The same or similar parts between the embodiments can be referred to each other. Each embodiment focuses on the differences from other embodiments.

[0103] In particular, for the device embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiment.

[0104] For the convenience of description, the above device is described as being divided into various units / modules based on their functions. Of course, when implementing the present invention, the functions of each unit / module can be implemented in the same or multiple software and / or hardware.

[0105] Those skilled in the art will appreciate that all or part of the processes in the above-described method embodiments can be implemented by instructing the relevant hardware through a computer program. The program can be stored in a computer-readable storage medium, and when executed, the program can include the processes in the above-described method embodiments. The storage medium can be a magnetic disk, an optical disk, a read-only memory (ROM), or a random access memory (RAM).

[0106] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in the present invention should be included in the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be based on the scope of protection of the claims.< / c> < / rtl> < / dmac> < / gcc>

Claims

1. A compilation environment generation method, characterized in that: include: Obtaining compilation requirements of a target chip, where the compilation requirements are used to indicate a target module to be compiled in the target chip and a target representation of the target module; According to the compilation requirement, obtaining configuration information of the target module in the target representation from a preset configuration file to obtain target configuration information, wherein the preset configuration file includes configuration information of at least one functional module of the target chip in at least one representation, and the target representation is one or more representations of the at least one representation; A compilation environment is generated for the target chip according to the target configuration information of the target module.

2. The method according to claim 1, characterized in that The configuration information includes attributes of the functional module, and the attributes include at least one of the following: compiler name, compilation option, macro definition, file path, and submodule set.

3. The method according to claim 2, characterized in that In the preset configuration file, a tree-like logical structure is formed between the functional modules of the target chip, each functional module is a node of the tree-like logical structure, and the tree-like logical structure includes nodes of at least one level.

4. The method according to claim 3, characterized in that The tree-like logical structure includes nodes of at least two levels. Among the nodes of any two adjacent levels, at least one functional module of the upper level serves as a parent module, and each parent module includes at least one functional module of the lower level as a child module; the affiliation between the parent module and the child module is indicated by the child module set in the attributes of the functional module serving as the parent module.

5. The method according to claim 1, wherein The step of obtaining the configuration information of the target module in the target representation from a preset configuration file according to the compilation requirement to obtain the target configuration information includes: Determining the identifier of the target module and the target representation according to the compilation requirement; According to the identifier of the target module, searching the preset configuration file for a functional module corresponding to the identifier of the target module to obtain an alternative module; The configuration information in the target expression form is selected from the configuration information in at least one expression form of the candidate module to obtain the target configuration information.

6. The method according to claim 1, characterized in that After obtaining the target configuration information, the method further includes: The target configuration information is stored in a database, wherein the database uses the target representation of the target module as the minimum granularity to achieve structured storage and reuse of the target module.

7. The method according to claim 1, characterized in that Generating a compilation environment for the target chip according to the target configuration information of the target module includes: Acquire, according to the target configuration information of the target module, an attribute list of the target configuration information, wherein the attribute list includes at least one attribute, and the attribute includes an attribute name and an attribute value corresponding to the attribute name; A compilation environment is generated for the target chip according to the attribute name of each attribute in the attribute list and the attribute value corresponding to the attribute name.

8. The method according to claim 1, characterized in that Generating a compilation environment for the target chip according to the target configuration information of the target module includes: Generate a compilation rule file and a file list of the target module according to the target description information of the target module.

9. The method according to claim 8, characterized in that The compilation rule file includes the compilation target of the target module, the dependency conditions of the compilation target, and commands for implementing the compilation target and the dependency conditions.

10. The method according to claim 8, characterized in that The configuration information includes attributes of the functional module and a file list of the functional module, wherein the attributes include: a submodule set; In the preset configuration file, a tree-like logical structure is formed between the functional modules of the target chip, each functional module is a node of the tree-like logical structure, and the tree-like logical structure includes nodes of at least one level; The tree-like logical structure includes nodes of at least two levels. Among the nodes of any two adjacent levels, at least one functional module of the upper level serves as a parent module, and each parent module includes at least one functional module of the lower level as a child module. The affiliation between the parent module and the child module is indicated by the child module set in the attributes of the functional module serving as the parent module. The file list for generating the target module includes: Determine the logical relationship between each parent module and each child module in the target module according to the target configuration information, and form a structure tree of the target module, wherein each functional module in the structure tree has its own file list; According to the structure tree of the target module and in accordance with the bottom-up dependency relationship, a file list of the target module is generated.

11. The method according to any one of claims 1 to 10, characterized in that After generating a compilation environment for the target chip according to the target description information of the target module, the method further includes: Compilation is performed based on the compilation environment to obtain a compilation result, and the compilation result is used to achieve the compilation requirement.

12. A compilation environment generation device, characterized in that: include: A first acquiring unit is configured to acquire a compilation requirement of a target chip, wherein the compilation requirement is used to indicate a target module to be compiled in the target chip and a target expression form of the target module; a second acquiring unit, configured to acquire, according to the compilation requirement, configuration information of the target module in the target representation from a preset configuration file to obtain target configuration information, wherein the preset configuration file includes configuration information of at least one functional module of the target chip in at least one representation, and the target representation is one or more of the at least one representation; A generating unit is configured to generate a compilation environment for the target chip according to the target configuration information of the target module.

13. An electronic device, characterized in that: The electronic device includes: a housing, a processor, a memory, a circuit board and a power supply circuit, wherein the circuit board is placed inside the space enclosed by the housing, and the processor and the memory are arranged on the circuit board; the power supply circuit is used to supply power to various circuits or devices of the above-mentioned electronic device; the memory is used to store executable program code; the processor runs the program corresponding to the executable program code by reading the executable program code stored in the memory, and is used to execute the compilation environment generation method described in any one of claims 1 to 11.

14. A computer-readable storage medium, characterized in that The computer-readable storage medium stores one or more programs, and the one or more programs can be executed by one or more processors to implement the compilation environment generation method according to any one of claims 1 to 11.