System and method for adding test points on printed circuit board

Abstract

The invention discloses a system and a method for increasing test points on a printed circuit board. The method for adding the test points on the printed circuit board comprises the following steps of: respectively setting a restricted area according to a plurality of components; a first rectangular range of a first preset distance is expanded by taking one of the plurality of welding pads through which a connecting wire of a to-be-set test point passes as a center, and the first rectangular range is vertically connected with a plurality of boundaries of the first rectangular range; excluding the overlapped part of the vertical connecting line and the restricted area; the condition that the welding pad intersects with a plurality of assemblies when being connected with the vertical connecting line is eliminated; and preferentially selecting an end point, closest to the welding pad, of the residual vertical connecting line and the connecting wire which is about to be provided with a test point, adding a test point, and adding a test connecting line of the welding pad and the test point.

Description

Technical Field

[0001] The present invention relates to a system and method for designing a printed circuit board, and in particular to a system and method for adding test points on a printed circuit board. Background Art

[0002] Most current PCB layout software only supports a single test point generation method. This method adds test points to known component pins (with known x and y coordinates). This method is relatively simple and easy to implement. However, these PCB layout software lacks the ability to automatically explore and add test points in open areas. To improve test coverage, PCB layout engineers must manually identify traces without test points and check whether the space adjacent to the pads through which these traces pass is suitable for placing test points and routing traces. Summary of the Invention

[0003] The technical problem to be solved by the present invention is to provide a method for adding test points on a printed circuit board in response to the deficiencies of the prior art. The method is applicable to a printed circuit board, wherein the printed circuit board includes a plurality of component setting positions, a plurality of solder pads, and a plurality of connecting traces. The method is characterized in that the method for adding test points on the printed circuit board comprises: setting a restricted area according to the plurality of component setting positions, the plurality of solder pads, and the plurality of connecting traces; taking one of the plurality of solder pads through which the connecting trace to be set a test point passes as the center, expanding a first rectangular range by a first predetermined distance, and the plurality of solder pads are located in a restricted area. One of them is vertically connected to multiple boundaries of the first rectangular range that extends outward by the first predetermined distance; the part of the vertical connection line that overlaps with the restricted area is excluded; a second predetermined distance is deducted before and after the vertical connection line respectively; the situation where the solder pad intersects with the component setting position, other solder pads and other connecting lines when connected to the remaining vertical connection lines is excluded; and the endpoint of the remaining vertical connection line that is closest to the solder pad through which the connecting line to set a test point passes is preferentially selected to add a new test point, and a new test connection line is added between the solder pad and the new test point.

[0004] Optionally, the restricted area is a predetermined area distance outward from the component setting position, the solder pad and the connecting trace, the first predetermined distance is 200 mil, and the second predetermined distance is a radius distance of the new test point.

[0005] Optionally, the second predetermined distance is 15 mil.

[0006] Optionally, the added new test line is determined according to a distance value of the new test line. When the distance value is shorter, the new test line will be preferentially selected. The new test line is a straight line.

[0007] Optionally, the new test line does not intersect with any connecting line.

[0008] The present invention also discloses a system for adding test points on a printed circuit board, which is characterized in that it is arranged in an electronic device, the electronic device at least including a control circuit, a storage circuit and a display device, the electronic device receives a printed circuit board design file, and a printed circuit board in the printed circuit board design file includes multiple component setting positions, multiple solder pads and multiple connecting traces; wherein, the system for adding test points on the printed circuit board sets a prohibited area according to the multiple component setting positions, the multiple solder pads and the multiple connecting traces through the control circuit; wherein, the system expands a first predetermined distance outward with one of the multiple solder pads through which the connecting trace to set a test point passes as the center through the control circuit. A rectangular range, one of the multiple solder pads is vertically connected to multiple boundaries of the first rectangular range that extends outward by the first predetermined distance; wherein the control circuit excludes the portion of the vertical connection line that overlaps with the prohibited area, and then the control circuit deducts a second predetermined distance before and after the vertical connection line; wherein the control circuit excludes the situation where the solder pad intersects with the component setting position, other solder pads and other connecting lines when connected to the remaining vertical connection lines; and wherein the control circuit preferentially selects the endpoint of the remaining vertical connection line that is closest to the solder pad through which the connecting line to set a test point passes, adds a new test point, and adds a new test connection line between the solder pad and the new test point.

[0009] Optionally, the restricted area is a predetermined area distance outward from the component setting position, the solder pad and the connecting trace, the first predetermined distance is 200 mil, and the second predetermined distance is a radius distance of the new test point.

[0010] Optionally, the second predetermined distance is 15 mil.

[0011] Optionally, the added new test line is determined according to a distance value of the new test line. When the distance value is shorter, the new test line will be preferentially selected. The new test line is a straight line.

[0012] Optionally, the new test line does not intersect with any connecting line.

[0013] The system and method for adding test points to a printed circuit board (PCB) provided by the present invention can enhance space utilization, fully utilizing the space adjacent to solder pads and connecting traces, and effectively increasing test point coverage while ensuring that the test points comply with relevant specifications. Furthermore, the flexibility of test point distribution can be increased. The system and method are automatically adaptable, enabling the test point distribution strategy to be adjusted based on different PCB designs and testing requirements, making them more flexible and adaptable.

[0014] To further understand the features and technical contents of the present invention, please refer to the following detailed description and drawings of the present invention. However, the drawings provided are only for reference and illustration and are not intended to limit the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 1 is a process diagram of a method for adding test points on a printed circuit board according to a first embodiment of the present invention.

[0016] Figure 2 FIG. 1 is a schematic diagram of a printed circuit board in the method according to the first embodiment of the present invention.

[0017] Figure 3 is a schematic diagram of step S101 in the method of the first embodiment of the present invention.

[0018] Figure 4 is a schematic diagram of step S102 in the method of the first embodiment of the present invention.

[0019] Figure 5 is a schematic diagram of step S103 in the method of the first embodiment of the present invention.

[0020] Figure 6 is a schematic diagram of step S104 in the method of the first embodiment of the present invention.

[0021] Figure 7A 、 Figure 7B as well as Figure 7C is a schematic diagram of step S105 in the method of the first embodiment of the present invention.

[0022] Figure 8 as well as Figure 9 is a schematic diagram of step S106 in the method of the first embodiment of the present invention.

[0023] Figure 10 FIG. 4 is a schematic diagram of a system for adding test points on a printed circuit board according to a second embodiment of the present invention. DETAILED DESCRIPTION

[0024] The following is an explanation of the implementation methods of the "method and system for adding test points on a printed circuit board" disclosed in the present invention through specific embodiments. Those skilled in the art can understand the advantages and effects of the present invention from the contents disclosed in this specification. The present invention can be implemented or applied through other different specific embodiments, and the details in this specification can also be modified and changed based on different viewpoints and applications without departing from the concept of the present invention. In addition, the drawings of the present invention are only simple schematic illustrations and are not depicted according to actual dimensions. It is stated in advance. The following embodiments will further explain the relevant technical content of the present invention in detail, but the disclosed content is not intended to limit the scope of protection of the present invention. In addition, the term "or" used in this article may include any one or more combinations of the associated listed items depending on the actual situation.

[0025] [First embodiment]

[0026] See also Figure 1 、 Figure 2 、 Figure 3 、 Figure 4 、 Figure 5 、 Figure 6 、 Figure 7A 、 Figure 7B 、 Figure 7C 、 Figure 8 as well as Figure 9 , Figure 1 1 is a process diagram of a method for adding test points on a printed circuit board according to a first embodiment of the present invention. Figure 2 FIG. 1 is a schematic diagram of a printed circuit board in the method according to the first embodiment of the present invention. Figure 3 is a schematic diagram of step S101 in the method of the first embodiment of the present invention. Figure 4 is a schematic diagram of step S102 in the method of the first embodiment of the present invention. Figure 5 is a schematic diagram of step S103 in the method of the first embodiment of the present invention. Figure 6 is a schematic diagram of step S104 in the method of the first embodiment of the present invention. Figure 7A 、 Figure 7B 7B is a schematic diagram of step S105 in the method according to the first embodiment of the present invention. Figure 8 as well as Figure 9 is a schematic diagram of step S106 in the method of the first embodiment of the present invention.

[0027] In this embodiment, a method for adding test points on a printed circuit board is provided. The method for adding test points on a printed circuit board of this embodiment is applicable to a printed circuit board PCB, which includes multiple component placement locations C1, multiple solder pads PAD, and multiple connecting traces TL.

[0028] In this embodiment, all pads traversed by the connecting trace TL are searched for potential connections and ranked. The shorter the distance between the test point and the pad, the higher the priority. Furthermore, the connection potential between the test point and the pad must be considered. Besides finding new test points in open areas, it is also necessary to consider whether the newly added line complies with relevant regulations (e.g., whether it will short-circuit other signal lines).

[0029] The method of adding a test point on a printed circuit board in this embodiment includes the following steps:

[0030] Step S101: setting a restricted area according to a plurality of component placement positions, a plurality of solder pads, and a plurality of connection traces.

[0031] Step S102: Expanding a first rectangular range by a first predetermined distance with one of the plurality of pads through which a connection line for setting a test point passes as the center, and vertically connecting one of the plurality of pads to the plurality of boundaries of the first rectangular range by the first predetermined distance.

[0032] Step S103: excluding the portion where the vertical connection line overlaps with the restricted area.

[0033] Step S104: deducting a second predetermined distance before and after the vertical connection line.

[0034] Step S105: Eliminate the situation where the connection between the solder pad and the remaining vertical connection lines will intersect with the component setting position, other solder pads and other connection lines.

[0035] Step S106: preferentially select the endpoint of the remaining vertical connection lines that is closest to the pad through which the connection line for setting a test point passes, add a new test point, and add a new test connection line between the pad and the new test point.

[0036] See also Figure 2 as well as Figure 3 In step S101, a restricted area SA1 is defined by a predetermined distance SA1D extending outward from the component location C1, the solder pads PAD, and the connecting traces TL. This predetermined distance SA1D is primarily intended to prevent the added test traces from interfering with the existing component location C1, the solder pads PAD, and the connecting traces TL. This predetermined distance SA1D can be pre-determined based on the printed circuit board layout.

[0037] See also Figure 4 In step S102 , the first predetermined distance PD1 of the first rectangular range FR1 is 200 mil.

[0038] exist Figure 5In step S103, the area where the forbidden area SA1 overlaps with the first rectangular range FR1 is removed. In other words, the main task is to find the space near the pad PAD where the new test point NTP and the new test line NTL need to be added. Any area that overlaps with the forbidden area SA1 and violates the LAYOUT rule will be removed. Figure 6 In the corresponding step S104, the radius of the test point (the second predetermined distance PD2) is retained. The second predetermined distance is 15 mil. The second predetermined distance PD2 is the radius of the test point.

[0039] See also 7A to 7C , then connect the remaining vertical connection lines to the pads. If the connection lines between the remaining vertical connection lines and the pads intersect with other component settings, other pads, or other connection lines, then exclude the remaining vertical connection lines.

[0040] See also Figure 8 as well as Figure 9 In step S106, a new test point NTP and a new test line NTL are added. In this embodiment, the new test line NTL is a straight line.

[0041] In other embodiments, the first predetermined distance PD1 and the second predetermined distance PD2 can be adjusted according to the circuit board planning requirements of different products.

[0042] Furthermore, since a new test point NTP and a corresponding new test line NTL are added, the distance of the new test line NTL is determined according to a distance value of the new test line NTL, and the new test line NTL does not intersect with the existing connection line TL.

[0043] In this way, the method of this embodiment can achieve the following goals: (1) Improve test coverage: The method of the present invention can ensure the optimal configuration of test points on the printed circuit board PCB to maximize test coverage, thereby increasing test reliability and reducing undetected defects. (2) Reduce costs: By avoiding redundant test points and providing a highly efficient test point generation system, time and human resources are saved. (3) Adapt to different printed circuit board designs: The method of the present invention is flexible and can cope with different printed circuit board designs and test requirements, ensuring that the configuration of test points is highly adaptable. (4) Meet quality standards and specifications: The present invention takes into account components, tool holes, board edges and other DFT Rule specifications to ensure that the generated test points meet standards and specifications. (5) Reduce human errors: The test point generation process reduces the risk of human errors.

[0044] [Second embodiment]

[0045] See also Figure 10 , Figure 10 FIG. 4 is a schematic diagram of a system for adding test points on a printed circuit board according to a second embodiment of the present invention.

[0046] In this embodiment, a system SYS1 for adding test points to a printed circuit board (PCB) is provided. The system SYS1 is configured in an electronic device ED1. The electronic device ED1 includes at least a control circuit 1, a storage circuit 2, and a display device 3. The electronic device ED1 receives a printed circuit board design file PCBF. The printed circuit board PCB in the PCBF includes a plurality of component locations C1, a plurality of pads PAD, and a plurality of connecting traces TL.

[0047] A system SYS1 for adding test points to a printed circuit board (PCB) uses control circuit 1 to set restricted areas based on multiple component locations C1, multiple solder pads PAD, and multiple connecting traces TL. These restricted areas are set a predetermined distance outward from the component locations C1, solder pads PAD, and connecting traces TL. This predetermined distance SA1D is primarily intended to prevent the added test traces from interfering with the existing component locations C1, solder pads PAD, and connecting traces TL. This predetermined distance SA1D can be pre-determined based on PCB layout. The system SYS1 for adding test points to a PCB in this embodiment is applicable to the method for adding test points to a PCB in the first embodiment. Therefore, only the essential steps and processes are described.

[0048] Furthermore, the system SYS1 can expand a first rectangular range FR1 of a first predetermined distance PD1 with one of the multiple pads PADs through which the connecting traces for setting a test point pass as the center through the control circuit 1. And one of the multiple pads PADs is vertically connected to the multiple boundaries of the first rectangular range FR1 that is expanded by the first predetermined distance PD1. The first rectangular range FR1 is a square. In other embodiments, the first rectangular range FR1 can be a rectangular range. That is, the expansion distances in the X-axis and the Y-axis are different. Furthermore, the center of the pad PAD is vertically connected to the four boundaries of the first rectangular range FR1, mainly to determine whether there are other connecting traces TL, pads PADs or component setting positions C1 around the pad PAD.

[0049] Therefore, the control circuit 1 will first exclude the portion of the vertical connecting line that overlaps the restricted area. Next, the control circuit 1 deducts a second predetermined distance PD2 from the distances before and after the vertical connecting line. This allows the new test point NTP to be set. Furthermore, the first predetermined distance is 200 mils, and the second predetermined distance is 15 mils. The second predetermined distance PD2 is the radius of the test point.

[0050] The control circuit 1 will prevent the situation where the connection between the bonding pad PAD and the remaining vertical connection lines will intersect with the component placement position C1 , other bonding pads PAD, and the connection trace TL.

[0051] The control circuit 1 preferentially selects the endpoint of the remaining vertical connection lines closest to the pad PAD through which the connection line for setting a test point passes, adds a new test point NTP, and adds a new test connection line NTL between the pad PAD and the new test point NTP.

[0052] In other words, the remaining vertical connection lines and the pads will actually have multiple test lines, but the control circuit 1 will select the test line with the shortest distance among the multiple test lines. In other words, the number of test lines to be added is determined based on the distance value of the test lines. The shorter the test line, the higher the priority.

[0053] In addition, the newly added new test line NTL will not intersect with any connection line, and will not intersect with multiple pads PAD or multiple component placement locations C1.

[0054] [Beneficial Effects of Embodiments]

[0055] The system and method for adding test points to a printed circuit board (PCB) provided by the present invention can enhance space utilization, fully utilizing the space adjacent to solder pads and connecting traces, and effectively increasing test point coverage while ensuring that the test points comply with relevant specifications. Furthermore, the flexibility of test point distribution can be increased. The system and method are automatically adaptable, enabling the test point distribution strategy to be adjusted based on different PCB designs and testing requirements, making them more flexible and adaptable.

[0056] The contents disclosed above are only preferred feasible embodiments of the present invention and are not intended to limit the claims of the present invention. Therefore, any equivalent technical changes made using the contents of the present invention's description and drawings are included in the claims of the present invention.

Claims

1. A method for adding test points on a printed circuit board, applicable to a printed circuit board comprising a plurality of component placement locations, a plurality of solder pads, and a plurality of connecting traces, characterized in that: The method for adding test points on a printed circuit board comprises: Setting a restricted area according to the plurality of component placement positions, the plurality of solder pads, and the plurality of connection traces; A first rectangular range is extended outward by a first predetermined distance with one of the plurality of pads through which the connection line for setting a test point passes as the center, and one of the plurality of pads is vertically connected to a plurality of boundaries of the first rectangular range extended outward by the first predetermined distance; Excluding the portion where the vertical connecting line overlaps with the restricted area; Deduct a second predetermined distance before and after the vertical connection line respectively; Eliminate the situation where the solder pads intersect with the component placement position, other solder pads, and other connecting lines when connected to the remaining vertical connecting lines; and The endpoint of the remaining vertical connection line closest to the pad through which the connection line for setting a test point passes is preferentially selected to add a new test point, and a new test connection line is added between the pad and the new test point.

2. The method for adding test points on a printed circuit board according to claim 1, wherein: The forbidden area is a predetermined area distance outward from the component setting position, the solder pad and the connecting trace. The first predetermined distance is 200 mil, and the second predetermined distance is a radius distance of the new test point.

3. The method for adding test points on a printed circuit board according to claim 2, wherein: The second predetermined distance is 15 mil.

4. The method for adding test points on a printed circuit board according to claim 3, wherein: The added new test line is determined according to a distance value of the new test line. When the distance value is shorter, the new test line will be preferentially selected. The new test line is a straight line.

5. The method for adding test points on a printed circuit board according to claim 4, wherein: The new test trace does not intersect with any connecting traces.

6. A system for adding test points on a printed circuit board, characterized in that: In an electronic device, the electronic device includes at least a control circuit, a storage circuit, and a display device. The electronic device receives a printed circuit board design file, wherein a printed circuit board in the printed circuit board design file includes a plurality of component placement locations, a plurality of solder pads, and a plurality of connection traces. The system for adding test points on a printed circuit board sets a restricted area according to the plurality of component setting positions, the plurality of solder pads and the plurality of connection traces through the control circuit; The system, through the control circuit, expands a first rectangular range by a first predetermined distance with one of the plurality of pads through which the connection line for setting a test point passes as the center, and vertically connects one of the plurality of pads to multiple boundaries of the first rectangular range expanded by the first predetermined distance; The control circuit excludes the portion where the vertical connection line overlaps with the forbidden area, and then deducts a second predetermined distance before and after the vertical connection line. The control circuit will prevent the solder pad from intersecting with the component setting position, other solder pads and other connecting lines when connected to the remaining vertical connecting lines; and The control circuit preferentially selects the endpoint of the remaining vertical connection lines closest to the pad through which the connection line for setting a test point passes, adds a new test point, and adds a new test connection line between the pad and the new test point.

7. The system for adding test points on a printed circuit board according to claim 6, wherein: The forbidden area is a predetermined area distance outward from the component setting position, the solder pad and the connecting trace. The first predetermined distance is 200 mil, and the second predetermined distance is a radius distance of the new test point.

8. The system for adding test points on a printed circuit board according to claim 7, wherein: The second predetermined distance is 15 mil.

9. The system for adding test points on a printed circuit board according to claim 8, wherein: The added new test line is determined according to a distance value of the new test line. When the distance value is shorter, the new test line will be preferentially selected. The new test line is a straight line.

10. The system for adding test points on a printed circuit board according to claim 9, wherein: The new test trace does not intersect with any connecting traces.

Images