Laminated electronic component

Abstract

A laminated electronic component includes a plurality of dielectric layers and a plurality of electrode layers alternately laminated with the plurality of dielectric layers in a lamination direction. In a plane intersecting the lamination direction, the skewness of the distribution of the area circle equivalent diameters of the plurality of electrode interruptions formed in the electrode layer is 1-2.

Description

Technical Field

[0001] One aspect of the present disclosure relates to stacked electronic components. Background Art

[0002] Japanese Patent Application Laid-Open No. 2016-160133 discloses a multilayer ceramic capacitor as a type of multilayer electronic component. The multilayer ceramic capacitor disclosed in Patent Document 1 is constructed by alternately laminating dielectric layers and internal electrode layers. Summary of the Invention

[0003] Technical problem to be solved by the invention

[0004] One aspect of the present disclosure aims to provide a laminated electronic component capable of suppressing a decrease in electrostatic capacitance and inhibiting the occurrence of cracks.

[0005] Means for solving technical problems

[0006] One aspect of the present disclosure is a stacked electronic component [1] "a stacked electronic component comprising: a plurality of dielectric layers; and a plurality of electrode layers, which are alternately stacked with the plurality of dielectric layers along a stacking direction, wherein the skewness of the distribution of the area circle equivalent diameters of the plurality of electrode interruptions formed in the electrode layers on a plane intersecting the stacking direction is greater than 1 and less than 2."

[0007] In this stacked electronic component, the skewness of the distribution of the area-equivalent diameter of a plurality of electrode interruptions (gaps) (hereinafter, also referred to as interruptions) formed in the electrode layer is greater than 1 and less than 2. That is, a large number of small interruptions and a small number of large interruptions are formed on the electrode layer. When interruptions are formed on the electrode layer, the stress generated during firing due to the difference in linear expansion coefficient between the dielectric layer and the electrode layer can be alleviated, and the generation of cracks can be suppressed. In the case where the interruptions are small, the influence of parasitic capacitance is large, and therefore, the electrostatic capacitance is not easily reduced significantly, but the stress relaxation effect is small. On the other hand, in the case where the interruptions are large, the influence of parasitic capacitance is small, and therefore, the electrostatic capacitance can be reduced, but the stress relaxation effect is large. In this stacked electronic component, by forming a large number of small interruptions and a small number of large interruptions on the electrode layer, the reduction in electrostatic capacitance can be suppressed, and the generation of cracks can be suppressed.

[0008] The laminated electronic component according to one aspect of the present disclosure may be [2] "a laminated electronic component according to [1], wherein the median value of the area-equivalent circle diameter of the plurality of discontinuities is 1.5 μm or less." In this case, a large number of small discontinuities can be arranged on the electrode layer, and a decrease in electrostatic capacitance can be effectively suppressed.

[0009] The laminated electronic component according to one aspect of the present disclosure may be [3] "a laminated electronic component according to [1], wherein the median value of the area-equivalent circle diameter of the plurality of discontinuities is 0.5 μm or less." In this case, a large number of small discontinuities can be arranged on the electrode layer, and a decrease in electrostatic capacitance can be effectively suppressed.

[0010] A laminated electronic component according to one aspect of the present disclosure may also be [4] "a laminated electronic component according to any one of [1] to [3], wherein the standard deviation of the area-equivalent circle diameters of the plurality of discontinuities is not less than 0.3 μm and not more than 1.5 μm." In this case, by having the standard deviation be not less than 0.3 μm, the occurrence of cracks can be reliably suppressed. In addition, by having the standard deviation be not more than 1.5 μm, a decrease in electrostatic capacitance can be reliably suppressed.

[0011] A laminated electronic component according to one aspect of the present disclosure may be [5] "the laminated electronic component according to any one of [1] to [4], wherein the ratio of the area of the plurality of interruptions on the plane to the area of the electrode layer is 5% or more and 15% or less." In this case, by having this ratio be 5% or more, the occurrence of cracks can be reliably suppressed. In addition, by having this ratio be 15% or less, a decrease in electrostatic capacitance can be reliably suppressed.

[0012] According to one aspect of the present disclosure, it is possible to provide a laminated electronic component that can suppress a decrease in electrostatic capacitance and suppress the occurrence of cracks. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 This is a cross-sectional view of a laminated electronic component according to an embodiment.

[0014] Figure 2 (a) is a cross-sectional view showing a case where the electrode interruption portion is small. Figure 2 (b) is a cross-sectional view showing a case where the electrode interruption portion is large. Figure 2 (c) is a cross-sectional view showing a case where a large number of small electrode interruptions and a small number of large electrode interruptions are formed.

[0015] Figure 3 This is a diagram for explaining parasitic capacitance.

[0016] Figure 4 This is a diagram showing the observation surface of the first sample.

[0017] Figure 5 This is a diagram showing the observation surface of the second sample.

[0018] Figure 6 This is a diagram showing the electrode discontinuity on the observation surface of the first sample.

[0019] Figure 7 This is a diagram showing the electrode discontinuity on the observation surface of the second sample.

[0020] Figure 8 This is a graph showing the distribution of the area-equivalent circle diameter of the electrode discontinuity in the first sample.

[0021] Figure 9 This is a graph showing the distribution of the area-equivalent circle diameter of the electrode discontinuity in the second sample.

[0022] Figure 10 is a graph used to illustrate skewness.

[0023] Figure 11 (a) is a table showing the results of the first experiment, Figure 11 (b) is a table showing the results of the second experiment.

[0024] Figure 12 (a) is a table showing the results of the third experiment, Figure 12 (b) is a table showing the results of the fourth experiment. DETAILED DESCRIPTION

[0025] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. In the following description, the same or corresponding elements are denoted by the same reference numerals, and repeated descriptions are omitted.

[0026] [Laminated electronic components]

[0027] exist Figure 1 , a stacked electronic component 1 serving as a stacked ceramic capacitor is shown. The stacked electronic component 1 includes a body 2. The body 2 is, for example, formed into a roughly rectangular parallelepiped shape. The body 2 has a pair of main surfaces 2a and a first side surface 2b and a second side surface 2c. The pair of main surfaces 2a are opposite to each other in a first direction D1. The first side surface 2b and the second side surface 2c are opposite to each other in a second direction D2 perpendicular to the first direction D1. One main surface 2a constitutes a mounting surface. The stacked electronic component 1 is mounted on a mounting object (such as an electronic component or a substrate, etc.) by welding on one main surface 2a, for example. The stacked electronic component 1 is, for example, a vehicle-mounted stacked electronic component mounted on a vehicle for use.

[0028] The element body 2 includes a plurality of dielectric layers 3 and a plurality of electrode layers 4. The plurality of electrode layers 4 include a first electrode layer 10 and a plurality of second electrode layers 20. Each dielectric layer 3 is composed of, for example, a sintered body of a ceramic green sheet (dielectric sheet) containing a dielectric material (e.g., a dielectric ceramic such as a BaTiO3-based, Ba(Ti,Zr)O3-based, (Ba,Ca)TiO3-based, CaZrO3-based, or (Ca,Sr)(Zr,Ti)O3-based). In an actual element body 2, adjacent dielectric layers 3 are integrated to such an extent that the boundaries between them are indistinguishable. The average thickness of the plurality of dielectric layers 3 is, for example, less than 10 μm, and in this example, less than 0.4 μm. The element body 2 includes, for example, at least 10 layers or more than 20 layers of dielectric layers 3.

[0029] The plurality of dielectric layers 3 and the plurality of electrode layers 4 are alternately stacked along a first direction D1 (stacking direction). In this example, the plurality of first electrode layers 10 and the plurality of second electrode layers 20 are alternately arranged so as to face each other in the first direction D1 with the dielectric layers 3 interposed therebetween. The first electrode layers 10 extend to reach the first side surface 2b of the element body 2, and the second electrode layers 20 extend to reach the second side surface 2c of the element body 2.

[0030] The electrode layer 4 is formed of a conductive material such as Ni, Cu, Ag, Pd, or an alloy thereof. For example, the electrode layer 4 is composed of a sintered body of a conductive paste (conductive layer) containing the conductive material. The electrode layer 4 functions as an internal electrode disposed within the element body 2. The first electrode layer 10 and the second electrode layer 20 have different polarities. In the laminated electronic component 1, the first electrode layer 10 and the second electrode layer 20 face each other, thereby forming an electrostatic capacitor.

[0031] The laminated electronic component 1 further includes a pair of external electrodes 5 for electrical connection to an object to be mounted. The pair of external electrodes 5 are formed on the first side surface 2b and the second side surface 2c of the element body 2. One external electrode 5 is electrically connected to the first electrode layer 10 on the first side surface 2b, and the other external electrode 5 is electrically connected to the second electrode layer 20 on the second side surface 2c.

[0032] [Method for manufacturing laminated electronic components]

[0033] To manufacture a laminated electronic component 1, multiple dielectric sheets are first prepared (preparation step). The dielectric sheets are ceramic components that become dielectric layers 3 after firing. Next, the multiple dielectric sheets and multiple conductive layers are alternately stacked (stacking step). The conductive layers, for example, are conductive pastes that become electrode layers 4 after firing.

[0034] Next, the laminate obtained by the lamination process is pressurized along the first direction D1 (pressurization process). Through this pressurization process, adjacent layers are integrated with each other, and a chip of a specified size can be obtained. In addition, by pressurizing the laminate having multiple parts that become chips after cutting in the pressurization process, and then cutting the laminate, a plurality of chips of a specified size can also be obtained. Then, by firing the chips, the element body 2 can be obtained. Then, through the process of providing the external electrode 5 on the outer surface of the element body 2, etc., the laminated electronic component 1 can be obtained.

[0035] [Electrode interruption]

[0036] like Figure 2 As shown in (c), in the laminated electronic component 1 of the embodiment, a plurality of (a plurality of) electrode interruptions 6 (hereinafter also referred to as interruptions 6) are formed on each electrode layer 4. The interruptions 6 are gaps where the electrode layer 4 is interrupted, and are composed of, for example, air gaps. As described later, Figure 4 、 Figure 5 As shown, the plurality of discontinuities 6 are formed in a dispersed manner, separated from each other, and have a non-uniform (random) shape. In the laminated electronic component 1, the skewness of the distribution of the area-equivalent circle diameters of the plurality of discontinuities 6 formed on the electrode layer 4 is greater than 1 and less than 2. This point will be described below.

[0037] As described above, when manufacturing a laminated electronic component 1, the ceramic member, which becomes the dielectric layer 3 after firing, and the conductive layer, which becomes the electrode layer 4 after firing, are fired simultaneously after chip formation. At this time, because the linear expansion coefficients of the dielectric layer 3 (ceramic member) and the electrode layer 4 (conductive layer) differ, stress is generated when they are fired and cooled simultaneously. This stress can cause cracks. Therefore, in the laminated electronic component 1 of the embodiment, this stress is alleviated by forming a discontinuity 6 in the electrode layer 4, which has a larger linear expansion coefficient than the dielectric layer 3.

[0038] Figure 2 (a) is a cross-sectional view showing a case where the interruption portion 6 is small, Figure 2 (b) is a cross-sectional view showing a case where the interruption portion 6 is large. Figure 2 (c) is a cross-sectional view showing a case where a large number of small interruptions 6 and a small number of large interruptions 6 are formed. Figure 2 A discontinuity 6 is formed as in (c). Figure 3 This is a diagram for explaining parasitic capacitance.

[0039] like Figure 2As shown in (a), when the interruption portion 6 is small, the influence of the parasitic capacitance is large, so it is difficult to significantly reduce the electrostatic capacitance. However, since the interruption portion 6 is small, the stress relaxation effect is small. The parasitic capacitance is Figure 3 The capacitance generated by the shaded portion P is shown in the figure. Figure 3 As shown, when a pair of electrode layers 4 are arranged to face each other in a first direction D1 and one electrode layer 4 is interrupted (the size of the pair of electrode layers 4 is different from each other), not only capacitance is generated in the first direction D1 due to the pair of electrode layers 4 facing each other, but also capacitance is generated in a direction inclined relative to the first direction D1 due to the pair of electrode layers 4 facing each other. The latter is referred to as parasitic capacitance.

[0040] like Figure 2 As shown in (b), when the interruption portion 6 is large, the influence of the parasitic capacitance is small, so the electrostatic capacitance can be reduced. On the other hand, because the electrode layer 4 can be interrupted significantly, the stress relaxation effect becomes greater. In this way, both the case where the interruption portion 6 is small and the case where the interruption portion 6 is large have both advantages and disadvantages. In contrast, in the stacked electronic component 1 of the embodiment, as shown in FIG. Figure 2 As shown in (c), by forming a large number of small discontinuities 6 and a small number of large discontinuities 6 on the electrode layer 4, both the suppression of the reduction in electrostatic capacitance and the suppression of the occurrence of cracks are achieved.

[0041] Figure 4 1 is a diagram showing an observation surface of a first sample of a laminated electronic component 1. Figure 5 This figure shows the observation surface of the second sample of the laminated electronic component 1. The first sample and the second sample have different materials for the dielectric layer 3. The material of the electrode layer 4 is mainly Ni.

[0042] In this example, the boundary surface between the dielectric layer 3 and the electrode layer 4 is used as the observation surface. The boundary surface (cross section) is formed by the following method. First, gallium indium tin alloy (Galinstan) (liquid metal) is applied to the side surface of the element body 2 (element body) before the external electrode 5 is provided. Using a withstand voltage tester (THK-2011ADMPT manufactured by Tama Denso Co., Ltd.), a voltage is applied to the element body 2 at 100V / sec and 10mA in the form of a DC breakdown voltage test. As a result, the first sample produced insulation breakdown at 0.64kV, and the second sample produced insulation breakdown at 0.30kV. In both samples, peeling occurred at the boundary surface between the dielectric layer 3 and the electrode layer 4. In addition, when the external electrode 5 is already provided on the outer surface of the element body 2, after removing the external electrode 5 with water-resistant abrasive paper, etc., the same method is used to separate the boundary surface between the dielectric layer 3 and the electrode layer 4.

[0043] Next, Pt was sputtered onto the exposed surface (observation surface) of the electrode layer 4 at 20 mA for 20 seconds using an automatic fine coating machine (JFC-1600 manufactured by JEOL Ltd.). Figure 4 and Figure 5 This is a result of observing a secondary electron image of the observation surface using a scanning electron microscope (S-4800 manufactured by Hitachi High-Technologies Corporation).

[0044] Next, in the obtained image of the observation surface, the portion where the electrode layer 4 is interrupted is identified as the interruption portion 6. Figure 6 and Figure 7 In the figure, a specific discontinuity 6 is indicated by being surrounded by a line. In this example, identification is performed visually, but recognition software can also be used. Next, the area-equivalent circle diameter of the discontinuity 6 is measured using measurement software (MAC-View version 4, manufactured by Mountech Co., Ltd.). The area-equivalent circle diameter of the discontinuity 6 is the diameter of a perfect circle corresponding to the area of the discontinuity 6.

[0045] Figure 8 and Figure 9 Graphs 1 and 2 show the distribution of the area-equivalent circle diameter of the discontinuity 6 in the first sample and the second sample, respectively. Figure 8 and Figure 9 As shown, all distributions are skewed to the right (towards the left) in the figure. In the distribution of the first sample, the number of data n is 51, the mean (Mean) is 1.313 μm, the standard deviation (SD) is 0.8947 μm, the variance (VAR) is 0.8005, the skewness (Skewness) is 1.681, the kurtosis (Kurtosis) is 2.572, the median (Median) is 1.107, the maximum (Max) is 4.14 μm, and the minimum (Min) is 0.3383 μm. In the distribution of the second sample, the number of data points n is 39, the mean (mean) is 0.6799 μm, the standard deviation (SD) is 0.4172 μm, the variance (VAR) is 0.1741, the skewness (skewness) is 1.492, the kurtosis (kurtosis) is 2.27, the median (median) is 0.6234, the maximum (max) is 2.028 μm, and the minimum (min) is 0.1863 μm. Thus, the number of data points can be, for example, 30 or more.

[0046] Figure 10 This is a graph used to illustrate skewness. The skewness A of the probability distribution followed by a random variable X is defined by equation (1). In equation (1), E(X) is the expected value of the random variable X, μ is the mean of the random variable X, and σ is the standard deviation of the random variable X. Skewness is an indicator of asymmetry and is zero when the probability distribution is normal.

[0047]

[0048] exist Figure 10 Represents four probability distributions with skewness of 1.5, 2.5, 0.0, and -1.0. Figure 10 As shown, the greater the skewness, the more the distribution becomes skewed to the left (the side with a smaller random variable), and the longer the right side (the side with a larger random variable) of the distribution has a lower slant. Therefore, events corresponding to the right side of the distribution with a large random variable are more likely to occur. On the other hand, the smaller the skewness, the more the distribution becomes skewed to the right, and the longer the left side of the distribution has a lower slant. Therefore, events corresponding to the left side of the distribution with a small random variable are more likely to occur.

[0049] In the stacked electronic component 1, the skewness of the distribution of the area-equivalent diameters of the plurality of discontinuities 6 formed in the electrode layer 4 on the observation surface (a plane intersecting (orthogonal in this example) the first direction D1) is greater than or equal to 1 and less than or equal to 2. For example, in the distribution of the first sample, the skewness is 1.681, and in the distribution of the second sample, the skewness is 1.492. That is, the distribution of the area-equivalent diameters of the discontinuities 6 becomes a distribution that is biased to the left, with a large number of small discontinuities 6 and a small number of large discontinuities 6 formed on the electrode layer 4. Thus, as Figure 2 As shown in (c), the interruption portion 6 can be arranged, and the reduction in electrostatic capacitance can be suppressed, and the generation of cracks can be suppressed.

[0050] Furthermore, in the above example, the observation surface is set as the boundary surface between the dielectric layer 3 and the electrode layer 4, but it is considered that the discontinuities 6 are also formed inside the electrode layer 4. That is, when the skewness of the distribution of the area-equivalent circle diameters of the plurality of discontinuities 6 formed in the electrode layer 4, which are located inside the electrode layer 4 and on a plane intersecting (e.g., orthogonal to) the first direction D1, is measured, it is also considered that the skewness is greater than or equal to 1 and less than or equal to 2.

[0051] The skewness of the distribution of the area-equivalent circle diameter of the discontinuities 6 can be adjusted, for example, by adjusting the manufacturing method. For example, organic powders of various sizes that are insoluble in solvent (e.g., polyvinyl alcohol) can be mixed into the conductive paste used in the aforementioned lamination step, which becomes the electrode layer 4 after firing. This allows the organic powder to burn during firing, forming gaps (discontinuities 6) corresponding to the size of the powder.

[0052] Figure 11 (a) Figure 11 (b) Figure 12 (a) and Figure 12(b) is a table showing the results of the first experiment, the second experiment, the third experiment and the fourth experiment respectively. In the first experiment, Examples 1 to 3 and Comparative Examples 1 to 3 were used as the objects. "The ratio of the interruption portion" represents the ratio of the total area of the interruption portion 6 on the observation surface to the area of the electrode layer 4. "Electrostatic capacitance" is a value measured by forming an external electrode 5 on the outer surface of the element body 2 corresponding to each sample and using an LCR meter. "Electrostatic capacitance" is expressed as a relative value with the case where the ratio of the interruption portion is 0 (the coverage is 100%) as the benchmark (value 1.00). The electrostatic capacitance is preferably greater than 0.9, more preferably greater than 0.95, and even more preferably greater than 0.98. "Cracks" are the ratio of the number of cracks produced by performing a pressure cooker test (temperature 121°C, relative humidity 95% RH, exposure time 24h) on the element body 2 (without external electrode 5) corresponding to each sample, and confirming the appearance using a stereo microscope. These points are also the same for the second to fourth experiments.

[0053] like Figure 11 As shown in Table (a), cracks occurred in Comparative Example 1, which did not form the interruption portion 6, and in Comparative Example 2, which had a skewness of 0.80. In Comparative Example 3, which had a skewness of 2.33, the electrostatic capacitance was less than 0.9. In contrast, in the first, second, and third examples, which had skewnesses of 1.17, 1.57, and 1.88, respectively, the electrostatic capacitance was greater than 0.9, and no cracks occurred. This shows that by setting the skewness to between 1 and 2, the decrease in electrostatic capacitance can be suppressed, and the occurrence of cracks can be suppressed.

[0054] In the second experiment, Examples 4 to 8 were used as subjects. Figure 11 As can be seen from Table (b), the smaller the median value of the area-equivalent circle diameter of the discontinuities 6 is, the greater the capacitance is. The median value of the area-equivalent circle diameter of the discontinuities 6 is preferably 1.5 μm or less, more preferably 0.5 μm or less.

[0055] In the third experiment, Examples 9 to 12 were used as the subjects. "Crack 1" was the same as the "Crack" in the first experiment. "Crack 2" was determined by subjecting the element bodies 2 (without external electrodes 5) corresponding to each sample to an autoclave test (temperature 121°C, relative humidity 95%, exposure time 100 hours), and observing their appearance using a stereomicroscope to determine the ratio of cracks. This also applies to the fourth experiment.

[0056] like Figure 12As shown in Table (a), in Example 9 in which the standard deviation of the area circle equivalent diameter of the interruption portion 6 is 0.25 μm, cracks occurred in the test of crack 2. In contrast, in Examples 10, 11, and 12 in which the standard deviations are 0.38, 1.41, and 1.7 μm, respectively, no cracks occurred in the test of crack 2. From this point of view, the standard deviation of the area circle equivalent diameter of the interruption portion 6 is preferably 0.3 μm or more. In addition, in Example 12 in which the standard deviation is 1.7 μm, the electrostatic capacitance is 0.93, which is lower than that of Examples 9 to 11. From this point of view, the standard deviation of the area circle equivalent diameter of the interruption portion 6 is preferably 1.5 μm or less. That is, the standard deviation is preferably 0.3 μm or more and 1.5 μm or less.

[0057] In the fourth experiment, Examples 13 to 16 were used as subjects. Figure 12 According to Table (b), in Example 13 in which the ratio of the interrupted portion 6 is 0.04, cracks occurred in the test of Crack 2. In contrast, in Examples 14, 15, and 16 in which the ratios of the interrupted portion 6 are 0.06, 0.14, and 0.18, respectively, no cracks occurred in the test of Crack 2. From this point of view, the ratio of the interrupted portion 6 is preferably 0.05 (5%) or more. In addition, in Example 16 in which the ratio of the interrupted portion 6 is 0.18, the electrostatic capacitance is 0.92, which is lower than that of Examples 13 to 16. From this point of view, the ratio of the interrupted portion 6 is preferably 0.15 (15%) or less. That is, the ratio of the interrupted portion 6 is preferably 5% or more and 15% or less.

[0058] [Function and Effect]

[0059] In the stacked electronic component 1, the skewness of the distribution of the area-equivalent diameter of the plurality of interruptions 6 (electrode interruptions) (gaps) formed in the electrode layer 4 is greater than 1 and less than 2. That is, a large number of small interruptions 6 and a small number of large interruptions 6 are formed on the electrode layer 4. When the interruptions 6 are formed on the electrode layer 4, the stress generated during firing due to the difference in linear expansion coefficient between the dielectric layer 3 and the electrode layer 4 can be alleviated, and the generation of cracks can be suppressed. When the interruptions 6 are small, the influence of parasitic capacitance is large, so it is difficult to significantly reduce the electrostatic capacitance, but the stress relief effect is small. On the other hand, when the interruptions 6 are large, the influence of parasitic capacitance is small, so the electrostatic capacitance can be reduced and the stress relief effect is large. In the stacked electronic component 1, by forming a large number of small interruptions 6 and a small number of large interruptions 6 on the electrode layer 4, the reduction in electrostatic capacitance can be suppressed, and the generation of cracks can be suppressed.

[0060] The median value of the area-equivalent circle diameter of the discontinuities 6 may be 1.5 μm or less, or 0.5 μm or less. In this case, a large number of small discontinuities 6 can be arranged on the electrode layer 4, and a decrease in electrostatic capacitance can be effectively suppressed.

[0061] The standard deviation of the area-equivalent circle diameter of the discontinuities 6 may also be 0.3 μm or more and 1.5 μm or less. In this case, a standard deviation of 0.3 μm or more reliably suppresses the occurrence of cracks. Furthermore, a standard deviation of 1.5 μm or less reliably suppresses the reduction in electrostatic capacitance.

[0062] The ratio of the area of the discontinuity 6 on the observation surface to the area of the electrode layer 4 may be 5% or more and 15% or less. In this case, by setting this ratio to 5% or more, the generation of cracks can be reliably suppressed. Furthermore, by setting this ratio to 15% or less, a decrease in electrostatic capacitance can be reliably suppressed.

[0063] The present disclosure is not limited to the above-described embodiments and modifications. For example, the materials and shapes of the various components are not limited to those described above; a variety of materials and shapes can be employed. The laminated electronic component 1 may also be a laminated piezoelectric actuator, a laminated varistor, a laminated thermistor, or a laminated composite component.

Claims

1. A laminated electronic component, wherein: have: a plurality of dielectric layers; and a plurality of electrode layers, which are alternately stacked with the plurality of dielectric layers along a stacking direction, On a plane intersecting the stacking direction, a skewness of distribution of area-equivalent circle diameters of a plurality of electrode discontinuities formed in the electrode layer is 1 or more and 2 or less.

2. The laminated electronic component according to claim 1, wherein A median value of area-equivalent circle diameters of the plurality of discontinuities is 1.5 μm or less.

3. The laminated electronic component according to claim 1, wherein The median value of the area-equivalent circle diameters of the plurality of discontinuities is 0.5 μm or less.

4. The laminated electronic component according to any one of claims 1 to 3, wherein The standard deviation of the area-equivalent circle diameters of the plurality of discontinuities is 0.3 μm or more and 1.5 μm or less.

5. The laminated electronic component according to any one of claims 1 to 4, wherein A ratio of an area of the plurality of interruptions on the plane to an area of the electrode layer is 5% or more and 15% or less.

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