Inverter and relay failure detection method

Abstract

The application provides an inverter and a relay failure detection method. In the inverter, a positive bus capacitor and a negative bus capacitor are connected in series and then connected to a direct current end of the inverter, a connection point of the negative bus capacitor and the direct current end of the inverter is connected to a reference ground, and an inverter circuit is connected between the direct current end and a three-phase alternating current end of the inverter. One end of an N line connected to a connection point of the positive bus capacitor and the negative bus capacitor and a neutral line of the inverter circuit, two relays are connected in series between the one end of the N line and the other end of the N line, and the other end of the N line is connected to the reference ground. When the inverter circuit is in a standby state, a controller sends an off instruction to at least one relay. Further, when a voltage across the at least one relay is less than a first preset voltage value, the controller outputs first warning information. The sum of the voltage across the at least one relay, a voltage of the N line to the ground and a voltage of the negative bus capacitor to the ground is a bus voltage of the negative bus capacitor. Based on the application, the circuit cost of the inverter can be reduced.

Description

Technical Field

[0001] This application relates to the field of photovoltaic energy storage technology, and in particular to a method for detecting inverter and relay failures. Background Technology

[0002] When the current on the N line (neutral line) of a three-phase four-wire inverter is large, a single N-line relay cannot handle such a large current. Therefore, two N-line relays are usually connected in series on the N line to increase the switching capacity and meet the high current requirements of the N line. During operation, the internal controller of the three-phase four-wire inverter controls the closure of the two N-line relays, thereby transmitting the AC power output from the three-phase four-wire inverter to the grid or load for power supply. However, if the N-line relays fail (such as sticking or failure to close) before the three-phase four-wire inverter starts operating, it can lead to electric shock for users or maintenance personnel, threatening their safety. Therefore, identifying N-line relay failures before the three-phase four-wire inverter starts operating is crucial to ensure the safety of users and maintenance personnel.

[0003] Currently, a specific voltage sampling circuit is typically incorporated into three-phase four-wire inverters. This circuit monitors the voltage across the neutral (N) relay in real time. The controller then compares this voltage with a voltage threshold to determine if the N relay has failed. However, incorporating this specific voltage sampling circuit into a three-phase four-wire inverter results in excessively high circuit costs. Summary of the Invention

[0004] This application provides a method for detecting inverter and relay failures, which can avoid setting up a voltage sampling circuit specific to relays inside the inverter, thereby reducing the circuit cost of the inverter.

[0005] In a first aspect, embodiments of this application provide an inverter, which includes a positive bus capacitor, a negative bus capacitor, an inverter circuit, a neutral (N) line, two relays, and a controller. The DC terminal of the inverter is used to connect to a DC power supply, and the three-phase AC terminals and the neutral line are used to connect to the power grid or a load. The positive and negative bus capacitors are connected in series to the DC terminal of the inverter. The connection point between the negative bus capacitor and the DC terminal of the inverter is connected to a reference ground. The inverter circuit is connected between the DC terminal and the three-phase AC terminals of the inverter. The connection point of the positive and negative bus capacitors and the neutral line of the inverter circuit are all connected to one end of the neutral line. The two relays can be connected in series between one end and the other end of the neutral line, and the other end of the neutral line is connected to a reference ground. Before the inverter operates, the inverter circuit is in a standby state, where the standby state means that the inverter circuit does not output AC power, but the controller can receive power and operate. At this time, the controller issues a disconnect command to at least one of the two relays. Furthermore, the controller is also configured to output a first alarm message when the voltage across at least one relay is less than a first preset voltage value. It should be understood that, according to Kirchhoff's voltage law, the sum of the voltage across at least one relay, the voltage to ground of the N-line, and the voltage to ground of the negative bus capacitor is the bus voltage of the negative bus capacitor. Therefore, the voltage across at least one relay can be obtained by subtracting the voltage to ground of the N-line and the voltage to ground of the negative bus capacitor from the bus voltage of the negative bus capacitor. Here, the voltage to ground of the N-line, the bus voltage of the negative bus capacitor, and the voltage to ground are all conventional sampling voltages of the inverter. The aforementioned first alarm message is used to indicate that at least one relay is in a stuck state. By implementing the embodiments of this application, the voltage across at least one relay can be indirectly obtained and stuck detection performed using the inverter's conventional sampling voltages such as the voltage to ground of the N-line, the bus voltage of the negative bus capacitor, and the voltage to ground. This avoids the need to set up a relay-specific voltage sampling circuit inside the inverter, thereby reducing the circuit cost of the inverter.

[0006] In one possible implementation, to eliminate the influence of interference factors such as voltage fluctuations and sampling errors of the inverter's conventional sampling voltage on adhesion detection, the controller is further configured to control the absolute value of the voltage difference between the bus voltage of the positive bus capacitor and the bus voltage of the negative bus capacitor to be greater than a second preset voltage value when the voltage across at least one relay is less than a first preset voltage value, thereby achieving a single disturbance of the voltage across at least one relay. Further, the controller is also configured to output a first alarm message when the absolute value of the voltage difference is greater than the second preset voltage value and the voltage across at least one relay is less than the first preset voltage value. Implementing this embodiment allows for a single disturbance of the voltage across at least one relay for adhesion detection, eliminating the influence of interference factors such as voltage fluctuations and sampling errors of the inverter's conventional sampling voltage on adhesion detection, thereby avoiding the risks of false detection and missed detection when the relay performs adhesion detection, and thus improving the reliability of relay adhesion detection.

[0007] In one possible implementation, to further eliminate the influence of interference factors such as voltage fluctuations and sampling errors of the inverter's conventional sampling voltage on adhesion detection, the controller is further configured to control the bus voltage of any one of the positive and negative bus capacitors to rise or fall by a third preset voltage value when the absolute value of the voltage difference is greater than a second preset voltage value and the voltage across at least one relay is less than a first preset voltage value, thereby achieving secondary perturbation of the voltage across at least one relay. Furthermore, the controller is also configured to output a first alarm message when the bus voltage of any one bus capacitor rises or falls by the third preset voltage value and the voltage across at least one relay is less than the first preset voltage value. Implementing this embodiment allows for secondary perturbation of the voltage across at least one relay and adhesion detection, further eliminating the influence of interference factors such as voltage fluctuations and sampling errors of the inverter's conventional sampling voltage on adhesion detection, significantly improving the reliability of relay adhesion detection.

[0008] In one possible implementation, when at least one relay includes one of two relays, the controller is further configured to issue a closing command to the other relay when the inverter circuit is in standby mode. Further, the controller is also configured to output a second alarm message when the voltage across the other relay exceeds a fourth preset voltage value. It should be understood that, according to Kirchhoff's voltage law, the sum of the voltage across the other relay, the voltage to ground of the N line, and the voltage to ground of the negative bus capacitor equals the bus voltage of the negative bus capacitor. Therefore, the voltage across the other relay can be obtained by subtracting the voltage to ground of the N line and the voltage to ground of the negative bus capacitor from the bus voltage of the negative bus capacitor. The aforementioned second alarm message indicates that the other relay is in a closed failure state. By implementing the embodiments of this application, the voltage across the other relay can be indirectly obtained and closed failure detection can be performed by using the inverter's conventional sampling voltage, thereby avoiding the need to set up a relay-specific voltage sampling circuit inside the inverter, thus reducing the circuit cost of the inverter.

[0009] In one possible implementation, to eliminate the influence of interference factors such as voltage fluctuations and sampling errors of the inverter's conventional sampling voltage on the closure failure detection, the controller is further configured to control the absolute value of the voltage difference between the bus voltage of the positive bus capacitor and the bus voltage of the negative bus capacitor to be greater than a second preset voltage value when the voltage across the other relay is less than or equal to a fourth preset voltage value, thereby achieving a disturbance of the voltage across the other relay. Further, the controller is also configured to output a second alarm message when the absolute value of the voltage difference is greater than the second preset voltage value and the voltage across the other relay is greater than the fourth preset voltage value. Implementing this embodiment allows for a disturbance of the voltage across the other relay and closure failure detection, eliminating the influence of interference factors such as voltage fluctuations and sampling errors of the inverter's conventional sampling voltage on the closure failure detection, thereby avoiding the risks of false detection and missed detection when the relay performs closure failure detection, and improving the reliability of the relay's closure failure detection.

[0010] In one possible implementation, to further eliminate the influence of interference factors such as voltage fluctuations and sampling errors of the inverter's conventional sampling voltage on the closure failure detection, the controller is further configured to control the bus voltage of any one of the positive and negative bus capacitors to rise or fall by a third preset voltage value when the absolute value of the voltage difference is greater than a second preset voltage value and the voltage across the other relay is less than or equal to a fourth preset voltage value, thereby achieving a secondary disturbance of the voltage across the other relay. Furthermore, the controller is also configured to output a second alarm message when the bus voltage of any one bus capacitor rises or falls by the third preset voltage value and the voltage across the other relay is greater than the fourth preset voltage value. Implementing this embodiment allows for secondary disturbance of the voltage across the other relay and closure failure detection, further eliminating the influence of interference factors such as voltage fluctuations and sampling errors of the inverter's conventional sampling voltage on the closure failure detection, significantly improving the reliability of the relay's closure failure detection.

[0011] Secondly, this application provides an inverter comprising a positive bus capacitor, a negative bus capacitor, an inverter circuit, a neutral (N) line, two relays, and a controller. The DC terminal of the inverter is connected to a DC power supply, and the three-phase AC terminals and the N line are connected to the power grid or a load. The positive and negative bus capacitors are connected in series to the DC terminal of the inverter. The connection point between the negative bus capacitor and the DC terminal of the inverter is connected to a reference ground. The inverter circuit is connected between the DC terminal and the three-phase AC terminals of the inverter. The connection point of the positive and negative bus capacitors and the neutral line of the inverter circuit are all connected to one end of the N line. The two relays are connected in series between one end and the other end of the N line, and the other end of the N line is connected to a reference ground. Before the inverter operates, the inverter circuit is in standby mode. At this time, the controller issues closing commands to the two relays. Furthermore, the controller also outputs a third alarm message when the voltage across the two relays connected in series exceeds a fourth preset voltage value. The sum of the voltage across the two relays connected in series, the voltage to ground of the neutral line (N line), and the voltage to ground of the negative bus capacitor constitutes the bus voltage of the negative bus capacitor. The aforementioned third alarm information indicates that one of the two relays is in a failed closing state. Implementing this embodiment allows for the indirect acquisition of the voltage across the two relays connected in series using the inverter's conventional sampling voltage, thereby avoiding the need for a dedicated voltage sampling circuit for the relays within the inverter and reducing the inverter's circuit cost.

[0012] In one possible implementation, to eliminate the influence of interference factors such as voltage fluctuations and sampling errors of the inverter's conventional sampling voltage on the closure failure detection, the controller is further configured to ensure that the absolute value of the voltage difference between the bus voltage of the positive bus capacitor and the bus voltage of the negative bus capacitor is greater than a second preset voltage value when the voltage across the two relays connected in series is less than or equal to a fourth preset voltage value. Furthermore, the controller is also configured to output a third alarm message when the absolute value of the voltage difference is greater than the second preset voltage value, and the voltage across the two relays connected in series is greater than the fourth preset voltage value. Implementing this embodiment avoids the risks of false detection and missed detection when the relay performs closure failure detection, thereby improving the reliability of the relay's closure failure detection.

[0013] In one possible implementation, to further eliminate the influence of interference factors such as voltage fluctuations and sampling errors of the inverter's conventional sampling voltage on the detection of closure failure, the controller is further configured to control the bus voltage of either the positive or negative bus capacitor to rise or fall by a third preset voltage value when the absolute value of the voltage difference is greater than a second preset voltage value and the voltage across the two relays connected in series is less than or equal to a fourth preset voltage value. Furthermore, the controller is also configured to output a third alarm message when the bus voltage of either bus capacitor rises or falls by the third preset voltage value and the voltage across the two relays connected in series is greater than the fourth preset voltage value. Implementing the embodiments of this application can significantly improve the reliability of relay closure failure detection.

[0014] Thirdly, embodiments of this application provide a relay failure detection method for an inverter, which can be executed by the inverter's controller. In this method, when the inverter circuit is in standby mode, the controller issues a disconnect command to at least one of the two relays. Further, when the voltage across at least one relay is less than a first preset voltage value, the controller outputs a first alarm message. The sum of the voltage across at least one relay, the voltage to ground of the neutral (N) line, and the voltage to ground of the negative bus capacitor is the bus voltage of the negative bus capacitor. The first alarm message indicates that at least one of the relays is stuck in a stuck state. The inverter may include a positive bus capacitor, a negative bus capacitor, an inverter circuit, a neutral (N) line, and two relays. The positive bus capacitor and the negative bus capacitor are connected in series to the DC terminal of the inverter. The connection point between the negative bus capacitor and the DC terminal of the inverter is connected to reference ground. The inverter circuit is connected between the DC terminal and the three-phase AC terminal of the inverter. The connection points of the positive bus capacitor and the negative bus capacitor, as well as the neutral line of the inverter circuit, are all connected to one end of the N line. Two relays can be connected in series between one end and the other end of the N line, and the other end of the N line is connected to the reference ground.

[0015] In one possible implementation, when the voltage across at least one relay is less than a first preset voltage value, the controller controls the absolute value of the voltage difference between the bus voltage of the positive bus capacitor and the bus voltage of the negative bus capacitor to be greater than a second preset voltage value. Further, when the absolute value of the voltage difference is greater than the second preset voltage value, and the voltage across at least one relay is less than the first preset voltage value, the controller outputs a first alarm message.

[0016] In one possible implementation, when the absolute value of the voltage difference is greater than a second preset voltage value and the voltage across at least one relay is less than a first preset voltage value, the controller controls the bus voltage of any one of the positive and negative bus capacitors to rise or fall by a third preset voltage value. Further, when the bus voltage of any one bus capacitor rises or falls by the third preset voltage value and the voltage across at least one relay is less than the first preset voltage value, the controller outputs a first alarm message.

[0017] In one possible implementation, when at least one relay includes one of two relays, the controller issues a closing command to the other relay when the inverter circuit is in standby mode. Further, the controller outputs a second alarm message when the voltage across the other relay exceeds a fourth preset voltage value. The sum of the voltage across the other relay, the voltage to ground of the neutral line (N line), and the voltage to ground of the negative bus capacitor constitutes the bus voltage of the negative bus capacitor. This second alarm message indicates that the other relay is in a failed closing state.

[0018] In one possible implementation, when the voltage across another relay is less than or equal to a fourth preset voltage value, the controller controls the absolute value of the voltage difference between the positive bus capacitor and the negative bus capacitor to be greater than a second preset voltage value. Further, when the absolute value of the voltage difference is greater than the second preset voltage value, and the voltage across the other relay is greater than the fourth preset voltage value, the controller outputs a second alarm message.

[0019] In one possible implementation, when the absolute value of the voltage difference is greater than a second preset voltage value, and the voltage across the other relay is less than or equal to a fourth preset voltage value, the controller controls the bus voltage of either the positive or negative bus capacitor to rise or fall by a third preset voltage value. Further, when the bus voltage of either bus capacitor rises or falls by the third preset voltage value, and the voltage across the other relay is greater than the fourth preset voltage value, the controller outputs a second alarm message.

[0020] Fourthly, this application provides a relay failure detection method for an inverter, which can be executed by the inverter's controller. In this method, when the inverter circuit is in standby mode, the controller sends a closing command to two relays. Further, when the voltage across the two relays connected in series exceeds a fourth preset voltage value, the controller outputs a third alarm message. The sum of the voltage across the two relays connected in series, the voltage to ground of the neutral (N) line, and the voltage to ground of the negative bus capacitor is the bus voltage of the negative bus capacitor. The third alarm message indicates that one of the two relays is in a closed-failure state. The inverter may include a positive bus capacitor, a negative bus capacitor, an inverter circuit, a neutral (N) line, and two relays. The positive and negative bus capacitors are connected in series to the DC terminal of the inverter, and the connection point between the negative bus capacitor and the DC terminal of the inverter is connected to reference ground. The inverter circuit is connected between the DC terminal and the three-phase AC terminal of the inverter. The connection points of the positive bus capacitor and the negative bus capacitor, as well as the neutral line of the inverter circuit, are all connected to one end of the N line. Two relays can be connected in series between one end and the other end of the N line, and the other end of the N line is connected to the reference ground.

[0021] In one possible implementation, when the voltage across the two relays connected in series is less than or equal to a fourth preset voltage value, the controller controls the absolute value of the voltage difference between the positive bus capacitor and the negative bus capacitor to be greater than a second preset voltage value. Further, when the absolute value of the voltage difference is greater than the second preset voltage value, and the voltage across the two relays connected in series is greater than the fourth preset voltage value, the controller outputs a third alarm message.

[0022] In one possible implementation, when the absolute value of the voltage difference is greater than a second preset voltage value, and the voltage across the two relays connected in series is less than or equal to a fourth preset voltage value, the controller controls the bus voltage of either the positive or negative bus capacitor to rise or fall by a third preset voltage value. Further, when the bus voltage of any one bus capacitor rises or falls by the third preset voltage value, and the voltage across the two relays connected in series is greater than the fourth preset voltage value, the controller outputs a third alarm message.

[0023] It should be understood that the implementations and beneficial effects of the above-mentioned aspects of this application can be referenced from each other. Attached Figure Description

[0024] Figure 1 This is a schematic diagram of the structure of the photovoltaic power generation system provided in the embodiments of this application;

[0025] Figure 2 This is a circuit diagram of an inverter provided in an embodiment of this application;

[0026] Figure 3This is another circuit diagram of the inverter provided in the embodiments of this application;

[0027] Figure 4 This is another circuit diagram of the inverter provided in the embodiments of this application;

[0028] Figure 5 This is a flowchart illustrating a relay failure detection method for an inverter provided in an embodiment of this application;

[0029] Figure 6 This is another flowchart illustrating the relay failure detection method for inverters provided in this application embodiment;

[0030] Figure 7 This is another flowchart illustrating the relay failure detection method for inverters provided in this application embodiment;

[0031] Figure 8 This is another flowchart illustrating the relay failure detection method for inverters provided in this application embodiment;

[0032] Figure 9 This is another flowchart illustrating the relay failure detection method for inverters provided in this application embodiment;

[0033] Figure 10 This is another flowchart illustrating the relay failure detection method for inverters provided in this application embodiment. Detailed Implementation

[0034] The inverter provided in this application is applicable to photovoltaic power generation systems, photovoltaic-energy storage power generation systems, charging piles, battery management systems, uninterruptible power supplies (UPS), and other fields requiring power conversion via inverters. For example, when the inverter is applied to a photovoltaic power generation system, it can be a photovoltaic inverter. When the inverter is applied to a photovoltaic-energy storage power generation system, it can also be a power conversion system (PCS) or a hybrid inverter. For ease of description, the following explanation will use the application of an inverter in a photovoltaic power generation system as an example.

[0035] See Figure 1 , Figure 1 This is a schematic diagram of the structure of the photovoltaic power generation system provided in the embodiments of this application. Figure 1As shown, the photovoltaic power generation system includes an inverter 12. The DC terminal of the inverter 12 is used to connect to the photovoltaic string 11, and the L1-phase AC terminal, L2-phase AC terminal, L3-phase AC terminal, and N-line of the inverter 12 are used to connect to the power grid 13 or a load 14. When the inverter 12 is connected to the grid, it converts the DC power output from the photovoltaic string 11 into AC power and supplies power to the power grid 13. When the inverter 12 is off-grid operated, it converts the DC power output from the photovoltaic string 11 into AC power and supplies power to the load 14.

[0036] The following will combine Figures 2 to 4 The inverter provided in this application and its working principle are illustrated with examples.

[0037] See Figure 2 , Figure 2 This is a circuit diagram of an inverter provided in an embodiment of this application. Figure 2 As shown, inverter 2 includes a positive bus capacitor C1, a negative bus capacitor C2, an inverter circuit 21, a neutral (N) line, relays K1 and K2, and a controller 22. The DC terminal dc1 of inverter 2 is connected to a DC power supply 3. The three-phase AC terminals and the neutral (N) line of inverter 2 are connected to the power grid 4 or a load 5. Specifically, the three-phase AC terminals of inverter 2 include phases L11, L21, and L31. For example, inverter 2 can be a photovoltaic inverter, an energy storage inverter, or a hybrid inverter, and the DC power supply 3 can be a photovoltaic string or an energy storage battery. The positive bus capacitor C1 and the negative bus capacitor C2 are connected in series to the DC terminal dc1 of inverter 2. The connection point b between the negative bus capacitor C2 and the DC terminal dc1 of inverter 2 is connected to reference ground PE. The inverter circuit 21 is connected between the DC terminal dc1 of inverter 2 and the three-phase AC terminals. The connection point a of the positive bus capacitor C1 and the negative bus capacitor C2 and the neutral line of the inverter circuit 21 are both connected to one end N11 of the N line. The relays K1 and K2 are connected in series between one end N11 and the other end N12 of the N line. The other end N12 of the N line is connected to the reference ground PE.

[0038] Before inverter 2 is connected to the grid or operated off-grid, inverter circuit 21 is in standby mode. Standby mode means that inverter circuit 21 does not output AC power, but controller 22 can receive power and operate. At this time, controller 22 is used to detect sticking of at least one of relays K1 and K2.

[0039] In a specific implementation, controller 22 is used to issue a disconnect command to at least one relay when inverter circuit 21 is in standby mode. Furthermore, controller 22 is also used to output a first alarm message when the voltage across at least one relay is less than a first preset voltage value. For example, the first preset voltage value can be 50V. It should be understood that, according to Kirchhoff's voltage law (KVL), the voltage across at least one relay V... n-relay The voltage to ground of the N line V n-pe and the voltage V to ground of the negative bus capacitor C2 iso The sum of these is the bus voltage V of the negative bus capacitor C2. bus- Therefore, the voltage V across at least one relay n-relay The bus voltage V of the negative bus capacitor C2 can be used as a reference. bus- Subtract the voltage V of the N line to ground n-pe and the voltage to ground of the negative bus capacitor C2 V iso Obtain, i.e., V n-relay =V bus- -V n-pe -V iso Among them, V n-pe V bus- and V iso All are the normal sampling voltages of inverter 2. The aforementioned first alarm information is used to indicate that at least one of the relays is in a stuck state. For example, when at least one relay includes one of relays K1 and relay K2, the first alarm information is used to indicate that one of the relays is in a stuck state.

[0040] Implementing the embodiments of this application, the voltage V to ground of the N line can be used. n-pe The bus voltage V of the negative bus capacitor C2 bus- and voltage to ground V iso By using conventional sampling voltage, the voltage across at least one relay can be indirectly obtained and adhesion detection can be performed, thereby avoiding the need to set up a relay-specific voltage sampling circuit inside the inverter 2, thus reducing the circuit cost of the inverter 2.

[0041] In some embodiments, in order to eliminate the influence of interference factors such as voltage fluctuations and sampling errors of the inverter 2's conventional sampling voltage on adhesion detection, the controller 22 is also used to perform a disturbance on the voltage across at least one relay and perform adhesion detection.

[0042] In a specific implementation, the controller 22 is used to control the absolute value of the voltage difference between the bus voltage of the positive bus capacitor C1 and the bus voltage of the negative bus capacitor C2 to be greater than a second preset voltage value when the voltage across at least one relay is less than a first preset voltage value, thereby achieving a primary disturbance of the voltage across at least one relay. For example, as shown... Figure 3 As shown above, Figure 2 The inverter 2 shown also includes an insulation resistance detection circuit 24, which includes a first resistor R1, a second resistor R2, a third resistor R3, and a relay K3. The first resistor R1, the second resistor R2, and the third resistor R3 are connected in series to the DC terminal dc1 of the inverter 2. The relay K3 is connected in parallel with the second resistor R2. One end of the third resistor R3 is connected to the connection point b between the negative bus capacitor C2 and the DC terminal dc1 of the inverter 2, and the other end of the third resistor R3 is connected to the reference ground PE. The controller 22 is also used to control the relay K3 to close when the voltage across at least one relay is less than a first preset voltage value, so that the absolute value of the voltage difference is greater than a second preset voltage value. It should be understood that when the inverter circuit 21 is in standby mode, the relay K3 is in the open state, and the voltage between the positive DC bus BUS+ and the negative DC bus BUS- is divided by the first resistor R1, the second resistor R2, and the third resistor R3. At this point, the absolute value of the voltage difference between the bus voltage of the positive bus capacitor C1 and the bus voltage of the negative bus capacitor C2 is less than or equal to the second preset voltage value. That is, the bus voltages of the positive bus capacitor C1 and the negative bus capacitor C2 are balanced, and the potential at connection point a is typically 0. However, after relay K3 closes, the second resistor R2 is short-circuited, and the voltage between the positive DC bus BUS+ and the negative DC bus BUS- is divided by the first resistor R1 and the third resistor R3. At this time, the absolute value of the voltage difference will increase to a value greater than the second preset voltage value. That is, the bus voltages of the positive bus capacitor C1 and the negative bus capacitor C2 are unbalanced, and the potential at connection point a changes. This means that the potential at the end of at least one relay connected to connection point a changes, thereby changing the voltage across at least one relay, achieving a disturbance of the voltage across at least one relay. It is understandable that... Figure 3 The insulation resistance detection circuit 24 shown is only an example, and this embodiment does not limit the circuit topology of the insulation resistance detection circuit 24.

[0043] After perturbing the voltage across at least one relay, the controller 22 is further configured to output a first alarm message when the absolute value of the voltage difference is greater than a second preset voltage value and the voltage across at least one relay is less than a first preset voltage value. Implementing this embodiment allows for perturbing the voltage across at least one relay and performing adhesion detection, eliminating the influence of interference factors such as voltage fluctuations and sampling errors of the inverter 2's conventional sampling voltage on adhesion detection. This avoids the risks of false detection and missed detection when performing adhesion detection on relays, thereby improving the reliability of relay adhesion detection.

[0044] In some embodiments, in order to further eliminate the influence of interference factors such as voltage fluctuations and sampling errors of the conventional sampling voltage of the inverter 2 on the adhesion detection, the controller 22 is also used to perform secondary perturbation on the voltage across at least one relay and perform adhesion detection.

[0045] In specific implementation, controller 22 is used to control the bus voltage of any one of the positive bus capacitors C1 and C2 to rise or fall by a third preset voltage value when the absolute value of the voltage difference is greater than a second preset voltage value and the voltage across at least one relay is less than a first preset voltage value, thereby achieving a secondary disturbance of the voltage across at least one relay. For example, the third preset voltage value can be 50V. Specifically, as... Figure 4 As shown above, Figure 3The inverter 2 shown also includes a balanced bridge circuit 25, which includes a first switch Q1, a second switch Q2, and an inductor L. The first switch Q1 and the second switch Q2 are connected in series to the DC terminal dc1 of the inverter 2. The connection point between the first switch Q1 and the second switch Q2 is connected to the aforementioned connection point a via the inductor L. The controller 22 is further configured to adjust the current I output by the inductor L to connection point a when the absolute value of the voltage difference is greater than a second preset voltage value and the voltage across at least one relay is less than the first preset voltage value, thereby increasing or decreasing the bus voltage of any bus capacitor by a third preset voltage value. The current I is positively correlated with the third preset voltage value. Taking adjusting the current I to a target current as an example, the controller 22 generates drive signals for the first switch Q1 and the second switch Q2 based on the target current, and controls the first switch Q1 and the second switch Q2 to be turned on or off based on the drive signals, thereby causing the inductor L to output the target current to connection point a. It should be understood that when the first switch Q1 is on and the second switch Q2 is off, energy can be stored in the inductor L. When the first switch Q1 is off and the second switch Q2 is on, the target current stored in the inductor L can be output to connection point a, thereby raising or lowering the bus voltage of any bus capacitor by a third preset voltage value. At this time, the bus voltage of the positive bus capacitor C1 and the bus voltage of the negative bus capacitor C2 are unbalanced, and the potential at connection point a changes. That is, the potential at the end of at least one relay connected to connection point a changes, thereby changing the voltage across at least one relay, achieving a secondary disturbance of the voltage across at least one relay. It is understandable that... Figure 4 The balanced bridge circuit 25 shown is only an example, and this embodiment does not limit the circuit topology of the balanced bridge circuit 25.

[0046] After subjecting the voltage across at least one relay to a secondary disturbance, the controller 22 is further configured to output a first alarm message when the bus voltage of any bus capacitor rises or falls by a third preset voltage value, and the voltage across at least one relay is less than a first preset voltage value. Implementing this embodiment allows for secondary disturbance of the voltage across at least one relay and enables adhesion detection, further eliminating the influence of interference factors such as voltage fluctuations and sampling errors of the inverter 2's conventional sampling voltage on adhesion detection, significantly improving the reliability of relay adhesion detection.

[0047] In some embodiments, to improve the accuracy of relay sticking detection, the controller 22 is further configured to output a first alarm message when the voltage across at least one relay is less than a first preset voltage value for a duration that reaches a first preset duration. For example, the first preset duration may be 10 ms. By implementing the embodiments of this application, the influence of voltage fluctuations in the conventional sampling voltage of the inverter 2 on sticking detection can be eliminated by determining whether the duration reaches the first preset duration, thereby improving the accuracy of relay sticking detection.

[0048] In some embodiments, when at least one relay includes relay K1 and relay K2, the controller 22 is configured to output that both relay K1 and relay K2 are in an open state when the duration for which the voltage across at least one relay is greater than or equal to a first preset voltage value reaches a first preset duration. Further, the controller 22 is also configured to control the absolute value of the voltage difference between the bus voltage of the positive bus capacitor C1 and the bus voltage of the negative bus capacitor C2 to be less than or equal to a second preset voltage value when both relay K1 and relay K2 are in an open state, thereby achieving a balance between the bus voltage of the positive bus capacitor C1 and the bus voltage of the negative bus capacitor C2. Even further, the controller 22 is also configured to control both relay K1 and relay K2 to close when the absolute value of the voltage difference is less than or equal to the second preset voltage value, and control the inverter circuit 21 to invert the DC power output from the DC power supply 3 into AC power to supply power to the grid 4 or the load 5. Implementing the embodiments of this application can ensure the safe and reliable operation of the inverter 2, and improve the power supply reliability and security of the grid 4 or the load 5.

[0049] In some embodiments, when at least one relay includes one of relays K1 and K2, the controller 22 is further configured to detect a closing failure of the other relay. Specifically, the controller 22 is configured to issue a closing command to the other relay when the inverter circuit 21 is in standby mode. Further, the controller 22 is also configured to output a second alarm message when the voltage across the other relay is greater than a fourth preset voltage value. For example, the fourth preset voltage value can be 10V. It should be understood that, according to Kirchhoff's voltage law, the sum of the voltage across the other relay, the voltage to ground of the N line, and the voltage to ground of the negative bus capacitor C2 is the bus voltage of the negative bus capacitor C2. Therefore, the voltage across the other relay can be obtained by subtracting the voltage to ground of the N line and the voltage to ground of the negative bus capacitor C2 from the bus voltage of the negative bus capacitor C2. The aforementioned second alarm message is used to indicate that the other relay is in a closing failure state. By implementing the embodiments of this application, the voltage across another relay can be indirectly obtained and closed-loop failure detection can be performed by using the conventional sampling voltage of inverter 2. This avoids the need to set up a relay-specific voltage sampling circuit inside inverter 2, thereby reducing the circuit cost of inverter 2.

[0050] In some embodiments, to eliminate the influence of interference factors such as voltage fluctuations and sampling errors of the inverter 2's conventional sampling voltage on the closure failure detection, the controller 22 is also used to perform a disturbance on the voltage across another relay and perform closure failure detection. Specifically, when the voltage across the other relay is less than or equal to a fourth preset voltage value, the controller 22 controls the absolute value of the voltage difference between the bus voltage of the positive bus capacitor C1 and the bus voltage of the negative bus capacitor C2 to be greater than a second preset voltage value, thereby achieving a disturbance on the voltage across the other relay. The specific disturbance process can be found above. Figure 3 The corresponding embodiments will not be described in detail here. After perturbing the voltage across the other relay, the controller 22 is further configured to output a second alarm message when the absolute value of the voltage difference is greater than the second preset voltage value and the voltage across the other relay is greater than the fourth preset voltage value. By implementing the embodiments of this application, the voltage across the other relay can be perturbed and closed-loop failure detection can be performed, eliminating the influence of interference factors such as voltage fluctuations and sampling errors of the inverter 2's conventional sampling voltage on the closed-loop failure detection, thereby avoiding the risk of false detection and missed detection when the relay performs closed-loop failure detection, and improving the reliability of the relay's closed-loop failure detection.

[0051] In some embodiments, to further eliminate the influence of interference factors such as voltage fluctuations and sampling errors of the inverter 2's conventional sampling voltage on the closure failure detection, the controller 22 is also used to perform a secondary disturbance on the voltage across another relay and perform closure failure detection. Specifically, when the absolute value of the voltage difference is greater than a second preset voltage value, and the voltage across the other relay is less than or equal to a fourth preset voltage value, the controller 22 is also used to control the bus voltage of either the positive bus capacitor C1 or the negative bus capacitor C2 to increase or decrease by a third preset voltage value, thereby achieving a secondary disturbance on the voltage across the other relay. The specific details of the secondary disturbance process can be found above. Figure 4 The corresponding embodiments will not be described in detail here. After subjecting the voltage across the other relay to a secondary disturbance, the controller 22 is further configured to output a second alarm message when the bus voltage of any bus capacitor rises or falls by a third preset voltage value, and the voltage across the other relay is greater than a fourth preset voltage value. By implementing the embodiments of this application, the voltage across the other relay can be subject to a secondary disturbance and closed-loop failure detection, further eliminating the influence of interference factors such as voltage fluctuations and sampling errors of the inverter 2's conventional sampling voltage on the closed-loop failure detection, and significantly improving the reliability of the relay's closed-loop failure detection.

[0052] In some embodiments, to improve the accuracy of relay closure failure detection, the controller 22 is further configured to output a second alarm message when the voltage across another relay is greater than a fourth preset voltage value for a duration that reaches a first preset duration. By implementing the embodiments of this application, the influence of voltage fluctuations in the conventional sampling voltage of the inverter 2 on closure failure detection can be eliminated by determining whether the duration reaches the first preset duration, thereby improving the accuracy of relay closure failure detection.

[0053] In some embodiments, the controller 22 is configured to output that one of the relays is in an open state when the voltage across one of the relays is greater than or equal to a first preset voltage value for a duration that reaches a first preset duration. Furthermore, the controller 22 is also configured to output that the other relay is in a closed state when the voltage across the other relay is less than or equal to a fourth preset voltage value for a duration that reaches a first preset duration. At this time, neither relay K1 nor relay K2 has failed (e.g., stuck or failed to close). Further, the controller 22 is also configured to control the bus voltage of the positive bus capacitor C1 and the bus voltage V of the negative bus capacitor C2 when neither relay K1 nor relay K2 has failed. bus- The absolute value of the voltage difference between the two is less than or equal to a second preset voltage value. Furthermore, the controller 22 is also used to control one of the relays to close when the absolute value of the voltage difference is less than or equal to the second preset voltage value, and to control the inverter circuit 21 to invert the DC power output from the DC power supply 3 into AC power to supply power to the grid 4 or the load 5. Implementing the embodiments of this application can ensure the safe and reliable operation of the inverter 2, and improve the power supply reliability and security of the grid 4 or the load 5.

[0054] In some embodiments, before the inverter 2 operates in grid-connected or off-grid mode, the controller 22 is further configured to simultaneously detect closure failures of relays K1 and K2. Specifically, the controller 22 is configured to issue closing commands to relays K1 and K2 when the inverter circuit 21 is in standby mode. Further, the controller 22 is also configured to output a third alarm message when the voltage across the series connection of relays K1 and K2 exceeds a fourth preset voltage value. The sum of the voltage across the series connection of the two relays, the voltage to ground of the N line, and the voltage to ground of the negative bus capacitor constitutes the bus voltage of the negative bus capacitor. The aforementioned third alarm message indicates that one of relays K1 or K2 is in a closure failure state. By implementing this embodiment, the voltage across the series connection of relays K1 and K2 can be indirectly obtained and closure failure detection performed using the conventional sampling voltage of the inverter 2. This avoids the need to install a relay-specific voltage sampling circuit inside the inverter 2, thereby reducing the circuit cost of the inverter 2.

[0055] In some embodiments, to eliminate the influence of interference factors such as voltage fluctuations and sampling errors of the inverter 2's conventional sampling voltage on the closure failure detection, the controller 22 is also used to perform a disturbance on the voltage across the series-connected relays K1 and K2 and perform closure failure detection. Specifically, when the voltage across the series-connected relays K1 and K2 is less than or equal to a fourth preset voltage value, the controller 22 further controls the absolute value of the voltage difference between the positive bus capacitor C1 and the negative bus capacitor C2 to be greater than a second preset voltage value, thereby achieving a disturbance on the voltage across the series-connected relays K1 and K2. The specific details of the disturbance process can be found above. Figure 3 The corresponding embodiments will not be described in detail here. After perturbing the voltage across the series-connected relays K1 and K2, the controller 22 is further configured to output a third alarm message when the absolute value of the voltage difference is greater than a second preset voltage value and the voltage across the series-connected relays K1 and K2 is greater than a fourth preset voltage value. Implementing the embodiments of this application can avoid the risks of false detection and missed detection when the relay performs closure failure detection, thereby improving the reliability of relay closure failure detection.

[0056] In some embodiments, to further eliminate the influence of interference factors such as voltage fluctuations and sampling errors of the inverter 2's conventional sampling voltage on the detection of closure failure, the controller 22 is also used to perform secondary perturbation on the voltage across the series connection of relays K1 and K2 and perform closure failure detection. Specifically, when the absolute value of the voltage difference is greater than a second preset voltage value, and the voltage across the series connection of relays K1 and K2 is less than or equal to a fourth preset voltage value, the controller 22 is also used to control the bus voltage of either the positive bus capacitor C1 or the negative bus capacitor C2 to rise or fall by a third preset voltage value, thereby achieving secondary perturbation of the voltage across the series connection of relays K1 and K2. The specific details of the secondary perturbation process can be found above. Figure 4 The corresponding embodiments will not be described in detail here. After subjecting a secondary disturbance to the voltage across the series-connected relays K1 and K2, the controller 22 is further configured to output a third alarm message when the bus voltage of any bus capacitor rises or falls by a third preset voltage value, and the voltage across the series-connected relays K1 and K2 exceeds a fourth preset voltage value. Implementing the embodiments of this application can significantly improve the reliability of relay closure failure detection.

[0057] In some embodiments, to improve the accuracy of relay closure failure detection, the controller 22 is further configured to output a third alarm message when the voltage across the series-connected relays K1 and K2 exceeds a fourth preset voltage value for a duration exceeding a first preset duration. By implementing this embodiment, the influence of voltage fluctuations in the inverter 2's conventional sampling voltage on closure failure detection can be eliminated by determining whether the duration exceeds the first preset duration, thereby improving the accuracy of relay closure failure detection.

[0058] In some embodiments, the controller 22 is further configured to ensure that both relays K1 and K2 are in a closed state when the voltage across relays K1 and K2 connected in series is less than or equal to a fourth preset voltage value for a duration that reaches a first preset duration. Further, the controller 22 is configured to control the absolute value of the voltage difference between the bus voltage of the positive bus capacitor C1 and the bus voltage of the negative bus capacitor C2 to be less than or equal to a second preset voltage value when both relays K1 and K2 are in a closed state. Even further, the controller 22 is configured to control the inverter circuit 21 to invert the DC power output from the DC power supply 3 into AC power to supply power to the grid 4 or load 5 when the absolute value of the voltage difference is less than or equal to the second preset voltage value. Implementing the embodiments of this application ensures the safe and reliable operation of the inverter 2, improving the power supply reliability and security of the grid 4 or load 5.

[0059] It is understandable that each of the voltages across at least one of the aforementioned relays, the voltage across another relay, and the voltage across the terminals of relays K1 and K2 connected in series, can also be determined within a certain time period based on V. bus- -V n-pe -V iso The average value of multiple voltages is calculated, thereby improving the accuracy of the voltage across at least one relay.

[0060] Similarly, it is understandable that the controller 22 can first perform a secondary disturbance on the voltage across the relay, and then perform a primary disturbance on the voltage across the relay, without restricting the order of the primary and secondary disturbances.

[0061] See Figure 5 , Figure 5 This is a flowchart illustrating a relay failure detection method for an inverter provided in an embodiment of this application. Figure 5 As shown, the relay failure detection method specifically includes the following steps S11 to S14.

[0062] Step S11: When the inverter circuit is in standby mode, the controller sends a disconnect command to at least one of the two relays.

[0063] After step S11, the controller can further obtain the voltage across at least one relay based on the voltage to ground of the N-line, the bus voltage of the negative bus capacitor, and the voltage to ground after a second preset time has elapsed since the disconnect command was issued to at least one relay. The sum of the voltage across at least one relay, the voltage to ground of the N-line, and the voltage to ground of the negative bus capacitor constitutes the bus voltage of the negative bus capacitor. For example, the second preset time can be 30 ms. It is understood that the second preset time not only provides sufficient response time for at least one relay to disconnect, but also avoids voltage fluctuations that occur when the relay disconnects, allowing the voltage across at least one relay to stabilize, thereby improving the accuracy of the voltage across at least one relay.

[0064] Step S12: The voltage across at least one relay is less than a first preset voltage value.

[0065] When the voltage across at least one relay is greater than or equal to a first preset voltage value, the controller executes step S13. When the voltage across at least one relay is less than the first preset voltage value, the controller executes step S14 or step S141.

[0066] In step S13, the controller outputs that at least one relay is in the off state.

[0067] Step S14: The controller outputs the first alarm message.

[0068] In step S14, the first alarm message is used to indicate that at least one of the relays is in a stuck state.

[0069] In steps S11 to S14 above, the inverter includes a positive bus capacitor, a negative bus capacitor, an inverter circuit, a neutral (N) line, and two relays. The positive and negative bus capacitors are connected in series to the DC terminal of the inverter, and the connection point between the negative bus capacitor and the DC terminal of the inverter is connected to reference ground. The inverter circuit is connected between the DC terminal and the three-phase AC terminal of the inverter. The connection point of the positive and negative bus capacitors, as well as the neutral line of the inverter circuit, are all connected to one end of the N line. The two relays are connected in series between one end and the other end of the N line, and the other end of the N line is connected to reference ground. Figure 6 As shown, step S14 may specifically include steps S141 to S143.

[0070] Step S141: The controller controls the absolute value of the voltage difference between the bus voltage of the positive bus capacitor and the bus voltage of the negative bus capacitor to be greater than the second preset voltage value.

[0071] Step S142: The absolute value of the pressure difference is greater than the second preset voltage value, and the voltage across at least one relay is less than the first preset voltage value.

[0072] When the absolute value of the voltage difference is greater than the second preset voltage value, and the voltage across at least one relay is greater than or equal to the first preset voltage value, the controller executes step S13. Optionally, the controller may also continuously detect whether the duration for which the voltage across at least one relay is greater than or equal to the first preset voltage value reaches the first preset duration within a third preset time period, and execute step S13 when the duration reaches the first preset time period. The third preset time period can be specifically determined by the voltage to ground of the N line, the bus voltage of the negative bus capacitor, and the voltage to ground. For example, the third preset time period can be 15 seconds.

[0073] When the absolute value of the differential pressure is greater than the second preset voltage value, and the voltage across at least one relay is less than the first preset voltage value, the controller executes the following step S143 or step S1431.

[0074] In step S143, the controller outputs the first alarm message.

[0075] like Figure 7 As shown, step S143 may specifically include the following steps S1431 to S1433.

[0076] In step S1431, the controller controls the bus voltage of either the positive bus capacitor or the negative bus capacitor to increase or decrease by a third preset voltage value.

[0077] In step S1432, the bus voltage of any bus capacitor increases or decreases by a third preset voltage value, and the voltage across at least one relay is less than the first preset voltage value.

[0078] When the bus voltage of any bus capacitor rises or falls by a third preset voltage value, and the voltage across at least one relay is greater than or equal to a first preset voltage value, the controller executes step S13. Optionally, the controller may also continuously detect, within a third preset time period, whether the duration for which the voltage across at least one relay is greater than or equal to the first preset voltage value reaches the first preset time period, and execute step S13 when the duration reaches the first preset time period.

[0079] When the bus voltage of any bus capacitor increases or decreases by a third preset voltage value, and the voltage across at least one relay is less than the first preset voltage value, the controller executes the following steps S1433.

[0080] In step S1433, the controller outputs the first alarm message.

[0081] In some embodiments, when at least one relay includes one of two relays, the controller can also issue a closing command to the other relay when the inverter circuit is in standby mode. Further, the controller outputs a second alarm message when the voltage across the other relay exceeds a fourth preset voltage value. The sum of the voltage across the other relay, the voltage to ground of the neutral line (N line), and the voltage to ground of the negative bus capacitor constitutes the bus voltage of the negative bus capacitor. This second alarm message indicates that the other relay is in a failed closing state.

[0082] In some embodiments, when the voltage across another relay is less than or equal to a fourth preset voltage value, the controller controls the absolute value of the voltage difference between the positive bus capacitor and the negative bus capacitor to be greater than a second preset voltage value. Further, when the absolute value of the voltage difference is greater than the second preset voltage value, and the voltage across the other relay is greater than the fourth preset voltage value, the controller outputs a second alarm message.

[0083] In some embodiments, when the absolute value of the voltage difference is greater than a second preset voltage value, and the voltage across the other relay is less than or equal to a fourth preset voltage value, the controller controls the bus voltage of either the positive or negative bus capacitor to rise or fall by a third preset voltage value. Further, when the bus voltage of either bus capacitor rises or falls by the third preset voltage value, and the voltage across the other relay is greater than the fourth preset voltage value, the controller outputs a second alarm message.

[0084] See Figure 8 , Figure 8 This is another schematic flowchart of the relay failure detection method for inverters provided in the embodiments of this application. For example... Figure 8 As shown, the relay failure detection method specifically includes the following steps S21 to S24.

[0085] Step S21: When the inverter circuit is in standby mode, the controller sends a closing command to the two relays.

[0086] After step S21, the controller can also obtain the voltage across the two relays connected in series after a second preset time has elapsed since the closing command was issued to the two relays. The sum of the voltage across the two relays connected in series, the voltage to ground of the N line, and the voltage to ground of the negative bus capacitor constitutes the bus voltage of the negative bus capacitor.

[0087] Step S22: The voltage across the two relays connected in series is greater than the fourth preset voltage value.

[0088] When the voltage across the two relays connected in series is greater than the fourth preset voltage value, the controller executes step S23. When the voltage across the two relays connected in series is less than or equal to the fourth preset voltage value, the controller executes step S24 or step S241.

[0089] Step S23: The controller outputs the third alarm message.

[0090] In step S23, the third alarm information is used to indicate that one of the two relays is in a closed failure state.

[0091] In step S24, the controller outputs that both relays are in the closed state.

[0092] like Figure 9 As shown, step S24 may specifically include steps S241 to S243.

[0093] In step S241, the controller controls the absolute value of the voltage difference between the bus voltage of the positive bus capacitor and the bus voltage of the negative bus capacitor to be greater than the second preset voltage value.

[0094] In step S242, the absolute value of the pressure difference is greater than the second preset voltage value, and the voltage across the two relays connected in series is greater than the fourth preset voltage value.

[0095] When the absolute value of the voltage difference is greater than the second preset voltage value, and the voltage across the two relays connected in series is greater than the fourth preset voltage value, the controller executes step S23 above. When the absolute value of the voltage difference is greater than the second preset voltage value, and the voltage across the two relays connected in series is less than or equal to the fourth preset voltage value, the controller executes step S243 or step S2431.

[0096] In step S243, the controller outputs that both relays are in the closed state.

[0097] like Figure 10 As shown, step S243 may specifically include the following steps S2431 to S2433.

[0098] In step S2431, the controller controls the bus voltage of either the positive bus capacitor or the negative bus capacitor to increase or decrease by a third preset voltage value.

[0099] In step S2432, the bus voltage of any bus capacitor increases or decreases by a third preset voltage value, and the voltage across the two relays connected in series is greater than a fourth preset voltage value.

[0100] When the bus voltage of any bus capacitor rises or falls by a third preset voltage value, and the voltage across the two relays connected in series is greater than a fourth preset voltage value, the controller executes step S23 above. Optionally, the controller can also continuously detect, within a third preset time period, whether the duration for which the voltage across the two relays connected in series is greater than the fourth preset voltage value reaches a first preset time period, and execute step S23 above when the duration reaches the first preset time period.

[0101] When the bus voltage of any bus capacitor increases or decreases by a third preset voltage value, and the voltage across the two relays connected in series is less than or equal to a fourth preset voltage value, the controller executes the following steps S2433.

[0102] In step S2433, the controller outputs that both relays are in the closed state.

[0103] In its specific implementation, this application Figures 5 to 10 For more details on the operations performed by the controller in the provided relay failure detection method and their corresponding beneficial effects, please refer to the above. Figures 2 to 4 The implementation method of the inverter 2 and its working principle, as well as the corresponding beneficial effects, will not be elaborated here.

[0104] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. An inverter, characterized in that, The inverter includes a positive bus capacitor, a negative bus capacitor, an inverter circuit, a neutral line (N line), two relays, and a controller. The inverter's DC terminal is used to connect to a DC power supply, and the inverter's three-phase AC terminal and the neutral line (N line) are both used to connect to the power grid or load. The positive bus capacitor and the negative bus capacitor are connected in series to the inverter's DC terminal. The connection point between the negative bus capacitor and the inverter's DC terminal is connected to reference ground. The inverter circuit is connected between the inverter's DC terminal and the three-phase AC terminal. The connection point between the positive bus capacitor and the negative bus capacitor, as well as the neutral line of the inverter circuit, are all connected to one end of the N line. The two relays are connected in series between one end and the other end of the N line, and the other end of the N line is connected to reference ground. The controller is configured to issue a disconnect command to at least one of the two relays when the inverter circuit is in standby mode; and to output a first alarm message when the voltage across the at least one relay is less than a first preset voltage value, wherein the sum of the voltage across the at least one relay, the voltage to ground of the N line, and the voltage to ground of the negative bus capacitor is the bus voltage of the negative bus capacitor, and the first alarm message is used to indicate that there is a relay in the at least one relay that is stuck.

2. The inverter according to claim 1, characterized in that, The controller is also used for: When the voltage across the at least one relay is less than the first preset voltage value, the absolute value of the voltage difference between the bus voltage of the positive bus capacitor and the bus voltage of the negative bus capacitor is greater than the second preset voltage value. When the absolute value of the differential pressure is greater than the second preset voltage value, and the voltage across the at least one relay is less than the first preset voltage value, the first alarm message is output.

3. The inverter according to claim 2, characterized in that, The controller is also used for: When the absolute value of the voltage difference is greater than the second preset voltage value, and the voltage across at least one relay is less than the first preset voltage value, the bus voltage of any one of the positive bus capacitors and the negative bus capacitor is controlled to increase or decrease by a third preset voltage value. When the bus voltage of any one of the bus capacitors increases or decreases by the third preset voltage value, and the voltage across at least one relay is less than the first preset voltage value, the first alarm message is output.

4. The inverter according to any one of claims 1-3, characterized in that, The at least one relay includes one of the two relays; The controller is also used for: When the inverter circuit is in standby mode, a closing command is sent to the other of the two relays; When the voltage across the other relay is greater than the fourth preset voltage value, a second alarm message is output. The sum of the voltage across the other relay, the voltage to ground of the N line, and the voltage to ground of the negative bus capacitor is the bus voltage of the negative bus capacitor. The second alarm message is used to indicate that the other relay is in a closed failure state.

5. The inverter according to claim 4, characterized in that, The controller is also used for: When the voltage across the other relay is less than or equal to the fourth preset voltage value, the absolute value of the voltage difference between the bus voltage of the positive bus capacitor and the bus voltage of the negative bus capacitor is greater than the second preset voltage value. When the absolute value of the differential pressure is greater than the second preset voltage value, and the voltage across the other relay is greater than the fourth preset voltage value, the second alarm message is output.

6. The inverter according to claim 5, characterized in that, The controller is also used for: When the absolute value of the voltage difference is greater than the second preset voltage value, and the voltage across the other relay is less than or equal to the fourth preset voltage value, the bus voltage of either the positive bus capacitor or the negative bus capacitor is controlled to increase or decrease by a third preset voltage value. When the bus voltage of any one of the bus capacitors increases or decreases by the third preset voltage value, and the voltage across the other relay is greater than the fourth preset voltage value, the second alarm information is output.

7. An inverter, characterized in that, The inverter includes a positive bus capacitor, a negative bus capacitor, an inverter circuit, a neutral line (N line), two relays, and a controller. The inverter's DC terminal is used to connect to a DC power supply, and the inverter's three-phase AC terminal and the neutral line (N line) are both used to connect to the power grid or a load. The positive bus capacitor and the negative bus capacitor are connected in series to the inverter's DC terminal, and the connection point between the negative bus capacitor and the inverter's DC terminal is connected to reference ground. The inverter circuit is connected between the inverter's DC terminal and the three-phase AC terminal. The connection point of the positive bus capacitor and the negative bus capacitor, as well as the neutral line of the inverter circuit, are all connected to one end of the N line. The two relays are connected in series between one end and the other end of the N line, and the other end of the N line is connected to reference ground. The controller is configured to issue a closing command to the two relays when the inverter circuit is in standby mode; and to output a third alarm message when the voltage across the two relays connected in series is greater than a fourth preset voltage value. The sum of the voltage across the two relays connected in series, the voltage to ground of the N line, and the voltage to ground of the negative bus capacitor is the bus voltage of the negative bus capacitor. The third alarm message is used to indicate that one of the two relays is in a closed failure state.

8. The inverter according to claim 7, characterized in that, The controller is also used for: When the voltage across the two relays connected in series is less than or equal to the fourth preset voltage value, the absolute value of the voltage difference between the bus voltage of the positive bus capacitor and the bus voltage of the negative bus capacitor is greater than the second preset voltage value. When the absolute value of the differential pressure is greater than the second preset voltage value, and the voltage across the two relays connected in series is greater than the fourth preset voltage value, the third alarm message is output.

9. The inverter according to claim 8, characterized in that, The controller is also used for: When the absolute value of the voltage difference is greater than the second preset voltage value, and the voltage across the two relays connected in series is less than or equal to the fourth preset voltage value, the bus voltage of either the positive bus capacitor or the negative bus capacitor is controlled to increase or decrease by a third preset voltage value. When the bus voltage of any one of the bus capacitors increases or decreases by the third preset voltage value, and the voltage across the two relays connected in series is greater than the fourth preset voltage value, the third alarm message is output.

10. A method for detecting relay failure in an inverter, characterized in that, The method includes: When the inverter circuit is in standby mode, a disconnect command is sent to at least one of the two relays; When the voltage across at least one relay is less than a first preset voltage value, a first alarm message is output. The sum of the voltage across the at least one relay, the voltage to ground of the neutral line (N line), and the voltage to ground of the negative bus capacitor is the bus voltage of the negative bus capacitor. The first alarm message indicates that one of the at least one relays is stuck in a stuck state. The inverter includes a positive bus capacitor, the negative bus capacitor, the inverter circuit, the neutral line (N line), and the two relays. The positive bus capacitor and the negative bus capacitor are connected in series to the DC terminal of the inverter. The connection point between the negative bus capacitor and the DC terminal of the inverter is connected to reference ground. The inverter circuit is connected between the DC terminal and the three-phase AC terminal of the inverter. The connection point between the positive bus capacitor and the negative bus capacitor, as well as the neutral line of the inverter circuit, are all connected to one end of the N line. The two relays are connected in series between one end and the other end of the N line. The other end of the N line is connected to reference ground.

11. A method for detecting relay failure in an inverter, characterized in that, The method includes: When the inverter circuit is in standby mode, it sends a closing command to the two relays; When the voltage across the two relays connected in series exceeds a fourth preset voltage value, a third alarm message is output. The sum of the voltage across the two relays connected in series, the voltage to ground of the neutral line (N line), and the voltage to ground of the negative bus capacitor is the bus voltage of the negative bus capacitor. The third alarm message indicates that one of the two relays is in a closed, ineffective state. The inverter includes a positive bus capacitor, a negative bus capacitor, an inverter circuit, the neutral line (N line), and the two relays. The positive bus capacitor and the negative bus capacitor are connected in series to the DC terminal of the inverter. The connection point between the negative bus capacitor and the DC terminal of the inverter is connected to reference ground. The inverter circuit is connected between the DC terminal and the three-phase AC terminal of the inverter. The connection point between the positive bus capacitor and the negative bus capacitor, as well as the neutral line of the inverter circuit, are all connected to one end of the N line. The two relays are connected in series between one end and the other end of the N line. The other end of the N line is connected to reference ground.

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