Detection circuit and detection method of three-phase frequency converter without electrolytic capacitor

Abstract

The invention relates to the technical field of air conditioner frequency converter detection, and particularly discloses a detection circuit and a detection method of a three-phase non-electrolytic capacitor frequency converter. The detection circuit comprises a rectification unit, a voltage division unit, a voltage follower, a comparison unit and a control unit. The detection method comprises the following steps: rectifying a three-phase input power supply of the frequency converter to generate a first voltage signal; performing voltage division on the first voltage signal to obtain a bus voltage signal; tracking the change of the bus voltage signal to generate a second voltage signal; comparing the second voltage signal with a preset threshold value, and outputting a square wave signal according to a comparison result; and detecting the frequency of the bus voltage signal and the three-phase input power supply according to the square wave signal and judging whether the phase is open or not. According to the invention, the detection of the three-phase power supply frequency and the detection of the bus fluctuation frequency are realized through the analysis of the bus voltage, and the fault detection during the phase loss is realized at the same time.

Description

Technical Field

[0001] The present invention relates to the technical field of air conditioner inverter detection, and specifically provides a detection circuit and a detection method for a three-phase electrolytic capacitor-free inverter. Background Art

[0002] When the air conditioner is running, when the operating frequency of the air conditioner compressor decreases, it will enter the regenerative braking state. During this process, the kinetic energy of the system will be fed back to the DC circuit, causing the DC voltage to continue to increase. Therefore, when maintaining and operating the air conditioner, you should pay close attention to the changes in the DC voltage.

[0003] To ensure bus voltage stability, film capacitors have become the preferred choice for DC bus capacitors in three-phase inverter applications for air conditioners due to their long life, high reliability, and overall low cost. However, due to their generally small capacitance, film capacitors produce large bus voltage ripple after rectification, posing a challenge to downstream inverter motor control. Therefore, in some applications, prediction of bus voltage fluctuations and power supply frequency is necessary.

[0004] Currently, most solutions use resistor voltage division on the AC voltage side for detection or collect bus voltage for data storage and processing. The problems are:

[0005] 1. Use a circuit to perform resistance voltage division on the AC side for detection. Due to the characteristics of three-phase power supply, it is necessary to detect the frequency and phase loss of the R, S, and T phases. Two sets of detection circuits are required for confirmation. Otherwise, the phase loss may not be detected, increasing the layout area and cost. In addition, due to the high temperature rise on the resistance voltage division on the AC side, reliability is reduced.

[0006] 2. The bus voltage is collected and sent directly to the MCU for processing. The data needs to be stored and compared. The algorithm is relatively complex and has high performance requirements for the MCU. Summary of the Invention

[0007] In order to overcome the above-mentioned defects, the present invention provides a detection circuit and detection method for a three-phase electrolytic capacitor-free inverter, which detects the three-phase power supply frequency and the bus fluctuation frequency by analyzing the bus voltage, and simultaneously detects faults when there is a phase loss.

[0008] In a first aspect, the present invention provides a detection circuit for a three-phase electrolytic capacitor-free inverter, comprising: a rectifier unit, a voltage divider unit, a voltage follower, a comparison unit, and a control unit, wherein:

[0009] The rectifier unit is used to rectify the three-phase input power of the inverter to generate a first voltage signal;

[0010] The voltage dividing unit is used to divide the first voltage signal to obtain a bus voltage signal;

[0011] The voltage follower is used to track the change of the bus voltage signal to generate a second voltage signal;

[0012] The comparison unit is used to compare the second voltage signal with a preset threshold value and output a square wave signal according to the comparison result;

[0013] The control unit is used to detect the bus voltage signal and the frequency of the three-phase input power supply according to the square wave signal and to determine whether a phase is missing.

[0014] Furthermore, the voltage follower includes an operational amplifier, wherein the inverting input terminal of the operational amplifier serves as the input terminal of the voltage follower to receive the bus voltage signal, the output terminal of the operational amplifier serves as the output terminal of the voltage follower to output the second voltage signal, the non-inverting input terminal of the operational amplifier is grounded, and the output terminal of the operational amplifier is connected to the inverting input terminal.

[0015] Furthermore, the comparison unit includes a comparator, a first resistor, a second resistor and a first capacitor, wherein:

[0016] The inverting input terminal of the comparator is connected to the first end of the first resistor and the first end of the second resistor respectively, the non-inverting input terminal of the comparator is connected to the output terminal of the voltage follower, the V+ pin of the comparator is connected to the second end of the second resistor, the V- pin of the comparator is connected to the second end of the first resistor, and the output terminal of the comparator is connected to the control unit;

[0017] The first capacitor is connected in parallel with the first resistor.

[0018] Furthermore, the comparison unit further includes a second capacitor, wherein two ends of the second capacitor are respectively connected to the second end of the first resistor and the second end of the second resistor.

[0019] Furthermore, the rectifier unit includes:

[0020] a first rectifying branch, comprising a first diode and a second diode, wherein an anode of the first diode and a cathode of the second diode are commonly connected to a first phase line of the three-phase input power supply, the cathode of the first diode is connected to a first output terminal of the rectifying unit, and the anode of the second diode is connected to a second output terminal of the rectifying unit;

[0021] a second rectifying branch, comprising a third diode and a fourth diode, wherein an anode of the third diode and a cathode of the fourth diode are commonly connected to a second phase line of the three-phase input power supply, the cathode of the third diode is connected to the first output terminal of the rectifying unit, and the anode of the fourth diode is connected to the second output terminal of the rectifying unit; and

[0022] a third rectifying branch, comprising a fifth diode and a sixth diode, wherein an anode of the fifth diode and a cathode of the sixth diode are commonly connected to a third phase line of the three-phase input power supply, the cathode of the fifth diode is connected to the first output terminal of the rectifying unit, and the anode of the sixth diode is connected to the second output terminal of the rectifying unit;

[0023] A third capacitor is connected between the first output terminal and the second output terminal of the rectifier unit.

[0024] Furthermore, the voltage dividing unit includes a third resistor and a resistor unit, wherein:

[0025] The third resistor is connected in series with the resistor unit, and the resistor unit includes a plurality of resistors connected in series;

[0026] The first end of the third resistor is connected to the second output end of the rectifier unit, the second end of the third resistor is connected to the first end of the resistor unit, and the second end of the resistor unit is connected to the first output end of the rectifier unit;

[0027] The second end of the third resistor is connected to the voltage follower as an output end of the voltage dividing unit.

[0028] Furthermore, the resistor unit includes a fourth resistor, a fifth resistor, a sixth resistor and a seventh resistor connected in series in sequence, wherein the first end of the fourth resistor is connected to the third resistor as the first end of the resistor unit, the first end of the seventh resistor is connected to the first output end of the rectifier unit as the second end of the resistor unit, and the second end of the seventh resistor is connected to the sixth resistor.

[0029] Furthermore, the circuit further includes a protection unit configured to receive the bus voltage signal and limit the voltage output to the control unit within a preset range.

[0030] Furthermore, the protection circuit includes:

[0031] an eighth resistor, a fourth capacitor, a first Schottky diode, and a second Schottky diode, wherein:

[0032] A first end of the eighth resistor is connected to the output end of the voltage dividing unit, and a second end of the eighth resistor is connected to the first end of the fourth capacitor and the control unit respectively;

[0033] The second end of the fourth capacitor is connected to the anode of the first Schottky diode;

[0034] The anode of the first Schottky diode is grounded, and the cathode of the first Schottky diode is connected to the anode of the second Schottky diode;

[0035] A cathode of the second Schottky diode is connected to a power supply.

[0036] In a second aspect, the present invention provides a detection method for a three-phase electrolytic capacitor-free frequency converter, comprising:

[0037] rectifying a three-phase input power supply of the frequency converter to generate a first voltage signal;

[0038] Dividing the first voltage signal to obtain a bus voltage signal;

[0039] Tracking the change of the bus voltage signal to generate a second voltage signal;

[0040] comparing the second voltage signal with a preset threshold, and outputting a square wave signal according to the comparison result;

[0041] The bus voltage signal and the frequency of the three-phase input power are detected according to the square wave signal, and it is determined whether a phase is missing.

[0042] Furthermore, comparing the second voltage signal with a preset threshold and outputting a square wave signal according to the comparison result includes:

[0043] When the voltage value of the second voltage signal is greater than a preset threshold, outputting a high level signal;

[0044] When the voltage value of the second voltage signal is less than a preset threshold, a low level signal is output.

[0045] The above one or more technical solutions of the present invention have at least one or more of the following beneficial effects:

[0046] In the technical solution of the present invention, the control unit determines the frequency of the three-phase input power supply and whether there is a phase loss fault based on the frequency of the detected square wave signal.

[0047] Compared with detecting power supply frequency and phase loss on the AC side, the present invention performs frequency detection and phase loss detection on the DC side, and these two functions are achieved through one circuit, which greatly reduces the cost.

[0048] The frequency detection and phase loss circuit functions are integrated, which greatly simplifies resource usage; BRIEF DESCRIPTION OF THE DRAWINGS

[0049] The disclosure of the present invention will be more easily understood with reference to the accompanying drawings. Those skilled in the art will readily appreciate that these drawings are for illustrative purposes only and are not intended to limit the scope of protection of the present invention. Furthermore, similar numbers in the drawings represent similar components, wherein:

[0050] Figure 1 is a schematic diagram of a main structural block diagram of a detection circuit according to an embodiment of the present invention;

[0051] Figure 2 is a circuit diagram of a detection circuit according to an embodiment of the present invention;

[0052] Figure 3 is a schematic diagram of a second voltage signal and a corresponding square wave signal according to an embodiment of the present invention;

[0053] Figure 4 1 is a flow chart of the main steps of a detection method according to one embodiment of the present invention;

[0054] Figure 5 is a schematic diagram of a second voltage signal and a corresponding square wave signal according to an embodiment of the present invention;

[0055] Figure 6 is a schematic diagram of a second voltage signal and a corresponding square wave signal according to an embodiment of the present invention. DETAILED DESCRIPTION

[0056] Some embodiments of the present invention are described below with reference to the accompanying drawings. Those skilled in the art should understand that these embodiments are only used to explain the technical principles of the present invention and are not intended to limit the scope of protection of the present invention.

[0057] In the description of the present invention, "module" and "processor" may include hardware, software or a combination of the two. A module may include hardware circuits, various suitable sensors, communication ports, and memories, and may also include software components, such as program code, or a combination of software and hardware. The processor may be a central processing unit, a microprocessor, an image processor, a digital signal processor, or any other suitable processor. The processor has data and / or signal processing functions. The processor may be implemented in software, hardware, or a combination of the two. Non-transitory computer-readable storage media include any suitable media that can store program code, such as magnetic disks, hard disks, optical disks, flash memory, read-only memory, random access memory, and the like.

[0058] Reference Figure 1The present invention provides a detection circuit for a three-phase electrolytic capacitor-free inverter, comprising: a rectifier unit 2, a voltage divider unit 3, a voltage follower 4, a comparison unit 5 and a control unit 6, wherein:

[0059] The rectifier unit 2 is used to rectify the three-phase input power 1 of the inverter to generate a first voltage signal;

[0060] The voltage dividing unit 3 is used to divide the first voltage signal to obtain a bus voltage signal;

[0061] The voltage follower 4 is used to track the change of the bus voltage signal to generate a second voltage signal;

[0062] The comparison unit 5 is used to compare the second voltage signal with a preset threshold value and output a square wave signal according to the comparison result;

[0063] The control unit 6 is configured to detect the bus voltage signal and the frequency of the three-phase input power supply 1 according to the square wave signal and to determine whether a phase is missing.

[0064] The control unit determines the frequency of the three-phase input power supply and whether there is a phase loss fault based on the frequency of the detected square wave signal.

[0065] Reference Figure 2 In one embodiment, the rectifier unit 2 includes:

[0066] a first rectifier branch, comprising a first diode D1 and a second diode D2, wherein an anode of the first diode D1 and a cathode of the second diode D2 are commonly connected to a first phase line of the three-phase input power supply, the cathode of the first diode D1 is connected to a first output terminal of the rectifier unit, and the anode of the second diode D2 is connected to a second output terminal of the rectifier unit;

[0067] a second rectifying branch, comprising a third diode D3 and a fourth diode D4, wherein an anode of the third diode D3 and a cathode of the fourth diode D4 are commonly connected to a second phase line of the three-phase input power supply, the cathode of the third diode D3 is connected to the first output terminal of the rectifying unit, and the anode of the fourth diode D4 is connected to the second output terminal of the rectifying unit; and

[0068] The third rectifier branch includes a fifth diode D5 and a sixth diode D6, wherein the anode of the fifth diode D5 and the cathode of the sixth diode D6 are commonly connected to the third phase line of the three-phase input power supply, the cathode of the fifth diode D5 is connected to the first output end of the rectifier unit, and the anode of the sixth diode D6 is connected to the second output end of the rectifier unit.

[0069] Figure 2, it is shown that the first phase line is the T phase line, the second phase line is the S phase line, and the third phase line is the R phase line.

[0070] A third capacitor C3 is connected between the first output terminal and the second output terminal of the rectifier unit 2. The third capacitor C3 plays a filtering role.

[0071] The third capacitor C3 may be a thin film capacitor with a relatively low capacitance or may be an ordinary capacitor.

[0072] The three-phase AC input power is converted into DC power through the rectifier unit.

[0073] In one embodiment, still referring to Figure 2 , the voltage dividing unit 3 includes a third resistor R3 and a resistor unit, wherein,

[0074] The third resistor R3 is connected in series with the resistor unit, and the resistor unit includes a plurality of resistors connected in series;

[0075] A first end of the third resistor R3 is connected to the second output end of the rectifier unit, a second end of the third resistor R3 is connected to the first end of the resistor unit, and a second end of the resistor unit is connected to the first output end of the rectifier unit;

[0076] The second end of the third resistor R3 is connected to the voltage follower 4 as the output end of the voltage divider unit.

[0077] After rectification, the voltage is still relatively high, reaching hundreds of volts, while the bus voltage needs to be reduced to a few volts, for example, below 5V, so voltage division is necessary. The more resistors used, the better the voltage division, but the more serious the heat generation problem, so scientific and reasonable voltage division is required.

[0078] In one embodiment, the resistor unit includes a fourth resistor R4, a fifth resistor R5, a sixth resistor R6 and a seventh resistor R7 connected in series in sequence, wherein the first end of the fourth resistor R4 is connected to the third resistor R3 as the first end of the resistor unit, the first end of the seventh resistor R7 is connected to the first output end of the rectifier unit as the second end of the resistor unit, and the second end of the seventh resistor R7 is connected to the sixth resistor R6.

[0079] The resistance and resistance value of the resistor units are set according to the actual step-down requirements. The DC bus voltage is reduced proportionally. By setting the ratio (R4+R5+R6+R7) / R3, the bus voltage value can be obtained as required. In this embodiment, the fourth resistor R4 through the seventh resistor R7 have the same resistance value of 220k, and the third resistor R3 has a resistance value of 5.1k. The voltage before voltage division is 540V, and the bus voltage after voltage division is: 540*5.1 / 885.1 = 3.11V.

[0080] The voltage of the DC link capacitor is divided by resistors and then fed into the voltage follower 4 for impedance matching. Figure 2 , the voltage follower 4 includes an operational amplifier U1,

[0081] Among them, the inverting input terminal of the operational amplifier U1 ( Figure 2 Pin 1 in the middle) serves as the input end of the voltage follower 4 to receive the bus voltage signal, and the output end of the operational amplifier U1 ( Figure 2 Pin 3 in the middle) serves as the output terminal of the voltage follower 4 to output the second voltage signal, and the non-inverting input terminal ( Figure 2 Pin 2 in the middle is grounded, and the output end of the operational amplifier U1 is connected to the inverting input end.

[0082] The positive side power supply pin of the operational amplifier U1 ( Figure 2 Connect the 5V power supply to the 10V power supply.

[0083] The negative power supply pin of the operational amplifier U1 ( Figure 2 Pin 4 in the middle is grounded.

[0084] In order to ensure that the circuit does not interfere with the DC bus voltage detection, the present invention adopts a voltage follower 4 to receive the bus voltage signal. The voltage follower 4 is a special in-phase amplifier with an amplification ratio of 1. The input impedance of the voltage follower is close to infinity. After the signal enters the follower, it will not be affected by the subsequent circuit. Figure 2 The voltage values ​​of pins 1 and 3 are the same, so the voltage follower 4 uses the operational amplifier A1 to track the change of the bus voltage signal to generate a second voltage signal.

[0085] In one embodiment, the comparison unit includes a comparator A1, a first resistor R1, a second resistor R2 and a first capacitor C1, wherein:

[0086] The inverting input terminal of the comparator A1 is the “-” terminal ( Figure 2Pin 8 in the middle) is connected to the first end of the first resistor R1 and the first end of the second resistor R2 respectively, and the non-inverting input terminal of the comparator A1, i.e., the "+" terminal ( Figure 2 The 7th pin in the middle) is connected to the output end of the voltage follower 4, and the V+ pin ( Figure 2 The pin 10 in the middle is connected to the second end of the second resistor R2, and the V- pin ( Figure 2 The output terminal of the comparator A1 ( Figure 2 Pin 6 in the middle) is connected to the control unit 6;

[0087] The first capacitor C1 is connected in parallel with the first resistor R1.

[0088] The V+ pin of the comparator A1 is connected to a 5V power supply.

[0089] The V- pin of the comparator A1 is grounded.

[0090] In the comparison unit 5, the first resistor R1 and the second resistor R2 are used for voltage division. In this embodiment, the resistance values ​​of R1 and R2 are both 20mΩ. The first capacitor C1 is used for filtering. The V+ pin of the comparator A1 is connected to a 5V power supply, which is divided by the first resistor R1 and the second resistor R2. The V+ pin of the comparator A1 is connected to the 5V power supply, and the voltage after the voltage drop through the first resistor R1 is input to pin 8 of the comparator A1. Pin 8 can be considered as a determined threshold, and pin 7 is a second voltage signal. The second voltage signal reflects the DC bus voltage value. The 3.11V voltage value calculated in the above embodiment is not stable, but fluctuates. The voltage difference between pins 7 and 8 is compared, and a high-level signal or a low-level signal is output.

[0091] Specifically, when the voltage value of the second voltage signal is greater than a preset threshold, a high level signal is output;

[0092] When the voltage value of the second voltage signal is less than a preset threshold, a low level signal is output.

[0093] When the voltage value of the second voltage signal is equal to the preset threshold, it is the boundary where the high-level signal changes to the low-level signal or the low-level signal changes to the high-level signal.

[0094] In the present invention, the signal after passing through the voltage follower 4 is sent to the comparison unit 5 for comparison and modulated into an inversion signal of high and low levels, that is, a square wave signal.

[0095] Reference Figure 3In the figure below, since the DC bus voltage, that is, the second voltage signal, is a fluctuating signal (the wavy line shown in the upper half of the figure), the voltage of pin 7 is constantly rising. When it is greater than the voltage of pin 8, that is, when the + terminal voltage of comparator A1 is greater than the - terminal voltage, the comparator outputs a high level, which is equivalent to the bus voltage fluctuating once. Comparator A1 outputs a square wave, and the top platform of the square wave is a high level. It can be considered that the bus voltage fluctuates once and outputs a square wave; when the + terminal voltage of comparator A1 (the voltage after the voltage follower 4) is less than the - terminal voltage (the set voltage), the comparator outputs a low level, refer to Figure 3 In the figure above, comparator A1 outputs a square wave signal.

[0096] The voltage of the 8th pin can be set by adjusting the first resistor R1, the second resistor R2, etc., for example, set to 2.5V. The voltage setting value of the 8th pin matches the third capacitor C3 and can be debugged in practice.

[0097] In one embodiment, the comparison unit further includes a second capacitor C2 , wherein two ends of the second capacitor C2 are connected to the second end of the first resistor R1 and the second end of the second resistor R2 , respectively.

[0098] The second capacitor C2 is used to filter the 5V power supply connected to the V+ pin of the comparator A1 to make the power supply more stable.

[0099] In one embodiment, still referring to Figure 1 The detection circuit of the present invention further includes a protection unit 7, wherein the protection unit 7 is used to receive the bus voltage signal and limit the voltage output to the control unit 6 to a preset range.

[0100] In a three-phase, electrolytic capacitor-free inverter, the control unit is typically an MCU. The voltage entering the MCU must not exceed 5V, otherwise the MCU components will be damaged. In this embodiment, the input end of the protection unit 7 is connected to the second end of the third resistor R3 to receive the bus voltage signal. The output end of the protection unit 7 is connected to the control unit. The voltage limiting effect of the protection unit 7 prevents the voltage input to the control unit from being too high or too low.

[0101] In one embodiment, still referring to Figure 2 , the protection circuit includes:

[0102] The eighth resistor R8, the fourth capacitor C4, the first Schottky diode US1 and the second Schottky diode US2, wherein:

[0103] A first end of the eighth resistor R8 is connected to the output end of the voltage dividing unit, and a second end of the eighth resistor R8 is connected to the first end of the fourth capacitor C4 and the control unit 6 respectively;

[0104] The second end of the fourth capacitor C4 is connected to the anode of the first Schottky diode US1;

[0105] The anode of the first Schottky diode US1 is grounded, and the cathode of the first Schottky diode US1 is connected to the anode of the second Schottky diode US2;

[0106] The cathode of the second Schottky diode US2 is connected to the power supply.

[0107] Specifically, the cathode of the second Schottky diode US2 is connected to a 5V power supply.

[0108] The eighth resistor R8 and the fourth capacitor C4 play the role of preventing noise and filtering.

[0109] In this embodiment, when the bus voltage signal is too high or too low, the excessive voltage is clamped by turning on one of the first Schottky diode US1 and the second Schottky diode US2, so that the voltage entering the control unit MCU does not exceed a preset value, such as not more than 5V.

[0110] The present invention also provides a detection circuit for a three-phase inverter without electrolytic capacitors, referring to Figure 4 ,include:

[0111] S10, rectifying the three-phase input power of the inverter to generate a first voltage signal;

[0112] S20, dividing the first voltage signal to obtain a bus voltage signal;

[0113] S30, tracking the change of the bus voltage signal to generate a second voltage signal;

[0114] S40, comparing the second voltage signal with a preset threshold, and outputting a square wave signal according to the comparison result;

[0115] S50: Detect the bus voltage signal and the frequency of the three-phase input power according to the square wave signal, and determine whether a phase is missing.

[0116] In one embodiment, in step S40, comparing the second voltage signal with a preset threshold and outputting a square wave signal according to the comparison result includes:

[0117] When the voltage value of the second voltage signal is greater than a preset threshold, outputting a high level signal;

[0118] When the voltage value of the second voltage signal is less than a preset threshold, a low level signal is output.

[0119] When the voltage value of the second voltage signal is equal to the preset threshold, it is the boundary between the high level signal and the low level signal, or the low level signal and the high level signal. Figure 3 The rising or falling edge of the level signal in.

[0120] Step S50: detecting the bus voltage signal and the frequency of the three-phase input power according to the square wave signal and determining whether a phase is missing.

[0121] The specific detection and judgment methods are explained.

[0122] Reference Figure 3 , the MCU detects the square wave signal, starts counting at the first high level, and stops counting at the next high level. According to the counting situation of the counter, the interval between the two high levels is calculated. This is the period of bus voltage fluctuation, and the frequency information can be obtained. Figure 3 In the example, when the input power is 50Hz, the fluctuation frequency of the DC bus voltage is 300HZ. The MCU receives a pulse signal with a frequency of 300Hz. Since there is no phase loss, due to the 6-wave head, the frequency of the three-phase input power voltage fluctuation after rectification is 6 times the frequency of the square wave. Therefore, when the MCU receives a frequency of 300Hz, the frequency of the three-phase input power is inferred to be 50Hz, indicating that there is no phase loss. If the three-phase input power is inferred by the frequency received by the MCU ( Figure 2 If the frequency of R, S, T is 50-60Hz, it is considered that there is no phase loss.

[0123] Reference Figure 5 When the input power is 60Hz, the DC bus voltage fluctuates at a frequency of 360Hz, and the MCU receives a pulse signal at a frequency of 360Hz. When the MCU receives a frequency of 360Hz, it infers that the frequency of the three-phase input power is 60Hz, indicating that there is no phase loss.

[0124] Reference Figure 6 The fluctuation frequency of the DC bus voltage is 120HZ. The MCU receives a pulse signal with a frequency of 120HZ and infers that the frequency of the three-phase input power is 20Hz. The frequency is too low, indicating a phase loss.

[0125] The present invention provides an optimized solution for integrating frequency detection and phase loss detection of a three-phase electrolytic capacitor-free frequency converter.

[0126] (1) The control unit MCU determines the frequency of the three-phase input power supply and whether there is a phase loss fault based on the frequency of the pulse signal of the detected square wave signal, thereby predicting the power supply situation. By understanding the fluctuation of the bus voltage, the frequency change of the three-phase input power supply can be known.

[0127] (2) Compared with detecting power supply frequency and phase loss on the AC side, the present invention performs frequency detection and phase loss detection on the DC side, and these two functions are realized by a single circuit, which greatly reduces the cost and reduces the heating problem caused by multiple sets of resistor divider circuits;

[0128] (3) The resistance voltage division for frequency detection and phase loss detection is shared with the DC bus voltage detection, and the voltage after DC bus voltage division is added to the voltage follower before being sent to the frequency detection circuit to avoid affecting the DC bus voltage detection;

[0129] (4) The frequency detection and phase loss circuit functions are integrated, which greatly simplifies the MCU resource usage;

[0130] It should be pointed out that although the various steps in the above embodiments are described in a specific order, those skilled in the art will understand that in order to achieve the effects of the present invention, different steps do not have to be performed in such an order. They can be performed simultaneously (in parallel) or in other orders. These changes are within the scope of protection of the present invention.

[0131] In the present invention, the control unit may also be other control modules, control devices or computer-readable storage media.

[0132] Furthermore, the control device includes a processor and a storage device. The storage device can be configured to store a program for executing the above-mentioned method embodiment to detect the bus voltage signal and the frequency of the three-phase input power supply based on the square wave signal and determine whether there is a phase loss. The processor can be configured to execute the program in the storage device, which includes but is not limited to executing the above-mentioned method embodiment to detect the bus voltage signal and the frequency of the three-phase input power supply based on the square wave signal and determine whether there is a phase loss. For ease of explanation, only the parts related to the embodiment of the present invention are shown. For specific technical details not disclosed, please refer to the method section of the embodiment of the present invention. The control device can be a control device device formed by various electronic devices.

[0133] Furthermore, a computer-readable storage medium can be configured to store a program for executing the above-mentioned method embodiment to detect the bus voltage signal and the frequency of the three-phase input power supply according to the square wave signal and to determine whether a phase is missing. The program can be loaded and executed by the processor to implement the method of detecting the bus voltage signal and the frequency of the three-phase input power supply according to the square wave signal and to determine whether a phase is missing. For ease of explanation, only the parts related to the embodiment of the present invention are shown. For specific technical details not disclosed, please refer to the method section of the embodiment of the present invention. The computer-readable storage medium can be a storage device formed by various electronic devices. Optionally, the computer-readable storage medium in the embodiment of the present invention is a non-transitory computer-readable storage medium.

[0134] Thus far, the technical solutions of the present invention have been described in conjunction with the preferred embodiments shown in the accompanying drawings. However, it will be readily understood by those skilled in the art that the scope of protection of the present invention is obviously not limited to these specific embodiments. Without departing from the principles of the present invention, those skilled in the art may make equivalent changes or substitutions to the relevant technical features, and the technical solutions after such changes or substitutions will fall within the scope of protection of the present invention.

Claims

1. A detection circuit for a three-phase inverter without electrolytic capacitor, characterized in that: include: Rectification unit, voltage divider unit, voltage follower, comparison unit and control unit, wherein, The rectifier unit is used to rectify the three-phase input power of the inverter to generate a first voltage signal; The voltage dividing unit is used to divide the first voltage signal to obtain a bus voltage signal; The voltage follower is used to track the change of the bus voltage signal to generate a second voltage signal; The comparison unit is used to compare the second voltage signal with a preset threshold value and output a square wave signal according to the comparison result; The control unit is used to detect the bus voltage signal and the frequency of the three-phase input power supply according to the square wave signal and to determine whether a phase is missing.

2. The circuit according to claim 1, wherein: The voltage follower includes an operational amplifier, wherein the inverting input terminal of the operational amplifier serves as the input terminal of the voltage follower to receive the bus voltage signal, the output terminal of the operational amplifier serves as the output terminal of the voltage follower to output the second voltage signal, the non-inverting input terminal of the operational amplifier is grounded, and the output terminal of the operational amplifier is connected to the inverting input terminal.

3. The circuit according to claim 2, characterized in that The comparison unit includes a comparator, a first resistor, a second resistor and a first capacitor, wherein, The inverting input terminal of the comparator is connected to the first end of the first resistor and the first end of the second resistor respectively, the non-inverting input terminal of the comparator is connected to the output terminal of the voltage follower, the V+ pin of the comparator is connected to the second end of the second resistor, the V- pin of the comparator is connected to the second end of the first resistor, and the output terminal of the comparator is connected to the control unit; The first capacitor is connected in parallel with the first resistor.

4. The circuit according to claim 3, characterized in that The comparison unit further includes a second capacitor, wherein two ends of the second capacitor are connected to the second end of the first resistor and the second end of the second resistor respectively.

5. The circuit according to claim 1, wherein: The rectifier unit includes: a first rectifying branch, comprising a first diode and a second diode, wherein an anode of the first diode and a cathode of the second diode are commonly connected to a first phase line of the three-phase input power supply, the cathode of the first diode is connected to a first output terminal of the rectifying unit, and the anode of the second diode is connected to a second output terminal of the rectifying unit; a second rectifying branch, comprising a third diode and a fourth diode, wherein an anode of the third diode and a cathode of the fourth diode are commonly connected to a second phase line of the three-phase input power supply, the cathode of the third diode is connected to the first output terminal of the rectifying unit, and the anode of the fourth diode is connected to the second output terminal of the rectifying unit; and a third rectifying branch, comprising a fifth diode and a sixth diode, wherein an anode of the fifth diode and a cathode of the sixth diode are commonly connected to a third phase line of the three-phase input power supply, the cathode of the fifth diode is connected to the first output terminal of the rectifying unit, and the anode of the sixth diode is connected to the second output terminal of the rectifying unit; A third capacitor is connected between the first output terminal and the second output terminal of the rectifier unit.

6. The circuit according to claim 2, characterized in that The voltage dividing unit includes a third resistor and a resistor unit, wherein: The third resistor is connected in series with the resistor unit, and the resistor unit includes a plurality of resistors connected in series; The first end of the third resistor is connected to the second output end of the rectifier unit, the second end of the third resistor is connected to the first end of the resistor unit, and the second end of the resistor unit is connected to the first output end of the rectifier unit; The second end of the third resistor is connected to the voltage follower as an output end of the voltage dividing unit.

7. The circuit according to claim 6, characterized in that The resistor unit includes a fourth resistor, a fifth resistor, a sixth resistor and a seventh resistor connected in series in sequence, wherein the first end of the fourth resistor is connected to the third resistor as the first end of the resistor unit, the first end of the seventh resistor is connected to the first output end of the rectifier unit as the second end of the resistor unit, and the second end of the seventh resistor is connected to the sixth resistor.

8. The circuit according to claim 1, wherein: The circuit further includes a protection unit configured to receive the bus voltage signal and limit the voltage output to the control unit to within a preset range.

9. The circuit according to claim 8, characterized in that The protection circuit includes: an eighth resistor, a fourth capacitor, a first Schottky diode and a second Schottky diode, wherein: A first end of the eighth resistor is connected to the output end of the voltage dividing unit, and a second end of the eighth resistor is connected to the first end of the fourth capacitor and the control unit respectively; The second end of the fourth capacitor is connected to the anode of the first Schottky diode; The anode of the first Schottky diode is grounded, and the cathode of the first Schottky diode is connected to the anode of the second Schottky diode; A cathode of the second Schottky diode is connected to a power supply.

10. A detection method for a three-phase inverter without electrolytic capacitor, characterized in that: include: rectifying a three-phase input power supply of the frequency converter to generate a first voltage signal; Dividing the first voltage signal to obtain a bus voltage signal; Tracking the change of the bus voltage signal to generate a second voltage signal; comparing the second voltage signal with a preset threshold, and outputting a square wave signal according to the comparison result; The bus voltage signal and the frequency of the three-phase input power are detected according to the square wave signal, and it is determined whether a phase is missing.

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