Server memory management system and cluster system

Abstract

The application discloses a server memory management system and a cluster system, relates to the technical field of server memory management, and the system identifies memory fault information of the server based on a fault reminding signal in the case that a fault signal is received, matches a corresponding target repair strategy in combination with a current load state determined based on running data of the server, and performs fault repair on the server memory based on the target repair strategy. Therefore, the system can dynamically match different fault repair strategies for different fault scenarios, thereby solving the technical problem of poor flexibility of memory fault repair methods in the related art, and achieving the technical effects of improving the flexibility of memory fault repair and the business operation stability of the server.

Description

Technical Field

[0001] The present application relates to the technical field of server memory management, and in particular to a server memory management system and a cluster system. Background Art

[0002] In server systems, memory is the core hub for data processing and interaction, playing a crucial role in temporarily storing operating systems, applications, and real-time data. Its performance directly impacts the server's response speed, multitasking capabilities, and data throughput. Especially in scenarios like cloud computing and big data analysis, high-capacity, highly stable memory is fundamental to supporting large-scale concurrent computing and real-time data interaction.

[0003] Related technologies use the BIOS (Basic Input / Output System) to obtain server memory alarm information, then reboot the system to repair the corresponding memory fault. However, this method lacks flexibility in fault repair and cannot guarantee stable business operations. Summary of the Invention

[0004] The present application provides a server memory management system and a cluster system to at least solve the problem of poor flexibility in memory fault repair existing in the related art.

[0005] The present application provides a server memory management system, which includes: a receiving module for receiving a fault reminder signal and identifying the memory fault information of the server based on the fault reminder signal; an acquisition module for acquiring the operating data of the server and determining the current load status of the server based on the operating data of the server; a processing module for determining a target repair strategy according to the memory fault information of the server and the current load status of the server, so as to repair the server memory fault based on the target repair strategy.

[0006] The present application also provides a cluster system, comprising: at least one server; and the above-mentioned server memory management system.

[0007] Through this application, since the processing module jointly determines the target repair strategy based on the server's memory fault information and the server's current load status, which is used to repair the server's memory fault, different fault repair strategies are dynamically matched for different fault scenarios. This can solve the technical problem of poor flexibility of memory fault repair methods in related technologies, and achieve the technical effect of improving the flexibility of memory fault repair and the stability of server business operations. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] In order to more clearly illustrate the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments. Obviously, the drawings described below are some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0009] Figure 1 A connection diagram of a server memory management system provided in an embodiment of the present application;

[0010] Figure 2 This is a schematic diagram of the architecture of a server memory management system according to a specific embodiment of the present application;

[0011] Figure 3 This is a workflow diagram of a server memory management system according to a specific embodiment of the present application;

[0012] Figure 4 This is a system connection diagram of a baseboard management controller according to a specific embodiment of the present application;

[0013] Figure 5 A connection diagram of a cluster system provided in an embodiment of the present application. DETAILED DESCRIPTION

[0014] The following will be combined with the accompanying drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making any creative work are within the scope of protection of this application.

[0015] It should be noted that, in the description of this application, the terms "comprises," "includes," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or device. The terms "first," "second," etc., in this application are used to distinguish similar objects, and are not used to describe a particular order or sequence.

[0016] In order to enable those skilled in the art to better understand the present application, the present application is further described in detail below with reference to the accompanying drawings and specific implementation methods.

[0017] In server systems, memory is the core hub for data processing and interaction, playing a crucial role in temporarily storing operating systems, applications, and real-time data. Its performance directly impacts the server's response speed, multitasking capabilities, and data throughput. In scenarios like cloud computing and big data analytics, high-capacity, highly stable memory is essential for supporting large-scale concurrent computing and real-time data interaction. However, when servers operate under long-term high loads, physical defects or data errors in memory chips due to factors such as electromigration and voltage fluctuations can occur, leading to system crashes, data loss, and even business interruptions.

[0018] Related technologies include ECC (Error Checking and Correction) methods that detect and correct single-bit errors through redundant check bits, memory mirroring methods that provide real-time backup by writing data simultaneously to two independent channels, and software-flagged avoidance methods where the operating system dynamically disables faulty memory pages. However, these memory fault repair methods rely on static configuration and lack dynamic adaptability. Their repair capabilities are limited by hardware design, making them inadequate for sudden multi-bit faults or chip-level damage. Furthermore, most methods rely on BIOS to obtain memory alarm information and then reboot the system to implement the corresponding repair method, failing to ensure stable business operations.

[0019] In order to solve at least one of the above technical problems, the present application proposes a server memory management system, in which a processing module identifies the memory fault information of the server based on the received fault reminder signal, an acquisition module determines the current load status of the server based on the server's operating data, and the processing module determines the target repair strategy for server memory repair based on the server's memory fault information and the server's current load status, so as to dynamically match different adjustment repair strategies for different fault scenarios, thereby solving the problem of poor flexibility of repair methods in related technologies and improving the business operation stability of the server.

[0020] The server memory management system of the embodiment of the present application is described in detail below with reference to the accompanying drawings.

[0021] like Figure 1 As shown, the server memory management system 100 of the embodiment of the present application may include: a receiving module 10, an acquisition module 20 and a processing module 30.

[0022] The receiving module 10 is configured to receive a fault alert signal and identify the server's memory fault information based on the fault alert signal. The acquiring module 20 is configured to acquire the server's operating data and determine the server's current load status based on the server's operating data. The processing module 30 is configured to determine a target repair strategy based on the server's memory fault information and the server's current load status, and to perform fault repair on the server's memory based on the target repair strategy.

[0023] Specifically, the fault alert signal is triggered based on the corresponding server memory detection. For example, the fault alert signal is generated by the server's central processing unit based on the received server memory monitoring results. The fault alert signal can be generated based on different memory fault information. In this case, upon receiving the fault alert signal, the receiving module 10 decrypts and reads the fault alert signal to obtain the corresponding memory fault information. The fault alert signal can also be an interrupt alert signal in a unified preset format. Upon receiving the fault alert signal, the receiving module 10 communicates with the corresponding server based on the fault alert signal to identify the memory fault information that triggered the fault alert signal.

[0024] The operation data of the server may include characteristic indicators of multiple dimensions, which are used to evaluate the current load status of the server. For example, the operation data may include the CPU (Central Processing Unit) utilization, memory usage, data volume, etc. of the server. The acquisition module 20 identifies the current load status of the server based on the operation data of the server. Specifically, the relationship between the operation data and the load status of the server can be pre-established. For example, the current load status of the server can be identified through pre-trained models, preset mapping relationships, etc. For example, the acquisition module 20 judges the current load status of the server through a pre-trained and deployed nonlinear regression model. Specifically, the load status of the server can be divided into high load status, medium load status, and low load status. Among them, pre-training is a strategy for training deep learning models. Its core is to use large-scale data sets to perform preliminary training on the model so that the model can learn a general feature representation.

[0025] The processing module 30 dynamically matches the corresponding target repair strategy according to the server's memory fault information and the server's current load status, so as to repair the server memory fault based on the target repair strategy. Specifically, a mapping relationship between different memory fault information, the server's load status and the memory repair strategy can be established in advance, and then after obtaining the actual memory fault information and load status, the target repair strategy is obtained through relationship call.

[0026] This embodiment dynamically determines memory repair strategies for different fault scenarios, enabling intelligent adaptation to service loads. By determining service traffic levels based on real-time resource usage, this approach avoids system performance losses caused by inappropriate memory repair methods, thus facilitating the normal operation of customer services. Furthermore, the load-aware automated repair process reduces the need for manual intervention, making it particularly suitable for unmanned data center scenarios, reducing operational costs and shortening fault resolution cycles.

[0027] Combine Figure 2 As shown, in some embodiments of the present application, the first end of the receiving module 10 is connected to the fault output end of the central processing unit 50 of the server 200 through the programmable logic device module 60 of the server 200 to receive a fault reminder signal, wherein the fault reminder signal is an interrupt signal generated by the programmable logic device module 60 based on the fault information output by the central processing unit 50.

[0028] Specifically, the first end of the receiving module 10 is the interrupt pin of the server memory management system 100, which is connected to the fault output terminal of the central processing unit 50 through the programmable logic device module 60 of the mainboard, and is used to receive fault warning signals. The interrupt pin of the server memory management system 100 can adopt edge-triggered mode and support programmable interrupt priority management, ensuring that the fault warning signal can overcome the influence of system load and achieve millisecond-level response. For example, the receiving module 10 registers a memory fault diagnosis interrupt function. First, it registers a dedicated interrupt service routine (ISR) through the interrupt controller and sets it to the highest priority (such as IRQ (Interrupt ReQuest) 1), ensuring that the memory fault handling process is triggered within 10 microseconds after the central processing unit 50 issues a fault signal.

[0029] Among them, the programmable logic device module can be constructed by a CPLD (Complex Programmable Logic Device), which generates an interrupt signal based on the fault information output by the central processing unit 50, and has an internal integrated de-jitter circuit, which effectively filters out instantaneous noise interference, avoids false triggering, and ensures the accuracy of the fault warning interrupt signal triggering.

[0030] In this embodiment, when the central processing unit 50 detects a memory fault, there is no need to go through the PCIe (Peripheral Component Interconnect Express) bus or the system interrupt controller, and the fault interrupt reminder is triggered directly through the dedicated line of the programmable logic device module 60. This solves the fault processing delay problem in high-load scenarios in related technologies. This out-of-band communication mechanism provides hardware-level protection for real-time diagnosis of memory faults, ensuring that in extreme cases such as system kernel crashes, the server memory management system 100 can still obtain key fault information.

[0031] In some embodiments of the present application, the second end of the receiving module 10 is communicatively connected to the central processing unit 50, and the receiving module 10 is also used to read the fault type and trigger source address corresponding to the fault reminder signal from the programmable logic device module 60 based on the fault reminder signal, and send a fault location instruction to the central processing unit 50 based on the fault type and trigger source address corresponding to the fault reminder signal. When receiving the fault feedback signal from the central processing unit 50, the memory fault information of the server is determined according to the fault feedback signal, wherein the fault feedback signal is generated by the central processing unit 50 based on the received fault location instruction.

[0032] Specifically, the second end of the receiving module 10 may be connected to the central processing unit 50 via an I2C (Inter-Integrated Circuit) bus.

[0033] Because the programmable logic device module 60 not only triggers a fault alert signal (i.e., an interrupt signal) when a server memory fault occurs, the receiving module 10, upon receiving the fault alert signal (i.e., an interrupt signal), reads the fault status register in the programmable logic device module 60 through a dedicated interrupt service routine to obtain the fault type and trigger source address corresponding to the fault alert signal. The receiving module 10 can then determine whether the fault is a CPU fault or a memory fault based on the fault type. If a memory fault is determined, the receiving module 10 then sends a fault location instruction to the central processing unit 50 via the I2C bus based on the fault type and trigger source address. The central processing unit 50 then feeds back a corresponding fault feedback signal to the receiving module 10 based on the fault location instruction, allowing the receiving module 10 to determine the server's memory fault information based on the fault feedback signal. The memory fault information may include information such as the memory location, memory error type, and memory error address. Memory error types include single-particle software errors, single-particle hardware errors, and multi-particle cascading faults.

[0034] This embodiment ensures the timeliness of triggering the memory fault based on the interrupt signal, and based on the communication with the central processing unit 50, realizes the accurate identification of the memory fault information and improves the accuracy of repairing the memory fault.

[0035] In some embodiments of the present application, the acquisition module 20 includes: an information collection unit 21, which is used to obtain the operating data of the server within a preset time period and construct a time series data set based on the operating data of the server; a state analysis unit 22, which is used to extract features from the time series data set to obtain target features, and identify the current load status of the server based on the target features.

[0036] Specifically, the preset time period can be set according to actual conditions, for example, the preset time period is 10 minutes. The information collection unit 21 can obtain the operating data of the server within 10 minutes before the current moment based on the sliding window of the previous 10 minutes, and construct a time series data set based on the operating data within the previous 10 minutes. The time series data set can include multiple feature dimensions, that is, the operating data of the server obtained at each time point is not a single value, but is composed of multiple features. For example, each time point includes three feature values ​​of the server's power supply voltage, CPU utilization, and memory utilization.

[0037] The state analysis unit 22 extracts features from the time series dataset using an LSTM (Long Short-Term Memory) network. LSTM is a specialized recurrent neural network that uses the tanh function (hyperbolic tangent function), which is more suitable for time series models, as its activation function. LSTM extracts target features from the time series dataset and identifies the server's current load status based on these pre-determined target features, including high, medium, and low load states. For example, a mapping relationship between the target features and the load status can be established, and the server's current load status can be determined based on a query based on this mapping relationship.

[0038] This embodiment obtains the server's operating data and constructs a time series data set through the information collection unit 21, which significantly improves the timeliness and integrity of the monitoring data, and identifies the current load status of the server based on the target characteristics of the time series data set, which can accurately reflect the real-time operating status of the server and provide a reliable operating status basis for memory fault repair.

[0039] In some embodiments of the present application, the information collection unit 21 is further configured to perform data preprocessing on the operation data of the server and construct a time series data set based on the preprocessed operation data of the server.

[0040] That is, after collecting the server's operating data, the information collection unit 21 also performs data preprocessing on the server's operating data. The specific preprocessing process can be selected based on actual needs. For example, the preprocessing stage uses Z-score standardization (standard deviation standardization) as a data standardization method. Through linear transformation, the server's operating data is converted into new data with a mean of 0 and a standard deviation of 1 to eliminate deviations caused by differences in dimension or numerical range between different features. The preprocessing stage can also use a sliding average denoising method to reduce high-frequency noise interference. Specifically, by taking the average of adjacent points in the operating data, random fluctuations are suppressed while preserving the overall trend of the data to achieve the purpose of smoothing the data signal and reducing noise. Then, a time series dataset is constructed based on the preprocessed server operating data to improve the data validity for feature extraction.

[0041] This embodiment uses Z-score standardization and sliding average denoising to preprocess the server's operating data, eliminating dimensional differences and high-frequency noise interference in the operating data. It then uses a pre-trained nonlinear regression model to determine the current load status of the server, thereby improving load identification accuracy.

[0042] In some embodiments of the present application, the operating data of the server includes the memory usage of the server, the central processing unit occupancy of the server, and the power supply parameters of the server.

[0043] Specifically, the information collection unit 21 connects to the server 200's memory 40 and CPU 50 via the I2C bus (i.e., the first bus) and establishes bus communication with the power supply unit 70 via the PM bus (i.e., the second bus). This allows the unit to obtain the server's memory usage, CPU occupancy, and power supply parameters. The server's memory usage is an important indicator for measuring server performance and resource management, reflecting the memory load during operation. The server's CPU occupancy is a key indicator for assessing server performance, resource utilization efficiency, and potential bottlenecks, reflecting the workload of the CPU 50. The server's power supply parameters primarily include power information such as the voltage and current of the power supply unit 70. For example, the power supply unit 70 has a built-in PMBus slave controller that supports real-time reporting of monitoring parameters such as voltage, current, power, temperature, and fan speed. The information collection unit 21, acting as the PMBus master, obtains PSU data through periodic queries (default interval: 100ms) to determine the server's power supply parameters.

[0044] This embodiment uses the server's memory usage, the server's central processing unit occupancy, and the server's power supply parameters as the server's operating data to improve the recognition accuracy of the server's current load status and improve the accuracy of determining the memory fault repair strategy.

[0045] In some embodiments of the present application, the state analysis unit 22 identifies the current load state of the server according to the target features based on a pre-trained random forest model.

[0046] Specifically, random forest is a machine learning algorithm based on ensemble learning. It improves the accuracy and robustness of the model by constructing multiple decision trees and combining their prediction results. Based on a pre-trained random forest model, the state analysis unit 22 inputs the extracted target feature values ​​into the random forest algorithm to implement nonlinear classification and determine the current load status of the server.

[0047] Compared with the method of using a fixed threshold to judge the load status, classifying features based on the random forest model can improve the classification accuracy and avoid misjudgment of the load status caused by a single feature value reaching the preset threshold.

[0048] In some embodiments of the present application, target features include periodic patterns, trend features, and time series correlations in a time series dataset.

[0049] Specifically, the cyclical pattern of a time series refers to the chronological arrangement of the CPU (i.e., central processing unit 50), memory, and power data in the time series dataset to analyze which time periods are likely to be busier for the server. Trend features are used to analyze the potential rise in CPU utilization and memory usage within the current operating environment and time period. Time series correlation refers to the correlation between indicators such as CPU, memory, and power consumption. For example, if CPU utilization increases by 20%, memory usage may increase by 4GB. These target features are then input into a random forest model to achieve nonlinear classification. By combining these two, it can handle complex business scenarios with "cyclical load and sudden anomalies," overcoming the limitations of traditional statistical feature engineering in expressing time series dependencies and improving the accuracy of server load status judgment.

[0050] Furthermore, during the model training phase, a transfer learning strategy can be employed. For example, pre-training data can be sourced from three months of operational logs from 1,000 servers. A basic model can be obtained through offline training. During the online phase, incremental learning (updated weekly) can be performed using real-time data to adapt to the workload patterns of specific servers. Model training involves using a dataset to train the model, enabling it to learn features and patterns from the data and subsequently complete specific tasks.

[0051] In some embodiments of the present application, the processing module 30 includes: a generating unit 31, which is used to determine a target repair method based on the current load status of the server, and determine a target repair strategy in combination with the memory fault information of the server; a sending unit 32, which is used to generate structural data for fault repair based on the target repair strategy, and write the structural data into the memory detection module of the server memory, and send a write notification signal to the memory controller of the server, so that the memory controller reads and executes the structural data stored in the memory detection module based on the write notification signal to complete the fault repair of the server memory.

[0052] Specifically, the server memory's memory detection module can be a memory SPD (Serial Presence Detect) module. This SPD module is embedded in an 8KB EEPROM (Electrically Erasable Programmable Read-Only Memory) memory chip on the PCB (Printed Circuit Board) of the memory 40. It stores key parameters of the memory 40, including capacity, frequency, timing parameters (CL / TWR / TRTP, etc.), and manufacturer information. This data is not only read by the memory controller during the initialization phase to configure memory operating parameters, but also serves as an important data source for the server memory management system 100 to monitor system health. The memory detection module can be operated by external modules such as the memory controller and the baseboard management controller (BMC). In addition, the server's memory information can be obtained through communication with the memory detection module. The server's memory controller is located within the central processing unit 50 and is responsible for controlling the memory 40 and exchanging data between the memory 40 and the central processing unit 50. The processing module 30 can access the memory 40 through a bidirectional two-wire I2C interface. The bus is electrically connected to the memory 40 and the central processing unit 50 to meet the real-time data interaction requirements of different components.

[0053] The generation unit 31 determines a matching target repair method based on the current load state of the server obtained by identification. For example, a memory mirror repair method, an address mapping repair method, etc. can be pre-established to establish a mapping relationship between the load state and the memory repair method, and then the memory repair method corresponding to the current load state is obtained by querying the mapping relationship as the target repair method, and a corresponding target repair strategy is generated based on the target repair method and the memory fault information of the server. The sending unit 32 generates corresponding structure data for fault repair based on the target repair strategy, wherein the structure is an interactive data format agreed with the memory, including the fault memory location and repair method, and writes the structure data to the memory detection module of the server memory, and sends a write notification signal to the memory controller of the server, so that the memory controller reads the structure data stored in the memory detection module based on the write notification signal, and executes the written target repair strategy to complete the fault repair of the server memory.

[0054] This embodiment matches different memory repair algorithms, i.e., target repair methods, based on the current load status of the server, and generates corresponding structured data in combination with memory fault information, and writes it into the server's memory so that the memory controller in the server can perform memory fault repair based on the structured data. This improves the memory repair efficiency and the matching effect with the fault scenario, and can achieve repair without shutting down the server, which helps ensure the normal and stable operation of customer services.

[0055] In some embodiments of the present application, when the server is in a low-load state, a repair method of correcting single-bit errors is used as the target repair method; when the server is in a medium-load state, a repair method of memory mirroring is used as the target repair method; when the server is in a high-load state, a repair method of address mapping is used as the target repair method.

[0056] Specifically, when the server is in a low-load state, a repair method that corrects single-bit errors is used to perform cyclic repair on the faulty memory; when the server is in a medium-load state, a memory mirroring method is used to analyze the memory fault address and memory location in the fault information, transfer the faulty memory data to the healthy memory, disable the faulty memory, and turn on the memory hot-swap function to facilitate maintenance personnel to replace the faulty memory. This method is suitable for scenarios where a balance between repair speed and service continuity is required under medium-load conditions. It can avoid the downtime caused by a complete restart and ensure continuous operation of customer business; when the server is in a high-load state, an address mapping method is used to map the fault address to a pre-set spare memory address to alleviate performance bottlenecks or errors, while minimizing the impact on system operation and preventing system crashes due to reduced memory capacity.

[0057] This embodiment minimizes performance impact and achieves the optimal balance between resource utilization efficiency and system reliability by assigning appropriate memory fault repair methods to different server load states, improves repair coverage and resource scheduling flexibility, and ensures the continuity and stability of business operations.

[0058] As a specific embodiment of the present application, the service memory management system 100 is as follows Figure 2 As shown, the working process of the server memory management system 100 is as follows Figure 3 As shown, the following steps may be included:

[0059] S101, receiving a fault reminder signal triggered by a programmable logic device module.

[0060] S102 : Reading a corresponding fault type and trigger source address from a programmable logic device module based on the fault reminder signal.

[0061] S103: Send a fault location instruction to the central processing unit based on the fault type and the trigger source address, so as to determine the memory fault information of the server based on the feedback signal of the server. Execute step S106.

[0062] S104: Obtaining server operation data within a preset time period, preprocessing the operation data, and constructing a corresponding time series data set. The operation data may include CPU and memory utilization, and PSU power consumption information.

[0063] S105 , using the LSTM+random forest nonlinear regression model, identifies the current load status of the server based on the time series dataset.

[0064] S106: Determine a target repair method based on the current load status of the server, and determine a target repair strategy in combination with the memory fault information of the server.

[0065] S107: Generate fault repair structure data based on the target repair strategy, write it to the memory detection module through the I2C bus, and notify the memory controller to read and execute the structure data to complete the server memory fault repair.

[0066] Therefore, the server memory management system 100 proposed in this embodiment has the following technical advantages:

[0067] (1) Dynamically determine memory fault repair strategies based on the data of the server's central processing unit 50, memory 40, and power supply unit 70, and achieve intelligent adaptation to business loads. Based on the real-time resource occupancy of the central processing unit 50, memory 40, and power supply unit 70 obtained through monitoring, the pre-trained nonlinear model is used to determine the business busyness, thereby avoiding performance losses caused by unreasonable memory repair methods and facilitating the normal and continuous operation of customer services.

[0068] (2) Through the load-aware automated repair process, the need for manual intervention is reduced, which is particularly suitable for unmanned data center scenarios, reducing operation and maintenance costs while shortening the memory fault handling cycle;

[0069] (3) This system has strong replicability and scalability. Based on the closed-loop design of load perception-strategy matching-tiered repair, it achieves a dynamic balance between reliability and business continuity, expanding the applicable scenarios.

[0070] As a specific embodiment of the present application, the server memory management system 100 is a baseboard management controller (BMC). The BMC is a small operating system independent of the server system and is a firmware system with an independent IP (Internet Protocol) on a chip integrated on the motherboard. Server clusters generally use BMC instructions for large-scale unattended operations. The main functions of the BMC include remote access and control, hardware monitoring and alarms, remote virtual media, remote power control, and system health monitoring. This embodiment utilizes the BMC's independence from the server 200 to repair server memory failures through the BMC.

[0071] The connection of baseboard management controller is as follows Figure 4 As shown, the baseboard management controller is electrically connected to the memory SPD module and the central processing unit 50 through the first bus (i.e., I2C bus) to meet the real-time data interaction requirements of different components; since the memory SPD module is essentially an EEPROM storage chip embedded on the PCB board of the memory 40, Figure 4 It is represented by a bus connection between the baseboard management controller and the memory 40. The data in the memory SPD module is not only read by the memory controller during the initialization phase to configure memory operating parameters, but also becomes an important data source for the baseboard management controller to monitor system health.

[0072] The CPU 50 of server 200 is connected to the interrupt pin of the baseboard management controller (BMC) via the motherboard's programmable logic device (CPLD) module 60 to transmit a memory fault signal. The BMC's interrupt pin uses edge-triggered mode and supports programmable interrupt priority management, ensuring that memory fault signals can bypass system load and achieve millisecond-level response.

[0073] The baseboard management controller (BMC) connects to the server's power supply unit (PSU) 70 via the second-level bus (PMBus) to monitor the server's voltage, current, and power. The server's PSU 70 includes a built-in PMBus slave controller, supporting real-time reporting of monitoring parameters such as voltage, current, power, temperature, and fan speed. As the PMBus master, the BMC acquires PSU data through both periodic queries (default 100ms interval) and event-triggered modes (e.g., when an overvoltage threshold is breached).

[0074] Through the description of the above implementation methods, those skilled in the art can clearly understand that the method according to the above embodiment can be implemented by means of software plus the necessary general hardware platform, and of course it can also be implemented by hardware, but in many cases the former is a better implementation method.

[0075] The embodiment of the present application also provides a cluster system, such as Figure 5 As shown, the cluster system 1000 includes at least one server 200 and a server memory management system 100. The server memory management system 100 monitors memory faults in at least one server 200 in real time and determines a target repair strategy based on the memory fault information of the server 200 and the current load status of the server 200, thereby repairing the server memory fault based on the target repair strategy. The server memory management system 100 may be a baseboard management controller.

[0076] Therefore, the cluster system proposed in this embodiment can realize memory fault monitoring and repair of at least one server, and reduce the need for manual intervention through load-aware automated repair process. It is particularly suitable for unmanned data center scenarios, reducing operation and maintenance costs while shortening the fault handling cycle.

[0077] Professionals may further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the above description has generally described the components and steps of each example according to their functions. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians may use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0078] The above is a detailed introduction to a server memory management system and cluster system provided by the present application. This article uses specific examples to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method and core ideas of the present application. It should be pointed out that for ordinary technicians in this technical field, without departing from the principles of the present application, several improvements and modifications can be made to the present application, and these improvements and modifications also fall within the scope of protection of the claims of the present application.

Claims

1. A server memory management system, characterized in that: include: A receiving module, configured to receive a fault reminder signal and identify memory fault information of the server based on the fault reminder signal; an acquisition module, configured to acquire operation data of the server and determine a current load state of the server based on the operation data of the server; a processing module, configured to determine a target repair strategy according to the memory fault information of the server and the current load status of the server, so as to repair the fault of the server memory based on the target repair strategy; wherein the receiving module is connected via a programmable logic device of the server to receive the fault reminder signal, wherein the fault reminder signal is an interrupt signal generated by the programmable logic device based on a fault signal output by a central processing unit of the server; The receiving module is further configured to, after receiving the interrupt signal, read the fault status register of the programmable logic device based on the interrupt service program to obtain the fault type and trigger source address corresponding to the fault reminder signal, and send a fault location instruction to the central processing unit according to the fault type and the trigger source address, and upon receiving the fault feedback signal from the central processing unit, determine the memory fault information of the server according to the fault feedback signal, wherein the fault feedback signal is generated based on the fault location instruction, and the memory fault information includes a memory location, a memory error type, and a memory error address, and the memory error type is one or more of a single-particle software error, a single-particle hardware error, and a multi-particle cascading fault; The processing module includes: a generating unit, configured to determine a target repair method based on a current load state of the server, and determine the target repair strategy in combination with memory fault information of the server; a sending unit, configured to generate structured data for fault repair based on the target repair strategy, write the structured data into a memory detection module of the server memory, and send a write notification signal to a memory controller of the server, so that the memory controller reads and executes the structured data stored in the memory detection module based on the write notification signal, thereby completing the fault repair of the server memory; When the server is in a low-load state, a repair method of correcting a single-bit error is used as the target repair method; When the server is in a medium load state, a memory mirror repair method is used as the target repair method; When the server is in a high-load state, the address mapping repair method is used as the target repair method.

2. The server memory management system according to claim 1, characterized in that: The first end of the receiving module is connected to the fault output end of the central processing unit of the server through the programmable logic device module of the server to receive the fault reminder signal, wherein the fault reminder signal is an interrupt signal generated by the programmable logic device module based on the fault information output by the central processing unit.

3. The server memory management system according to claim 2, characterized in that: The second end of the receiving module is communicatively connected to the central processing unit. The receiving module is further used to read the fault type and trigger source address corresponding to the fault reminder signal from the programmable logic device module based on the fault reminder signal, and send a fault location instruction to the central processing unit based on the fault type and trigger source address corresponding to the fault reminder signal. When receiving the fault feedback signal from the central processing unit, the memory fault information of the server is determined according to the fault feedback signal, wherein the fault feedback signal is generated by the central processing unit based on the received fault location instruction.

4. The server memory management system according to claim 1, wherein: The acquisition module includes: An information collection unit, configured to obtain the operating data of the server within a preset time period and construct a time series data set based on the operating data of the server; A state analysis unit is used to extract features from the time series data set to obtain target features, and identify the current load state of the server based on the target features.

5. The server memory management system according to claim 4, characterized in that: The information collection unit is further configured to perform data preprocessing on the operation data of the server, and construct the time series data set based on the preprocessed operation data of the server.

6. The server memory management system according to claim 4, characterized in that: The operation data of the server includes the memory usage rate of the server, the CPU occupancy rate of the server and the power supply parameters of the server.

7. The server memory management system according to claim 4, characterized in that: The state analysis unit identifies the current load state of the server according to the target feature based on a pre-trained random forest model.

8. A cluster system, characterized in that: include: at least one server; A server memory management system according to any one of claims 1 to 7.

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