Chip-type electronic component

By controlling the side roughness and Si segregation of the chip-type electronic components, the problem of cracks during the manufacturing process is solved, and the reliability of the product and the adhesion of the external electrodes are improved.

CN120565281APending Publication Date: 2025-08-29TDK CORP
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Patent Information

Application Number
CN202411849318.7
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2024-02-27
Filing Date
2024-12-16
Publication Date
2025-08-29

AI Technical Summary

Technical Problem

During the manufacturing process, existing chip-type electronic components are prone to cracks due to surface defects, which affects reliability.

Method used

By controlling the surface roughness RSm on the side of the element body to be more than 3.0 μm and less than 7.0 μm, and combining the segregation distribution of Si, the structure of the internal electrode and the formation of the external electrode are optimized to suppress the generation and progress of cracks.

Benefits of technology

It effectively suppresses the occurrence of surface cracks in chip-type electronic components, improves product reliability and adhesion of external electrodes.

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Abstract

A chip-type electronic component (1) is provided. A chip-type electronic component (1) is provided with: an element body (3) in which dielectric layers (6) and internal electrodes (4) are alternately laminated; and a pair of external electrodes (5) which are respectively provided on a pair of end surfaces (3a) of the element body (3) and are electrically connected to the internal electrodes (4), and in the element body (3), the surface roughness RSm of side surfaces (3b, 3c) connecting the pair of end surfaces (3a) is 3.0-7.0 [mu] m.
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Description

Technical Field

[0001] The present invention relates to a chip-type electronic component. Background Art

[0002] A conventional chip-type electronic component is known that includes a ceramic body and a pair of external electrodes disposed on each of a pair of end faces of the ceramic body (see, for example, Japanese Patent Application Laid-Open No. 10-163062). Within the body of this conventional chip-type electronic component, multiple dielectric layers and multiple internal electrodes are alternately stacked. The ends of the multiple internal electrodes are exposed from the end faces of the body and are electrically connected to the external electrodes.

[0003] When manufacturing chip-type electronic components, a laminate is first formed by alternating ceramic green sheets containing dielectric material and ceramic green sheets on which internal electrodes are formed by printing or other methods. Next, the laminate is cut to obtain green chips, which are then fired to form a body. After the body is formed, the end faces of the body are polished using barrel polishing so that the ends of the internal electrodes are exposed. External electrodes are then formed on the end faces of the body using plating or other methods, resulting in a chip-type electronic component. Summary of the Invention

[0004] When observing the appearance of chip-type electronic components obtained through the above-described process, cracks may sometimes form on the element body starting from minute defects on the surface of the element body. From the perspective of fully ensuring the reliability of chip-type electronic components, a technology that can suppress the generation of such cracks is desired.

[0005] The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to provide a chip-type electronic component capable of suitably suppressing the generation of cracks originating from the surface of an element body.

[0006] The gist of the present invention is as follows.

[0007] [1] A chip-type electronic component comprising:

[0008] A body is formed by alternately stacking dielectric layers and internal electrodes; a pair of external electrodes are respectively arranged on a pair of end faces of the body and electrically connected to the internal electrodes, and in the body, the surface roughness RSm of the side surface connecting the pair of end faces is greater than 3.0 μm and less than 7.0 μm.

[0009] In this chip-type electronic component, the surface roughness RSm of the side surface connecting a pair of end faces in the element body is greater than 3.0 μm and less than 7.0 μm. When RSm is less than 3.0 μm, the surface unevenness caused by the roughness tends to become sharper, while when RSm is greater than 7.0 μm, the surface unevenness caused by the roughness tends to become larger. By setting RSm to greater than 3.0 μm and less than 7.0 μm, both the sharpness and size of the surface unevenness caused by the roughness are mitigated, and the occurrence of cracks starting from the surface of the element body can be preferably suppressed.

[0010] [2] The chip-type electronic component according to [1], wherein:

[0011] The surface roughness RSm of the side surface is 4.0 μm or more and 6.0 μm or less. When RSm satisfies this range, both the sharpness and size of surface irregularities due to the roughness are further reduced, and the generation of cracks starting from the surface of the element body can be more reliably suppressed.

[0012] [3] The chip-type electronic component according to [1] or [2], wherein:

[0013] The surface roughness Ra of the side surface is 0.075 μm or less. When Ra satisfies this range, the sharpness of the surface irregularities caused by the roughness is further alleviated, and the generation of cracks starting from the surface of the element body can be more reliably suppressed.

[0014] [4] The chip-type electronic component according to any one of [1] to [3], wherein

[0015] The surface roughness Ra of the side surface is 0.005 μm or more. When Ra satisfies this range, it is possible to prevent the attachment of the external electrodes to the element body from being hindered.

[0016] [5] The chip-type electronic component according to any one of [1] to [4], wherein

[0017] Si segregates on the side surfaces. This structure effectively suppresses the occurrence of cracks originating from the surface of the element body through Si segregation. Furthermore, even if cracks do occur, their propagation can be suppressed.

[0018] [6] The chip-type electronic component according to [5], wherein:

[0019] The element body includes a capacitor-forming portion where the internal electrodes overlap in the stacking direction, and a gap portion where the internal electrodes do not overlap in the stacking direction. The number of Si segregations per unit area in the gap portion is greater than the number of Si segregations per unit area in the capacitor-forming portion. This structure allows for more Si segregation in the gap portion of the element body, thereby more effectively suppressing the generation and propagation of cracks originating from the surface of the element body.

[0020] [7] The chip-type electronic component according to [6], wherein:

[0021] The number of Si segregations per unit area in the gaps is at least four times the number of Si segregations per unit area in the capacitor-forming portion. In this case, due to the greater number of Si segregations in the gaps of the element body, the generation and propagation of cracks originating from the surface of the element body can be more effectively suppressed. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 This is a perspective view showing a chip-type electronic component according to one embodiment of the present invention.

[0023] Figure 2 It is a schematic longitudinal sectional view of a chip-type electronic component.

[0024] Figure 3 is a schematic cross-sectional view of a chip-type electronic component.

[0025] Figure 4 This is a flowchart showing an example of a method for manufacturing a chip-type electronic component.

[0026] Figure 5 This is a schematic perspective view showing an example of a crack that may occur in a general chip-type electronic component and starts from the surface of the element body.

[0027] Figure 6 (a) is a diagram showing the provisions of RSm, Figure 6 (b) is a diagram showing the definition of Ra.

[0028] Figure 7 It is a schematic diagram showing the relationship between RSm and Ra and the surface state of the element body.

[0029] Figure 8 It is a schematic diagram showing segregation on the surface of an element body.

[0030] Figure 9 (a) is a schematic perspective view showing a method for measuring the surface roughness of the side surface of the element body in each sample. Figure 9(b) is a graph showing the results of determining the incidence of cracks originating from the surface in each sample.

[0031] Figure 10 (a) is a schematic diagram showing the measurement position of Si segregation in each sample, Figure 10 (b) is a graph showing the results of determining the generation rate of cracks starting from the surface relative to the amount of Si segregation. DETAILED DESCRIPTION

[0032] Hereinafter, preferred embodiments of a chip-type electronic component according to one aspect of the present invention will be described in detail with reference to the accompanying drawings.

[0033] Figure 1 This is a perspective view showing a chip-type electronic component according to one embodiment of the present invention. Figure 2 is a schematic longitudinal sectional view thereof, Figure 3 is a schematic cross-sectional view thereof. Figures 1 to 3 The chip-type electronic component 1 shown in FIG. 1 is exemplified by a multilayer ceramic capacitor 2. The multilayer ceramic capacitor 2 includes an element body 3 and a plurality of internal electrodes 4 (see FIG. 2 ). Figure 2 and Figure 3 ) and a pair of external electrodes 5. In the following description, for convenience, a first direction D1, a second direction D2, and a third direction D3 are defined as being orthogonal to each other. The first direction D1 corresponds to the length direction of the element body 3, the second direction D2 corresponds to the width direction of the element body 3, and the third direction D3 corresponds to the height direction of the element body 3.

[0034] The element body 3 is formed into a rectangular parallelepiped shape, for example. The rectangular parallelepiped shape includes shapes in which corners and edges are chamfered, and shapes in which corners and edges are rounded. The element body has a pair of end faces 3a, a pair of side faces 3b, and a pair of side faces 3c. In this embodiment, the pair of end faces 3a are faces in the longitudinal direction of the element body 3 and are opposed to each other in the first direction D1. The pair of side faces 3b and the pair of side faces 3c extend so as to connect the pair of end faces 3a. The pair of side faces 3b are faces in the width direction of the element body 3 and are opposed to each other in the second direction D2. The pair of side faces 3c are faces in the height direction of the element body 3 and are opposed to each other in the third direction D3.

[0035] The length of the element body 3 is, for example, not less than 0.4 mm and not more than 7.5 mm. The width of the element body 3 is, for example, not less than 0.2 mm and not more than 6.3 mm. The height of the element body 3 is, for example, not less than 0.2 mm and not more than 2.8 mm. As an example, in this embodiment, the length of the element body 3 is 3.2 mm, the width of the element body 3 is 2.5 mm, and the height of the element body 3 is 2.5 mm.

[0036] The element body 3 is composed of a plurality of laminated dielectric layers 6. In this embodiment, the plurality of dielectric layers 6 are laminated in the third direction D3. Each dielectric layer 6 is composed, for example, of a sintered body of a ceramic green sheet. The ceramic green sheet is composed, for example, of a dielectric material. Examples of dielectric materials include BaTiO3-based, Ba(Ti, Zr)O3-based, (Ba, Ca)TiO3-based, (Ba, Ca)(Ti, Zr)O3-based, CaZrO3-based, or (Ca, Sr)ZrO3-based dielectric ceramics. In the element body 3, the dielectric layers 6 are integrated to the extent that no boundaries between them are visible.

[0037] The internal electrodes 4 are internal conductors disposed within the element body 3. The internal electrodes 4 are alternately stacked with the dielectric layers 6 in the third direction D3. Examples of conductive materials constituting the internal electrodes 4 include Cu and Ni. The internal electrodes 4 may also be composed of the same conductive material as that contained in the external electrodes 5. Alternatively, the internal electrodes 4 may be composed of a conductive material different from that contained in the external electrodes 5. The internal electrodes 4 are formed as a sintered body of a conductive paste containing the aforementioned conductive material.

[0038] In this embodiment, if Figure 2 and Figure 3 As shown, the internal electrode 4 includes an internal electrode 4A extending toward one of the pair of end faces 3a and an internal electrode 4B extending toward the other of the pair of end faces 3a. The internal electrodes 4A and 4B are alternately arranged in the third direction D3.

[0039] The internal electrode 4A includes a main electrode portion 4Aa and an extraction electrode portion 4Ab. When viewed from the third direction D3, the main electrode portion 4Aa is, for example, a rectangular shape that is slightly smaller than the element body 3. The extraction electrode portion 4Ab extends toward one of the pair of end faces 3a, with a width smaller than that of the main electrode portion 4Aa. The end of the extraction electrode portion 4Ab is exposed at one of the pair of end faces 3a and is electrically connected to one of the pair of external electrodes 5.

[0040] The internal electrode 4B includes a main electrode portion 4Ba and an extraction electrode portion 4Bb. When viewed from the third direction D3, the main electrode portion 4Ba is, for example, a rectangular shape having the same dimensions as the main electrode portion 4Aa, and overlaps with the main electrode portion 4Aa via the dielectric layer 6. The extraction electrode portion 4Bb extends toward the other of the pair of end faces 3a, with a width smaller than that of the main electrode portion 4Ba. The end of the extraction electrode portion 4Bb is exposed at the other of the pair of end faces 3a and is electrically connected to the other of the pair of external electrodes 5.

[0041] In this embodiment, in the element body 3, the portion where the internal electrodes 4 overlap in the third direction D3 is referred to as a capacitance forming portion 3A, and the portion where the internal electrodes 4 do not overlap in the third direction D3 is referred to as a gap portion 3B (see FIG. Figure 2 and Figure 3 The capacitance forming portion 3A is the portion where the main electrode portion 4Aa of the internal electrode 4A and the main electrode portion 4Ba of the internal electrode 4B are located when viewed from the third direction D3, and is located inside the element body 3. The gap portion 3B is the portion where the main electrode portion 4Aa of the internal electrode 4A and the main electrode portion Ba of the internal electrode 4B are not located when viewed from the third direction, and is located on the surface side of the element body 3 so as to surround the capacitance forming portion 3A.

[0042] The external electrode 5 is an external conductor disposed outside the element body 3. The external electrode 5 includes an external electrode 5A covering one of the pair of end faces 3a and an external electrode 5B covering the other of the pair of end faces 3a (see Figure 2 and Figure 3 ). A portion of the external electrode 5A may be wrapped around one of the pair of end faces 3a and into the pair of side faces 3b and the pair of side faces 3c. Similarly, a portion of the external electrode 5B may be wrapped around the other of the pair of end faces 3a and into the pair of side faces 3b and the pair of side faces 3c.

[0043] like Figure 2 and Figure 3 As shown in FIG, the external electrode 5A and the external electrode 5B are respectively composed of a first electrode layer 5a and a second electrode layer 5b. Figure 2 and Figure 3 In the example shown in FIG. 5 , the portion of each of the external electrodes 5A and 5A that covers the end surface 3a and the portion that wraps around the side surfaces 3b and 3c includes a first electrode layer 5a and a second electrode layer 5b. The first electrode layer 5a is the inner layer (on the side of the element body 3), and the second electrode layer 5b is the outer layer (on the side opposite the element body 3). In this embodiment, the second electrode layer 5b constitutes the outermost layer of the external electrode 5.

[0044] The first electrode layer 5a is formed, for example, by sintering a conductive paste applied to the surface of the element body 3. The conductive paste contains, for example, a resin, a plurality of glass particles, a plurality of metal particles, and an organic solvent. The resin contains, for example, acrylic resin or ethyl cellulose. The metal particles contain, for example, Cu particles or Ni particles.

[0045] The second electrode layer 5b is, for example, a plated layer formed on the first electrode layer 5a by plating. In this embodiment, the second electrode layer 5b is formed so as to cover the entire first electrode layer 5a. The second electrode layer 5b may also be a Ni-plated layer. The second electrode layer 5b may also include a Ni-plated layer and a Sn-plated layer formed on the Ni-plated layer.

[0046] Next, a method for manufacturing the chip-type electronic component 1 will be described.

[0047] Figure 4 FIG. 1 is a flow chart showing an example of a method for manufacturing a chip-type electronic component 1. Figure 4 As shown, the method for manufacturing the chip-type electronic component 1 includes a stacking step S01 , a firing step S02 , a polishing step S03 , and an electrode forming step S04 .

[0048] The stacking step S01 forms green chips that will become the base of the element body 3. In this step, ceramic green sheets that will become the dielectric layer 6, ceramic green sheets on which the pattern of the internal electrodes 4A is printed using a conductive paste, and ceramic green sheets on which the pattern of the internal electrodes 4B is printed using a conductive paste are prepared. These green sheets are then stacked in a predetermined order to form a laminate. The resulting laminate is cut to obtain green chips that will become the base of the element body 3.

[0049] The firing step S02 is a step of firing the green chip to obtain the element body 3. In the firing step S02, the obtained green chip is fired at a predetermined temperature to obtain the element body 3. After the firing step S02, an annealing treatment may be performed to remove residual stress in the element body 3.

[0050] The polishing step S03 is a step of polishing the surface of the element body 3. In the polishing step S03, the surface of the element body 3 is polished, for example, by barrel polishing, so that the internal electrodes 4 are exposed from the pair of end faces 3a of the element body 3. In the polishing step S03, the lead electrode portion 4Ab of the internal electrode 4A is exposed from one of the pair of end faces 3a of the element body 3, and the lead electrode portion 4Bb of the internal electrode 4B is exposed from the other of the pair of end faces 3a of the element body 3.

[0051] In this embodiment, wet barrel grinding is performed as barrel grinding. For wet barrel grinding, a closed rotary kettle made of a material such as polyethylene is used. Multiple element bodies 3 are placed in the closed rotary kettle along with a solvent, a medium, and abrasives, and the kettle is rotated. This polishes the surface of the element bodies 3, exposing the internal electrodes 4 from a pair of end faces 3a of the element bodies 3. Furthermore, the corners of the element bodies 3 are chamfered and rounded.

[0052] The electrode forming step S04 is a step of forming the external electrode 5 at the end of the element body 3. In the electrode forming step S04, for example, a conductive paste containing a metal powder mainly composed of Cu is prepared. Next, the end portions of the pair of end faces 3a of the element body 3 are respectively immersed in the conductive paste to form a paste layer at the end portions. Then, the paste layer is heat-treated at a predetermined temperature to form a first electrode layer 5a. After the first electrode layer 5a is formed, a Ni plating layer is precipitated on the first electrode layer 5a, for example, by a plating method, to form a second electrode layer 5b. In addition, a Sn plating layer is further formed on the Ni plating layer as needed. Thus, Figures 1 to 3 The chip-type electronic component 1 is shown.

[0053] Figure 5 1 is a perspective view schematically showing the appearance of a general chip-type electronic component 101 obtained through the above-mentioned manufacturing process. Figure 5 In the figure, for convenience, the element body 3 is shown from one side of a pair of end faces 3a with the external electrodes 5 removed. Figure 5 As shown, cracks K may sometimes form in the element body 3 starting from a minute defect on the surface of the element body 3. If the cracks K starting from the surface of the element body 3 propagate on the surface or inside the element body 3, the reliability of the product may be reduced.

[0054] To address this issue, in the chip-type electronic component 1, the surface roughness RSm and Ra of the side surfaces 3b and 3c of the element body 3 are specified. This prevents the presence of crack K starting points on the surface of the element body 3, thereby suppressing the occurrence of cracks K originating from the surface of the element body 3. More specifically, in the chip-type electronic component 1, the surface roughness RSm of the side surfaces 3b and 3c connecting the pair of end faces 3a of the element body 3 is 3.0 μm or greater and 7.0 μm or less, more preferably 4.0 μm or greater and 6.0 μm or less. Furthermore, the surface roughness Ra of the side surfaces 3b and 3c connecting the pair of end faces 3a of the element body 3 is 0.075 μm or less, more preferably 0.005 μm or greater.

[0055] Here, the definitions of surface roughness RSm and surface roughness Ra follow JISB 0601:2013. Figure 6 As shown in (a), the surface roughness RSm is a parameter representing the average length of the profile curve length under the reference length l. When the length of the profile curve of one section within the reference length l is set to XSi, the surface roughness RSm can be calculated by the following formula (1). Figure 6As shown in (b), the surface roughness Ra is a parameter representing the arithmetic mean roughness of the profile curve at a reference length. When the height (ordinate value) of the profile curve at an arbitrary position x is set to Z(x), the surface roughness Ra can be calculated by the following formula (2).

[0056]

Mathematical formula 1

[0057]

[0058]

Mathematical formula 2

[0059]

[0060] Figure 7 This is a schematic diagram showing the relationship between RSm and Ra and the surface state of the element body. Figure 7 As shown, RSm is related to the periodicity of the concavity and convexity on the surface of the element body 3. If RSm becomes smaller, the period of the concavity and convexity becomes shorter and the concavity and convexity tend to become sharper. If RSm becomes larger, the period of the concavity and convexity becomes longer and the concavity and convexity tend to become larger. In addition, Ra is related to the depth of the concavity and convexity on the surface of the element body 3. The smaller Ra is, the smaller the depth of the concavity and convexity becomes, and the sharpness of the concavity and convexity tends to be relaxed. In the chip type electronic component 1, as shown in FIG. Figure 7 As shown in the bold frame portion, by ensuring that RSm on the side surfaces 3b and 3c of the element body 3 is within a constant range, preferably by making Ra smaller, both the sharpness and size of the concavities and convexities on the side surfaces 3b and 3c can be moderated.

[0061] In addition, in the chip type electronic component 1, as Figure 8 As shown, Si segregation S is present on the surfaces of the side surfaces 3b and 3c of the element body 3. Segregation is a phenomenon in which metal or alloy elements are unevenly distributed as a material separates from one phase into another during phase transformation. The presence of Si segregation S on the surfaces of the side surfaces 3b and 3c of the element body 3 effectively suppresses the formation of cracks K originating from the surface of the element body 3. Furthermore, even if cracks K originate from the surface of the element body 3, the segregation S can suppress their progression.

[0062] In this embodiment, for example, a green chip that will become the base of the element body 3 is immersed in a solution containing Si before firing, and then fired. As a result, the number of Si segregations S per unit area in the gap portion 3B becomes greater than the number of Si segregations S per unit area in the capacitor forming portion 3A. Preferably, the number of Si segregations S per unit area in the gap portion 3B is more than four times the number of Si segregations S per unit area in the capacitor forming portion 3A. There is no particular limitation on the unit area, for example, a rectangular range of 100 μm × 100 μm can be set at any position on the side surfaces 3b and 3c of the element body 3.

[0063] As described above, in the chip-type electronic component 1, the surface roughness RSm of the side surfaces 3b and 3c connecting the pair of end faces 3a on the element body 3 is greater than 3.0 μm and less than 7.0 μm. When RSm is less than 3.0 μm, the surface irregularities caused by the roughness tend to become sharper, while when RSm is greater than 7.0 μm, the surface irregularities caused by the roughness tend to become larger. By setting RSm to greater than 3.0 μm and less than 7.0 μm, both the sharpness and size of the surface irregularities caused by the roughness are mitigated, and the occurrence of cracks K originating from the surface of the element body 3 can be appropriately suppressed.

[0064] In this embodiment, the surface roughness RSm of the side surfaces 3b and 3c is 4.0 μm to 6.0 μm. When RSm satisfies this range, both the sharpness and size of the surface irregularities caused by the roughness are further mitigated, and the generation of cracks originating from the surface of the element body 3 can be more reliably suppressed.

[0065] In this embodiment, the surface roughness Ra of the side surfaces 3b and 3c is 0.075 μm or less. When Ra falls within this range, the sharpness of the surface irregularities caused by the roughness is further mitigated, and the generation of cracks K originating from the surface of the element body 3 can be more reliably suppressed. Furthermore, in this embodiment, the surface roughness Ra of the side surfaces 3b and 3c is 0.005 μm or greater. When Ra falls within this range, the adhesion of the external electrodes 5 to the element body 3 can be prevented from being impeded.

[0066] In this embodiment, Si segregation S exists on the surfaces of the side surfaces 3b and 3c. With this structure, the Si segregation S can more effectively suppress the generation of cracks K originating from the surface of the element body 3. Furthermore, even if cracks K originate from the surface of the element body 3, their progression can be suppressed.

[0067] In this embodiment, the number of Si segregations S per unit area in the gaps 3B is greater than the number of Si segregations S per unit area in the capacitance-forming portion 3A. Furthermore, preferably, the number of Si segregations S per unit area in the gaps 3B is at least four times the number of Si segregations S per unit area in the capacitance-forming portion 3A. With this configuration, the presence of a large amount of Si segregation in the gaps 3B of the element body 3 more effectively suppresses the generation and propagation of cracks K originating from the surface of the element body 3.

[0068] [Example]

[0069] Hereinafter, embodiments of the present invention will be described.

[0070] First, if Figure 9 As shown in (a), samples of element bodies with different surface roughness RSm and Ra were prepared respectively, and the surface roughness of the side surface (equivalent to the surface of side 3b) of the element body in each sample was measured. A laser microscope was used for the measurement of surface roughness RSm and Ra. The measurement range was set to a rectangular range of 500μm×500μm on the side surface of the element body, and the measurement direction was consistent with the stacking direction of the dielectric layer on the element body. The measurement results of RSm in the sample were 1.5μm, 3.2μm, 4.3μm, 5.1μm, 5.9μm, 6.7μm, and 8.3μm. In addition, the measurement results of Ra in the sample were 0.002μm, 0.008μm, 0.027μm, 0.046μm, 0.068μm, and 0.074μm.

[0071] Next, the appearance of each sample was observed using a stereomicroscope to confirm the presence of cracks. For samples confirmed to have cracks, the crack surface was peeled off and observed in detail to determine the origin. These cracks were then classified as either originating on the surface of the element body or originating elsewhere. The incidence rate of cracks originating on the surface of the element body was calculated based on the number of cracks originating on the surface of the element body among the 100 samples with cracks.

[0072] Figure 9 (b) is a graph showing the results of determining the rate of cracks originating from the surface of the element body in each sample. Figure 9 In (b), the case where the crack generation rate starting from the surface of the element body is greater than 0% and less than 30% is judged as "A", the case where it is greater than 30% and less than 70% is judged as "B", and the case where it is greater than 70% and less than 100% is judged as "C".

[0073] according to Figure 9The results shown in (b) of the test piece confirm that, in each sample with a surface roughness RSm of 3.0 μm or more and 7.0 μm or less, the rate of occurrence of cracks starting from the surface of the element body is judged as "A" or "B", and the rate of occurrence of cracks starting from the surface of the element body is lower than that of each sample with a surface roughness RSm of less than 3.0 μm and more than 7.0 μm. It can be confirmed that in each sample with a surface roughness RSm of 3.0 μm or more and 7.0 μm or less, when the surface roughness Ra satisfies the range of 0.005 μm or more and 0.075 μm or less ( Figure 9 In the thick frame portion of (b), the determination of the occurrence rate of cracks starting from the surface of the element body is approximately "A", and the occurrence rate of cracks starting from the surface of the element body is further reduced.

[0074] Next, the relationship between the amount of Si segregation on the element body's surface and the rate of cracks originating from the element body's surface was evaluated. For this evaluation, green chips, which would serve as the base of the element body, were immersed in a Si-containing solution before firing and then fired to form multiple element body samples. To measure the amount of Si segregation, each element body sample was polished from one end to the other to near the center, exposing the cross-section of the capacitor-forming portion.

[0075] For the ground samples, Figure 10 As shown in (a), an electron beam microanalyzer was used to observe the cross-section A of the capacitor-forming portion and the surface B of the gap portion. The portion where the intensity of the characteristic X-rays obtained by the electron beam microanalyzer exceeded the average value + 5σ (σ is the standard deviation) was defined as the location of Si segregation. The measurement range was a 100μm × 100μm rectangular area in both the capacitor-forming portion and the gap portion.

[0076] The number of Si segregations within the measurement range of the capacitor-forming portion and the gap portion of one of the multiple samples was measured. The number of Si segregations within the capacitor-forming portion was 7.8, while the number within the gap portion was 46.9. Therefore, as described above, it was confirmed that by immersing the green chip, which will become the base of the element body, in a solution containing Si before firing and then firing it, the number of Si segregations per unit area in the gap portion can be increased compared to the number of Si segregations per unit area in the capacitor-forming portion.

[0077] in addition, Figure 10 (b) is a graph showing the results of determining the rate of occurrence of cracks originating from the surface relative to the amount of Si segregation. Here, for a sample with RSm of 4.3 μm and Ra of 0.074 μm, the ratio of the amount of Si segregation in the gap portion relative to the amount of Si segregation in the capacitor forming portion was changed, and the rate of occurrence of cracks originating from the surface of the element body for each ratio was calculated. Figure 10In (b), the case where the crack generation rate starting from the surface of the element body is less than 30% is judged as "A", the case where it is greater than 30% and less than 70% is judged as "B", and the case where it is greater than 70% is judged as "C".

[0078] like Figure 10 As shown in (b), when the ratio of the amount of Si segregation in the gap portion to the amount of Si segregation in the capacitor forming portion is 1, the rate of occurrence of cracks starting from the surface of the element body is determined to be "C". In contrast, when the ratio is 2 to 7, the rate of occurrence of cracks starting from the surface of the element body is determined to be "A" or "B". In addition, when the ratio is 4 or more, the rate of occurrence of cracks starting from the surface of the element body is determined to be "A". Based on this result, it can be confirmed that by setting the number of Si segregations per unit area in the gap portion to be greater than the number of Si segregations per unit area in the capacitor forming portion, preferably to be 4 times or more, the generation of cracks starting from the surface of the element body can be effectively suppressed.

Claims

1. A chip-type electronic component comprising: The element body is made by alternately stacking dielectric layers and internal electrodes; A pair of external electrodes are respectively provided on a pair of end surfaces of the element body and electrically connected to the internal electrodes. In the element body, a surface roughness RSm of a side surface connecting the pair of end surfaces is 3.0 μm or more and 7.0 μm or less.

2. The chip-type electronic component according to claim 1, wherein The surface roughness RSm of the side surface is 4.0 μm or more and 6.0 μm or less.

3. The chip-type electronic component according to claim 1 or 2, wherein: The surface roughness Ra of the side surface is 0.075 μm or less.

4. The chip-type electronic component according to any one of claims 1 to 3, wherein The surface roughness Ra of the side surface is greater than or equal to 0.005 μm.

5. The chip-type electronic component according to any one of claims 1 to 4, wherein Si segregation exists on the surface of the side surface.

6. The chip-type electronic component according to claim 5, wherein The element body includes a capacitor forming portion where the internal electrodes overlap in a stacking direction, and a gap portion where the internal electrodes do not overlap in the stacking direction. The number of the Si segregations per unit area in the gap portion is greater than the number of the Si segregations per unit area in the capacitance forming portion.

7. The chip-type electronic component according to claim 6, wherein The number of the Si segregations per unit area in the gap portion is four times or more the number of the Si segregations per unit area in the capacitance forming portion.

Citation Information

Patent Citations

  • Manufacture of electronic component

    JP1998163062A