Apparatus and method for sensing and compensating overshoot voltage

Abstract

An apparatus and method of sensing and compensating an overshoot voltage are disclosed. The apparatus includes a power converter and an overshoot voltage compensation circuit. The overshoot voltage compensation circuit includes an overshoot voltage sensing circuit for generating a first comparison voltage by performing a filtering operation on the output voltage, and an overshoot voltage control circuit for generating a first control signal for controlling an operation of the power transistor based on the first comparison voltage. The first control signal may be a signal that controls operation of the first power transistor to change a slope over time of current flowing through an inductor included in the power converter.

Description

[0001] Cross-references

[0002] This application claims priority from Korean Patent Application No. 10-2024-0030912 filed on March 4, 2024, in the Korean Intellectual Property Office (KIPO), the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] The present disclosure relates generally to power converters, and more particularly to apparatus and methods for sensing and compensating for overshoot voltage in power converters. Background Art

[0004] A power converter can convert alternating current (AC) to AC, convert AC to direct current (DC), convert DC to DC, and / or convert DC to AC. A DC to DC power converter can convert DC power to DC power, such as by using a linear regulator, a voltage regulator, a motor generator, a rotary converter, or a switched-mode power supply.

[0005] Due to their high power efficiency, switch mode power supply type power converters may be used to generate a supply voltage that provides power to various electrical components or loads, and the loads may be operated by consuming a load current provided by the power converter.

[0006] To increase the operating speed and capacity of a load, the load current can be increased and the supply voltage can be reduced for high power efficiency. When a high load current is suddenly supplied, a voltage other than the required supply voltage may occur, which is referred to as an overshoot voltage. When an overshoot voltage occurs, the power converter may provide a relatively unstable supply voltage to the load. Therefore, a device and method capable of compensating for overshoot voltage is needed. Summary of the Invention

[0007] The present invention provides an apparatus and method for sensing an overshoot voltage by performing a filtering operation on an output voltage of a power converter and controlling the sensed overshoot voltage by adjusting a slope of a current flowing through an inductor included in the power converter versus time.

[0008] According to an embodiment of the present invention, a device includes: a power converter, which includes an inductor, a first power transistor configured to reduce the current flowing through the inductor, a second power transistor configured to increase the current flowing through the inductor, and an output node configured to output an output voltage in response to the current flowing through the inductor; and an overshoot voltage compensation circuit, which includes an overshoot voltage sensing circuit and an overshoot voltage control circuit, the overshoot voltage sensing circuit is configured to generate a first comparison voltage by performing a filtering operation on the output voltage, and the overshoot voltage control circuit is configured to generate a first control signal for controlling the operation of at least one of the first power transistor or the second power transistor based on the first comparison voltage to change the slope of the current flowing through the inductor with respect to time.

[0009] According to an embodiment of the present invention, a device includes: a power converter, which includes an inductor, a first power transistor configured to reduce the current flowing through the inductor, a second power transistor configured to increase the current flowing through the inductor, and an output node, wherein the power converter is configured to output an output voltage generated by gradually reducing the input voltage to the output node; a high-pass filter, which is configured to perform a filtering operation on the output voltage to generate a filtered voltage; a first comparator, which is configured to compare the filtered voltage with a first reference voltage to output a first comparison voltage; and an overshoot voltage control circuit, which is configured to generate a control signal based on the first comparison voltage, wherein the control signal is a signal for controlling the power converter to perform an operation of diverting the current flowing through the inductor.

[0010] According to an embodiment of the present disclosure, a method of operating a device including a power converter includes: performing a filtering operation on an output voltage of the power converter; sensing an overshoot voltage by comparing a filtered output voltage generated based on the filtering operation with a reference voltage; and compensating for the sensed overshoot voltage by an operation of shunting a current flowing through an inductor included in the power converter, wherein the operation of shunting the current flowing through the inductor is an operation of changing a slope of a current flowing through the inductor with respect to time during a period in which the amplitude of a current applied to a load device connected to the power converter is reduced. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] In order to better understand the drawings of the present disclosure as described in the detailed description, a brief description of each drawing is provided. When combined with the accompanying drawings, the embodiments of the present disclosure will be more clearly understood from the following detailed description, in which:

[0012] Figure 1A is a block diagram schematically illustrating a device for compensating for overshoot voltage according to an embodiment;

[0013] Figure 1B It is a graph used to explain overshoot voltage;

[0014] Figure 2 is a block diagram illustrating a device including an overshoot voltage compensation circuit according to an embodiment;

[0015] Figure 3 is a graph for describing an operation of compensating for an overshoot voltage of a device including an overshoot voltage compensation circuit according to an embodiment;

[0016] Figure 4 is a block diagram illustrating a device including an overshoot voltage compensation circuit according to an embodiment;

[0017] Figure 5A is a block diagram illustrating a device including an overshoot voltage compensation circuit according to an embodiment;

[0018] Figure 5B and Figure 5C is a graph for explaining operations according to modes of a device including an overshoot voltage compensation circuit according to an embodiment;

[0019] Figure 6 is a block diagram illustrating a device including an overshoot voltage compensation circuit according to an embodiment;

[0020] Figure 7A is a block diagram illustrating a device including an overshoot voltage compensation circuit according to an embodiment;

[0021] Figure 7B is a graph for describing an operation of compensating for an overshoot voltage of a device including an overshoot voltage compensation circuit according to an embodiment;

[0022] Figure 8 is a block diagram illustrating a device including an overshoot voltage compensation circuit according to an embodiment;

[0023] Figure 9 is a flowchart illustrating a method for compensating for overshoot voltage according to an embodiment; and

[0024] Figure 10 is a block diagram illustrating an electronic device according to an embodiment. DETAILED DESCRIPTION

[0025] Hereinafter, illustrative embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.

[0026] like Figure 1A As shown, an apparatus for compensating for an overshoot voltage according to an embodiment is generally indicated by reference numeral 10 .

[0027] like Figure 1B As shown, the overshoot voltage is generally indicated by reference numeral 20 on a plot of current versus time.

[0028] refer to Figure 1A , the device 10 may include a power converter 100 and an overshoot voltage compensation circuit 200. The power converter 100 may be based on the input voltage V IN The output voltage Vo is generated and provided to the load through the output node N1 as the power supply voltage. In an embodiment, the power converter 100 may be a buck converter that reduces the input voltage V IN To provide the reduced output voltage Vo to the load. For example, the power converter 100 can be an adaptive on-time (AOT) buck converter with relatively fast dynamic characteristics. It should be understood that the present disclosure is not limited to buck converters and can be similarly applied to boost converters, buck-boost converters, switch-mode power converters and / or other types of power converters currently known or later developed in the relevant art to meet various application standards.

[0029] The power converter 100 may include an inductor L, a first power transistor 110 , a second power transistor 120 , and an output capacitor Co. The first power transistor 110 and the second power transistor 120 may be configured to output power to the inductor L via a current I L For example, the first power transistor 110 may include a first metal oxide semiconductor field effect transistor (MOSFET) 111 and a first diode 112, and when a turn-on operation is performed by receiving a signal (e.g., a high-level logic signal) from the gate terminal of the first MOSFET 111, the current I L For example, the second power transistor 120 may include a second MOSFET 121 and a second diode 122, and when a turn-on operation is performed by receiving a signal (eg, a high-level logic signal) from the gate terminal of the second MOSFET 121, the current I passing through the inductor L is L The power converter 100 can increase or decrease the current I through the inductor L. L and provides output voltage Vo to the load through output node N1. Current source I load In an embodiment, the diodes 112 and 122 may be body diodes of the MOSFETs 111 and 121, respectively. In an embodiment, the first power transistor and the second power transistor may include transistors 111 and 121, each implemented separately (not necessarily being a body MOSFET), and diodes 112 and 122.

[0030] In an embodiment, the load may be a memory device, but is not limited thereto. For example, the load may be a dynamic RAM (DRAM). In the following description, a DRAM load is generally provided as an example, but the present disclosure is not limited thereto. For example, the load may include a volatile memory (such as static random access memory (SRAM) and / or synchronous DRAM (SDRAM)) and / or a non-volatile memory (such as phase change RAM (PRAM), magnetoresistive RAM (MRAM), resistive RAM (ReRAM), and / or ferroelectric RAM (FRAM)).

[0031] When the power converter 100 supplies the output voltage Vo to the load, an overshoot voltage may occur. The overshoot voltage may be a voltage greater than the output voltage Vo required by the load, and an overshoot voltage greater than or equal to the error range may cause the power converter 100 to supply a relatively unstable voltage to the load.

[0032] Further references Figure 1B , overshoot voltage 20 based on current I load and I L , where the horizontal axis may represent time t, and the vertical axis may represent the magnitude of the current I. The first period T1 may be when the power converter 100 supplies a constant load current I load The second period T2 can be the load current I load In the second period T2, the current I L The speed of reduction is related to the load current I load A difference may occur between the speeds of reduction, and thus a difference in the amount of charge corresponding to the area of ​​the first region "a" may be accumulated in the output capacitor. The amount of increase can be calculated according to the following equation.

[0033] [Equation 1]

[0034] ΔQ=C O ·V os

[0035] ΔQ may be the difference or increment in the amount of charge, Co may be the capacitance of the output capacitor Co, and Vos may be the overshoot voltage. Here, as the load current I drawn by the load loadIncrease, the incremental increase amount ΔQ can increase. The load and the device 10 can be implemented as one or more integrated circuit chips and can be mounted on a printed circuit board. In combination with the increase in the operating speed and capacity of the load, the size of the load can be increased, but the size of the printed circuit board may be limited. Therefore, the size of the device 10 can be limited, and depending on the limited size, there is no need to increase the size of the output capacitor Co in order to increase the capacitance of the output capacitor Co. Since the capacitance of the output capacitor Co does not increase, the overshoot voltage Vos can increase as the incremental increase amount (ΔQ) increases. Since the increased overshoot voltage Vos may degrade the performance of the power converter 100, it can be applied without increasing the size of the output capacitor Co Figure 1A The embodiment of the present invention can sense the overshoot voltage Vos and reduce the sensed overshoot voltage Vos by the overshoot voltage compensation circuit 200.

[0036] In more detail, the overshoot voltage compensation circuit 200 may include an overshoot voltage sensing circuit 210 and an overshoot voltage control circuit 220 .

[0037] The overshoot voltage sensing circuit 210 may be connected to the output node N1 of the power converter 100 to receive the output voltage Vo, and may generate a first comparison voltage by performing a filtering operation on the output voltage Vo.

[0038] In an embodiment, the overshoot voltage sensing circuit 210 may include a high-pass filter and pass only the AC component of the output voltage Vo. The overshoot voltage sensing circuit 210 may compare the AC component of the output voltage Vo with a first reference voltage to generate a first comparison voltage. The first reference voltage may be a preset voltage and may be a voltage within an error range corresponding to the AC component of the output voltage Vo. The output voltage Vo may include a ripple voltage for stability, and the amplitude of the DC component of the output voltage Vo may be altered by the ripple voltage. Therefore, when comparing the output voltage Vo with the reference voltage, the error range may be relatively large, and the overshoot voltage may be sensed relatively inaccurately. However, because the overshoot voltage sensing circuit 210 generates the first comparison voltage by comparing the AC component of the output voltage Vo with the first reference voltage, the error range can be reduced and the overshoot voltage can be sensed relatively accurately. In other words, the overshoot voltage sensing circuit 210 can even sense relatively low overshoot voltages.

[0039] The overshoot voltage control circuit 220 may receive the first comparison voltage from the overshoot voltage sensing circuit 210 and generate a first control signal CS1 for controlling the operation of the first power transistor 110 based on the first comparison voltage.

[0040] In an embodiment, the first control signal CS1 may be a signal that controls the operation of the first power transistor 110 to change the current I flowing through the inductor L. L For example, the power converter 100 may receive a first control signal CS1 from the overshoot voltage control circuit 220 and apply a signal (e.g., a low-level logic signal) to the gate terminal of the first MOSFET 111 based on the first control signal CS1. The first MOSFET 111 may be turned off according to the signal applied to the gate terminal, and the current I L The current I L The current I can be shunted by the first diode 112 and flows through the inductor L L The slope of may increase in the negative direction or become steeper downward in the second period T2. Therefore, since the incremental increase amount (ΔQ) may be reduced, the overshoot voltage Vos may be reduced.

[0041] Since the overshoot voltage sensing circuit 210 of the overshoot voltage compensation circuit 200 according to the embodiment senses the overshoot voltage based on the AC component of the output voltage Vo by performing a filtering operation, a relatively low overshoot voltage can be sensed, and since the overshoot voltage compensation circuit 200 according to the embodiment generates the first control signal CS1 for controlling the first MOSFET 111 to turn off, the current flowing through the inductor can be shunted by the first diode 112. Therefore, the overshoot voltage can be reduced without increasing the size of the output capacitor Co. Therefore, the device 10 can provide a relatively stable power supply voltage to the load.

[0042] Go to Figure 2 , an apparatus including an overshoot voltage compensation circuit according to an embodiment is generally indicated by reference numeral 10a. In an embodiment, Figure 2 The device 10a may be Figure 1A An example of device 10.

[0043] refer to Figure 1A as well as Figure 2 , the device 10a may include a power converter 100a and an overshoot voltage compensation circuit 200a. The power converter 100a may include an inductor L, an output capacitor Co, a first power transistor 110a, a second power transistor 120a, a ripple injection circuit 130a, a controller 140a, and a driver 150a. The inductor L, the output capacitor Co, the first power transistor 110a, and the second power transistor 120a may be connected to Figure 1A The inductor L, the output capacitor Co, the first power transistor 110 and the second power transistor 120 are substantially the same. Figure 1A The description provided is essentially redundant.

[0044] The ripple injection circuit 130a may be a circuit for applying a ripple voltage to the output voltage Vo, such as for stabilizing the output voltage Vo, and the controller 140a may receive a signal from the ripple injection circuit 130a and generate a signal for controlling the driver 150a. The driver 150a may apply the operating signal S1 or S2 to the first power transistor 110a or the second power transistor 120a based on a signal received from the controller 140a and / or a signal received from the overshoot voltage compensation circuit 200a (e.g., based on a signal from a logic gate of the overshoot voltage compensation circuit 200a, but not limited thereto).

[0045] The overshoot voltage compensation circuit 200a may include an overshoot voltage sensing circuit 210a and an AND gate 220a. The overshoot voltage sensing circuit 210a may include a high-pass filter 211a and a first comparator 212a. In an embodiment, the high-pass filter 211a may include a capacitor C HPF and resistor R HPF , and can receive the output voltage Vo as an input and perform a high-pass filtering operation on the output voltage Vo to generate a filtered voltage ΔV O The filtered voltage ΔV O The voltage V may be a voltage including an AC component of the output voltage Vo. Although an embodiment of an overshoot voltage compensation circuit including at least one AND gate is shown and described, the embodiment is not limited thereto. For example, in an alternative embodiment, the overshoot voltage compensation circuit may include at least one NOR (not-or) gate.

[0046] In an embodiment, the first comparator 212a may receive the filtered voltage ΔV O and the first reference voltage V REF1 As input, and compare them with each other to generate a first comparison voltage Vc. For example, when the filtered voltage ΔV O Greater than the first reference voltage V REF1 When the first comparator 212a can be Figure 3 During the period T3 in the signal plot 30c, the first comparison voltage Vc is output as a low-level logic signal (eg, 0V voltage). O Less than the first reference voltage V REF1 When the first comparator 212a can be Figure 3 The first comparison voltage Vc is output as a high-level logic signal (eg, a voltage exceeding 0 V) ​​during a period overlapping with the beginning of the period T1 and the period T2 before T3 in the signal plots 30 c and 30 d .

[0047] In an embodiment, AND gate 220a may be Figure 1AAn example of an overshoot voltage control circuit 220 is shown. The controller 140a can generate a signal ON1 as an input to an AND gate 220a, which outputs a first control signal CS1 as an input to control the driver 150a to output a signal S1 for turning on or off the first power transistor 110a. The AND gate 220a can receive the signal ON1 from the controller 140a and the first comparison voltage Vc from the first comparator 212a, and output the first control signal CS1 based on the result. For example, when both the signal ON1 and the first comparison voltage Vc are high-level logic signals (e.g., a voltage exceeding 0V), the first control signal CS1 can be output as a high-level logic signal (e.g., a voltage exceeding 0V). For example, when at least one of the signal ON1 or the first comparison voltage Vc is a low-level logic signal (e.g., a voltage of 0V), the first control signal CS1 can be output as a low-level logic signal (e.g., a voltage of 0V).

[0048] In an embodiment, the driver 150a may apply an operating signal S1 or S2 to the first power transistor 110a or the second power transistor 120a based on a signal ON2 received from the controller 140a or a first control signal CS1 received from the AND gate 220a. The controller 140a may generate a signal ON2 applied to the driver 150a, and the driver 150a outputs a signal S2 for turning on or off the second power transistor 120a.

[0049] For example, when receiving a signal ON2 of a high-level logic signal (e.g., a voltage exceeding 0V) from the controller 140a, the driver 150a may generate a signal S2 of a high-level logic signal (e.g., a voltage exceeding 0V) and apply the signal S2 to the gate terminal of the second MOSFET 121a, and may turn on the second power transistor 120a. For example, when receiving a signal ON2 of a low-level logic signal (e.g., a voltage of 0V) from the controller 140a, the driver 150a may generate a signal S2 of a low-level logic signal (e.g., a voltage of 0V) and apply the signal S2 to the gate terminal of the second MOSFET 121a, and may turn off the second power transistor 120a.

[0050] For example, when receiving the first control signal CS1 of a high-level logic signal (e.g., a voltage exceeding 0V) from the AND gate 220a, the driver 150a may generate a signal S1 of a high-level logic signal (e.g., a voltage exceeding 0V) and apply the signal S1 to the gate terminal of the first MOSFET 111a, and may turn on the first power transistor 110a.

[0051] For example, when receiving the first control signal CS1 of a low-level logic signal (e.g., a voltage of 0V) from the AND gate 220a, the driver 150a may generate a signal S1 of a low-level logic signal (e.g., a voltage of 0V) and apply the signal S1 to the gate terminal of the first MOSFET 111, and may turn off the first power transistor 110a.

[0052] When an overshoot voltage is sensed, the overshoot voltage compensation circuit 200a can control the first power transistor 110a to be turned off by the controller 140a. The controller 140a does not send the signal ON1 generated to turn on the first power transistor 110a to the driver 150a, and sends the first control signal CS1 generated to turn off the first power transistor 110a to the driver 150a through the AND gate 220a. Therefore, since the device 10a can divert the current I flowing through the inductor L L , thus the overshoot voltage can be reduced without increasing the size of the output capacitor Co. In other words, the device 10a can stably supply the power supply voltage to the load.

[0053] Now go to Figure 3 , operations of compensating for an overshoot voltage of an apparatus including an overshoot voltage compensation circuit according to an embodiment are generally indicated by reference numeral 30 .

[0054] refer to Figure 2 and Figure 3 , the first signal plot 30a shows the output voltage Vo versus time, and the second signal plot 30b shows the filtered voltage ΔV O A third signal plot 30c shows the first comparison voltage Vc versus time, and a fourth signal plot 30d shows the reduced overshoot voltage versus time.

[0055] The first period T1 and the second period T2 of the signal plot 30d may be Figure 1B The first period T1 and the second period T2 are substantially the same and redundant description is omitted. In the first period T1, the output voltage Vo is constant and the filtered voltage ΔV O is also constant and its value is less than the first reference voltage V REF1 , thus the first comparison voltage Vc may be a high-level logic signal (eg, a voltage exceeding 0V).

[0056] In the second period T2, the output voltage Vo increases and the filtered voltage ΔV O Also increases, so that the filtered voltage can have a voltage greater than the first reference voltage V REF1 The value of, and therefore, the filtered voltage ΔV O has a voltage greater than the first reference voltage V REF1When the value of , the first comparison voltage Vc may be a low-level logic signal (eg, 0V voltage).

[0057] In an embodiment, when an overshoot voltage is sensed (e.g., in the second period T2), the overshoot voltage compensation circuit 200a can control the first power transistor 110a to be turned off by sending the first control signal CS1 generated to turn off the first power transistor 110a to the driver 150a via the AND gate 220a and not sending the signal ON1 generated to turn on the first power transistor 110a to the driver 150a. When the first power transistor 110a is turned off, the device 10a can divert the current I flowing through the inductor L. L , because the current flows through the first diode 112a.

[0058] For example, in the second period T2, the current I flowing through the inductor L is L The slope of the current I flowing through the inductor L when the first power transistor 110a is turned on may be greater in the negative direction than the current I flowing through the inductor L when the first power transistor 110a is turned on. L The slope is greater than Figure 1B The area of ​​the first region "a" is smaller than the area of ​​the second region "b". In other words, the incremental increase amount (ΔQ) corresponding to the area of ​​the third region "c" can be based on the reference Figure 1B The overshoot voltage can be reduced by using the equation 1 described above. Therefore, the overshoot voltage can be reduced without increasing the size of the output capacitor Co, so that the device 10a can stably provide the power supply voltage to the load.

[0059] like Figure 4 As shown, the device including the overshoot voltage compensation circuit according to the embodiment is generally indicated by the reference numeral 10b. In the embodiment, Figure 4 The device 10b may be Figure 2 An example of device 10a.

[0060] refer to Figure 2 as well as Figure 4 The device 10b may include a power converter 100b and an overshoot voltage compensation circuit 200b. The power converter 100b may include an inductor L, an output capacitor Co, a first power transistor 110b, a second power transistor 120b, a ripple injection circuit 130b, a controller 140b, and a driver 150b. Figure 4 The inductor L, the output capacitor Co, the first power transistor 110b, the second power transistor 120b and the ripple injection circuit 130b can be connected with Figure 2 The inductor L, the output capacitor Co, the first power transistor 110a, the second power transistor 120a and the ripple injection circuit 130a are substantially the same and may be omitted. Figure 2 The provided description is redundant.

[0061] The controller 140 b may generate a signal ON1 or ON2 for controlling the first power transistor 110 b or the second power transistor 120 b to be turned on or off.

[0062] The overshoot voltage compensation circuit 200 b may include an overshoot voltage sensing circuit 210 b , a first AND gate 221 b , and a second AND gate 222 b , and the overshoot voltage sensing circuit 210 b may include a high-pass filter 211 b and a first comparator 212 b . Figure 4 The high-pass filter 211b and the first comparator 212b can be connected with Figure 2 The high-pass filter 211a and the first comparator 212a are substantially the same and the reference 211a may be omitted. Figure 2 The provided description is redundant.

[0063] In an embodiment, Figure 4 The first AND gate 221b and the second AND gate 222b may be Figure 1A An example of the overshoot voltage control circuit 220. Figure 4 The first AND gate 221b can be connected to Figure 2 AND gate 220a is substantially the same as that of reference 2 and may be omitted. Figure 2 The provided description is redundant.

[0064] In an embodiment, the second AND gate 222b receives the signal ON2 from the controller 140b and the first comparison voltage Vc from the first comparator 212a, and outputs the second control signal CS2 based thereon. For example, when both the signal ON2 and the first comparison voltage Vc are high-level logic signals (e.g., a voltage exceeding 0V), the second control signal CS2 may be output as a high-level logic signal (e.g., a voltage exceeding 0V). For example, when at least one of the signal ON2 or the first comparison voltage Vc is a low-level logic signal (e.g., a voltage of 0V), the second control signal CS2 may be output as a low-level logic signal (e.g., a voltage of 0V).

[0065] In an embodiment, the driver 150b may receive control signals (e.g., CS1 and CS2) from the first AND gate 221b and the second AND gate 222b, and based on this, the operation signal S1 or S2 may be applied to the first power transistor 110b or the second power transistor 120b. The operation of the driver 150c according to the first control signal may be the same as the reference signal. Figure 2 The operation of the driver 150a described is substantially the same and reference is omitted. Figure 2 Redundant descriptions of those provided.

[0066] For example, when receiving the second control signal CS2 of a high-level logic signal (e.g., a voltage exceeding 0V) from the second AND gate 220b, the driver 150b may generate a signal S2 of a high-level logic signal (e.g., a voltage exceeding 0V) and apply the signal S2 to the gate terminal of the second MOSFET 121b, and may turn on the second power transistor 120b.

[0067] For example, when receiving the second control signal CS2 of a low-level logic signal (e.g., a voltage of 0V) from the second AND gate 222b, the driver 150b may generate a signal S2 of a low-level logic signal (e.g., a voltage of 0V) and apply the signal S2 to the gate terminal of the second MOSFET 121b, and may turn off the second power transistor 120b.

[0068] When an overshoot voltage is sensed, the overshoot voltage compensation circuit 200b can control the first power transistor 110b to be turned off by the controller 140b, the controller 140b does not send the signal ON2 generated to turn on the second power transistor 120b to the driver 150b, and sends the second control signal CS2 generated to turn off the second power transistor 120b to the driver 150b through the second AND gate 222b. Therefore, the current I L Since the input voltage V IN And increase.

[0069] Go to Figure 5A , an apparatus including an overshoot voltage compensation circuit according to an embodiment is generally indicated by reference numeral 10c. Figure 5B and 5C , the operation of the mode according to which the device includes the overshoot voltage compensation circuit is generally indicated by reference numerals 50b and 50c, respectively. In an embodiment, Figure 5A The device 10c may be Figure 4 Example of device 10b.

[0070] refer to Figure 4 and 5A , the device 10c may include a power converter 100c and an overshoot voltage compensation circuit 200c. The power converter 100c may be connected to Figure 4 The power converter 100b is substantially the same and reference to Figure 4 The provided description is redundant. Figure 5A The overshoot voltage compensation circuit 200c may be one in which a mode determination circuit 230c is added to Figure 4 The circuit of the overshoot voltage compensation circuit 200b can be omitted with respect to the reference Figure 4 The provided description is redundant.

[0071] In an embodiment, the power converter 100c can be operated in a discontinuous current mode (DCM) or a continuous current mode (CCM). For example, the first power transistor 110c and the second power transistor 120c can be alternately turned on or off, and in this case, when the load current I load Compared to the load current I load is greater than the current I flowing through the inductor L of the power converter 100c L The power converter 100c can operate in DCM when the load current I load Less than current I L When the change in ΔV is half of that in ΔV, the power converter 100 c can be operated in CCM.

[0072] The mode determination circuit 230c can determine whether the power converter 100c is operated in DCM or CCM. The configuration and operation of the mode determination circuit 230c can be referred to below. Figure 6 Described in more detail further.

[0073] In an embodiment, the overshoot voltage compensation circuit 200c may perform an overshoot voltage reduction operation according to a mode determined by the mode determination circuit 230c. The overshoot voltage reduction operation may be an operation for controlling the first power transistor 110c to change the current I flowing through the inductor L. L The slope of the signal is manipulated.

[0074] For example, when the mode determination circuit 230 c determines the mode of the power converter 100 c as CCM, the overshoot voltage compensation circuit 200 c may perform an overshoot voltage reduction operation on the sensed overshoot voltage.

[0075] For example, when the mode determination circuit 230 c determines the mode of the power converter 100 c as the DCM, the overshoot voltage compensation circuit 200 c may not perform an overshoot voltage reducing operation on the sensed overshoot voltage.

[0076] Further references Figure 5B and Figure 5C , signal plots 50b and 50c show the output voltage Vo and the filtered voltage ΔV when the power converter 100c operates in DCM. O The vertical axis of the signal plot 50b and the signal plot 50c may represent the magnitude of the voltage, and the horizontal axis may represent the time t. When the power converter 100c operates in DCM, the frequency of the output voltage Vo may vary with the load current I load decreases, and therefore, the filtered voltage ΔV O Distortion may occur in the overshoot voltage sensing circuit 210c. HPFand resistor R HPF To prevent the filtered voltage ΔV O distortion, but when the load current I load When the current is less than or equal to the threshold current, even when the capacitor C included in the overshoot voltage sensing circuit 210c is adjusted HPF and resistor R HPF It is also possible that the filtered voltage ΔV O Distortion ΔV occurs in O The threshold current can be referred to as the filtered voltage ΔV O The distorted current.

[0077] For example, the load current I in signal plot 50b load may be greater than the threshold current and may be detected by adjusting the capacitor C in the overshoot voltage sensing circuit 210c included in the signal plot 50b. HPF and resistor R HPF To prevent the filtered voltage ΔV O The filtered voltage ΔV O The overshoot voltage compensation circuit 200c may have a constant amplitude based on 0V, and the overshoot voltage compensation circuit 200c may be based on a constant reference voltage V REF.0V Senses overshoot voltage.

[0078] For example, the load current I in signal plot 50c load can be less than or equal to the threshold current, and in section t1, the voltage ΔV filtered to the low frequency region O Therefore, the overshoot voltage compensation circuit 200c can be based on a relatively high reference voltage V REF.0V senses the overshoot voltage, and when based on the high reference voltage V REF.0V When sensing overshoot voltage, the overshoot voltage improvement effect can be relatively reduced.

[0079] The overshoot voltage compensation circuit 200c may not perform the overshoot voltage reduction operation when the power converter 100c operates in DCM, and may perform the overshoot voltage reduction operation when the power converter 100c operates in CCM, thereby improving the overshoot voltage improvement effect.

[0080] Now go to Figure 6 , a device including an overshoot voltage compensation circuit according to an embodiment is generally indicated by reference numeral 10d. In an embodiment, Figure 6 The device 10d may be Figure 5A The reference to the device 10c may be omitted. Figure 5A The description provided is essentially redundant.

[0081] refer to Figure 6 Mode determination circuit 230d may include a flip-flop 231d, a third AND gate 232d, an inverter 233d, and an OR gate 234d. In an embodiment, flip-flop 231d may receive a first signal ZCS_OUT as an input and may receive a signal ON2 from controller 140d as a clock signal CLK. When the magnitude of the current is less than or equal to 0, first signal ZCS_OUT may have a high-level logic signal (e.g., a voltage exceeding 0V), and when the magnitude of the current exceeds 0, first signal ZCS_OUT may have a low-level logic signal (e.g., a voltage exceeding 0V).

[0082] For example, the current I flowing through the inductor L can be L A first signal ZCS_OUT is generated, and when the power converter 100d operates in DCM, the flip-flop 231d can generate an output signal of a low-level logic signal (e.g., a voltage of 0V), and when the power converter 100d operates in CCM, the flip-flop 231d can generate an output signal of a high-level logic signal (e.g., a voltage exceeding 0V).

[0083] In an embodiment, the third AND gate 232d may receive as inputs the second signal ZCS_CAL_END, the third signal SS_DONE, and the output signal of the flip-flop 231d. The second signal ZCS_CAL_END and the third signal SS_DONE may be signals indicating when the power converter 100d is operating normally. For example, when calibration of the circuit (not shown) generating the first signal ZCS_OUT is complete, the second signal ZCS_CAL_END may be a high-level logic signal (e.g., a voltage exceeding 0V), and when the power supply of the device 100d is turned on, the third signal SS_DONE may be a high-level logic signal (e.g., a voltage exceeding 0V).

[0084] In an embodiment, the inverter 233d can invert the output of the third AND gate 232d. In an embodiment, the OR gate 234d can receive the output of the inverter 233d and the first comparison voltage Vc as inputs, and the first and second AND gates 221d and 222d can receive the output of the OR gate 234d as inputs.

[0085] For example, when the power converter 100 d operates in DCM, the output of the third AND gate 232 d is a low-level logic signal (e.g., 0 V), and thus the OR gate 234 d may generate an output of a high-level logic signal (e.g., a voltage exceeding 0 V) ​​regardless of the first comparison voltage Vc. Therefore, since the signal ON1 or ON2 generated by the controller 140 d may be transmitted to the driver 150 d, the overshoot voltage compensation circuit 200 d may not perform an overshoot voltage reduction operation.

[0086] For example, when the power converter 100 d operates in CCM, the output of the third AND gate 232 d is a high-level logic signal (e.g., a voltage exceeding 0 V), and therefore, the OR gate 234 d can generate an output of a high-level logic signal (e.g., a voltage exceeding 0 V) ​​or a low-level logic signal (e.g., a voltage of 0 V) ​​according to the first comparison voltage Vc. In other words, the overshoot voltage compensation circuit 200 d can perform an overshoot voltage reduction operation on the sensed overshoot voltage.

[0087] The overshoot voltage compensation circuit 200d may not perform the overshoot voltage reduction operation when the power converter 100d operates in DCM, and may perform the overshoot voltage reduction operation when the power converter 100d operates in CCM, thereby improving the overshoot voltage improvement effect.

[0088] like Figure 7A As shown in FIG, an apparatus including an overshoot voltage compensation circuit according to an embodiment is generally indicated by reference numeral 10e.

[0089] like Figure 7B As shown in FIG, a signal plot for an operation of compensating for an overshoot voltage of an apparatus including an overshoot voltage compensation circuit according to an embodiment is generally indicated by reference numeral 40 .

[0090] In an embodiment, Figure 7A The device 10e may be Figure 2 Reference may be omitted. Figure 2 and / or Figure 3 Provides a largely redundant description.

[0091] refer to Figure 2 and Figure 7A , the device 10e may include a power converter 100e and an overshoot voltage compensation circuit 200e. The power converter 100e may be connected to Figure 2 The power converter 100a is substantially the same and reference to Figure 2 Provides a description of the underlying redundancy. Figure 7A The overshoot voltage compensation circuit 200e may be a circuit in which a current shunt circuit 240e is added to Figure 2 The overshoot voltage compensation circuit 200a is a circuit, and as shown in FIG. Figure 2 As described above, the overshoot voltage can be sensed and the sensed overshoot voltage can be reduced. For example, the overshoot voltage sensing circuit 210e can sense the overshoot voltage by comparing the AC component of the output voltage Vo with the first reference voltage V REF1The overshoot voltage is sensed relatively accurately by comparison, thereby generating a first comparison voltage, and when the overshoot voltage sensing circuit 210e senses the overshoot voltage, the overshoot voltage control circuit 220e can generate a first control signal CS1 that controls the first MOSFET 111e to be turned off. Figure 2 A largely redundant description of those provided.

[0092] In an embodiment, the current shunt circuit 240e may be based on the filtered voltage ΔV O To perform shunting of the current I flowing through the inductor L L For example, the current shunt circuit 240e can convert the filtered voltage ΔV O The comparison is performed with the second reference voltage to generate a second comparison voltage, and the current I flowing through the inductor L can be shunted based on the second comparison voltage. L The specific structure and operation of the current shunt circuit 240e can be referred to below. Figure 8 Described in more detail further.

[0093] Further references Figure 7B , the horizontal axis of the signal plot may represent time t, and the vertical axis may represent the amplitude of the current I. Figure 7B The first period T1 and the second period T2 can be Figure 1B The first period T1 and the second period T2 are substantially the same, and redundant description is omitted. When an overshoot voltage is sensed (eg, in the second period T2), the current shunt circuit 240e may shunt the current I flowing through the inductor L. L operation, and therefore, the incremental increase amount (ΔQ) can also be reduced so that the increase amount corresponding to the fourth region "d" can be reduced from Figure 1B In other words, the current shunt circuit 240e can shunt the current I flowing through the inductor L without increasing the size of the output capacitor Co included in the power converter 100e. L The sensed overshoot voltage is reduced.

[0094] Go to Figure 8 , a device including an overshoot voltage compensation circuit according to an embodiment is generally indicated by reference numeral 10f. In an embodiment, Figure 8 The device 10f may be Figure 7A The reference to the device 10e may be omitted. Figure 7A The description provided is essentially redundant.

[0095] refer to Figure 8 , the current shunt circuit 240f can be Figure 7A, and the current shunt circuit 240f may include a second comparator 241f, a first transistor 242f, a resistor R1, a second transistor 243f, and a current source I1. Although the current shunt circuit 240f includes all of the second comparator 241f, the first transistor 242f, the resistor R1, the second transistor 243f, and the current source I1, embodiments are not limited thereto. For example, the current shunt circuit 240f may include the second comparator 241f, the first transistor 242f, and the resistor R1, or may include the second comparator 241f, the second transistor 243f, and the current source I1.

[0096] In an embodiment, the second comparator 241f can convert the filtered voltage ΔV O and the second reference voltage V REF2 Comparison is performed to generate a second comparison voltage Vc2. The second reference voltage V REF2 It can be a preset voltage. For example, when the filtered voltage ΔV O Greater than the second reference voltage V REF2 When the filtered voltage ΔV is greater than 0V, the second comparator 241f may determine that an overshoot voltage exists and may generate an output of a high-level logic signal (eg, a voltage exceeding 0V). O Less than the second reference voltage V REF2 When , the second comparator 241f may determine that the overshoot voltage does not exist and may generate an output of a low-level logic signal (eg, a voltage of 0V).

[0097] In an embodiment, the first transistor 242 f or the second transistor 243 f may receive the output of the second comparator 241 f through a gate terminal and may perform a turn-on operation or a turn-off operation based thereon.

[0098] For example, when the first transistor 242f receives a high-level logic signal (eg, a voltage exceeding 0V) at the gate terminal, an overshoot voltage is sensed, and thus, a turn-on operation may be performed, and a current I flows through the inductor L. L The current can be shunted by resistor R1.

[0099] For example, when the second transistor 243f receives a high-level logic signal (eg, a voltage exceeding 0V) at the gate terminal, an overshoot voltage is sensed, and thus, a turn-on operation may be performed, and a current I flows through the inductor L. L can be shunted by the current source I1.

[0100] When an overshoot voltage is sensed, the overshoot voltage compensation circuit 200f can turn on the first transistor 242f or the second transistor 243f to divert the current I flowing through the resistor R1 or the current source I1. L, thereby reducing the overshoot voltage without increasing the size of the output capacitor Co.

[0101] Now go to Figure 9 , a method for compensating for overshoot voltage according to an embodiment is generally indicated by reference numeral 900. Figure 9 , the method 900 of compensating for an overshoot voltage may include a plurality of operations S910 to S930 .

[0102] refer to Figure 1A as well as Figure 9 , in operation S910, the overshoot voltage sensing circuit 210 may perform a filtering operation on the output voltage Vo. In an embodiment, the overshoot voltage sensing circuit 210 may include a high-pass filter and may perform a filtering operation that only passes the AC component of the output voltage Vo. The output voltage Vo may include a ripple voltage for stability, and the amplitude of the DC component of the output voltage Vo may be changed by the ripple voltage. Therefore, when the output voltage Vo is compared with the reference voltage, the error range may be relatively large, and the overshoot voltage may not be sensed relatively accurately. In the case of the filtered voltage, the DC component can be removed to have a relatively small value compared to the output voltage Vo, so the error range can be relatively narrow.

[0103] In operation S920, the overshoot voltage sensing circuit 210 may sense the overshoot voltage based on the filtered output voltage. In an embodiment, the overshoot voltage sensing circuit 210 may compare the filtered output voltage with the first reference voltage V REF1 The first reference voltage V REF1 It can be a preset voltage and can be a voltage within an error range corresponding to the AC component of the output voltage Vo. Since the filtered output voltage can have a relatively small value compared to the output voltage Vo, it can be based on the relatively small first reference voltage V REF1 For example, when the filtered output voltage is greater than the first reference voltage V REF1 When the overshoot voltage sensing circuit 210 senses that the output voltage Vo includes an overshoot voltage, for example, when the filtered output voltage is less than the first reference voltage V REF1 When , the overshoot voltage sensing circuit 210 can sense that the output voltage Vo does not include the overshoot voltage.

[0104] In operation S930, the overshoot voltage control circuit 220 may reduce the sensed overshoot voltage by shunting the current flowing through the inductor. In an embodiment, when the overshoot voltage sensing circuit 210 senses the overshoot voltage, the overshoot voltage control circuit 220 may generate a signal for controlling the operation of the first power transistor 110 to shunt the current I flowing through the inductor L. L The first control signal CS1.

[0105] like Figure 10 Detailed description is a block diagram illustrating an electronic device according to an embodiment.

[0106] refer to Figure 10 , an electronic device is generally indicated by reference numeral 1000. The electronic device 1000 may include an application processor (AP) 1010, a transceiver 1020, a memory 1030, a display 1040, and an input / output (I / O) device 1050.

[0107] The AP 1010 may control the overall operation of the electronic device 1000 and the operations of the components of the electronic device 1000. The AP 1010 may perform various operations. Depending on the embodiment, the AP 1010 may include a single processor core or a plurality of processor cores (ie, multi-core).

[0108] The electronic device 1000 can communicate with the outside through the transceiver 1020. The transceiver 1020 can be, for example, a wireless short-range communication interface (such as a wired local area network (LAN), Bluetooth, Wireless Fidelity (Wi-Fi), and Zigbee), or a modem communication interface capable of accessing a mobile cellular network (such as power line communication (PLC), third generation (3G), long term evolution (LTE), 5G, NR, and next generation communication).

[0109] The memory 1030 may store instruction codes, control data, or user data for controlling the electronic device 1000. The memory 1030 may include at least one of a volatile memory and a nonvolatile memory.

[0110] The display 1040 can display internal status information of the electronic device 1000. The display 1040 may include a touch sensor (not shown). In addition, the display 1040 may include input or output functions and an appearance for a user interface. The user can control the electronic device 1000 through the touch sensor and the user interface.

[0111] The I / O device 1050 may include input devices such as a touch pad, a keypad, input buttons, and the like, and output devices such as a display, a speaker, and the like.

[0112] At least some components of the electronic device 1000 (e.g., the AP 1010, the transceiver 1020, the memory 1030, the display 1040, and the I / O device 1050) may include an overshoot voltage compensation circuit that performs a filtering operation to sense an overshoot voltage and performs an operation to reduce the sensed overshoot voltage. Figures 1A to 9The overshoot voltage compensation circuit 200 of the described embodiment can be applied as the circuit. In an embodiment, the overshoot voltage compensation circuit can be applied to at least one of the AP 1010, transceiver 1020, memory 1030, display 1040, and / or I / O device 1050. In an embodiment, multiple overshoot voltage compensation circuits can be applied to multiple APs 1010, transceivers 1020, memory 1030, displays 1040, and / or I / O devices 1050.

[0113] While the present inventive concept has been particularly shown and described with reference to embodiments thereof, it will be understood by those skilled in the relevant art that various changes in form and details may be made therein without departing from the scope and spirit of the disclosure as set forth in the following claims.

Claims

1. A device for sensing and compensating for overshoot voltage, comprising: a power converter comprising an inductor, a first power transistor configured to reduce a current flowing through the inductor, a second power transistor configured to increase the current flowing through the inductor, and an output node configured to output an output voltage in response to the current flowing through the inductor; as well as An overshoot voltage compensation circuit includes an overshoot voltage sensing circuit and an overshoot voltage control circuit, wherein the overshoot voltage sensing circuit is configured to generate a first comparison voltage by performing a filtering operation on the output voltage, and the overshoot voltage control circuit is configured to generate a first control signal for controlling the operation of at least one of the first power transistor or the second power transistor based on the first comparison voltage to change the slope of the current flowing through the inductor with respect to time.

2. The device according to claim 1, wherein the overshoot voltage compensation circuit comprises: a high-pass filter comprising a capacitor and a resistor and configured to perform a filtering operation on the output voltage to generate a filtered voltage; as well as a first comparator configured to generate the first comparison voltage by comparing the filtered voltage with a first reference voltage, The power converter is configured to output an output voltage generated by stepping down an input voltage to the output node.

3. The device according to claim 1, The first power transistor comprises a first metal oxide semiconductor field effect transistor (MOSFET), the first MOSFET having a first diode connected between a source terminal and a drain terminal thereof, When the first comparison voltage is a low-level logic signal, the overshoot voltage control circuit generates the first control signal to apply a low-level logic signal to the gate terminal of the first MOSFET.

4. The device according to claim 3, in, The power converter further comprises: a driver that applies a low-level logic or high-level logic operation signal to the gate terminal of the first MOSFET; and a controller configured to generate a signal for controlling the driver, The overshoot voltage control circuit includes a logic gate configured to receive the signal from the controller and the first comparison voltage as inputs and output the first control signal to the driver.

5. The device according to claim 4, The logic gate includes an AND gate or a NOR gate, When the first comparison voltage is a low-level logic signal, the overshoot voltage control circuit generates a second control signal, and the second control signal is used to control the operation of the second power transistor so that the second power transistor is turned off.

6. The device according to claim 1, wherein the power converter operates in discontinuous current mode (DCM) or continuous current mode (CCM), wherein the overshoot voltage compensation circuit further comprises a mode determination circuit configured to determine whether the power converter operates in the DCM or the CCM. When the mode determination circuit determines the mode of the power converter as the CCM, the overshoot voltage control circuit generates the first control signal.

7. The device according to claim 6, in, The power converter further comprises: a driver for applying a low-level logic signal or a high-level logic signal to the second power transistor; and a controller configured to generate a signal for controlling the driver, Wherein, the mode determination circuit includes: a flip-flop that receives the generated signal from the controller as a clock signal; an AND gate receiving the output of the flip-flop as an input; an inverter receiving the output of the AND gate as an input; and An OR gate receives the output of the inverter and the first comparison voltage as inputs.

8. The apparatus of claim 1 , wherein the overshoot voltage compensation circuit further comprises: a second comparator that generates a second comparison voltage by comparing a voltage on which the filtering operation performed on the output voltage received from the overshoot voltage sensing circuit is performed with a second reference voltage; as well as A current shunt circuit is configured to shunt current flowing through the inductor based on the second comparison voltage.

9. The device according to claim 8, The current shunt circuit includes a first transistor and a resistor, or a second transistor and a current source, The first transistor or the second transistor performs a turn-on operation based on the second comparison voltage to shunt the current flowing through the inductor. 10 . The device of claim 1 , wherein the overshoot voltage control circuit generates the first control signal during a period in which a magnitude of the current applied to a load device connected to the output node is reduced.

11. A device for sensing and compensating for overshoot voltage, comprising: a power converter comprising an inductor, a first power transistor configured to reduce a current flowing through the inductor, a second power transistor configured to increase a current flowing through the inductor, and an output node, wherein the power converter is configured to output an output voltage generated by stepping down an input voltage to the output node; a high-pass filter configured to perform a filtering operation on the output voltage to generate a filtered voltage; a first comparator configured to compare the filtered voltage with a first reference voltage to output a first comparison voltage; as well as an overshoot voltage control circuit configured to generate a control signal based on the first comparison voltage, The control signal is a signal for controlling the power converter to perform an operation of diverting the current flowing through the inductor.

12. The device according to claim 11, The first power transistor includes a MOSFET and a first diode, wherein the operation of shunting the current flowing through the inductor includes an operation of turning off the first MOSFET by applying a low-level logic signal to a gate terminal of the first MOSFET based on the control signal. 13 . The apparatus of claim 12 , wherein the operation of shunting the current flowing through the inductor further comprises an operation of turning off the second power transistor based on the control signal.

14. The apparatus of claim 11, further comprising: a mode determination circuit that determines whether the power converter is to operate in DCM or CCM, When the mode determination circuit determines the mode of the power converter as the CCM, the overshoot voltage control circuit generates the control signal.

15. The apparatus of claim 11, further comprising: a second comparator configured to compare the filtered voltage with a second reference voltage to output a second comparison voltage; as well as A current shunt circuit is configured to shunt current flowing through the inductor based on the second comparison voltage. 16 . The device of claim 11 , wherein the overshoot voltage control circuit generates the control signal during a period in which a magnitude of the current applied to a load device connected to the output node is reduced.

17. A method of operating an apparatus comprising a power converter, the method comprising: performing a filtering operation on an output voltage of the power converter; sensing an overshoot voltage by comparing a filtered output voltage generated based on the filtering operation with a reference voltage; and compensating the sensed overshoot voltage by operating to shunt a current flowing through an inductor included in the power converter, The operation of shunting the current flowing through the inductor is an operation of changing a slope of the current flowing through the inductor with respect to time during a period in which the magnitude of the current applied to a load device connected to the power converter decreases.

18. The method according to claim 17, The power converter comprises: a first power transistor configured to reduce a current flowing through the inductor; and a second power transistor configured to increase a current flowing through the inductor, wherein the first power transistor comprises a first MOSFET and a first diode, and reducing the sensed overshoot voltage comprises turning off the first MOSFET by applying a low-level logic signal to a gate terminal of the first MOSFET, and The operation of shunting the current flowing through the inductor includes an operation of shunting the current flowing through the inductor by using the first diode. 19 . The method of claim 18 , wherein reducing the sensed overshoot voltage further comprises applying a low-level logic signal to the second power transistor to turn off the second power transistor.

20. The method of claim 17, wherein reducing the sensed overshoot voltage comprises determining whether the power converter is operating in DCM or CCM, and When the operation mode of the power converter is determined to be the CCM, the operation of shunting the current flowing through the inductor is performed.

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