Film layer structure, preparation method of film layer structure and display substrate

By designing hole injection layers with different P-type dopant concentrations in OLED devices and adjusting the evaporation path, the problem of reduced picture quality and shortened life caused by crosstalk in low power consumption mode of OLED devices is solved, and higher picture quality and longer device life are achieved.

CN120603437APending Publication Date: 2025-09-05BOE TECHNOLOGY GROUP CO LTD +1
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Patent Information

Application Number
CN202510919547.X
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-07-03
Publication Date
2025-09-05

AI Technical Summary

Technical Problem

In OLED devices, in low power consumption mode, leakage occurs between adjacent pixels due to the high conductivity of the hole transport layer, resulting in crosstalk, affecting the picture quality and possibly shortening the device life.

Method used

The design film layer structure contains hole injection layers with different P-type dopant concentrations. The first HIL near the back plate is a low doping concentration and the second HIL near the HTL is a high doping concentration. The angle between the line source and the back plate is adjusted to control the evaporation path to form a HIL layer with different doping concentrations.

Benefits of technology

It effectively reduces the degree of crosstalk between different pixels, while reducing the impact on device life, improves the image quality at low power consumption, and reduces the production cost.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention provides a film layer structure, a preparation method of the film layer structure and a display substrate. The film layer structure comprises a first hole injection layer HIL and a second HIL, the first HIL covers a back plate of the organic light emitting diode, the second HIL covers the first HIL, and the concentration of a P-type dopant of the first HIL is smaller than that of a P-type dopant of the second HIL. Based on the scheme, the crosstalk degree between different pixels in the HIL can be improved, and meanwhile, the influence on the service life of a device due to adjustment of the concentration of the P-type dopant can be effectively reduced.
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Description

Technical Field

[0001] The present application relates to the field of display technology, and more specifically, to a film layer structure, a method for preparing the film layer structure, and a display substrate. Background Art

[0002] As electronic devices such as mobile phones and tablets integrate more and more functions, higher demands are placed on their performance, such as longevity and lifespan. For example, active matrix organic light emitting devices (AMOLEDs) are widely used in electronic devices due to their low power consumption.

[0003] However, when electronic devices operate in low-power modes, such as those at low brightness, users are increasingly demanding higher quality displays. The OLED device structure includes a hole transport layer (HTL). During the deposition of the HTL layer, the red, green, and blue pixels contained within it connect. During this process, the high conductivity of the HTL layer can cause leakage between adjacent pixels (e.g., R / G / B pixels), leading to crosstalk between different pixels. This phenomenon can degrade image quality at low brightness. Summary of the Invention

[0004] The present application provides a film structure, a method for preparing the film structure, and a display substrate. By designing a hole injection layer (HIL) containing different P-type dopant concentrations, the crosstalk phenomenon of OLED devices can be improved, thereby improving the image quality of OLED electronic devices at low power consumption.

[0005] In a first aspect, a film structure is provided, comprising: a first hole injection layer (HIL) and a second HIL, wherein the first HIL covers a backplane of an organic light-emitting diode, the second HIL covers the first HIL, and the concentration of a P-type dopant in the first HIL is lower than the concentration of a P-type dopant in the second HIL.

[0006] Based on the above technical solution, by designing the device to include HILs with different P-type dopant concentrations, the first HIL close to the backplane can be made into a low doping concentration, and the second HIL covering the first HIL can be made into a high doping concentration. This can reduce the degree of crosstalk between different pixels in the HIL while effectively reducing the impact on the device life.

[0007] In combination with the first aspect, in some implementations of the first aspect, the film structure further includes a hole transport layer HTL; and the HTL covers the second HIL.

[0008] In combination with the first aspect, in some implementations of the first aspect, the film layer structure further includes a third HIL and a hole transport layer HTL; the third HIL covers the second HIL, and the HTL covers the third HIL; the concentration of the P-type dopant in the third HIL is less than the concentration of the P-type dopant in the second HIL.

[0009] Based on the above technical solution, by designing the HIL of the device to include three HILs, with the first HIL close to the backplane having a low doping concentration, the third HIL close to the HTL having a low doping concentration, and the second HIL located between the first and third HILs having a high doping concentration, the degree of crosstalk between different pixels in the HIL can be further reduced, thereby improving the image quality of the device and further reducing the impact of adjusting the P-type dopant concentration on the device life.

[0010] In combination with the first aspect, in some implementations of the first aspect, the concentration of the P-type dopant of the first HIL is greater than or equal to 0.5% and less than 1%, the concentration of the P-type dopant of the second HIL is greater than or equal to 1% and less than 2%, and the concentration of the P-type dopant of the third HIL is greater than or equal to 0.5% and less than 1%.

[0011] In a second aspect, a method for manufacturing a film layer structure is provided, which is used to manufacture the film layer structure as described in the first aspect, and the manufacturing method includes: determining a first line source and a second line source, the angle between the first line source and the backplate along the first direction is smaller than the angle between the second line source and the backplate along the second direction, and the first direction and the second direction are opposite to each other on the backplate; depositing a P-type dopant on the first HIL through the first line source; and depositing a P-type dopant on the second HIL through the second line source.

[0012] Based on the above technical solution, by designing different line sources (including a first line source and a second line source) to form different angles (including a first angle and a second angle) with the device backplane during evaporation, the evaporation path lengths of each line source can be made different. This allows the line source with a longer evaporation path to deposit P-type dopants on the first HIL, while the line source with a shorter evaporation path deposits P-type dopants on the second HIL. This method avoids the costly adjustment of the material evaporation rate required in conventional evaporation processes.

[0013] In combination with the second aspect, in certain implementations of the second aspect, the length of the evaporation path of the first line source is greater than the length of the evaporation path of the second line source.

[0014] In combination with the second aspect, in certain implementations of the second aspect, the first line source is used to deposit the P-type dopant of the first HIL, and the second line source is used to deposit the P-type dopant of the second HIL, including: moving the first line source and the backplate to deposit the P-type dopant of the first HIL; moving the second line source and the backplate to deposit the P-type dopant of the second HIL on the first HIL; determining a third line source; moving the third line source and the backplate to evaporate the HTL on the second HIL.

[0015] In combination with the second aspect, in certain implementations of the second aspect, before moving the third line source and the backplate, the manufacturing method further includes: moving the first line source and the backplate to deposit P-type dopants of a third HIL; wherein the third HIL is deposited on the second HIL, and the HTL is deposited on the third HIL.

[0016] In a third aspect, a display substrate is provided, comprising a light-emitting device, wherein the light-emitting device comprises a film layer structure in any possible implementation manner of the film layer structure design of the first aspect.

[0017] In combination with the third aspect, in certain implementations of the third aspect, the light-emitting device is an OLED.

[0018] In a fourth aspect, a device for preparing a membrane structure is provided, comprising a processor and a memory, wherein the processor and the memory are connected, wherein the memory is used to store program code, and the processor is used to call the program code to execute a method in any possible implementation mode of the method design of the second aspect above.

[0019] In a fifth aspect, a computer-readable storage medium is provided, storing a computer program, which is executed by a processor to implement the method in any possible implementation manner in the method design of the second aspect above.

[0020] In a sixth aspect, a computer program product is provided, comprising instructions, which, when executed by a processor, enable a computer to execute a method in any possible implementation of the method design of the second aspect above.

[0021] In a seventh aspect, an electronic device is provided, comprising the display device as described in the fourth aspect. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 It is a schematic diagram of a film structure suitable for OLED devices;

[0023] Figure 2 This is a schematic diagram of the structure of the R / G / B light-emitting layer suitable for the film layer of an OLED device;

[0024] Figure 3 This is a schematic diagram of the film structure of an OLED device proposed in an embodiment of the present application;

[0025] Figure 4 This is a schematic diagram of a sub-pixel current varying with light emission wavelength, as proposed in an embodiment of the present application;

[0026] Figure 5 This is a schematic diagram of another OLED film structure provided in an embodiment of the present application;

[0027] Figure 6 This is a schematic diagram of another sub-pixel current varying with light emission wavelength, as proposed in an embodiment of the present application;

[0028] Figure 7 This is a method for manufacturing a film structure provided in an embodiment of the present application;

[0029] Figure 8 Schematic diagram of a line source evaporation method based on a backplane proposed in an embodiment of the present application;

[0030] Figure 9 This is a schematic diagram of another backplane-based line source evaporation method proposed in an embodiment of the present application. DETAILED DESCRIPTION

[0031] The technical solution in this application will be described below with reference to the accompanying drawings.

[0032] The embodiments of the present application will present various aspects, embodiments, or features around a system including multiple devices, components, modules, etc. It should be understood and appreciated that each system may include additional devices, components, modules, etc., and / or may not include all of the devices, components, modules, etc. discussed in conjunction with the figures. Furthermore, combinations of these solutions may also be used.

[0033] Additionally, in the embodiments of this application, words such as "exemplary" and "for example" are used to indicate examples, illustrations, or descriptions. Any embodiment or design described as "exemplary" in the embodiments of this application should not be construed as being preferred or advantageous over other embodiments or designs. Rather, the use of the word "exemplary" is intended to present concepts in a concrete manner.

[0034] References to "one embodiment" or "some embodiments" in this specification mean that a particular feature, structure, or characteristic described in conjunction with that embodiment is included in one or more embodiments of the present application. Thus, phrases such as "in one embodiment," "in some embodiments," "in other embodiments," and "in yet other embodiments" appearing in various places in this specification do not necessarily refer to the same embodiment, but rather mean "one or more but not all embodiments," unless otherwise specifically emphasized. The terms "including," "comprising," "having," and variations thereof mean "including but not limited to," unless otherwise specifically emphasized.

[0035] In the embodiments of the present application, the terms "first" and "second" are used for descriptive purposes only and are not to be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In addition, in the description of the embodiments of the present application, "multiple" refers to two or more than two, and "at least one" and "one or more" refer to one, two or more. The singular expressions "a", "a", "said", "above", "the" and "this" are intended to also include expressions such as "one or more", unless there is a clear indication to the contrary in the context.

[0036] In the description of the embodiments of the present application, the terms "up", "down", "left", "right", "inside", "outside", "vertical", "horizontal", etc. indicate orientations or positional relationships that are defined relative to the orientations or positions of the components schematically placed in the drawings. It should be understood that these directional terms are relative concepts. They are used for relative descriptions and clarifications, rather than indicating or implying that the device or component referred to must have a specific orientation, or be constructed and operated in a specific orientation. They may change accordingly according to changes in the orientation of the components placed in the drawings, and therefore cannot be understood as limitations on the present application.

[0037] In the embodiments of this application, the same reference numerals are used to represent the same components or parts. For identical parts in the embodiments of this application, only one of the parts or parts may be labeled with a reference numeral in the drawings as an example. It should be understood that the same reference numerals apply to the other identical parts or parts. In addition, the various parts in the drawings are not drawn to scale, and the sizes and dimensions of the parts shown in the drawings are only exemplary and should not be construed as limiting the present application.

[0038] The business scenarios described in the embodiments of the present application are intended to more clearly illustrate the technical solutions of the embodiments of the present application, and do not constitute a limitation on the technical solutions provided in the embodiments of the present application. Ordinary technicians in this field will know that with the evolution of technology and the emergence of new business scenarios, the technical solutions provided in the embodiments of the present application are also applicable to similar technical problems.

[0039] To facilitate understanding, some terms or concepts that may be involved in the embodiments of this application are first briefly described.

[0040] 1. Hole transport layer

[0041] The hole transport layer (HTL) is a key functional layer in optoelectronic devices (such as solar cells and OLEDs), primarily responsible for efficient hole transport and charge balance. Specifically, located between the device's photoactive layer (such as the pixel light-emitting layer in an OLED device) and the backplane anode, the HTL serves as a dedicated channel for hole transport, enhancing device performance by efficiently transporting holes, blocking electrons, and balancing charge carriers.

[0042] 2. Hole injection layer

[0043] The hole injection layer (HIL) is a critical transition layer between the backplane anode and the hole transport layer (HTL) in organic optoelectronic devices (such as OLEDs). Its core function is to optimize the injection efficiency of holes from the anode to the light-emitting layer, ensuring efficient and stable device operation. Specifically, the HIL is a core functional layer that improves the efficiency and lifespan of optoelectronic devices by lowering the hole injection barrier, optimizing interfacial contact, and balancing carriers.

[0044] 3. P-type dopant

[0045] P-type dopant, also known as P-dopant material, is a key doping material used in the hole transport layer (HTL) of OLED. It plays a decisive role in improving the luminous efficiency, brightness, lifespan, color purity and reducing power consumption of OLED devices by improving conductivity and optimizing carrier balance.

[0046] See also Figure 1 , Figure 1 This is a schematic diagram of a film layer structure suitable for OLED devices.

[0047] like Figure 1 As shown, the film structure includes a hole transporting layer (HTL), a hole injection layer (HIL), and a backplane of the OLED device.

[0048] Among them, the HTL is covered on the HIL, and the HIL layer is covered on the backplane, that is, the HIL is in direct contact with the backplane anode. The HIL includes a red pixel R light-emitting layer, a green pixel G light-emitting layer, and a blue pixel B light-emitting layer.

[0049] For example, the thickness of the HTL is 100 nm, the thickness of the HIL layer is 10 nm, and the concentration of the P-type dopant of the HIL is 1%. In this case, due to the high conductivity of the HIL, serious crosstalk will occur between the R light-emitting layer, the G light-emitting layer, and the B light-emitting layer.

[0050] One possible implementation involves reducing the concentration of the p-type dopant in the HIL. This can effectively improve crosstalk between the various light-emitting layers, thereby enhancing the image quality of the OLED device at low power consumption. However, this approach can reduce the lifespan of the OLED device. Table 1 below shows the lifespan of the OLED device for different p-type dopant concentrations in the HIL layer.

[0051] Table 1

[0052] Concentration of P-type dopant 1% 0.5% 0.3% Device life 100% 60% 40%

[0053] As shown in Table 1, reducing the P-type dopant concentration of the HIL improves the crosstalk between pixels, but also significantly degrades the life of the device.

[0054] above Figure 1 The content described is the relationship between the P-type dopant concentration of the HIL, image quality (i.e., crosstalk level), and device life in current OLED devices. In addition to the above method of improving image quality by reducing the P-type dopant concentration, another method for improving OLED devices has been proposed. This method uses isolation columns in the HIL layer to isolate each light-emitting layer and reduce crosstalk between the light-emitting layers. Figure 2 , Figure 2 The diagram is a structural diagram of the R / G / B light-emitting layer suitable for the film layer of an OLED device.

[0055] like Figure 2 As shown, the film layer structure includes HTL, HIL, and the backplane of the OLED device.

[0056] The HTL is covered by the HIL, which is covered by the backplane. The HIL contains the red pixel R light-emitting layer, the green pixel G light-emitting layer, and the blue pixel B light-emitting layer. Each light-emitting layer is separated by spacers in the HIL. In other words, by adding spacers between adjacent pixels, crosstalk between pixels is reduced by physical isolation. However, using this method to improve crosstalk requires significant changes to the backplane and HIL, which not only significantly increases the production cost of the process, but may also introduce new adverse effects to the OLED device.

[0057] In view of this, an embodiment of the present application proposes a film structure for an OLED device. By designing a HIL layer with different P-type dopant concentrations in the film structure, while improving the image quality of the OLED device, the impact of adjusting the P-type dopant concentration in the HIL layer on the device life can be reduced.

[0058] See also Figure 3 , Figure 3 This is a schematic diagram of the film structure of an OLED device proposed in an embodiment of the present application. This can improve the image quality of the device and reduce the impact of adjusting the P-type dopant concentration on the device lifespan.

[0059] like Figure 3 As shown, the film structure includes: a first hole injection layer HIL, a second HIL, and a hole transport layer HTL.

[0060] The first HIL covers the backplane of the organic light-emitting diode, the second HIL covers the first HIL, and the HTL covers the second HIL. This means that the HTL is located on the second HIL, the second HIL is located on the first HIL, and the first HIL is located on the backplane of the OLED. In other words, the first HIL contacts the anode of the OLED backplane. The concentration of the P-type dopant in the first HIL is lower than that in the second HIL.

[0061] For example, the first HIL has a P-type dopant concentration of 0.5% to 1% and a thickness of 5 nm, the second HIL has a P-type dopant concentration of 1% to 2% and a thickness of 5 nm, and the HTL has a thickness of 50 nm.

[0062] In this example, the pixels in the G light-emitting layer include three sub-pixels: G64B32, G64B64, and G64B128, where G64B32 represents 64 green sub-pixels driven with a bandwidth of 32 bits, G64B64 represents 64 green sub-pixels driven with a bandwidth of 64 bits, and G64B128 represents 64 green sub-pixels driven with a bandwidth of 128 bits.

[0063] Specifically, see Figure 4 The diagram below shows the current variation of green pixels with different data bandwidths. During the HIL evaporation process, the currents of the three sub-pixels G64B32, G64B64, and G64B128 will change with the nanometer value of the sub-pixel emission wavelength. Figure 4 (a) is the use of existing technology (which can be Figure 1 Schematic diagram of the change of the current of the three sub-pixels with the emission wavelength when the HIL is evaporated by the method described above. Figure 4 (b) in this example (i.e. Figure 4FIG1 is a schematic diagram showing how the currents of the three sub-pixels vary with the emission wavelength when the HIL is evaporated using the method described in the embodiment. It can be clearly seen that when the emission wavelength of the sub-pixel is between 510 nm and 560 nm, the current values ​​of the three sub-pixels of the method described in this example are closer than those of the method described in the prior art. It can be understood that when the HIL is evaporated using the method described in this example, the degree of crosstalk between different pixels caused by the strong conductivity of the HIL can be reduced. For example, the degree of crosstalk between the blue pixel and the green pixel in the HIL layer is reduced. Therefore, the current values ​​of the sub-pixels of the green pixel will be closer.

[0064] In addition, when improving the image quality to the same extent, compared with the existing technology (which can be Figure 1 The OLED device manufactured by the method described above loses a significant amount of lifespan by reducing the concentration of P-type dopants, while the OLED device manufactured based on the HIL structure described in this example loses only 10% of its lifespan.

[0065] Based on the above technical solution, by designing the OLED device to include HILs with different P-type dopant concentrations, the first HIL close to the backplane can be made into a low doping concentration, and the second HIL close to the HTL can be made into a high doping concentration. This can reduce the degree of crosstalk between different pixels in the HIL while effectively reducing the impact on the life of the OLED device.

[0066] It should be noted that Figure 3 The OLED film layer structure described above is merely an example. The embodiments of the present application also provide another film layer structure that can further reduce the crosstalk between different pixels in the HIL and the impact on the life of the OLED device.

[0067] See also Figure 5 , Figure 5 This is a schematic diagram of another OLED film structure provided in an embodiment of the present application.

[0068] and Figure 3 The film structure shown is different in that it also includes a third HIL, wherein the first HIL covers the OLED backplane, the second HIL covers the first HIL, the third HIL covers the second HIL, and the third HIL is in contact with the HTL, that is, the HIL covers the second HIL.

[0069] Specifically, the P-type dopant concentration of the first HIL is lower than that of the second HIL, and the P-type dopant concentration of the third HIL is lower than that of the second HIL.

[0070] For example, the first HIL has a P-type dopant concentration of 0.5% to 1% and a thickness of 25 nm, the second HIL has a P-type dopant concentration of 1% to 2% and a thickness of 5 nm, and the third HIL has a P-type dopant concentration of 25 nm.

[0071] This example can be used with Figure 3 The example shown is the same, that is, the pixel in the G light-emitting layer includes three sub-pixels G64B32, G64B64, and G64B128. Figure 6 The current of another sub-pixel changes with the emission wavelength, that is, the current of the green pixel with different data bandwidths. During the HIL evaporation process, the current of the three sub-pixels G64B32, G64B64, and G64B128 will change with the nanometer value of the sub-pixel emission wavelength. It can be seen that when the emission wavelength of the sub-pixel is between 510nm and 560nm, compared with the existing technology and Figure 4 The technical effect of the method is that the current values ​​of the three sub-pixels of the structure described in this example are almost overlapping. In other words, when the HIL is evaporated using the method described in this example, the degree of crosstalk between different pixels caused by the strong conductivity of the HIL can be minimized.

[0072] In addition, when improving the image quality to the same extent, compared with the existing technology (which can be Figure 1 The OLED device manufactured by the method) has a significantly reduced lifespan by reducing the concentration of the P-type dopant, and Figure 4 The lifetime loss of the OLED device manufactured by the method is 10%. Figure 6 The lifespan loss of the OLED device manufactured with the HIL structure described in the method shown in FIG.

[0073] The above embodiments introduce two film layer structures of OLEDs. The embodiments of the present application also provide methods for manufacturing the above two film layer structures.

[0074] See also Figure 7 , Figure 7 A method for manufacturing a film layer structure is provided in an embodiment of the present application.

[0075] S710 , the film layer structure preparation device determines a first line source, a second line source, and a third line source.

[0076] The first angle between the first line source and the backplane of the OLED device along a first direction is smaller than the second angle between the second line source and the backplane along a second direction. The first direction and the second direction are opposite on the backplane. The first line source is used to deposit P-type dopants on the first HIL, and the second line source is used to deposit P-type dopants on the second HIL. The third line source is used to form the HTL by evaporation.

[0077] It should be understood that the first angle of the first line source is smaller than the second angle of the second line source, as can be seen from Figure 8 As shown in the schematic diagram of the backplane-based line source evaporation method, the first angle is 30° to 65°, and the second angle is 85° to 110°. It can be concluded that when the first line source evaporates the HIL and HTL, the length of its evaporation path is longer than the length of the evaporation path of the second line source. Therefore, when Src#1 is evaporated, under the same evaporation method and movement path, the HIL formed by evaporation from the first line source has a lower P-type dopant concentration, i.e., it corresponds to the first HIL, while the HIL formed by evaporation from the second line source has a higher P-type dopant concentration, i.e., it corresponds to the second HIL.

[0078] S720 , the film layer structure preparation device deposits a P-type dopant on the first HIL.

[0079] Specifically, if Figure 8 As shown, by moving the first line source and / or the backplane of the OLED device, the first line source is evaporated at any location of the backplane for the same time to deposit a P-type dopant concentration on the first HIL.

[0080] One possible implementation is to enable the first line source to perform an "S"-shaped path evaporation of the HIL on the backplane, and deposit a P-type dopant on the first HIL. Figure 8 Taking the method shown as an example, the first angle of the first line source is 30° to 65°. During evaporation, the shutter is opened, and the line source Src#1 (including the first line source) for evaporating the HIL is moved from A to F. Then, the backplane is moved vertically, and the line source Src#1 is started to be moved from F to A. This process is repeated until the deposition of the P-type dopant of the first HIL on the entire backplane is completed.

[0081] S730 , the film layer structure preparation device deposits a P-type dopant on the second HIL.

[0082] In S720, the first line source of Src#1 is used to complete the deposition of P-type dopants on the first HIL. In S730, the second line source of Src#1 can be used to complete the deposition of P-type dopants on the second HIL, that is, the P-type dopant of the second HIL is deposited on the first HIL. The specific method can refer to the method described in S720. It should be noted that since the length of the evaporation path of the second line source is shorter than the evaporation path of the first line source, the P-type dopant concentration of the second HIL formed by the second line source is greater than the P-type dopant concentration of the first HIL, thereby forming Figure 3 The film structure shown.

[0083] S740, the film layer structure preparation device evaporates HTL.

[0084] In S720 and S730 , a first HIL and a second HIL are deposited respectively. The second HIL is deposited on the first HIL. In S740 , a HTL may be deposited on the second HIL.

[0085] Specifically, Figure 8 Taking the method shown as an example, the shutter of the line source Src#1 can be closed, and the line sources Src#2 and Src#3 (ie, the third line source) can be repeatedly moved between A and F to complete the HTL evaporation.

[0086] Optionally, before S740 , the process may further include S731 , depositing a P-type dopant on the third HIL.

[0087] Among them, see Figure 9 Another schematic diagram of a line source evaporation method based on a backplane is shown. Figure 9 The evaporation method is similar, and by moving the first line source and / or the backplane of the OLED device, the first line source evaporates at any location of the backplane for the same time to deposit the P-type dopant on the third HIL.

[0088] One possible implementation method is to first close the light shield (shutter2), that is, stop evaporating Src#2 and Src#3 of the HTL, open the light shield (shutter1), that is, start evaporating Src#1 of the HIL, and first use the first line source to complete the deposition of the P-type dopant on the first HIL on the backplane. The specific method can be referred to Figure 8 The method shown (i.e., S720) is then performed by using a second line source to deposit a P-type dopant on the second HIL. Then, the first line source is used again to deposit a P-type dopant on the third HIL on top of the second HIL. That is, the P-type dopant concentration of the third HIL is less than that of the second HIL. Finally, the light barrier (shutter 1) is closed and the light barrier (shutter 2) is opened to complete the evaporation of the HTL, thereby obtaining Figure 5 The film structure of the OLED shown.

[0089] It should be noted that, when the P-type dopant concentration of the third HIL is less than that of the second HIL, a line source other than the first line source may be used to deposit the P-type dopant on the third HIL. The application embodiments do not limit this. In other words, the P-type dopant concentration of the third HIL may be equal to that of the first HIL, or may be greater than or less than that of the first HIL.

[0090] Based on the above embodiment, by designing different line sources (including a first line source and a second line source) to form different angles (including a first angle and a second angle) with the OLED backplane during evaporation, the evaporation path lengths of each line source can be made different, thereby enabling the line source with a longer evaporation path to deposit the first HIL, while the line source with a shorter evaporation path can deposit the second HIL. This method avoids the costly adjustment of the material evaporation rate during the evaporation process.

[0091] It should be noted that the film structure of the OLED device and its preparation method described above are also applicable to the structural layers of other non-HIL devices with crosstalk, such as the n-type charge-generation layer (N-CGL) and p-type charge-generation layer (P-CGL) of tandem devices.

[0092] In addition, an embodiment of the present application further provides a display substrate including a light-emitting device, wherein the light-emitting component includes the film layer structure of the OLED described above.

[0093] In some possible embodiments, the display substrate includes a virtual reality (VR) device, an augmented reality (AR) device, etc.

[0094] In some possible embodiments, the display substrate may also be referred to as a display device or a display panel.

[0095] An embodiment of the present application further provides a display comprising the above-mentioned display device.

[0096] An embodiment of the present application further provides an electronic device, which includes the above-mentioned display.

[0097] Correspondingly, an embodiment of the present application also proposes a device for preparing a film layer structure, including a processor and a memory, wherein the processor and the memory are connected, wherein the memory is used to store program code, and the processor is used to call the program code to execute any of the above-mentioned methods for preparing the film layer structure.

[0098] Those skilled in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0099] Those skilled in the art will clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0100] In the several embodiments provided in this application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are merely schematic. For example, the division of the units is merely a logical function division. In actual implementation, there may be other division methods, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0101] The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of these units may be selected to achieve the purpose of this embodiment according to actual needs.

[0102] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

[0103] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art, or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions for enabling a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk.

[0104] The above description is merely a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in this application should be included in the scope of protection of this application. Therefore, the scope of protection of this application should be based on the scope of protection of the claims.

Claims

1. A film structure, characterized in that: include: a first hole injection layer HIL and a second HIL; The first HIL covers the backplane of the organic light emitting diode, the second HIL covers the first HIL, and the concentration of the P-type dopant in the first HIL is lower than the concentration of the P-type dopant in the second HIL.

2. The film structure according to claim 1, characterized in that: The film structure further includes a hole transport layer HTL; The HTL covers the second HIL.

3. The film structure according to claim 1, characterized in that: The film structure further includes a third HIL and a hole transport layer HTL; The third HIL covers the second HIL, and the HTL covers the third HIL; A concentration of the P-type dopant of the third HIL is lower than a concentration of the P-type dopant of the second HIL.

4. The film structure according to claim 3, characterized in that: The concentration of the P-type dopant in the first HIL is greater than or equal to 0.5% and less than 1%, the concentration of the P-type dopant in the second HIL is greater than or equal to 1% and less than 2%, and the concentration of the P-type dopant in the third HIL is greater than or equal to 0.5% and less than 1%.

5. A method for manufacturing a membrane structure, characterized in that: For manufacturing the membrane structure according to any one of claims 1 to 4, the manufacturing method comprises: Determine a first line source and a second line source, wherein an angle between the first line source and the backplane along a first direction is smaller than an angle between the second line source and the backplane along a second direction, and the first direction and the second direction are opposite to each other on the backplane; depositing a P-type dopant on the first HIL by the first line source; A P-type dopant is deposited on the second HIL by the second line source.

6. The method for manufacturing a membrane structure according to claim 5, characterized in that: The length of the evaporation path of the first line source is greater than the length of the evaporation path of the second line source.

7. The method for manufacturing a membrane structure according to claim 6, wherein: The depositing of a P-type dopant on the first HIL and the depositing of a P-type dopant on the second HIL include: moving the first line source and the back plate to deposit a P-type dopant of the first HIL; moving the second line source and the back plate to deposit a P-type dopant of the second HIL on the first HIL; Determine a third line source; move the third line source and the back plate, and evaporate HTL on the second HIL.

8. The method for manufacturing a film structure according to claim 7, characterized in that: Before moving the third line source and the back plate, the manufacturing method further includes: moving the first line source and the back plate to deposit a P-type dopant of a third HIL; The third HIL is deposited on the second HIL, and the HTL is deposited on the third HIL.

9. A display substrate, characterized in that: The invention comprises a light emitting device, wherein the light emitting device comprises the film layer structure according to any one of claims 1 to 4.

10. The display substrate according to claim 9, wherein: The light emitting device is an organic light emitting diode (OLED).

11. An electronic device, characterized in that: The display substrate comprises the display substrate according to claim 9 or 10.

12. A device for preparing a membrane structure, characterized in that: The system comprises a processor and a memory, wherein the processor and the memory are connected, wherein the memory is used to store program code, and the processor is used to call the program code to execute the method according to any one of claims 5 to 8.

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