Circuit board character tunnel oven baking system and control method

Abstract

The invention relates to the technical field of circuit board production and processing, and discloses a circuit board character tunnel oven baking system and a control method, and the method comprises the steps: obtaining the information data of a to-be-baked circuit board, carrying out the character region feature modeling, and determining a single-stage or multi-stage baking mode according to the feature data; setting an initial temperature for a single-stage mode and adjusting thermal field uniformity, and setting an initial temperature for a multi-stage mode and analyzing a thermal field fluctuation range; performing time sequence temperature change prediction on the multi-stage thermal field fluctuation, dynamically regulating and controlling the temperature, and combining two types of data to construct a temperature control strategy; feedback data are collected to evaluate baking quality, and a control strategy is adaptively optimized. The system comprises a baking mode recognition module, a single-stage temperature regulation module, a multi-stage temperature regulation module and a feedback optimization module. The circuit board baking system realizes intelligent selection of baking modes and accurate temperature regulation and control, improves the circuit board baking quality and production efficiency, and is suitable for the field of circuit board production and processing.

Description

Technical Field

[0001] The present invention relates to the technical field of circuit board production and processing, and in particular to a circuit board text tunnel oven baking system and a control method. Background Art

[0002] In the circuit board manufacturing process, text printing is a key process. Tunnel oven baking, as the core step in text curing, directly impacts the quality, reliability, and production efficiency of the circuit boards. Traditional methods for controlling text in tunnel ovens have numerous shortcomings, making them difficult to meet the demands of modern high-precision, high-reliability circuit board production.

[0003] From a temperature control perspective, traditional methods mostly employ a fixed, single-stage baking mode, which fails to fully account for the characteristic differences and thermal sensitivity of the text areas on the PCB. Factors such as the distribution density of the text on the PCB and the thermal conductivity of the substrate will result in different baking intensity requirements for different areas. For example, areas with high text coverage density have thicker ink deposits, requiring higher temperatures and longer baking times to ensure complete curing. Meanwhile, areas with low substrate thermal conductivity experience slower heat transfer and are prone to localized temperature unevenness. Traditional single-stage baking modes are unable to flexibly adjust to these differences, potentially resulting in underbaking in some areas, resulting in poor text adhesion and easy detachment, or overbaking in some areas, causing deformation of the substrate and damage to electronic components.

[0004] In terms of thermal field uniformity and dynamic temperature control, traditional methods lack real-time monitoring and dynamic adjustment mechanisms for thermal field distribution. The thermal field distribution within the tunnel oven may be affected by factors such as the distribution of heating elements and airflow circulation, resulting in a certain degree of non-uniformity. After the initial temperature parameters are set, traditional control methods are difficult to adjust in a timely manner based on the actual offset and fluctuation of the thermal field, resulting in deviations between the actual heating conditions in different areas of the circuit board and the expected ones. For example, thermal field offsets may lead to insufficient curing at the edges of the text area, affecting the clarity and integrity of the text; excessive thermal field fluctuations may make the baking process unstable, making it difficult to ensure consistent product quality.

[0005] Furthermore, traditional methods also have shortcomings in baking quality assessment and control strategy optimization. The lack of systematic collection and analysis of temperature control feedback data during the baking process makes it impossible to accurately assess baking quality and adaptively optimize control strategies based on actual baking results. This makes it difficult to continuously improve baking control strategies as production conditions change and product requirements increase, limiting improvements in production efficiency and product quality.

[0006] With the rapid development of electronic information technology, the integration of circuit boards is becoming increasingly higher, and the requirements for text printing and baking processes are becoming increasingly stringent. Traditional baking control methods can no longer meet the needs of high-precision and high-reliability circuit board production. There is an urgent need for a baking control method and system that can flexibly select baking modes based on the characteristics of the circuit board text area, achieve thermal field uniformity adjustment and dynamic temperature control, and adaptively optimize based on feedback data. Summary of the Invention

[0007] The purpose of the present invention is to provide a circuit board text tunnel oven baking system and control method to solve the problems raised in the above background technology.

[0008] To achieve the above-mentioned object, the present invention provides the following technical solution: a circuit board text tunnel oven baking control method, the method comprising:

[0009] F1: Acquire information data of the circuit board to be baked; perform text region feature modeling on the information data of the circuit board to be baked to generate circuit board text region feature data; determine the baking mode of the tunnel oven based on the circuit board text region feature data to obtain baking mode data, where the baking mode data includes a single-stage baking mode and a multi-stage baking mode;

[0010] F2: Based on the single-stage baking mode, the initial temperature parameters of the circuit board information data to be baked are set to obtain the single-stage initial temperature data; the thermal field uniformity of the single-stage initial temperature data is adjusted to generate the single-stage temperature adjustment data; based on the multi-stage baking mode, the multi-stage temperature parameters of the circuit board information data to be baked are set to obtain the multi-stage initial temperature data; the thermal field fluctuation range of the multi-stage initial temperature data is analyzed to generate the multi-stage thermal field fluctuation range data;

[0011] F3: Perform time-series temperature change trend prediction on multi-stage thermal field fluctuation range data to generate multi-stage temperature change prediction data; perform multi-stage dynamic temperature control on multi-stage initial temperature data based on the multi-stage temperature change prediction data to generate multi-stage dynamic temperature control data; construct a temperature control strategy for baking mode data using the multi-stage dynamic temperature control data and single-stage temperature adjustment data to generate a baking mode temperature control strategy;

[0012] F4: Collect temperature control feedback data for the baking mode temperature control strategy to obtain a temperature control feedback dataset; perform baking quality evaluation on the temperature control feedback dataset to generate circuit board baking quality evaluation data; adaptively optimize the baking mode temperature control strategy based on the circuit board baking quality evaluation data to generate a dynamic temperature control optimization strategy.

[0013] Preferably, step F1 includes:

[0014] F11: Get the information data of the circuit board to be baked;

[0015] F12: Preprocess the information data of the circuit board to be baked to generate standard circuit board information data. The data preprocessing includes image noise elimination, text area enhancement, edge sharpening and data normalization.

[0016] F13: Extract text area features from standard circuit board information data to obtain circuit board text area feature data; model the circuit board's thermal sensitive area based on the text area feature data to generate circuit board thermal sensitive area data;

[0017] F14: Confirm the baking mode of the tunnel oven according to the data of the heat-sensitive area of ​​the circuit board to obtain baking mode data, where the baking mode data includes single-stage baking mode and multi-stage baking mode.

[0018] Preferably, step F14 includes:

[0019] F141: Perform text coverage density analysis on the data of the heat-sensitive area of ​​the circuit board to generate text coverage density data; perform substrate thermal conductivity analysis on the data of the heat-sensitive area of ​​the circuit board to generate substrate thermal conductivity data;

[0020] F142: Calculates baking intensity requirements based on text coverage density data and substrate thermal conductivity data to generate circuit board baking intensity requirement data;

[0021] F143: Compare the circuit board baking intensity requirement data with the preset standard baking intensity threshold. If the circuit board baking intensity requirement data is greater than the preset standard baking intensity threshold, the tunnel oven is confirmed to be in a multi-stage baking mode and a multi-stage baking mode is generated.

[0022] F144: When the circuit board baking intensity requirement data is less than or equal to the preset standard baking intensity threshold, the tunnel oven is confirmed to be in single-stage baking mode and a single-stage baking mode is generated; the multi-stage baking mode and the single-stage baking mode are integrated to generate baking mode data.

[0023] Preferably, step F2 includes:

[0024] F21: Set the initial temperature parameters for the circuit board to be baked based on the single-stage baking mode to obtain the single-stage initial temperature data; perform temperature feedback synchronization on the heat-sensitive area data of the circuit board based on the single-stage initial temperature data to generate temperature feedback data;

[0025] F22: Use temperature feedback data to perform thermal field offset detection on the data of the heat-sensitive area of ​​the circuit board to generate thermal field offset detection data; use the thermal field offset detection data to perform single-stage temperature adjustment on the single-stage initial temperature data to generate single-stage temperature adjustment data;

[0026] F23: Based on the multi-stage baking mode, multi-stage temperature parameter settings are performed on the information data of the circuit board to be baked to obtain multi-stage initial temperature data; based on the multi-stage initial temperature data, simulate baking the data of the heat-sensitive area of ​​the circuit board to generate multi-stage baking simulation data;

[0027] F24: Perform thermal field aggregation point analysis on multi-stage baking simulation data to generate multi-stage thermal field aggregation points; perform thermal field fluctuation range analysis on multi-stage baking simulation data based on multi-stage thermal field aggregation points to generate multi-stage thermal field fluctuation range data.

[0028] Preferably, step F22 includes:

[0029] F221: Use temperature feedback data to perform dynamic thermal field data screening on the thermally sensitive area of ​​the circuit board to obtain dynamic thermal field data;

[0030] F222: Compare the temperature gradients of the dynamic thermal field data and the data of the heat-sensitive area of ​​the circuit board to generate thermal field temperature gradient data; confirm the thermal field offset of the temperature feedback data based on the thermal field temperature gradient data to obtain thermal field offset detection data;

[0031] F223: Performing offset threshold determination on the thermal field offset detection data. When the thermal field offset detection data exceeds the preset offset threshold, temperature compensation is performed on the single-stage initial temperature data according to the thermal field offset detection data to generate single-stage first temperature adjustment data.

[0032] F224: When the thermal field offset detection data does not exceed the preset offset threshold, the temperature feedback data is subjected to thermal field distribution morphology analysis based on the thermal field offset detection data to generate thermal field distribution morphology data; the single-stage initial temperature data is subjected to temperature balance adjustment based on the thermal field distribution morphology data to generate single-stage second temperature adjustment data;

[0033] F225: Integrate the single-stage first temperature adjustment data and the single-stage second temperature adjustment data to generate single-stage temperature adjustment data.

[0034] Preferably, step F224 includes:

[0035] When the thermal field offset detection data does not exceed the preset offset threshold, the temperature feedback data is subjected to thermal field distribution key feature extraction to obtain thermal field distribution key feature data, wherein the key feature extraction includes temperature gradient distribution extraction, high temperature area extraction and low temperature stagnation point extraction;

[0036] Perform thermal field contact surface analysis on the thermal field offset detection data based on the thermal field distribution key feature data to generate thermal field contact surface data; perform thermal field coverage calculation on the thermal field distribution key feature data based on the thermal field contact surface data to obtain thermal field coverage data;

[0037] Thermal field distribution morphology analysis is performed based on thermal field contact surface data and thermal field coverage data to generate thermal field distribution morphology data; thermal field-substrate compatibility is calculated based on thermal field distribution morphology data and circuit board thermal sensitive area data to obtain thermal field compatibility data;

[0038] The single-stage initial temperature data is subjected to temperature balance adjustment based on the thermal field adaptability data to generate single-stage second temperature adjustment data.

[0039] Preferably, step F24 includes:

[0040] F241: Extracting temperature application data of each stage from multi-stage baking simulation data to obtain stage temperature application data; marking thermal field regions of the multi-stage baking simulation data based on the stage temperature application data to generate thermal field region marking data;

[0041] F242: Calculate the regional temperature peak value of the thermal field area marking data to generate regional temperature peak data; identify the thermal field convergence point of the stage temperature application data based on the regional temperature peak data to generate multi-stage thermal field convergence points;

[0042] F243: Mark the high-temperature concentrated area of ​​the thermal field area marking data based on the multi-stage thermal field aggregation points to generate the high-temperature concentrated area; perform multi-stage temperature gradient analysis on the high-temperature concentrated area to generate a stage temperature gradient map; extract the temperature change amplitude from the stage temperature gradient map to obtain the stage temperature change amplitude data;

[0043] F244: Use the stage temperature variation amplitude data to calculate the multi-stage thermal field fluctuation range of the multi-stage baking simulation data and generate the multi-stage thermal field fluctuation range data.

[0044] Preferably, step F3 includes:

[0045] F31: Predict the time series temperature change trend of multi-stage thermal field fluctuation range data and generate multi-stage temperature change prediction data;

[0046] F32: Perform multi-stage temperature intensity demand analysis based on multi-stage temperature change prediction data to generate multi-stage temperature intensity demand data;

[0047] F33: Perform multi-stage dynamic temperature control on multi-stage initial temperature data based on multi-stage temperature intensity demand data to generate multi-stage dynamic temperature control data;

[0048] F34: Construct a temperature control strategy for the baking mode data using multi-stage dynamic temperature control data and single-stage temperature adjustment data to generate a baking mode temperature control strategy.

[0049] Preferably, step F31 includes:

[0050] F311: Divide the data set of multi-stage thermal field fluctuation range data to generate temperature change training set and temperature change test set; use the convolutional neural network algorithm to train the temperature change training set model to generate a multi-stage thermal field temperature change prediction pre-model;

[0051] F312: Perform model testing iterations on the multi-stage thermal field temperature change prediction pre-model using the temperature change test set to generate a multi-stage thermal field temperature change prediction model;

[0052] F313: Import the multi-stage thermal field fluctuation range data into the multi-stage thermal field temperature change prediction model to perform time series temperature change trend prediction and generate multi-stage temperature change prediction data.

[0053] Preferably, the present invention further includes a circuit board text tunnel oven baking system, which is used to execute the circuit board text tunnel oven baking control method as described above, and the system includes:

[0054] The baking mode recognition module is used to obtain information data of the circuit board to be baked; perform text area feature modeling on the information data of the circuit board to be baked to generate circuit board text area feature data; confirm the baking mode of the tunnel oven based on the circuit board text area feature data to obtain baking mode data;

[0055] The single-stage temperature adjustment module is used to set the initial temperature parameters of the circuit board information data to be baked based on the single-stage baking mode to obtain the single-stage initial temperature data; adjust the thermal field uniformity of the single-stage initial temperature data to generate the single-stage temperature adjustment data; set the multi-stage temperature parameters of the circuit board information data to be baked based on the multi-stage baking mode to obtain the multi-stage initial temperature data; perform thermal field fluctuation range analysis on the multi-stage initial temperature data to generate the multi-stage thermal field fluctuation range data;

[0056] The multi-stage temperature control module is used to predict the time-series temperature change trend of the multi-stage thermal field fluctuation range data and generate multi-stage temperature change prediction data; perform multi-stage dynamic temperature control on the multi-stage initial temperature data based on the multi-stage temperature change prediction data and generate multi-stage dynamic temperature control data; construct a temperature control strategy for the baking mode data using the multi-stage dynamic temperature control data and the single-stage temperature adjustment data to generate the baking mode temperature control strategy;

[0057] The feedback optimization module is used to collect temperature control feedback data for the baking mode temperature control strategy to obtain a temperature control feedback data set; perform baking quality evaluation on the temperature control feedback data set to generate circuit board baking quality evaluation data; and adaptively optimize the baking mode temperature control strategy based on the circuit board baking quality evaluation data to generate a dynamic temperature control optimization strategy to execute the circuit board baking operation.

[0058] Compared with the prior art, the present invention has the following beneficial effects:

[0059] By modeling and analyzing the characteristics of the text area of ​​the circuit board, intelligent selection of baking mode and precise control of temperature parameters are achieved, which effectively improves the baking quality and production efficiency of the circuit board, and has significant technical advantages and practical value.

[0060] When selecting a baking mode, the system analyzes the text coverage density and thermal conductivity of the substrate in heat-sensitive areas of the PCB to calculate the required baking intensity. This data is then compared with a preset standard baking intensity threshold, enabling intelligent selection of either a single-stage or multi-stage baking mode. This method of selecting a mode based on the actual characteristics of the PCB more accurately meets the baking requirements of different PCBs. For PCBs with lower baking intensity requirements, a single-stage baking mode simplifies the baking process and improves production efficiency. For PCBs with higher baking intensity requirements, a multi-stage baking mode, by setting different temperature parameters in different stages, allows for more effective control of the baking process, ensuring adequate text curing, avoiding over-baking or under-baking, and improving product quality stability.

[0061] In terms of temperature parameter setting and thermal field control, for single-stage baking mode, temperature feedback data is used to detect thermal field offsets in the circuit board's heat-sensitive areas, and temperature adjustments are made based on the test results. When the thermal field offset exceeds the preset threshold, temperature compensation is performed to quickly correct the offset and ensure thermal field uniformity. When the thermal field offset does not exceed the threshold, temperature balancing adjustments are made through analysis of the thermal field distribution morphology to further optimize the thermal field distribution. For multi-stage baking mode, thermal field fluctuation range data is calculated through simulated baking and thermal field aggregation point analysis. A convolutional neural network algorithm is used to predict the time-series temperature change trend of this thermal field fluctuation range data, thereby achieving dynamic control of multi-stage initial temperature data. This multi-stage dynamic temperature control mechanism can adjust temperature parameters in advance based on the real-time changing trends of the thermal field, effectively responding to thermal field fluctuations, improving the accuracy and response speed of temperature control, and ensuring the stability and reliability of the baking process.

[0062] In terms of baking quality assessment and control strategy optimization, the system collects temperature control feedback data sets to evaluate baking quality and adaptively optimizes the baking mode temperature control strategy based on the evaluation results. This closed-loop feedback mechanism monitors baking results in real time, promptly identifies problems during the baking process, and automatically adjusts the control strategy, enabling it to continuously adapt to varying production conditions and product requirements, thereby continuously improving baking quality and production efficiency. Furthermore, this systematic evaluation of baking quality provides data support for optimizing and improving the production process, contributing to the intelligent and refined management of circuit board production.

[0063] Furthermore, the present invention improves data accuracy and reliability through preprocessing and feature extraction of circuit board information data, providing a solid foundation for subsequent modeling, analysis, and control. Data preprocessing processes such as image noise elimination, text area enhancement, edge sharpening, and data normalization effectively remove interference factors from the data, highlight the characteristics of the text area, and make subsequent feature modeling and analysis more accurate. The application of technologies such as modeling of thermally sensitive areas of the circuit board and feature extraction of text areas can provide a deeper understanding of the thermal characteristics of the circuit board, providing a more scientific basis for selecting baking modes and setting temperature parameters. BRIEF DESCRIPTION OF THE DRAWINGS

[0064] Figure 1 This is a working principle diagram of the circuit board text tunnel oven baking control method of the present invention;

[0065] Figure 2 Flowchart for modeling the features of the text area of ​​the circuit board and confirming the baking mode;

[0066] Figure 3 This is a flow chart of single-stage thermal field offset detection and temperature adjustment;

[0067] Figure 4 Flowchart for thermal field distribution analysis and temperature balance adjustment;

[0068] Figure 5 Flowchart for thermal field fluctuation range analysis of multi-stage baking simulation data. DETAILED DESCRIPTION

[0069] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0070] See also Figure 1-Figure 5The present invention relates to a circuit board text tunnel oven baking control method, and the specific implementation steps are as follows:

[0071] Step F1: Obtain information data of the circuit board to be baked, perform text area feature modeling on the information data of the circuit board to be baked, and generate circuit board text area feature data; confirm the baking mode of the tunnel oven based on the circuit board text area feature data, and obtain baking mode data including single-stage baking mode and multi-stage baking mode.

[0072] Step F2: Based on the single-stage baking mode, the initial temperature parameters of the circuit board information data to be baked are set to obtain single-stage initial temperature data; the thermal field uniformity of the single-stage initial temperature data is adjusted to generate single-stage temperature adjustment data; based on the multi-stage baking mode, the multi-stage temperature parameters of the circuit board information data to be baked are set to obtain multi-stage initial temperature data; the thermal field fluctuation range of the multi-stage initial temperature data is analyzed to generate multi-stage thermal field fluctuation range data.

[0073] Step F3: Perform time-series temperature change trend prediction on the multi-stage thermal field fluctuation range data to generate multi-stage temperature change prediction data; perform multi-stage dynamic temperature control on the multi-stage initial temperature data based on the multi-stage temperature change prediction data to generate multi-stage dynamic temperature control data; construct a temperature control strategy for the baking mode data using the multi-stage dynamic temperature control data and the single-stage temperature adjustment data to generate a baking mode temperature control strategy.

[0074] Step F4: collecting temperature control feedback data for the baking mode temperature control strategy to obtain a temperature control feedback data set; performing baking quality evaluation on the temperature control feedback data set to generate circuit board baking quality evaluation data; adaptively optimizing the baking mode temperature control strategy based on the circuit board baking quality evaluation data to generate a dynamic temperature control optimization strategy.

[0075] The technical solution of the present invention is further described in detail below with reference to specific embodiments.

[0076] Example 1:

[0077] On the basis of the above overall solution, this embodiment further defines the specific implementation method of step F1.

[0078] The process of acquiring information data of the circuit board to be baked in step F11 is specifically implemented using industrial-grade image acquisition equipment, such as a linear array camera with a resolution of at least 5 million pixels, combined with a ring light source to ensure clear imaging of the text area and substrate details on the circuit board surface. The acquisition range covers the entire circuit board, including the edge and center areas, to fully capture visual features such as text distribution, font size, and color contrast. At the same time, the physical property parameters of the circuit board are recorded, such as substrate type (FR-4, aluminum substrate, etc.), thickness, size specifications (length × width × height), and related information such as the preset baking process number. The collected data is stored in the form of a multidimensional array, including RGB color channel information, coordinate position information, and metadata tags, forming the original information data set of the circuit board to be baked.

[0079] In step F12, data preprocessing begins with image noise removal. A median filter algorithm is used to process the original image data. By setting a 3×3 or 5×5 sliding window and using the median of the pixel values ​​within the window as the new value for the center pixel, this effectively suppresses salt-and-pepper noise while preserving text edge details. Next, text region enhancement is performed, using histogram equalization to adjust the image's grayscale distribution. By redistributing the probability density of pixel values, the grayscale difference between the text and the background is increased, improving the contrast of the text area. For example, for low-contrast images, the grayscale range is expanded from [50, 150] to [0, 255], significantly enhancing the recognizability of text edges. Edge sharpening is then performed, using the Laplacian operator convolved with the original image to highlight the high-frequency components of the text outline, making the text edges clearer and sharper, facilitating subsequent feature extraction. Finally, data normalization is performed to linearly scale the image pixel values ​​from [0, 255] to the interval [0, 1]. Non-image data (such as substrate thickness) is standardized by subtracting the mean and dividing by the standard deviation to ensure that data of different dimensions have the same dimension, generating standard PCB information data in a unified format.

[0080] The text region feature extraction process in step F13 first uses a connected domain analysis algorithm to process the standardized image data. By traversing each pixel, connected regions with the same or similar grayscale values ​​are marked, and the geometric features of each connected region are calculated, including the contour perimeter, area, centroid coordinates, rectangularity (the ratio of the region area to the minimum circumscribed rectangle area), aspect ratio, etc., to identify the text region. For text blocks with multiple characters, adjacent connected regions are merged and block-level features (such as block area and block spacing) are calculated to generate circuit board text region feature data. This data is stored in a structured table format, with each text region corresponding to a unique identifier and associated with its position, size, shape and other characteristic parameters.

[0081] When establishing a model of the thermally sensitive area of ​​a circuit board, the characteristic data of the text area and the thermal conductivity characteristics of the substrate are combined. First, the thermal sensitivity of different areas is judged based on the distribution density and shape of the text area. For example, areas with dense text have a thicker ink coating and a larger thermal resistance, making them highly thermally sensitive areas; while areas with sparse text or no text have the substrate directly exposed, resulting in higher thermal conductivity efficiency and lower thermal sensitivity. Secondly, the thermal conductivity coefficient of the substrate is introduced as a key parameter, and thermal conduction models are established for different materials such as FR-4 substrate (thermal conductivity coefficient of approximately 0.2W / m·K) and aluminum substrate (thermal conductivity coefficient of approximately 2.0W / m·K). Through the finite element analysis method, the temperature distribution of different areas during the heating process is simulated, and areas with large temperature gradients and prone to thermal deformation are marked to generate data for the thermally sensitive areas of the circuit board. This data corresponds one-to-one to image pixels in matrix form, and each point stores the thermal sensitivity level (such as high, medium, and low) and the thermal conductivity coefficient value.

[0082] During the baking mode confirmation process in step F14, the text coverage density analysis is first performed on the data of the heat-sensitive areas of the circuit board. The text coverage density data is obtained by calculating the pixel ratio of the text area per unit area. For example, a 10mm×10mm ROI (region of interest) is selected in the center of the circuit board. The ratio of the number of text pixels in this area to the total number of pixels is calculated as the text coverage density value for that area. Simultaneously, the thermal conductivity coefficient data of the substrate is extracted. For mixed-substrate circuit boards (such as those with a partially ceramic substrate), the thermal conductivity coefficient of each area is recorded.

[0083] Based on the text coverage density data and the substrate thermal conductivity coefficient data, a preset baking intensity requirement calculation model is used to generate the circuit board baking intensity requirement data. This model uses a weighted summation method. For example, the text coverage density is weighted at 0.6, and the substrate thermal conductivity coefficient is weighted at -0.4 (the higher the thermal conductivity coefficient, the lower the baking intensity requirement). The calculation formula is: Baking intensity requirement = 0.6 × text coverage density + (-0.4) × substrate thermal conductivity coefficient. This model maps multi-dimensional parameters into a single baking intensity requirement value, facilitating comparison with preset thresholds.

[0084] The calculated circuit board baking intensity requirement data is compared with the preset standard baking intensity threshold. The preset threshold is determined according to industry standards and historical process data, for example, it is set to 0.5 (dimensionless). When the baking intensity requirement data is greater than 0.5, it is determined that the circuit board requires a complex temperature control process, and it is confirmed to adopt a multi-stage baking mode, which includes at least two temperature stages, such as a preheating stage (maintained at 100°C for 10 minutes) and a constant temperature stage (maintained at 150°C for 20 minutes), and thermal stress concentration is avoided by heating in stages. When the baking intensity requirement data is less than or equal to 0.5, it is determined that the circuit board has a low thermal sensitivity, and a single-stage baking mode is adopted, setting a single temperature (such as 120°C for 30 minutes) to complete the baking. Finally, the multi-stage baking mode and the single-stage baking mode are integrated to generate baking mode data containing information such as mode type, number of stages, temperature setting, etc. The data is stored in JSON format for subsequent control module calls.

[0085] Throughout the entire data processing process, each step is automated using a programmable logic controller (PLC) or industrial computer. For example, the image acquisition device communicates with the computer via a GigE interface. Data preprocessing and feature extraction are implemented using the Python programming language combined with the OpenCV library, and model calculation and logical analysis are performed using a C++ algorithm library. The system features a real-time data monitoring interface, allowing operators to view data processing results at each stage, such as pre- and post-processing image comparisons, thermal maps of heat-sensitive areas, and baking mode confirmation results, ensuring process traceability and operability.

[0086] Furthermore, the system supports customizable preprocessing parameters and model weights for different PCB types. For example, for high-density integrated circuit boards, the median filter window size can be adjusted to 7×7 to enhance noise suppression. For flexible PCBs, the weight of text coverage density can be increased to 0.7 to more rigorously assess thermal sensitivity. This adjustable parameter mechanism allows the system to adapt to diverse PCB baking requirements, ensuring accurate and flexible baking mode confirmation.

[0087] Example 2:

[0088] This embodiment refines the implementation of step F2. In step F21, when setting initial temperature parameters based on a single-stage baking mode, the system first accesses the circuit board information database and matches a preset initial temperature parameter table based on parameters such as the substrate type (e.g., FR-4, aluminum substrate), thickness (e.g., 1.6mm, 2.0mm), and text coverage density (e.g., high, medium, low) of the circuit board to be baked. For example, for a circuit board with an FR-4 substrate, a thickness of 1.6mm, and low text coverage density, the initial temperature is set to 120°C; for a circuit board with a high text coverage density, the initial temperature is adjusted to 110°C to prevent excessive curing of the ink due to high temperatures. These initial temperature parameters are transmitted to the tunnel oven's heating module via a PID controller, generating single-stage initial temperature data. Simultaneously, temperature sensors (e.g., K-type thermocouples) distributed throughout the oven collect real-time temperature data from heat-sensitive areas of the circuit board and transmit it to the control system 10 times per second, generating temperature feedback data containing timestamps, area coordinates, and temperature values.

[0089] In the thermal field offset detection and temperature adjustment process of step F22, the temperature feedback data is first used to screen the dynamic thermal field data. The system extracts the temperature data sequence within the set time window (such as the last 5 minutes) and spatial range (such as ±50mm in the center area of ​​the circuit board), excludes the abnormal values ​​caused by heat dissipation in the edge area, and obtains the dynamic thermal field data. Then, the temperature gradient of the dynamic thermal field data is compared with the data of the heat-sensitive area of ​​the circuit board, and the temperature gradient data of the thermal field is generated by calculating the temperature difference between adjacent pixels. For example, in a text-dense area, if the temperature difference between adjacent pixels exceeds 5°C / mm, it is marked as a high-gradient area, indicating that there may be a thermal field offset.

[0090] When confirming the thermal field offset based on the thermal field temperature gradient data, the system presets the offset threshold to 3°C / mm (which can be adjusted according to the heat resistance of the substrate). When it is detected that the temperature gradient of a certain area exceeds the threshold, it is determined to be a thermal field offset, and thermal field offset detection data including the offset position and gradient value is generated. At this time, the system triggers the temperature compensation mechanism: by adjusting the power of the heating lamp in the corresponding area (such as increasing the output by 10%), the single-stage initial temperature data is compensated to generate the single-stage first temperature adjustment data. For example, if the temperature gradient of the text area in the upper left corner of the circuit board is 4°C / mm, the system automatically increases the power of the heating lamp above the area from 80% to 88%, and re-detects the temperature gradient after 5 minutes.

[0091] When the thermal field offset detection data does not exceed the preset threshold, the system enters the thermal field distribution morphology analysis process. First, the key features of the thermal field distribution are extracted, including: calculating the temperature gradient distribution through the Sobel operator to identify the edge areas with drastic temperature changes; setting a temperature threshold (such as 15°C higher than the initial temperature) to mark the high-temperature area; and locating the low-temperature stagnation point where the temperature is 5°C lower than the average temperature for more than 3 consecutive minutes through time series analysis. These feature data are stored in the form of a coordinate list, for example, the coordinates of the high-temperature area are (X1, Y1) and (X2, Y2), and the coordinates of the low-temperature stagnation point are (X3, Y3).

[0092] The thermal field contact surface analysis is performed based on the key characteristic data of the thermal field distribution. The system superimposes the high temperature area, the low temperature stagnation point and the outline of the text area of ​​the circuit board, calculates the contact area ratio between the thermal field and the text area, and generates the thermal field contact surface data. For example, if the high temperature area covers 60% of the text area, the contact surface ratio is 60%. At the same time, based on the thermal field contact surface data, the thermal field coverage is calculated, that is, the proportion of the effective thermal field area (the area with a temperature within the range of ±10% of the target temperature) to the total area of ​​the circuit board, and the thermal field coverage data is generated.

[0093] Through the thermal field contact surface data and thermal field coverage data, the system constructs a thermal field distribution morphology matrix and analyzes the thermal field distribution morphology (such as symmetrical distribution, left-biased distribution, local concentrated distribution, etc.). For example, if the thermal field coverage is 85% but the contact surface is concentrated on the right side of the circuit board, it is determined to be a right-biased distribution morphology. Subsequently, the thermal field distribution morphology data is matched with the thermal sensitive area data of the circuit board to calculate the thermal field-substrate compatibility. For high thermal conductivity substrates such as aluminum substrates, a certain gradient in the thermal field distribution is allowed; for FR-4 substrates, the thermal field coverage is required to be no less than 90% and the temperature gradient is less than 2°C / mm. The compatibility calculation is implemented through a fuzzy logic algorithm. The input parameters include temperature gradient, coverage, and contact surface position, and the output is a compatibility value between 0 and 1.

[0094] Based on the thermal field adaptability data, the system makes temperature balancing adjustments to the single-stage initial temperature data. If the adaptability value is lower than 0.8, for example, the thermal field coverage is insufficient or the temperature gradient is too large, the system adjusts the airflow circulation path inside the oven (such as starting the auxiliary fan) or redistributes the power of the heating zone to make the temperature distribution more uniform, and generates single-stage second temperature adjustment data. For example, when a low temperature stagnation point is detected on the left side of the circuit board, the temperature of the left heating zone is increased by 5°C, and the temperature of the right heating zone is reduced by 3°C. After 10 minutes, the adaptability is re-evaluated. Finally, the system merges the single-stage first temperature adjustment data and the second temperature adjustment data in chronological order to generate single-stage temperature adjustment data including the power adjustment amplitude and duration.

[0095] When setting temperature parameters based on a multi-stage baking mode in step F23, the system sets independent temperature parameters and duration for each stage based on the number of stages in the baking mode data (e.g., 2 or 3 stages). For example, a 2-stage mode includes a preheating stage (80°C, 10 minutes) for evaporating the solvent and a constant temperature stage (150°C, 25 minutes) for curing the ink. The multi-stage initial temperature data is stored in an array format, such as [[80, 10], [150, 25]], corresponding to the temperature (°C) and time (minutes) for each stage, respectively. Subsequently, the system simulates the baking of the heat-sensitive area data of the circuit board using finite element simulation software (e.g., ANSYS). The multi-stage initial temperature data is input, the temperature field distribution at different time nodes is calculated, and the multi-stage baking simulation data containing node coordinates, temperature values, and timestamps is generated.

[0096] The thermal field fluctuation range analysis process in step F24 first extracts the temperature application data for each stage in the multi-stage baking simulation data, such as the temperature-time curve of the preheating stage. Based on the temperature application data, the system uses a threshold segmentation algorithm to mark the thermal field regions, marking areas with temperatures 20°C above the ambient temperature as high-temperature areas and areas below the ambient temperature as low-temperature areas, generating thermal field region labeling data. Next, the peak temperature is calculated for each thermal field region, that is, the highest temperature value of the region within the stage, generating regional temperature peak data. By comparing the temperature peaks of each region, the highest thermal field convergence point is identified. For example, a temperature peak of 165°C is detected in the text-dense area in the center of the circuit board, which is 15°C higher than the set temperature during the constant temperature stage and is therefore determined to be a thermal field convergence point.

[0097] According to the multi-stage thermal field aggregation point, the system delineates the high-temperature concentrated area in the thermal field area marking data, such as a circular area with a radius of 10mm centered at the aggregation point. A multi-stage temperature gradient analysis is performed on the high-temperature concentrated area, and a stage temperature gradient diagram is drawn, with the horizontal axis being time and the vertical axis being the temperature gradient (°C / mm). By extracting the temperature change amplitude data in the gradient diagram, such as the temperature gradient in the preheating stage rises from 1°C / mm to 3°C / mm, and the constant temperature stage is maintained at around 2°C / mm, the stage temperature change amplitude data is obtained. Finally, the stage temperature change amplitude data is used, combined with the temperature setting values ​​of each stage, to calculate the multi-stage thermal field fluctuation range. For example, the temperature fluctuation range in the preheating stage is 75-85°C, and that in the constant temperature stage is 140-160°C. Multi-stage thermal field fluctuation range data containing the upper and lower temperature limits of each stage is generated, providing a basis for subsequent dynamic temperature control.

[0098] Throughout step F2, the system, through real-time data interaction and algorithmic processing, achieves thermal field uniformity adjustment in single-stage mode and thermal field fluctuation analysis in multi-stage mode. Data transmission delay at each stage is kept within 50ms, ensuring real-time temperature adjustment. The system also supports manual intervention, allowing operators to modify initial temperature parameters and adjust stage divisions through the human-machine interface to meet specific process requirements. Through this process, the system dynamically optimizes temperature settings based on the thermal sensitivity of the circuit board, providing a foundation for precise temperature control for different baking modes.

[0099] Example 3:

[0100] When the thermal field offset detection data does not exceed the preset offset threshold, the system enters the in-depth analysis process of the temperature feedback data. First, the key features of the thermal field distribution are extracted. The system uses a gradient operator to process the temperature feedback data and extracts the temperature gradient distribution by calculating the temperature difference between adjacent pixels. For each pixel on the circuit board, the temperature change rate in the horizontal and vertical directions is calculated respectively, and then the temperature gradient amplitude and direction of the point are synthesized. For example, at the junction of the text area and the substrate, due to the difference in the thermal properties of the materials, the temperature gradient is usually large, and these areas will be marked. By setting a gradient threshold (such as 2°C / pixel), the system identifies areas where the temperature gradient exceeds the threshold as areas of drastic temperature changes, and generates a temperature gradient distribution map.

[0101] The system marks high-temperature areas where the temperature exceeds a set threshold (e.g., 10°C above the average temperature). By traversing the entire thermal field data, the pixels that meet the conditions are clustered into connected regions, and the area, center of gravity, and peak temperature of each high-temperature region are calculated. For example, large areas of copper foil on a circuit board are prone to forming localized high-temperature regions due to their excellent thermal conductivity. For these high-temperature areas, the system records their geometric and temperature characteristics for subsequent analysis.

[0102] The system also locates low-temperature stagnation points, where the temperature remains below average for extended periods. By performing a time-series analysis of temperature data over a period of time (e.g., 5 minutes), it identifies areas where the temperature remains consistently below average by 5°C. These low-temperature stagnation points typically occur at the edges of the circuit board or in areas with rapid heat dissipation, such as near vents. The system records the coordinates and temperature trends of these low-temperature stagnation points, generating key characteristic data for the thermal field distribution.

[0103] The system performs thermal field contact surface analysis based on key characteristic data from the thermal field distribution. First, the high-temperature area and low-temperature stagnation point are superimposed on the outline of the PCB's text area to calculate the contact area and distribution of the thermal field with the PCB's text area and substrate. By comparing the overlapping areas of the high-temperature area and the text area, the direct impact of the thermal field on the text area is determined. For example, if a high-temperature area completely covers a text area, the text area is well thermally exposed; conversely, if the text area is only partially covered by the high-temperature area, there may be a risk of uneven baking.

[0104] Based on the thermal field contact surface data, the system calculates thermal field coverage, which is the ratio of the effective thermal field area to the total board area. The effective thermal field area is defined as the area within ±10% of the target temperature. The system traverses the thermal field data, counts the number of pixels that meet the criteria, and compares it with the total board area to obtain the thermal field coverage data. For example, if the total board area is 10,000 square millimeters, and the area within ±10% of the target temperature is 9,000 square millimeters, the thermal field coverage is 90%.

[0105] The system further analyzes the thermal field distribution morphology using thermal field contact surface data and thermal field coverage data. The system constructs a thermal field distribution morphology matrix, taking into account factors such as thermal field coverage, the distribution of high-temperature areas, and the location of low-temperature stagnation points. For example, if the thermal field coverage is high and the high-temperature areas are evenly distributed on the circuit board, the thermal field distribution morphology is determined to be uniform; if the high-temperature areas are concentrated on one side of the circuit board, the distribution is determined to be skewed. The system also analyzes indicators such as the symmetry and concentration of the thermal field distribution to generate thermal field distribution morphology data.

[0106] The system matches the thermal field distribution morphology data with the data of the heat-sensitive areas of the circuit board to calculate the compatibility of the thermal field and the substrate. For different types of substrates, the system presets different compatibility evaluation standards. For example, for FR-4 substrates, the thermal field coverage is required to be no less than 90%, the temperature gradient does not exceed 3°C / mm, and the high-temperature area should avoid vulnerable parts; for aluminum substrates, due to their good thermal conductivity, the temperature gradient requirements can be appropriately relaxed. The system uses a fuzzy logic algorithm to comprehensively evaluate multiple parameters such as thermal field coverage, temperature gradient, and high-temperature area location, and outputs a compatibility value between 0 and 1. The higher the compatibility value, the more closely the thermal field distribution matches the thermal characteristics of the circuit board substrate.

[0107] Based on the thermal field adaptability data, the system performs temperature balancing adjustments on the single-stage initial temperature data. If the adaptability value is lower than the preset threshold (such as 0.8), the system will start the temperature adjustment mechanism. For areas with insufficient thermal field coverage, the system will increase the heating power of the area, such as increasing the current of the corresponding heating lamp or extending the heating time. For areas with large temperature gradients, the system will adjust the temperature difference between adjacent heating zones to make the temperature change smoother. For example, if it is detected that the temperature on the left side of the circuit board is significantly lower than that on the right side, the system will lower the temperature of the heating zone on the right and increase the temperature of the heating zone on the left to make the temperature distribution of the entire circuit board more uniform.

[0108] During the adjustment process, the system uses a PID control algorithm to ensure stable and accurate temperature adjustments. The PID controller calculates the required heating power based on the deviation between the current and target temperatures and provides real-time feedback on the adjustment results. The system continuously monitors the thermal field distribution and optimizes and adjusts parameters based on the latest thermal field data until the thermal field adaptability reaches a satisfactory level. For example, the system may initially make small adjustments, then observe the thermal field trends and make further adjustments based on the feedback, forming a closed-loop control process.

[0109] The system also considers the timeliness and energy efficiency of adjustments. When making temperature-balancing adjustments, the system estimates the time and energy consumption required for the adjustments and compares them with the preset process requirements. If the adjustment time is too long or the energy consumption is too high, the system will appropriately relax the requirements of some non-critical indicators while ensuring baking quality, in order to achieve a balance between efficiency and quality. For example, in some cases, the system may allow the heat field coverage to be slightly less than 90%, but extend the baking time to ensure that the text area is fully cured.

[0110] Finally, based on the results of the temperature balance adjustment, the system generates single-stage second-stage temperature adjustment data. This data, which includes information such as the adjusted temperature parameters, heating power distribution, and adjustment time, is stored in a structured format and transmitted to the oven control system. Based on this data, the oven control system adjusts the operating status of the heating elements in real time to ensure that the circuit boards receive uniform and appropriate heat during the baking process, thereby improving the quality and consistency of the printed circuit board baking.

[0111] Throughout the entire implementation process, the system achieved optimized control of the single-stage baking process through high-precision temperature monitoring, detailed thermal field analysis, and precise temperature adjustment. This process does not rely on empirical data, but rather on real-time thermal field distribution and the physical characteristics of the circuit board. Decisions are made through scientific algorithms and logical reasoning, ensuring the stability and reliability of the baking process. Furthermore, the system's open design allows operators to adjust parameters and optimize strategies based on actual production needs, further enhancing the system's applicability and flexibility.

[0112] Example 4:

[0113] Based on the above overall solution, this embodiment provides a detailed description of the time-series temperature change trend prediction and temperature control process in step F3. When performing time-series temperature change trend prediction on the multi-stage thermal field fluctuation range data in step F31, the system first performs a data set partitioning operation. The multi-stage thermal field fluctuation range data includes the temperature fluctuation range, time series, and spatial distribution characteristics of each baking stage. The system randomly divides the data into a temperature change training set and a temperature change test set in a ratio of 7:3. The temporal sequence of the data is maintained during the partitioning process to avoid disrupting the temporal characteristics. Stratified sampling is also used to ensure that the training and test sets are evenly distributed in terms of dimensions such as temperature fluctuation amplitude and number of stages.

[0114] The system uses a convolutional neural network (CNN) algorithm to train a model on the temperature variation training set. The CNN model architecture consists of an input layer, two convolutional layers, a pooling layer, and a fully connected layer. The input layer receives normalized thermal field fluctuation data in the form of a three-dimensional tensor (time step × spatial dimension × fluctuation feature). The first convolutional layer uses 64 3×3 convolution kernels to extract local temperature fluctuation features through a sliding window; the second convolutional layer uses 128 3×3 convolution kernels to further capture high-level semantic features. The pooling layer uses a max pooling operation to reduce data dimensionality while retaining key features. The fully connected layer outputs predicted values ​​for the time series temperature variation trend through an activation function (such as ReLU), generating a multi-stage thermal field temperature variation prediction pre-model. The mean squared error (MSE) is used as the loss function during training, and the model parameters are optimized using the stochastic gradient descent (SGD) algorithm. The number of iterations is set to 500, and the batch size is 32.

[0115] After the model training is completed, the system uses the temperature change test set to test the multi-stage thermal field temperature change prediction pre-model iteratively. The test set data does not participate in the training process and is used to evaluate the generalization ability of the model. The system inputs the test set into the pre-model and calculates the root mean square error (RMSE) and the coefficient of determination (R 2 If RMSE is greater than a preset threshold (such as 5°C) or R 2 If the value is less than 0.85, the system automatically adjusts model parameters (such as increasing the number of convolutional layers and adjusting the learning rate), retrains and tests until the model performance indicators meet the requirements, and generates a multi-stage thermal field temperature change prediction model. This model can predict temperature change trends in each stage of the future based on historical thermal field fluctuation data, including the time of temperature peak, fluctuation amplitude, and stable range.

[0116] In step F313, the system imports the multi-stage thermal field fluctuation range data into the trained multi-stage thermal field temperature change prediction model. The model generates multi-stage temperature change prediction data through forward propagation calculations. The prediction data is presented as a time series, with each time point corresponding to a temperature prediction interval. For example, the temperature prediction at the 5th minute of the preheating phase is 82±3°C, and the temperature prediction at the 15th minute of the constant temperature phase is 148±5°C. This data includes the temperature mean, standard deviation, and confidence interval, providing probabilistic prediction support for subsequent temperature control.

[0117] In step F32, the system performs a multi-stage temperature intensity requirement analysis based on the multi-stage temperature change prediction data. This temperature intensity requirement analysis uses a real-time temperature response model of the circuit board's heat-sensitive areas, combined with the predicted temperature change trends, to calculate the required temperature intensity for each stage. For example, if the temperature is predicted to fall 10°C below the target value in the later stages of the constant temperature phase, the system determines that the temperature intensity needs to be increased to ensure sufficient ink curing. The temperature intensity requirement data is expressed as a power adjustment factor; for example, +15% indicates a 15% increase in heating power for that stage.

[0118] In step F33, the system dynamically controls the multi-stage initial temperature data based on the multi-stage temperature intensity demand data. The control process is implemented through a closed-loop feedback mechanism: first, a control instruction is generated according to the temperature intensity demand data (such as adjusting the voltage or current of the heating module); then, the control instruction is sent to the actuator of the tunnel oven (such as the electric heating tube, gas nozzle) to adjust the temperature setting value of each stage in real time. For example, if the temperature intensity demand in the constant temperature stage is +10%, the system adjusts the temperature setting value of this stage from 150°C to 165°C, and maintains the temperature stability through the PID controller. During the dynamic control process, the system continuously monitors the deviation between the actual temperature and the predicted temperature, and optimizes the control parameters through an adaptive filtering algorithm (such as Kalman filtering) to ensure the accuracy and timeliness of the temperature adjustment.

[0119] In step F34, the system constructs a baking mode temperature control strategy through multi-stage dynamic temperature control data and single-stage temperature adjustment data. For the single-stage baking mode, the control strategy is a fixed temperature curve adjusted based on the uniformity of the thermal field, including a temperature setting value, a holding time, and an allowable fluctuation range. For example, the single-stage temperature adjustment data is 125°C ± 5°C, and the holding time is 35 minutes. The strategy clearly requires that the oven temperature be maintained stably within this range. For the multi-stage baking mode, the control strategy is a staged dynamic temperature control table, and each stage corresponds to an independent temperature setting, control parameters, and conversion conditions. For example, the multi-stage dynamic temperature control data includes a preheating stage (80°C → 90°C, 10 minutes) and a constant temperature stage (150°C → 160°C, 25 minutes). The strategy stipulates that when the temperature in the preheating stage reaches 90°C and is maintained for 5 minutes, it automatically switches to the constant temperature stage.

[0120] During the control strategy development process, the system uses a state machine model to manage the baking mode. The state machine includes states such as "Initialization," "Preheat," "Constant Temperature," "Cooling," and "Completion," with transitions between states controlled by conditions such as temperature and time. For example, when a single-stage baking mode enters the "Hold" state, the system continuously monitors temperature feedback data. If temperature fluctuations exceed the allowable range, the temperature adjustment mechanism is triggered, re-entering the "Adjustment" sub-state until the temperature stabilizes. For multi-stage modes, the state machine sequentially activates the temperature control logic for each stage according to the stage sequence, ensuring that the baking process is executed according to the preset process.

[0121] The system also features control strategy visualization and editing. Operators can view multi-stage temperature change prediction curves, dynamic temperature control paths, and single-stage temperature adjustment ranges through the human-machine interface. They can also modify temperature setpoints, stage times, or fluctuation ranges by dragging and dropping. After the edited strategy is verified by the system (for example, checking whether temperature jumps exceed equipment limits), executable control code is automatically generated and downloaded to the oven control system for execution.

[0122] In terms of data transmission and processing, each step in step F3 interacts with each other via industrial Ethernet, using OPC UA as the communication protocol to ensure real-time and reliable data. A multi-stage thermal field temperature change prediction model is deployed on edge computing nodes, utilizing GPU accelerators to improve computational efficiency, keeping a single prediction time under 200ms. Temperature control commands are sent via a real-time operating system (RTOS), with response latency less than 50ms, meeting the real-time control requirements of the baking process.

[0123] Example 5:

[0124] The system is used to execute the above control method. Its hardware architecture and functional modules are closely coordinated. The specific implementation is as follows:

[0125] 1. System Hardware Architecture

[0126] Built on an industrial-grade control platform, the system primarily consists of three components: a data acquisition layer, a data processing layer, and a control execution layer. The data acquisition layer consists of industrial cameras (resolution ≥ 5 megapixels), K-type thermocouples (accuracy ±0.5°C), and thermal imagers (temperature resolution 0.1°C), among others, used to acquire circuit board images, real-time temperature data, and thermal field distribution, respectively. The data processing layer utilizes a high-performance industrial computer (CPU ≥ Intel i7, memory ≥ 16GB) equipped with a real-time operating system (RTOS) and a machine learning framework (such as TensorFlow), responsible for executing algorithms such as data preprocessing, feature modeling, and model training. The control execution layer includes the tunnel oven itself (equipped with a zoned heating module and air circulation system), servo motors (to control conveyor belt speed), and power regulation units (such as thyristor voltage regulators) to achieve temperature regulation and control of the baking process.

[0127] 2. Detailed design of functional modules

[0128] ①Baking pattern recognition module

[0129] This module automates the entire process, from collecting PCB information to confirming the baking mode. First, the industrial camera transmits the image of the PCB to be baked to the data processing layer via the GigE interface. The image preprocessing unit performs operations such as median filtering and histogram equalization (as shown in Formula 1) to eliminate noise and enhance the contrast of the text area:

[0130]

[0131] Where f(x,y) represents the pixel value of the original image at coordinate (x,y), G(x,y) is the normalized pixel value, and the pixel range is mapped to the 0, 255 interval through linear transformation.

[0132] The text region feature extraction unit uses a connected domain analysis algorithm to identify the text outline and calculate geometric features (such as area and center of gravity coordinates). Combined with the substrate's thermal conductivity (obtained through a table lookup, e.g., k = 0.2 W / m·K for FR-4 substrates), it generates thermally sensitive region data. The baking mode confirmation unit determines the mode type by comparing the baking intensity requirement D with a preset threshold T0 (e.g., T0 = 0.5), where D is a weighted calculation of the text coverage density ρ and the substrate's thermal conductivity k:

[0133] D=w1·ρ-w2·k

[0134] w1 and w2 are weight coefficients (e.g., w1 = 0.6, w2 = 0.4). When D>T0, the multi-stage mode is triggered, otherwise the single-stage mode is used.

[0135] ②Single-stage temperature control module

[0136] This module includes the initial parameter setting and thermal field uniformity adjustment functions. The initial temperature setting unit is based on the type of PCB substrate (such as aluminum substrate T init =130℃), text density (high density T init The thermal field uniformity adjustment unit collects feedback data through the temperature sensor network (deployment density ≥ 10 points / square decimeter) and calculates the temperature gradient.

[0137]

[0138] like Exceeding the threshold T th (such as T th =3°C / mm), the power regulation unit will compensate the heating module in the corresponding area (such as increasing the power by 10%); if it does not exceed, the temperature distribution will be adjusted according to the thermal field coverage C (effective thermal field area / total circuit board area) and the substrate adaptability S, and the balanced adjustment parameters will be generated through the fuzzy logic algorithm.

[0139] ③Multi-stage temperature control module

[0140] The time series temperature change prediction unit adopts the convolutional neural network (CNN) model, inputs multi-stage thermal field fluctuation data (time step = 5 minutes, spatial dimension = number of circuit board partitions), and outputs the temperature prediction interval [T min ,T max The model structure includes 2 convolution layers (convolution kernel 3×3, number of channels 64 / 128), 1 pooling layer (step size 2) and a fully connected layer, which is optimized by the mean square error (MSE) loss function. The temperature intensity demand analysis unit calculates the power adjustment coefficient α according to the prediction results (such as α=(T target -T pred ) / T target ×100%), driving the dynamic temperature control unit to adjust the temperature setpoints at each stage (e.g., from 80°C to 85°C during the preheating stage). The control strategy construction unit integrates the single-stage adjustment data with the multi-stage control data into a state machine model, defining the transition conditions for states such as "preheating → constant temperature → cooling" (e.g., maintaining a stable temperature for 5 minutes).

[0141] ④Feedback optimization module

[0142] This module realizes adaptive optimization of control strategies through real-time data collection and quality assessment. The temperature control feedback data set contains parameters such as temperature curve, thermal field distribution, and baking time. The quality assessment unit generates a quality score Q (0-100 points) through visual detection algorithms (such as OCR to recognize text clarity) and thermal deformation detection (such as laser rangefinder to measure warpage). The adaptive optimization unit adopts reinforcement learning algorithms (such as Q-Learning) to adjust the baking mode parameters (such as stage duration and temperature threshold) according to the quality score to generate a dynamic temperature control optimization strategy. During the optimization process, the system records historical strategies and corresponding quality scores, establishes an experience knowledge base, and supports rapid matching of similar process requirements.

[0143] 3. System Interaction and Expansion

[0144] Operators monitor real-time data through the HMI (human-machine interface), including thermal field distribution thermograms, temperature curves, and quality scores, and can manually adjust parameters (such as weight coefficient w1 and threshold T0). The system supports OPC UA protocol integration with the factory's MES system, enabling production data traceability and process parameter sharing. The hardware interface is compatible with a variety of heating modules (such as infrared lamps and hot air nozzles), and device compatibility is expanded through plug-and-play drivers.

[0145] Through multi-module collaboration and data closed-loop, the system realizes intelligent control of the entire process from circuit board feature recognition to baking strategy optimization, ensuring the consistency of text baking quality and process stability of different types of circuit boards.

[0146] It should be noted that, in this document, relational terms such as first and second, etc., are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the terms "comprises," "includes," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that includes a list of elements includes not only those elements but also other elements not explicitly listed, or elements inherent to such process, method, article, or apparatus.

[0147] While embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions, and variations may be made to these embodiments without departing from the principles and spirit of the invention, and that the scope of the invention is defined by the appended claims and their equivalents.

Claims

1. A circuit board text tunnel oven baking control method, characterized in that: The following steps are involved: F1: Acquire information data of the circuit board to be baked; perform text region feature modeling on the information data of the circuit board to be baked to generate circuit board text region feature data; determine the baking mode of the tunnel oven based on the circuit board text region feature data to obtain baking mode data, where the baking mode data includes a single-stage baking mode and a multi-stage baking mode; F2: Based on the single-stage baking mode, the initial temperature parameters of the circuit board information data to be baked are set to obtain the single-stage initial temperature data; the thermal field uniformity of the single-stage initial temperature data is adjusted to generate the single-stage temperature adjustment data; based on the multi-stage baking mode, the multi-stage temperature parameters of the circuit board information data to be baked are set to obtain the multi-stage initial temperature data; the thermal field fluctuation range of the multi-stage initial temperature data is analyzed to generate the multi-stage thermal field fluctuation range data; F3: Perform time-series temperature change trend prediction on multi-stage thermal field fluctuation range data to generate multi-stage temperature change prediction data; perform multi-stage dynamic temperature control on multi-stage initial temperature data based on the multi-stage temperature change prediction data to generate multi-stage dynamic temperature control data; construct a temperature control strategy for baking mode data using the multi-stage dynamic temperature control data and single-stage temperature adjustment data to generate a baking mode temperature control strategy; F4: Collect temperature control feedback data for the baking mode temperature control strategy to obtain a temperature control feedback dataset; perform baking quality evaluation on the temperature control feedback dataset to generate circuit board baking quality evaluation data; adaptively optimize the baking mode temperature control strategy based on the circuit board baking quality evaluation data to generate a dynamic temperature control optimization strategy.

2. A circuit board text tunnel oven baking control method according to claim 1, characterized in that: Step F1 includes: F11: Get the information data of the circuit board to be baked; F12: Preprocess the information data of the circuit board to be baked to generate standard circuit board information data. The data preprocessing includes image noise elimination, text area enhancement, edge sharpening and data normalization. F13: Extract text area features from standard circuit board information data to obtain circuit board text area feature data; model the circuit board's thermal sensitive area based on the text area feature data to generate circuit board thermal sensitive area data; F14: Confirm the baking mode of the tunnel oven according to the data of the heat-sensitive area of ​​the circuit board to obtain baking mode data, where the baking mode data includes single-stage baking mode and multi-stage baking mode.

3. A circuit board text tunnel oven baking control method according to claim 2, characterized in that: Step F14 includes: F141: Perform text coverage density analysis on the data of the heat-sensitive area of ​​the circuit board to generate text coverage density data; perform substrate thermal conductivity analysis on the data of the heat-sensitive area of ​​the circuit board to generate substrate thermal conductivity data; F142: Calculates baking intensity requirements based on text coverage density data and substrate thermal conductivity data to generate circuit board baking intensity requirement data; F143: Compare the circuit board baking intensity requirement data with the preset standard baking intensity threshold. If the circuit board baking intensity requirement data is greater than the preset standard baking intensity threshold, the tunnel oven is confirmed to be in a multi-stage baking mode and a multi-stage baking mode is generated. F144: When the circuit board baking intensity requirement data is less than or equal to the preset standard baking intensity threshold, the tunnel oven is confirmed to be in single-stage baking mode and a single-stage baking mode is generated; the multi-stage baking mode and the single-stage baking mode are integrated to generate baking mode data.

4. The circuit board text tunnel oven baking control method according to claim 1, characterized in that: Step F2 includes: F21: Set the initial temperature parameters for the circuit board to be baked based on the single-stage baking mode to obtain the single-stage initial temperature data; perform temperature feedback synchronization on the heat-sensitive area data of the circuit board based on the single-stage initial temperature data to generate temperature feedback data; F22: Use temperature feedback data to perform thermal field offset detection on the data of the heat-sensitive area of ​​the circuit board to generate thermal field offset detection data; use the thermal field offset detection data to perform single-stage temperature adjustment on the single-stage initial temperature data to generate single-stage temperature adjustment data; F23: Based on the multi-stage baking mode, multi-stage temperature parameter settings are performed on the information data of the circuit board to be baked to obtain multi-stage initial temperature data; based on the multi-stage initial temperature data, simulate baking the data of the heat-sensitive area of ​​the circuit board to generate multi-stage baking simulation data; F24: Perform thermal field aggregation point analysis on multi-stage baking simulation data to generate multi-stage thermal field aggregation points; perform thermal field fluctuation range analysis on multi-stage baking simulation data based on multi-stage thermal field aggregation points to generate multi-stage thermal field fluctuation range data.

5. A circuit board text tunnel oven baking control method according to claim 4, characterized in that: Step F22 includes: F221: Use temperature feedback data to perform dynamic thermal field data screening on the thermally sensitive area of ​​the circuit board to obtain dynamic thermal field data; F222: Compare the temperature gradients of the dynamic thermal field data and the data of the heat-sensitive area of ​​the circuit board to generate thermal field temperature gradient data; confirm the thermal field offset of the temperature feedback data based on the thermal field temperature gradient data to obtain thermal field offset detection data; F223: Performing offset threshold determination on the thermal field offset detection data. When the thermal field offset detection data exceeds the preset offset threshold, temperature compensation is performed on the single-stage initial temperature data according to the thermal field offset detection data to generate single-stage first temperature adjustment data. F224: When the thermal field offset detection data does not exceed the preset offset threshold, the temperature feedback data is subjected to thermal field distribution morphology analysis based on the thermal field offset detection data to generate thermal field distribution morphology data; the single-stage initial temperature data is subjected to temperature balance adjustment based on the thermal field distribution morphology data to generate single-stage second temperature adjustment data; F225: Integrate the single-stage first temperature adjustment data and the single-stage second temperature adjustment data to generate single-stage temperature adjustment data.

6. A circuit board text tunnel oven baking control method according to claim 5, characterized in that: Step F224 includes: When the thermal field offset detection data does not exceed the preset offset threshold, the temperature feedback data is subjected to thermal field distribution key feature extraction to obtain thermal field distribution key feature data, wherein the key feature extraction includes temperature gradient distribution extraction, high temperature area extraction and low temperature stagnation point extraction; Perform thermal field contact surface analysis on the thermal field offset detection data based on the thermal field distribution key feature data to generate thermal field contact surface data; perform thermal field coverage calculation on the thermal field distribution key feature data based on the thermal field contact surface data to obtain thermal field coverage data; Thermal field distribution morphology analysis is performed based on thermal field contact surface data and thermal field coverage data to generate thermal field distribution morphology data; thermal field-substrate compatibility is calculated based on thermal field distribution morphology data and circuit board thermal sensitive area data to obtain thermal field compatibility data; The single-stage initial temperature data is subjected to temperature balance adjustment based on the thermal field adaptability data to generate single-stage second temperature adjustment data.

7. The circuit board text tunnel oven baking control method according to claim 4, characterized in that: Step F24 includes: F241: Extracting temperature application data of each stage from multi-stage baking simulation data to obtain stage temperature application data; marking thermal field regions of the multi-stage baking simulation data based on the stage temperature application data to generate thermal field region marking data; F242: Calculate the regional temperature peak value of the thermal field area marking data to generate regional temperature peak data; identify the thermal field convergence point of the stage temperature application data based on the regional temperature peak data to generate multi-stage thermal field convergence points; F243: Mark the high-temperature concentrated area of ​​the thermal field area marking data based on the multi-stage thermal field aggregation points to generate the high-temperature concentrated area; perform multi-stage temperature gradient analysis on the high-temperature concentrated area to generate a stage temperature gradient map; extract the temperature change amplitude from the stage temperature gradient map to obtain the stage temperature change amplitude data; F244: Use the stage temperature variation amplitude data to calculate the multi-stage thermal field fluctuation range of the multi-stage baking simulation data and generate the multi-stage thermal field fluctuation range data.

8. The circuit board text tunnel oven baking control method according to claim 1, characterized in that: Step F3 includes: F31: Predict the time series temperature change trend of multi-stage thermal field fluctuation range data and generate multi-stage temperature change prediction data; F32: Perform multi-stage temperature intensity demand analysis based on multi-stage temperature change prediction data to generate multi-stage temperature intensity demand data; F33: Perform multi-stage dynamic temperature control on multi-stage initial temperature data based on multi-stage temperature intensity demand data to generate multi-stage dynamic temperature control data; F34: Construct a temperature control strategy for the baking mode data using multi-stage dynamic temperature control data and single-stage temperature adjustment data to generate a baking mode temperature control strategy.

9. A circuit board text tunnel oven baking control method according to claim 8, characterized in that: Step F31 includes: F311: Divide the data set of multi-stage thermal field fluctuation range data to generate temperature change training set and temperature change test set; use the convolutional neural network algorithm to train the temperature change training set model to generate a multi-stage thermal field temperature change prediction pre-model; F312: Perform model testing iterations on the multi-stage thermal field temperature change prediction pre-model using the temperature change test set to generate a multi-stage thermal field temperature change prediction model; F313: Import the multi-stage thermal field fluctuation range data into the multi-stage thermal field temperature change prediction model to perform time series temperature change trend prediction and generate multi-stage temperature change prediction data.

10. A circuit board text tunnel oven baking system, characterized in that: The system is used to execute the circuit board text tunnel oven baking control method according to claim 1, comprising: The baking mode recognition module is used to obtain information data of the circuit board to be baked; perform text area feature modeling on the information data of the circuit board to be baked to generate circuit board text area feature data; confirm the baking mode of the tunnel oven based on the circuit board text area feature data to obtain baking mode data; The single-stage temperature adjustment module is used to set the initial temperature parameters of the circuit board information data to be baked based on the single-stage baking mode to obtain the single-stage initial temperature data; adjust the thermal field uniformity of the single-stage initial temperature data to generate the single-stage temperature adjustment data; set the multi-stage temperature parameters of the circuit board information data to be baked based on the multi-stage baking mode to obtain the multi-stage initial temperature data; perform thermal field fluctuation range analysis on the multi-stage initial temperature data to generate the multi-stage thermal field fluctuation range data; The multi-stage temperature control module is used to predict the time-series temperature change trend of the multi-stage thermal field fluctuation range data and generate multi-stage temperature change prediction data; perform multi-stage dynamic temperature control on the multi-stage initial temperature data based on the multi-stage temperature change prediction data and generate multi-stage dynamic temperature control data; construct a temperature control strategy for the baking mode data using the multi-stage dynamic temperature control data and the single-stage temperature adjustment data to generate the baking mode temperature control strategy; The feedback optimization module is used to collect temperature control feedback data for the baking mode temperature control strategy to obtain a temperature control feedback data set; perform baking quality evaluation on the temperature control feedback data set to generate circuit board baking quality evaluation data; and adaptively optimize the baking mode temperature control strategy based on the circuit board baking quality evaluation data to generate a dynamic temperature control optimization strategy to execute the circuit board baking operation.

Images