Stability evaluation method based on common bus direct current interconnection system

Abstract

A stability evaluation method based on a common-bus DC interconnection system belongs to the technical field of DC interconnection system stability determination, and comprises the following steps: step 1, constructing an input impedance model and a transmission line impedance model of a voltage and current double-loop constant power regulation module; step 2, establishing a common bus direct current network impedance comprehensive model containing a load line; and 3, analyzing the mutual relation between the output impedance ZLRC (s) of the multi-machine DC voltage regulation module and the load input total impedance ZPOL (s) to judge the stable state of the system. The method is suitable for the direct current interconnection system, and can effectively prevent the stability problem possibly caused by the constant power module during the bus integration of the direct current system.

Description

Technical Field

[0001] The present invention belongs to the technical field of stability determination of a DC interconnected system, and in particular relates to a stability assessment method based on a busbar DC interconnected system. Background Art

[0002] With the continued growth in demand for renewable energy grid integration, clean energy sources such as photovoltaic power generation, wind power generation, and energy storage systems are experiencing explosive growth, and end-user electricity demand is becoming increasingly diversified. The emergence of new loads, such as DC power supply equipment and frequency conversion devices, has placed higher demands on power supply stability. Consumers are increasingly demanding shorter outages, improved voltage quality, and guaranteed high-quality power supply. Furthermore, with the advancement of intelligent systems, the demand for data monitoring, information processing, and communication transmission has increased significantly. The demand for power supply capacity continues to expand, and the contradiction between limited line channel resources and limited power supply distances has become increasingly prominent. This is particularly evident due to the surge in new energy power generation equipment and diversified power loads.

[0003] DC grid interconnection technology, with its advantages such as ease of integration of renewable energy, compatibility with diverse load types, flexible regulation, and excellent power supply quality, is an ideal solution to these challenges. In a DC interconnected system, bus voltage stability is the sole metric for assessing system operational status. Unlike AC systems, DC interconnected systems exhibit low inertia and weak damping due to the large number of power electronic devices connected. These systems lack the strong inertial support elements of synchronous generators found in AC systems, making them susceptible to stability issues due to insufficient damping.

[0004] Renewable energy generation equipment (such as photovoltaic and wind power), energy storage systems, various loads, and AC power grids can all be directly connected to the DC interconnection bus through corresponding power electronic converters. At the same time, each sub-region (including distributed power sources, energy storage devices, and AC and DC loads) can be integrated into a DC or AC microgrid, and then connected to the main DC bus through a power electronic interface. When the renewable energy generation and energy storage output of the sub-region microgrid cannot meet the local load demand, the main DC bus will transmit electricity to it; conversely, when the sub-region has excess power generation, the excess electricity will be fed back to the DC bus. This two-way energy flow mechanism gives the system greater flexibility, reliability, and operational efficiency.

[0005] In summary, in the context of large-scale access to distributed energy, in order to ensure the stable operation of the DC interconnected system and achieve high-reliability power supply, it is urgent to establish a stability assessment method based on the common bus DC interconnected system to provide a theoretical basis and technical support for system design and operation. Summary of the Invention

[0006] The technical problem to be solved by the present invention is to provide a stability assessment method based on a common bus DC interconnection system, which is applicable to the DC interconnection system and can effectively prevent stability problems that may be caused by constant power modules when integrated into the DC system bus.

[0007] A stability assessment method based on a common bus DC interconnection system includes the following steps, which are performed in sequence:

[0008] Step 1: Construct the input impedance model and transmission line impedance model of the voltage and current dual-loop constant power regulation module;

[0009] Step 2: Establish a comprehensive impedance model of the common bus DC network including the load line;

[0010] Step 3: Analyze the output impedance Z of the multi-machine DC voltage regulation module LRC (s) and the total load input impedance Z POL (s) to determine the system stability state.

[0011] The voltage-current dual-loop constant power regulation module in step 1 includes a current loop control unit and a voltage loop control unit. The current loop control unit uses the inductor current as the inner loop control variable, and adds a limiting link at the output end of the inner loop to constrain the current amplitude of the filter inductor and provide overcurrent protection for the converter; the voltage loop control unit uses voltage instantaneous value control to adjust the instantaneous state of the capacitor voltage in real time.

[0012] The input impedance model of the voltage and current dual-loop constant power regulation module in step 1 is obtained by the switch impedance average value model Z dCPL (s) Construction, Z dCPL The mathematical expression of (s) is:

[0013]

[0014] Where: V inCPL 、V CPL 、i inCPL 、i LCPL 、i CPL Respectively represent the input voltage, output voltage, input current, inductor current, and output current of the constant power control unit; R LRC 、C CPL , L CPL They represent the load impedance value on the low-voltage side of the constant power regulation module, the voltage stabilizing capacitor and the filter inductor on the outlet side respectively; k P_vCPL 、k P_iCPL k is the proportional coefficient and integral coefficient of the voltage loop adjustment parameters; i_vCPL 、k i_iCPL The proportional coefficient and integral coefficient of the current loop adjustment parameters; d dCPLrepresents the overall control variable of the dual-loop constant power regulation module; s represents the complex frequency; G VCPL (s) represents the transfer function of the constant power control unit.

[0015] The transmission line impedance model described in step 1 adopts a simplified π-type equivalent circuit structure, and the line impedance Z line (s) is determined by the inductance L Line and resistor R Line Determine, the mathematical expression is: Z line (s)=L line s+R line .

[0016] The parameters of the common bus DC network impedance comprehensive model in step 2 include: Z outx (s) represents the output impedance characteristic of the xth DC voltage regulator, Z LRC (s) represents the equivalent output total impedance characteristic of the source side system, Z CPLy (s) is the input impedance characteristic of the y-th voltage single-loop constant power regulator, Z POLy (s) is the input impedance characteristic of the improved constant power regulation module considering the influence of the load line, Z POL (s) represents the total input impedance characteristic of the load system; establish the equivalent total output impedance Z of the source side system LRC The mathematical model of (s) is: LRC (s)=Z out1 (s)||Z out2 (s)||…Z outx (s); Using the state variable equivalent transformation technology of multiple DC voltage regulators dynamically coupled, a reduced-order equivalent model of a single DC voltage regulator is constructed:

[0017]

[0018] Where: V s Indicates the equivalent input voltage, Z outeq (s) represents the equivalent input impedance characteristic, V seq is the input voltage of the equivalent model, C seq and L seq They represent the parameters of the equivalent voltage stabilizing capacitor and filter inductor at the outlet side respectively; k P_veq and k P_ieq Represent the proportional coefficients of the equivalent voltage loop and current loop, k i_veq and k i_ieq Represent the integral coefficients of the equivalent voltage loop and current loop respectively.

[0019] The total load input impedance Z in step 3 POL (s) is: Z POL (s)=Z POL1(s)||Z POL1 (s)||...Z POLy (s);

[0020] Where, the output impedance Z POLy (s) is:

[0021]

[0022] C inCPL (s) is the input filter capacitor of the constant power regulator, Z liney (s) is the line impedance.

[0023] The stability assessment method based on a common bus DC interconnection system according to claim 1 is characterized in that: in step 3, the system stability state is determined by the source-to-load impedance ratio T o (s)=Z LRC (s) / Z POL (s) evaluation, when T o (s) When the Nyquist stability condition is met, the system is in a stable working state.

[0024] Through the above design scheme, the present invention can bring the following beneficial effects: a stability assessment method based on a common bus DC interconnection system can effectively prevent stability problems that may be caused by constant power modules when integrated into the DC system bus. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] The present invention will be further described below with reference to the accompanying drawings and specific embodiments:

[0026] Figure 1 This is a control block diagram of a voltage-current dual-loop negative constant power control unit according to a specific embodiment of the present invention.

[0027] Figure 2 This is a line impedance model for a specific embodiment of the present invention.

[0028] Figure 3 This is a small signal impedance diagram of a common bus DC system according to a specific embodiment of the present invention.

[0029] Figure 4 This is a Thevenin equivalent circuit topology structure of a common bus DC system circuit in a specific embodiment of the present invention.

[0030] Figure 5 This is a circuit topology structure of a common bus DC system according to a specific embodiment of the present invention.

[0031] Figure 6 The impedance Z of the voltage single-loop constant power control unit is a specific embodiment of the present invention. CPLy (s) logarithmic frequency characteristic curve.

[0032] Figure 7 This is a frequency domain analysis diagram of the system according to a specific embodiment of the present invention.

[0033] Figure 8 This is a scenario where the specific implementation of the present invention does not meet the self-stability criterion of the load subsystem control bandwidth. DETAILED DESCRIPTION

[0034] The stability assessment method based on a common bus DC interconnection system proposed by the present invention will be described in detail below with reference to the accompanying drawings and specific implementations.

[0035] (1) Construct the input impedance model and transmission line impedance model of the voltage-current dual-loop constant power regulation module.

[0036] The voltage and current dual-loop regulation strategy is divided into inner and outer loop control. The inductor current is used as the inner loop control variable. By adding a limiter link at the output end of the inner loop, the current amplitude of the filter inductor can be effectively constrained, thereby providing reliable overcurrent protection for the converter. The outer loop adopts a voltage instantaneous value control scheme to adjust the instantaneous state of the capacitor voltage in real time, which can significantly improve the waveform quality and regulation accuracy of the output voltage. The switch model control structure of the constant power regulation module is shown in the attached figure. Figure 1 As shown, the voltage loop adjustment parameter is determined by the proportional coefficient k P_vCPL and the integral coefficient k P_iCPL The current loop adjustment parameter is composed of the proportional coefficient k i_vCPL and the integral coefficient k i_iCPL Composition, d dCPL Represents the overall control variable of the dual-loop constant power regulation module.

[0037] According to the attached Figure 1 , the switch impedance average value model of the voltage and current dual-loop constant power regulation module can be established as shown in the following formula:

[0038]

[0039] By applying small signal perturbations to the above equation and performing linearization, the corresponding small signal equivalent model can be obtained:

[0040]

[0041] Input impedance Z of voltage single-loop control structure dCPL (s) essentially characterizes ΔV inCPL and Δi CPL The transfer relationship between them, so ΔV CPLref The reference voltage perturbation is set to zero, and Z can be derived dCPL (s) is as follows:

[0042]

[0043] Where V inCPL 、V CPL 、i inCPL 、i LCPL 、i CPL Respectively represent the input voltage, output voltage, input current, inductor current, and output current of the constant power control unit; R LRC 、C CPL , L CPL They represent the load impedance value on the low-voltage side of the constant power regulation module, the voltage stabilizing capacitor and the filter inductor on the outlet side respectively;

[0044] The line circuit topology is as shown in the attached Figure 2 As shown, a simplified π-type equivalent circuit structure is adopted, where L Line 、C Line and R Line are line inductance, distributed capacitance and line resistance respectively. Considering that the influence of distributed capacitance is small in actual engineering, it can be ignored in modeling. At this time, the line impedance Z line (s) is mainly composed of inductance L Line and resistor R Line Decide.

[0045] By the attached Figure 2 It can be obtained that the line impedance Z line The expression of (s) is:

[0046] Z line (s)=L line s+R line

[0047] (2) Establish a comprehensive impedance model of the common bus DC network including the load lines.

[0048] Attachment Figure 3 is the impedance diagram of the common bus DC system. In the figure, Z outx (s) represents the output impedance characteristic of the xth DC voltage regulator, Z LRC (s) represents the equivalent output total impedance characteristic of the source side system, Z CPLy (s) corresponds to the input impedance characteristic of the y-th voltage single-loop constant power regulator, Z POLy (s) is the input impedance characteristic of the improved constant power regulation module considering the influence of the load line, Z POL (s) represents the total input impedance characteristic of the load system. Figure 3 Simplified to the Thevenin equivalent circuit model, as shown in the attached Figure 4 shown.

[0049] By the attached Figure 4 The circuit topology of the common bus DC system shows that the equivalent output total impedance Z of the source side system is LRC The expression of (s) is:

[0050] Z LRC (s)=Z out1 (s)||Z out2 (s)||…Z outx (s)

[0051] Since the source side has multiple DC voltage regulators with high order, the mechanism analysis is more complicated. In order to simplify the complexity of DC interconnected system stability analysis and to clearly demonstrate the abnormal instability phenomenon of the system, a reduced-order equivalent model of a single-machine DC voltage regulator is constructed based on the state variable equivalent transformation technology of the dynamic coupling of multiple DC voltage regulators. The circuit topology of the common bus DC system based on the equivalent single-machine DC voltage regulator is shown in the attached figure. Figure 5 As shown. Where V s Indicates the equivalent input voltage, Z outeq (s) represents the equivalent input impedance characteristic, and Z outeq (s) is expressed as follows:

[0052]

[0053] Among them, V seq is the input voltage of the equivalent model, C seq and L seq Respectively represent the parameters of the equivalent voltage stabilizing capacitor and filter inductor at the outlet side. In terms of control parameters, k P_veq and k P_ieq Represent the proportional coefficients of the equivalent voltage loop and current loop, k i_veq and k i_ieq They represent the integral coefficients of the equivalent voltage loop and current loop respectively. Assume that p x is the power sharing coefficient of the xth DC voltage regulator, then there must be Σp x =1, then the relationship between the circuit parameters and control parameters of the equivalent single-machine DC voltage regulator and each DC voltage regulator is shown in the following formula.

[0054]

[0055] (3) Analyze the output impedance Z of the multi-machine DC voltage regulation module LRC (s) and the total load input impedance Z POL (s) to determine the system stability state.

[0056] Based on the modeling analysis in step 2, the total impedance of the source side system Z LRC (s) and the equivalent single-machine impedance Z outeq (s) has an equivalence relation, namely, Z LRC (s)=Z outeq(s). Therefore, the impedance expression derived in step 2 can be directly applied to obtain the total output impedance Z of the system considering the multi-machine coupling effect. LRC (s). At the same time, for the yth voltage single-loop constant power regulator with load circuit, its output impedance Z POLy (s) can be expressed as:

[0057]

[0058] Among them C inCPL (s) is the input filter capacitor of the constant power regulator, and Z POL1 (s), Z POL2 (s)…Z POLy (s) in parallel, the total load input impedance Z can be calculated POL (s) is:

[0059] Z POL (s)=Z POL1 (s)||Z POL1 (s)||...Z POLy (s)

[0060] The system stability can be determined by the source-to-load impedance ratio T o (s)=Z LRC (s) / Z POL (s) to evaluate, when T o (s) When the Nyquist stability condition is met, the system is in a stable working state. Figure 6 The input impedance Z of the voltage single-loop constant power regulator is shown CPLy (s) logarithmic frequency characteristic curve.

[0061] In the frequency characteristic analysis, f CPLy Defined as the critical point of the control bandwidth of the yth regulating unit, its phase response is -90°. At this time, the impedance characteristics meet the following requirements:

[0062] Real(Z CPLy (2πjf CPLy ))=0

[0063] In the formula, Real means taking the real part operation, where f CPLy The expression can be expressed as:

[0064]

[0065] By the attached Figure 6 It can be seen that under DC conditions (f = 0), the impedance presents a negative resistance characteristic, and its value is -V2 inCPL y / P CPLy (P CPLyis the rated power of the yth regulating unit); in the low frequency band (f <f CPL ), the impedance mainly shows capacitive characteristics, the phase lag exceeds -90°, and it still maintains negative resistance characteristics; in the high frequency band (f>f CPLy ), the impedance becomes inductive and the phase leads -90°. At this time, the impedance presents a positive resistance characteristic.

[0066] Based on this impedance characteristic analysis, the present invention establishes a system stability criterion based on control bandwidth, which can effectively predict the abnormal instability phenomenon that may occur when the y-th single-loop voltage regulator is connected to the common bus system. The mathematical expression of the stability criterion is:

[0067] f CPLy <f liney

[0068] When the control bandwidth of the yth regulating unit and the line resonant frequency satisfy the above relationship, the system meets the Nyquist stability requirements and can maintain stable operation.

[0069] In order to verify the effectiveness of the stability determination method based on the common bus DC system impedance model proposed in the present invention, the multi-converter DC system switch model built on the RT-BOX hardware-in-the-loop experimental platform is used to verify the proposed stability determination method based on the common bus DC system impedance model. Some theoretical analysis and experimental results are as follows: The constant power control unit 1 is based on the power P CPL1 =300kW supplies power to the DC load, and the constant power control unit 2 uses power P CPL2 = 180kW supplies power to DC load, constant power control unit 2P at a certain moment CPL2 Increased from 180kW to 200kW.

[0070] The bandwidth of the constant power control unit 1 is f CPL1 =200Hz, LC oscillation frequency f line1 =237Hz, f CPL1 <f line1 (Satisfy the load subsystem control bandwidth self-stability criterion. The constant power control unit 2 is connected to the common bus DC system through the line, f line2 ≈193Hz. The switching frequency of the constant power control unit 2 is 10kHz. Figure 7 The system frequency domain analysis diagram shows that the initial control bandwidth f of the constant power control unit 2 is CPL2 is 760Hz(f line2 <f CPL2 ), does not meet the load subsystem control bandwidth self-stability criterion. CPL2 =760Hz, Z CPL2 (s) The phase angle at the oscillation frequency is less than -90°, Z POL2(s) A phase angle mutation occurred at the oscillation frequency, indicating that Z POL2 (s) The resistance value at the oscillation frequency is negative, which worsens the damping of the system and causes G V-Vref (s) shows an excessive oscillation peak, and the impedance ratio T o The Nyquist curve of (s) contains the point (-1, j0), and the system loses stability. The experimental results are shown in the attached figure. Figure 8 As shown in Figure 1, when a power step occurs, the DC bus voltage oscillates and becomes unstable.

[0071] In summary, the stability assessment method based on the common bus DC interconnection system proposed in the present invention can effectively prevent the stability problems that may be caused by the constant power module when the DC system bus is integrated. Finally, it should be noted that the above embodiments are only used to illustrate the technical solution of the present invention and not to limit it. Although the present invention has been described in detail with reference to the above embodiments, ordinary technicians in the relevant field should understand that the specific implementation methods of the present invention can still be modified or replaced by equivalents, and any modifications or equivalent replacements that do not depart from the spirit and scope of the present invention should be covered within the scope of protection of the claims of the present invention.

Claims

1. A stability assessment method for a common bus DC interconnected system, characterized by: The process includes the following steps, which are performed in sequence: Step 1: Construct the input impedance model and transmission line impedance model of the voltage and current dual-loop constant power regulation module; Step 2: Establish a comprehensive impedance model of the common bus DC network including the load line; Step 3: Analyze the output impedance Z of the multi-machine DC voltage regulation module LRC (s) and the total load input impedance Z POL (s) to determine the system stability state.

2. The stability assessment method based on a common bus DC interconnection system according to claim 1 is characterized by: The voltage-current dual-loop constant power regulation module in step 1 includes a current loop control unit and a voltage loop control unit. The current loop control unit uses the inductor current as the inner loop control variable, and adds a limiting link at the output end of the inner loop to constrain the current amplitude of the filter inductor and provide overcurrent protection for the converter; the voltage loop control unit uses voltage instantaneous value control to adjust the instantaneous state of the capacitor voltage in real time.

3. The stability assessment method based on a common bus DC interconnection system according to claim 1 is characterized by: The input impedance model of the voltage and current dual-loop constant power regulation module in step 1 is obtained by the switch impedance average value model Z dCPL (s) Construction, Z dCPL The mathematical expression of (s) is: Where: V inCPL 、V CPL 、i inCPL 、i LCPL 、i CPL Respectively represent the input voltage, output voltage, input current, inductor current, and output current of the constant power control unit; R LRC 、C CPL , L CPL Respectively represent the load impedance value of the low-voltage side, the voltage stabilizing capacitor and the filter inductor on the outlet side; k P_vCPL 、k P_iCPL k is the proportional coefficient and integral coefficient of the voltage loop adjustment parameters; i_vCPL 、k i_iCPL The proportional coefficient and integral coefficient of the current loop adjustment parameters; d dCPL represents the overall control variable of the dual-loop constant power regulation module; s represents the complex frequency; G VCPL (s) represents the transfer function of the constant power control unit.

4. The stability assessment method based on a common bus DC interconnection system according to claim 1 is characterized by the following steps: The transmission line impedance model adopts a simplified π-type equivalent circuit structure, and the line impedance Z line (s) is determined by the inductance L Line and resistor R Line Determine, the mathematical expression is: Z line (s)=L line s+R line .

5. The stability assessment method based on a common bus DC interconnection system according to claim 1 is characterized by: The parameters of the common bus DC network impedance comprehensive model in step 2 include: Z outx (s) represents the output impedance characteristic of the xth DC voltage regulator, Z LRC (s) represents the equivalent output total impedance characteristic of the source side system, Z CPLy (s) is the input impedance characteristic of the y-th voltage single-loop constant power regulator, Z POLy (s) is the input impedance characteristic of the improved constant power regulation module considering the influence of the load line, Z POL (s) represents the total input impedance characteristic of the load system; establish the equivalent total output impedance Z of the source side system LRC The mathematical model of (s) is: LRC (s)=Z out1 (s)||Z out2 (s)||…Z outx (s); Using the state variable equivalent transformation technology of multiple DC voltage regulators dynamically coupled, a reduced-order equivalent model of a single DC voltage regulator is constructed: Where: V s Indicates the equivalent input voltage, Z outeq (s) represents the equivalent input impedance characteristic, V seq is the input voltage of the equivalent model, C seq and L seq They represent the parameters of the equivalent voltage stabilizing capacitor and filter inductor at the outlet side respectively; k P_veq and k P_ieq Represent the proportional coefficients of the equivalent voltage loop and current loop, k i_veq and k i_ieq Represent the integral coefficients of the equivalent voltage loop and current loop respectively.

6. The stability assessment method based on a common bus DC interconnection system according to claim 1, characterized in that: The total load input impedance Z in step 3 POL (s) is: Z POL (s)=Z POL1 (s)||Z POL1 (s)||…Z POLy (s); Where, the output impedance Z POLy (s) is: C inCPL (s) is the input filter capacitor of the constant power regulator, Z liney (s) is the line impedance.

7. The stability assessment method based on a common bus DC interconnection system according to claim 1 is characterized by: The system stable state described in step 3 is determined by the source-to-load impedance ratio T o (s)=Z LRC (s) / Z POL (s) evaluation, when T o (s) When the Nyquist stability condition is met, the system is in a stable working state.

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