Improved etch selectivity using halides

Abstract

A method includes performing a dry etch process to remove a portion of a first layer disposed on a second layer of an alternating layer stack. The first layer includes a first material and the second layer includes a second material different from the first material, and the dry etch process forms a passivation layer including by-products on a surface of the second material. An amount of the first material of the portion of the first layer remains after performing the dry etch process. The method further includes introducing a halide gas to modify the passivation layer on the surface of the second material.

Description

Technical Field

[0001] Embodiments of the present disclosure generally relate to electronic component manufacturing. In particular, embodiments of the present disclosure relate to implementing improved etch selectivity using halides during electronic component manufacturing. Background Art

[0002] Electronic component manufacturing equipment may include multiple chambers, such as processing chambers and load lock chambers. Such electronic component manufacturing equipment may use robotic equipment in a transfer chamber that is configured to transport substrates between multiple chambers. In some cases, multiple substrates are transferred together. The processing chamber may be used in the electronic component manufacturing equipment to perform one or more processes on the substrate, such as a deposition process and an etching process. For many processes, gas flows into the processing chamber. Electronic components (such as semiconductor components) are manufactured by performing a series of operations, which may include deposition, oxidation, photolithography, ion implantation, etching, etc. to form many patterned layers. Summary of the Invention

[0003] According to one embodiment, a method is provided. The method includes performing a dry etching process to remove a portion of a first layer disposed on a second layer of an alternating layer stack. The first layer includes a first material and the second layer includes a second material different from the first material, and the dry etching process forms a passivation layer including byproducts on a surface of the second material. A certain amount of the first material remains in the portion of the first layer after performing the dry etching process. The method further includes introducing a halide gas to modify the passivation layer.

[0004] According to one embodiment, a method is provided. The method includes forming a staircase structure of an electronic component from a base structure including an etching mask disposed on an alternating layer stack. The alternating layer stack includes a first layer including a first material disposed on a second layer including a second material different from the first material. Forming the staircase structure includes performing a first dry etching step to remove a portion of the first layer from a region, and performing a second dry etching step to remove a remaining portion of the first layer from the region. Performing the second dry etching step includes performing a dry etching process to form a passivation layer including byproducts on a surface of the second material, and introducing a halide gas to modify the passivation layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0005] The present disclosure is illustrated by way of example and not limitation in the accompanying drawings in which like references indicate similar elements. It should be noted that in this disclosure, different references to "an" or "one" embodiment are not necessarily to the same embodiment, and such references mean at least one.

[0006] Figure 1A to Figure 1Bis a diagram illustrating a cross-sectional view of forming an electronic component using halides to implement improved etch selectivity, according to some embodiments.

[0007] Figures 2A to 2B is a diagram illustrating a cross-sectional view of an example method for implementing improved etch selectivity using halides, according to some embodiments.

[0008] Figures 3 to 4B is a flow chart of an example method for implementing improved etch selectivity using halides, according to some embodiments.

[0009] Figures 5A to 5C is a table illustrating example etch process windows according to some embodiments.

[0010] Figure 6 is a diagram illustrating a top-down view of an example process for implementing improved etch selectivity using halides, according to some embodiments. DETAILED DESCRIPTION

[0011] Embodiments described herein relate to improving etch selectivity using halides during electronic component manufacturing. Etching generally refers to the process of chemically removing layers from a substrate during electronic component manufacturing. More specifically, one or more etch masks can be used to protect one or more areas during the etching process, thereby allowing etching of exposed areas during the etching process. Examples of masks include soft masks (e.g., photoresists) and hard masks (e.g., silicon nitride (SiN) hard masks). For example, etching can be performed after patterning a surface using a lithographic process.

[0012] One type of etching process is a wet etching process. A wet etching process is an etching process that uses a wet etchant (i.e., a liquid phase etchant). More specifically, a wet etching process can be performed by placing the substrate in a wet etchant bath. A wet etching process can be isotropic or anisotropic. An isotropic etching process is an etching process in which the etching rate in the vertical direction is approximately equal to the etching rate in the lateral direction.

[0013] Another type of etching process is a dry etching process. A dry etching process is an etching process that uses a dry etchant (i.e., a plasma-phase etchant). More specifically, a dry etching process can be performed using a plasma etchant that includes a gas that can generate a plasma. The plasma then generates particles (e.g., free radicals) that can react with the exposed surface of the substrate. Many plasma etchants include chlorine (Cl) and / or fluorine (F). Therefore, the gas etchant can be selected depending on the material to be etched. Examples of plasma etchants that can be used to etch aluminum (Al) include chlorine (Cl2), carbon tetrachloride (tetrachloromethane) (CCl4), silicon tetrachloride (tetrachlorosilane) (SiCl4), boron trichloride (BCl3), etc. Examples of plasma etchants that can be used to etch silicon (Si) include Cl2, CCl4, dichlorodifluoromethane (CCl2F2), sulfur hexafluoride (SF6), nitrogen trifluoride (NF3), etc. Examples of plasma etchants that can be used to etch silicon dioxide (SiO2) and silicon nitride (Si3N4) include CHF3, CF4, SF6, NF3, etc. Examples of dry etching processes include plasma etching, ion milling, reactive ion etching (RIE), etc. Different etching processes can be performed using different etching process parameters (such as pressure). For example, plasma etching can be performed at a higher pressure than RIE, and RIE can be performed at a higher pressure than ion milling.

[0014] The etch rate of a material generally refers to how quickly the material is removed when exposed to a particular etchant. For example, the etch rate can be expressed as a ratio of length to time (e.g., nanometers (nm) / minute (min)). Etch selectivity generally refers to the ratio of etch rates between materials exposed to the same etchant. In an example, for material X having an etch rate of etch rate 1 and material Y having an etch rate of etch rate 2, the etch selectivity can be defined as etch rate 1 / etch rate 2. More specifically, in this example, material X has a selectivity of etch rate 1 / etch rate 2 relative to material Y.

[0015] Some electronic components may include a staircase structure formed by etching corresponding portions of an alternating layer stack for a corresponding number of etching cycles. The staircase structure may include a number of steps, where each step corresponds to a corresponding contact point. Examples of electronic components that may include a staircase structure include memory devices, and more specifically, three-dimensional (3D) memory devices. One example of a memory device that may include a staircase structure is a 3D dynamic random access memory (DRAM) device.

[0016] In an example, the stack can include alternating Si layers and silicon germanium (SiGe) layers. Using some etching processes, preferential etching of Si relative to SiGe can be a challenge, particularly if the Ge content of the SiGe compound is low enough. For example, the Ge content of SiGe can be less than or equal to 10% of the SiGe compound (e.g., the alloy ratio of Si to Ge can be at least 9:1). Ideally, the etch selectivity of the material etched to form the staircase structure should be as high as possible to enable more precise control of the shape of the staircase structure. For example, due to, for example, sidewall damage, low selectivity can reduce etch profile control. As a result, some etching processes may require very narrow process windows, slow etches with poor selectivity, and / or the use of different materials, which may lead to the formation of suboptimal staircase structures.

[0017] To address these and other shortcomings, embodiments described herein can use halides to implement improved etch selectivity. Embodiments described herein can be used to form electronic components including staircase structures. In some embodiments, the electronic components are 3D DRAM devices.

[0018] The staircase structure can be formed by dry etching a base structure including an etching mask disposed on an alternating layer stack. The alternating layer stack can include a first layer formed of a first material and a second layer formed of a second material. In some embodiments, the first material is Si (i.e., the first layer is a Si layer) and the second material is SiGe (i.e., the second layer is a SiGe layer). For example, the Ge content of the SiGe can be less than or equal to 10% of the SiGe compound (e.g., the alloy ratio of Si to Ge can be at least 9:1).

[0019] The dry etching may involve a cyclic dry etching process. More specifically, the dry etching process may include several dry etching steps forming a cycle. In some embodiments, each dry etching step is anisotropic etching. The dry etching steps may include a first dry etching step using a low-selectivity etch to remove a portion of material from an area exposing a portion of the first layer, a second dry etching step using a first high-selectivity etch to trim the portion of the first layer and expose a portion of the second layer, and a third dry etching step using a second high-selectivity etch to trim the portion of the second layer.

[0020] The second dry etching step may include a dry etching process that produces byproducts formed on the surface of the second material. More specifically, the byproducts may include salts that selectively form on the surface of the second material. Due to the dry etching conditions (e.g., chemicals, temperature, and pressure) within the plasma etching chamber, the byproducts may be subject to decomposition. Thus, the byproducts may serve as a passivation layer to protect the second material from dry etching and improve etching selectivity relative to the first material.

[0021] It is possible that after the dry etching process, a certain amount of the first material, which was targeted during the second dry etching step, remains. However, due to physical etching or ion bombardment during the dry etching, the byproducts are eroded. Therefore, the erosion of the byproducts can reduce the etch selectivity of the first material relative to the second material during a subsequent dry etching process that may need to be performed during the second dry etching step.

[0022] To address the erosion of byproducts and maintain or improve the etch selectivity of the first material relative to the second material, embodiments described herein may introduce a halide gas during the dry etching process (e.g., between dry etching steps). The halide gas interacts with the byproducts and the surface of the second material to modify the passivation layer through molecular exposure, rather than acting as a plasma etchant. In some embodiments, modifying the passivation layer includes at least partially repairing the passivation layer. For example, modifying the passivation layer may include replenishing the passivation layer (e.g., restoring the passivation layer). That is, the byproducts can serve as effective nucleation sites for the initial formation of the passivation layer, and the halide gas can modify the passivation layer between dry etching steps. In addition, the halide gas can saturate reactive and / or etch-damaged sites, which can restore the content of the surface of the second material. Thus, by maintaining or improving the etch selectivity of the first layer relative to the second layer, introducing the halide gas between etching steps can improve the geometry of the staircase structure formed by the alternating layer stack.

[0023] For example, if the first layer is a Si layer and the second layer is a SiGe layer, the substrate can be etched with a plasma etchant having a chemical substance that, when exposed to Ge on the surface of the second layer, can cause a surface reaction that forms a passivation layer including byproducts. More specifically, the passivation layer can include ammonium hexafluorogermanate (F6GeH8N2). Examples of plasma etchants that can be used to etch SiGe layers include hydrogen (H2), NF3, ammonium fluoride (NH4F), etc. The halide gas can be selected to interact with the surface of SiGe and the byproducts to improve the passivation layer. In some embodiments, improving the passivation layer includes at least partially repairing the passivation layer. For example, improving the passivation layer can include replenishing the passivation layer. In some embodiments, the halide gas includes germanium tetrafluoride (GeF4). Further details on the use of halides to implement improved etching selectivity will be referred to below. Figure 1A To Figure 5 description.

[0024] Figure 1A to Figure 1B is a cross-sectional view illustrating an example method of forming an electronic component ("component") using halides to implement improved etch selectivity, according to some embodiments. Figure 1AA substrate structure 100A is shown. The substrate structure 100A includes an alternating layer stack ("stack") 110 and an etch mask 120 disposed on a substrate 120. For example, obtaining the substrate structure 100A may include forming the substrate structure 100A. Forming the substrate structure 100A may include forming the etch mask 120 on the stack 110.

[0025] The stack 110 includes a plurality of layers of a first material and a plurality of layers of a second material, wherein a first layer including the first material is disposed on a second layer including the second material. More specifically, the first material may be different from the second material. For example, the plurality of layers of the first material include layers 112-1 through 112-6, and the plurality of layers of the second material include layers 114-1 through 114-6. The stack 110 may include any suitable number of layers of the first material and the second material. In some embodiments, the first material is Si and the second material is SiGe. The etch mask 120 may be formed of any suitable material. In some embodiments, the etch mask 120 includes a soft mask (e.g., a photoresist). In some embodiments, the etch mask 120 includes a hard mask.

[0026] Although not in Figure 1A , but base structure 100A further includes one or more additional layers, such that stack 110 is disposed on the one or more additional layers. For example, the one or more additional layers may include a substrate layer as an initial layer of base structure 100A (e.g., a semiconductor wafer). For example, stack 110 may be formed directly on the substrate layer. As another example, one or more intermediate layers may be present between stack 110 and the substrate layer.

[0027] Figure 1B The processed structure 100B is shown. The processed structure 100B includes a staircase structure 130 formed by etching the stack 110 using the etch mask 120. The staircase structure 130 includes a plurality of staircase portions, including a staircase portion 132-1 disposed on a layer 134-1 and a layer 132-2 disposed on a layer 134-2. More specifically, the layers 132-1 and 132-2 may include a first material (e.g., Si) and the layers 134-1 and 134-2 may include a second material (e.g., SiGe).

[0028] In some embodiments, the etch stack 110 includes a dry etch stack 110. For example, the dry etch stack 110 can include at least one of: plasma etching, ion milling, RIE, etc. More specifically, the etch stack 110 can include performing a cyclic etching process to remove corresponding amounts of material from corresponding areas of the stack 110. A corresponding plurality of etching cycles can be performed to remove corresponding amounts of material. In some embodiments, each etching cycle is a dry etching cycle. For example, the dry etching cycle can be a plasma etching cycle, an ion milling cycle, an RIE cycle, etc.

[0029] The cyclic etching process may include a first etching process for removing a first portion of material from an area of ​​the stack 110 that includes a corresponding portion of the etching mask 120, a second etching process for removing a second portion of material from the area of ​​the stack 110, and a third etching process for removing a third portion of material from the area of ​​the stack 110. For example, the first etching process may have a low selectivity, the second etching process may have a high selectivity with respect to the first material (e.g., Si), and the third etching process may have a high selectivity with respect to the second material (e.g., SiGe). Because the portion of the etching mask 120 that protects the area of ​​the stack 110 is removed during the cyclic etching process, the area of ​​the stack 110 remains exposed during subsequent cyclic etching processes performed with respect to other areas of the stack 110. Thus, a varying number of cyclic etching processes performed with respect to corresponding areas of the stack 110 enables the staircase shape of the staircase structure 130 to be formed. Further details regarding etching the stack 110 will now be referred to below. Figures 2A to 2B Described in further detail.

[0030] Figure 2A is a cross-sectional view of an exemplary method 200 for implementing improved etch selectivity using halides according to some embodiments. As shown, the method 200 includes an initial step 201 in which a substrate structure including a stack 110 and an etch mask 120 disposed on the stack 110 is provided. For example, the stack 110 may include layers 112-1, 112-2, 114-1, and 114-2, as described above with reference to FIG. Figure 1A describe.

[0031] Method 200 further includes etching steps 202, 204, 206, and 208. During etching step 202, a portion of etch mask 120 is removed (e.g., trimmed) to expose region 205. During etching step 204, a portion of material is removed from region 205. The portion of material removed from region 205 during etching step 204 includes material from layers 112-1, 114-1, 112-2, and 114-2 corresponding to region 205. Etching process 204 results in intermediate structure 210 including layers 212, 214, 216, and 114-2. In some embodiments, etching process 204 is a low-selectivity etching process. For example, the etch rate ratio between the first material and the second material can be approximately 1:1. The material of intermediate structure 210 corresponding to region 205 includes a portion of layer 216 and a portion of layer 114-2.

[0032] During etching step 206, another portion of material is removed from region 205. The portion of material removed from region 205 during etching step 206 includes a portion of layer 216 corresponding to region 205. In some embodiments, and as shown, a portion of layer 114-2 corresponding to region 205 may also be removed during etching process 204. Thus, etching step 206 may result in intermediate structure 220 comprising layers 212, 214, 222, and 224, as well as passivation layer 225. The portion of layer 216 corresponding to region 205 formed during etching step 204 should have a suitable thickness for etching step 206. In some embodiments, the portion of layer 216 corresponding to region 205 has a thickness of less than or equal to approximately 10 nm. In some embodiments, the portion of layer 216 corresponding to region 205 has a thickness of less than or equal to approximately 5 nm. Etching step 206 may remove material from the portion of layer 224 corresponding to region 205, such that the portion of layer 224 corresponding to region 205 has a thickness. In some embodiments, the portion of layer 224 corresponding to region 205 has a thickness of less than or equal to about 10 nm. In some embodiments, the portion of layer 224 corresponding to region 205 has a thickness of less than or equal to about 5 nm.

[0033] Performing the etching step 206 may include performing alternating dry etching processes and passivation layer modification processes. Figure 2B, performing etching step 206 may include performing dry etching process 203. Dry etching process 203 may be performed using a suitable plasma etchant that may form byproducts on the exposed surface of the second material. In some embodiments, the byproducts include F6GeH8N2. The byproducts of dry etching process 203 form an initial passivation layer. After performing dry etching process 203, it is determined whether there is any remaining material in the portion of layer 216 corresponding to region 205. If so, performing etching step 206 may include introducing halide gas 207 to modify the initial passivation layer, thereby resulting in passivation layer 225. More specifically, the halide gas interacts with the byproducts and the exposed surface of the second material to modify (e.g., at least the initial passivation layer). In some embodiments, modifying the initial passivation layer includes at least partially repairing the initial passivation layer. For example, modifying the initial passivation layer may include replenishing the initial passivation layer. In some embodiments, the halide gas includes GeF4. Processes 203 and 207 form a cycle that may be repeated until the portion of layer 216 corresponding to region 205 is sufficiently removed, resulting in intermediate structure 220 including layer 224 .

[0034] The introduction of the halide gas and the resulting formation of the passivation layer 225 can enable the etching process 206 to have a high selectivity with respect to the first material (e.g., Si). For example, the etching process 206 can have a high Si / SiGe selectivity. In some embodiments, the selectivity of the etching process 206 is greater than or equal to about 3 (e.g., the etch rate ratio between the first material and the second material can be about 3:1). In some embodiments, the selectivity of the etching process 206 is greater than or equal to about 5 (e.g., the etch rate ratio between the first material and the second material can be about 5:1). In some embodiments, the selectivity of the etching process 206 is greater than or equal to about 10 (e.g., the etch rate ratio between the first material and the second material can be about 10:1).

[0035] Return to see Figure 2ADuring etching process 208, another portion of the material is removed from region 205. The portion of the material removed during etching process 208 includes a portion of layer 224 corresponding to region 205. Thus, etching process 208 can result in intermediate structure 230 including layers 212, 214, 222, and 232. In some embodiments, etching process 208 has a high selectivity with respect to the second material (e.g., SiGe). For example, etching process 208 can have a high SiGe / Si selectivity. In some embodiments, the selectivity of etching process 208 is greater than or equal to about 3 (e.g., the ratio of the SiGe etch rate to the Si etch rate is greater than or equal to about 3). In some embodiments, the selectivity of etching process 208 is greater than or equal to about 5 (e.g., the ratio of the SiGe etch rate to the Si etch rate is greater than or equal to about 5). In some embodiments, the selectivity of etching process 208 is greater than or equal to about 10 (e.g., the ratio of the SiGe etch rate to the Si etch rate is greater than or equal to about 10).

[0036] Figure 3 An example method 300 for forming an electronic component using halides to implement improved etch selectivity according to some embodiments is depicted. The method 300 can be performed within an electronic component processing system. More specifically, the method 300 can be performed within one or more processing chambers (e.g., etching chambers) of the electronic component processing system.

[0037] At step 310, a base structure is provided. The base structure may include a stack of alternating layers and an etch mask disposed on the stack of alternating layers. In some embodiments, providing the base structure includes forming the base structure. For example, forming the base structure may include forming an etch mask on the stack.

[0038] In step 320, the staircase structure is formed from the base structure. More specifically, the staircase structure is formed from the stack using dry etching. The dry etching may include performing several cycles of dry etching steps. Further details regarding steps 310 and 320 are described above with reference to Figures 1-2 and will now be described below with reference to Figures 2-3. Figures 4A to 4B describe.

[0039] Figures 4A to 4B An example method 400 for implementing improved etch selectivity using halides according to some embodiments is depicted. The method 400 can be performed within an electronic component processing system. More specifically, the method 400 can be performed within one or more processing chambers (eg, etching chambers) of the electronic component processing system.

[0040] At step 410, a first dry etching step is performed to remove a portion of a first layer of the alternating layer stack. More specifically, the portion of the first layer may correspond to a specific area being etched. The first layer may include a first material. In some embodiments, the first material includes Si and the first layer is a Si layer. In some embodiments, the first dry etching step is a low-selectivity etch.

[0041] At step 420, a second dry etching step is performed to remove the remaining portion of the first layer and a portion of the second layer of the stack. The second layer may include a second material. In some embodiments, the second material includes SiGe and the second layer is a SiGe layer.

[0042] At step 430 , a third dry etching step is performed to remove the remaining portion of the second layer. In some embodiments, the third dry etching step is highly selective to the second material.

[0043] For example, Figure 4B As shown, performing the second etching step at step 420 may include performing a first dry etching process of the second dry etching step to remove the first material from the remaining portion of the first layer at step 422. More specifically, the first dry etching process may be performed using a plasma etchant that causes the formation of byproducts that form an initial passivation layer on the surface of the second material (e.g., F6GeH8N2 formed on the SiGe surface).

[0044] In step 424, it is determined whether there is any remaining first material in the remaining portion of the first layer. If not, this means that the second etching step is complete and the process is finished (i.e., the process can proceed to Figure 4A 430 to perform a third dry etching step to remove the remaining portion of the second layer). Otherwise, in order to protect the second material during the subsequent etching process, the halide gas is introduced in step 426 after performing the first dry etching process. The halide gas can interact with the byproducts and the surface of the second material to improve the initial passivation layer (for example, GeF4 interacts with F6GeH8N2 and Ge on the surface of SiGe). In some embodiments, the introduction of the halide gas at least partially repairs the initial passivation layer on the surface of the second material. For example, the introduction of the halide gas can replenish the initial passivation layer on the surface of the second material. Subsequently, the process can return to step 422 to perform another dry etching process. Because the halide gas exposure improves the passivation layer, the surface of the second material is protected during the dry etching process, which can maintain or improve the etching selectivity during the dry etching process. Further details about steps 410-430 are described above with reference to Figures 1 to Figure 3 describe.

[0045] Figures 5A to 5Cis a table showing example etch process windows according to some embodiments. For example, Figure 5A 5 is a table showing an example highly selective etch with high selectivity relative to a first material. For example, the first material can be Si. The highly selective etch can employ a gas mixture. In some embodiments, and as shown, the gas mixture includes CF4, NF3, H2, N2, and Ar. The highly selective etch can be performed at a pressure. In some embodiments, and as shown, the pressure ranges from about 1 millitorr (mTorr or mT) to about 50 mTorr. The highly selective etch can be performed at a source power. In some embodiments, and as shown, the source power ranges from about 600 watts (W) to about 1000 W. The electrostatic chuck (ESC) that holds the substrate during the highly selective etch can have a temperature. In some embodiments, and as shown, the temperature range can be from about 35°C to about 75°C.

[0046] Figure 5B 500B is a diagram illustrating an example low-selectivity etch having low selectivity relative to a first material and a second material. For example, the first material may be Si and the second material may be SiGe. The low-selectivity etch process may employ a gas mixture. In some embodiments, and as shown, the gas mixture includes Cl2, NF3, HBr, O2, and Ar. The low-selectivity etch may be performed at a pressure. In some embodiments, and as shown, the pressure ranges from approximately 1 mTorr to approximately 50 mTorr. The low-selectivity etch may be performed at a source power. In some embodiments, and as shown, the source power ranges from approximately 600 W to approximately 1000 W. The ESC that holds the substrate during the low-selectivity etch may have a temperature. In some embodiments, and as shown, the temperature range may be from approximately 35°C to approximately 75°C.

[0047] Figure 5C 500C is a table showing an example overview of an etching process for etching a first material and a second material. For example, the first material may be Si and the second material may be SiGe. The etching process may include several steps, including a low-selectivity etch, a high-selectivity etch relative to the first material, a high-selectivity etch relative to the second material, and etch mask removal.

[0048] The low-selectivity etch process may include a gas mixture. In some embodiments, and as shown, the gas mixture includes Cl2, NF3, HBr, O2, and Ar. The low-selectivity etch process may be performed for a certain amount of time. In some embodiments, and as shown, the amount of time ranges from about 8 seconds (s) to about 12 seconds. The low-selectivity etch process may be performed under a pressure. In some embodiments, and as shown, the pressure ranges from about 1 mTorr to about 50 mTorr. The low-selectivity etch process may be performed at a source power. In some embodiments, the source power ranges from about 600 W to about 1000 W. For example, as shown, the source power may be about 980 W. The low-selectivity etch process may be performed at a bias power. In some embodiments, the bias power ranges from about 100 W to about 500 W. For example, as shown, the bias power may be about 210 W. The ESC that holds the substrate during the low-selectivity etch process may have a temperature. In some embodiments, and as shown, the temperature range may be from about 35°C to about 75°C.

[0049] The highly selective etch relative to the first material may include a gas mixture. In some embodiments, and as shown, the gas mixture includes CF4, NF3, H2, N2, and Ar. The highly selective etch relative to the first material may be performed for a certain amount of time. In some embodiments, and as shown, the amount of time ranges from approximately 3 seconds to approximately 7 seconds. The highly selective etch relative to the first material may be performed under a pressure. In some embodiments, and as shown, the pressure ranges from approximately 1 mTorr to approximately 50 mTorr. The highly selective etch relative to the first material may be performed at a source power. In some embodiments, the source power ranges from approximately 600 W to approximately 1000 W. For example, as shown, the source power may be approximately 1000 W. The highly selective etch relative to the first material may be performed at a bias power. In some embodiments, and as shown, the bias power is approximately 0 W. The ESC that holds the substrate during the highly selective etch relative to the first material may have a temperature. In some embodiments, and as shown, the temperature ranges from approximately 35°C to approximately 75°C.

[0050] The highly selective etch relative to the second material may include a gas mixture. In some embodiments, and as shown, the gas mixture includes CF4, O2, and He. The highly selective etch relative to the second material may be performed for a certain amount of time. In some embodiments, and as shown, the amount of time ranges from approximately 3 seconds to approximately 7 seconds. The highly selective etch relative to the second material may be performed under a pressure. In some embodiments, and as shown, the pressure ranges from approximately 50 mTorr to approximately 100 mTorr. The highly selective etch relative to the second material may be performed at a source power. In some embodiments, the source power ranges from approximately 600 W to approximately 1000 W. For example, as shown, the source power may be approximately 600 W. The highly selective etch relative to the second material may be performed at a bias power. In some embodiments, and as shown, the bias power is approximately 100 W. The ESC that holds the substrate during the highly selective etch relative to the second material may have a temperature. In some embodiments, and as shown, the temperature ranges from approximately 35°C to approximately 75°C.

[0051] The etch mask removal process may include a gas mixture. In some embodiments, and as shown, the gas mixture includes NF3, O2, N2, and He. The etch mask removal process may be performed for a certain amount of time. In some embodiments, and as shown, the amount of time ranges from approximately 10 seconds to approximately 30 seconds. The etch mask removal process may be performed under pressure. In some embodiments, and as shown, the pressure ranges from approximately 50 mTorr to approximately 100 mTorr. The etch mask removal process may be performed at a source power. In some embodiments, the source power ranges from approximately 1000 W to approximately 3000 W. For example, as shown, the source power may be approximately 2500 W. The etch mask removal process may be performed at a bias power. In some embodiments, and as shown, the bias power is approximately 0 W. The ESC that holds the substrate during the highly selective etching process relative to the second material may have a temperature. In some embodiments, and as shown, the temperature range may be from approximately 35°C to approximately 75°C.

[0052] Figure 6FIG600 is a top-down view illustrating an example process for implementing improved etch selectivity using halides, according to some embodiments. As shown, an initial substrate 610A is provided, comprising a first material 612 and a second material 614 (not shown in 610A) beneath the first material 612. In some embodiments, the first material 612 is Si and the second material 614 is SiGe. At step 602, a first portion of the first material 612 is removed using a dry etching process to expose the second material 614 beneath the first portion of the first material 612. Because not all of the first material 612 has been removed, at step 604, a second portion of the first material 612 is removed using a dry etching process to expose the second material 614 beneath the second portion of the first material 612. Because not all of the first material 612 has been removed, at step 606, a third portion of the first material 612 is removed using a dry etching process to expose the second material 614 beneath the third portion of the first material 612. Between the one or more etching processes 602 through 606, a halide gas may be introduced to improve the passivation layer formed on the exposed second material 614. The passivation layer may protect the second material 614 from being etched during the dry etching process to remove the first material 612, which may improve the selectivity of the dry etching process with respect to the first material 612.

[0053] The foregoing description sets forth several specific details, such as examples of specific systems, components, methods, and the like, in order to provide a good understanding of several embodiments of the present disclosure. However, it will be apparent to those skilled in the art that at least some embodiments of the present disclosure may be practiced without such specific details. In other examples, well-known components or methods are not described in detail and are provided in a simple block diagram format to avoid unnecessarily obscuring the present disclosure. Therefore, the specific details set forth are merely exemplary. Specific embodiments may vary from these exemplary details and are still contemplated within the scope of the present disclosure.

[0054] Reference throughout this specification to "one embodiment" or "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment. Thus, the appearance of the phrase "in one embodiment" or "in an embodiment" in various places throughout this specification are not necessarily all referring to the same embodiment. Furthermore, the term "or" is intended to mean an inclusive or rather than an exclusive or. When the term "about" or "approximately" is used herein, this is intended to mean that the nominal value provided is accurate to within ±10%.

[0055] Although the operations of the methods herein are illustrated and described in a particular order, the order of the operations of each method may be changed so that some operations may be performed in reverse order, or so that some operations may be performed at least partially simultaneously with other operations. In another embodiment, the instructions or sub-operations of different operations may be performed intermittently and / or in an alternating manner.

[0056] It will be understood that the above description is intended to be illustrative and not restrictive. Numerous other embodiments will become apparent to those skilled in the art upon reading and understanding the above description. Thus, the scope of the present disclosure should be determined with reference to the appended claims, along with the full scope of equivalents to which such claims are entitled.

Claims

1. A method comprising: performing a dry etching process to remove a portion of a first layer disposed on a second layer of an alternating layer stack, wherein the first layer comprises a first material and the second layer comprises a second material different from the first material, wherein the dry etching process forms a passivation layer comprising byproducts on a surface of the second material, and wherein an amount of the first material of the portion of the first layer remains after performing the dry etching process; and A halide gas is introduced to modify the passivation layer on the surface of the second material. 2 . The method of claim 1 , further comprising: performing a second dry etching process to remove a second portion of the first layer after introducing the halide gas. The method of claim 1 , wherein the second material comprises germanium (Ge). The method of claim 3 , wherein the second material is silicon germanium (SiGe). The method of claim 3 , wherein the first material is silicon (Si). The method of claim 3 , wherein the halide gas comprises germanium tetrafluoride (GeF 4 ).

7. The method of claim 3, wherein the passivation layer comprises ammonium hexafluorogermanate (F6GeH8N2).

8. The method of claim 1, further comprising performing a first dry etching step to form the portion of the first layer, wherein the dry etching process is performed as part of a second dry etching step after the first dry etching step. 9 . The method of claim 8 , further comprising performing a third dry etching step to remove remaining portions of the second layer. 10 . The method of claim 9 , wherein the first dry etching step, the second dry etching step, and the third dry etching step are performed to form a staircase structure of an electronic device.

11. The method of claim 10, wherein the electronic component comprises a three-dimensional dynamic random access memory (3DDRAM) device.

12. A method comprising: Forming a staircase structure of an electronic component from a base structure comprising an etch mask disposed on an alternating layer stack, wherein the alternating layer stack comprises a first layer comprising a first material disposed on a second layer comprising a second material different from the first material, and wherein forming the staircase structure comprises: performing a first dry etching step to remove a portion of the first layer from the area; and A second dry etching step is performed to remove a remaining portion of the first layer from the area, wherein performing the second dry etching step includes performing a dry etching process to form a passivation layer including byproducts on a surface of the second material, and introducing a halide gas to modify the passivation layer on the surface of the second material.

13. The method of claim 12, wherein a certain amount of the portion of the first layer remains after performing the dry etching process. The method of claim 12 , wherein the second material comprises germanium (Ge).

15. The method of claim 14, wherein the second material is silicon germanium (SiGe). The method of claim 14 , wherein the first material is silicon (Si).

17. The method of claim 14, wherein the halide gas comprises germanium tetrafluoride (GeF4).

18. The method of claim 14, wherein the passivation layer comprises ammonium hexafluorogermanate (F6GeH8N2).

19. The method of claim 12, wherein forming the staircase structure further comprises performing a third dry etching step to remove remaining portions of the second layer from the region.

20. The method of claim 12, wherein the electronic component comprises a three-dimensional dynamic random access memory (3DDRAM) device.

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