Package with component carrier and electronic component connected by microstructures and / or nanostructures

Abstract

A package (100) comprising: a component carrier (102) having a stack (104) comprising at least one electrically conductive layer structure (106) and at least one electrically insulating layer structure (108) wherein the at least one electrically conductive layer structure (106) comprises at least one carrier pad (120); an electronic component (110) assembled with the component carrier (102) and comprising at least one component pad (122); and a connection structure (112), which is designed to electromechanically connect the at least one carrier pad (120) to the at least one component pad (122) by means of the microstructures and / or nanostructures (114); wherein the microstructures and / or nanostructures (114) are made of the same material as the at least one carrier pad (120) and / or the at least one component pad (122).

Description

Technical Field

[0001] The present invention relates to a package and a method of manufacturing a package. Background Art

[0002] As component carriers equipped with one or more components become increasingly versatile, the size of these components continues to shrink, and the number of components connected to component carriers, such as printed circuit boards or component carriers, continues to increase, increasingly powerful array components or packages containing multiple components are becoming widely used. These array components or packages have multiple contacts or connections with increasingly smaller spacing between these contacts. In particular, component carriers must be mechanically stable and electrically reliable to operate even under harsh conditions.

[0003] US2011 / 0039459 discloses a solderless and durable electrical contact that can be fabricated by directly growing a forest of carbon nanotubes (CNTs) or nanowires in a solderless manner on the contact surface of an integrated circuit, printed circuit board (PCB), integrated circuit (IC) package, hybrid substrate, contact carrier, rotor component, stator component, etc. The electrical contact and method can be used in various leaded and leadless electronic packaging applications on PCBs, IC packages, and hybrid substrates, including ball grid array (BGA) packages, land grid array (LGA) packages, and leadless chip carrier (LCC) packages, as well as for interconnecting integrated circuit wafers in flip-chip configurations, bare die configurations, and multi-layer and three-dimensional (3D) stacked arrangements.

[0004] Conventional methods of forming and handling component carriers remain challenging, particularly with respect to mounting electronic components on and / or in the component carriers. Summary of the Invention

[0005] It may be desirable to form a component carrier type package that is compact and reliable.

[0006] According to an exemplary embodiment of the present invention, a package is provided, which includes: a component carrier, the component carrier having a stack including at least one electrically conductive layer structure and at least one electrically insulating layer structure, wherein the at least one electrically conductive layer structure includes at least one carrier pad; an electronic component, which is assembled with the component carrier and includes at least one component pad; and a connecting structure, which is configured to electromechanically connect the at least one carrier pad to the at least one component pad via a microstructure and / or a nanostructure, wherein the microstructure and / or the nanostructure are made of the same material as the at least one carrier pad and / or the at least one component pad.

[0007] According to another exemplary embodiment of the present invention, a method for manufacturing a package is provided, wherein the method comprises: providing a component carrier, the component carrier comprising a stack having at least one electrically conductive layer structure and at least one electrically insulating layer structure, wherein the at least one electrically conductive layer structure comprises at least one carrier pad; assembling an electronic component comprising at least one component pad with the component carrier; and electromechanically connecting the at least one carrier pad to the at least one component pad via a connecting structure comprising a microstructure and / or a nanostructure, wherein the microstructure and / or the nanostructure is made of the same material as the at least one carrier pad and / or the at least one component pad.

[0008] In the context of this application, the term "package" may particularly denote a device having at least one electronic component (e.g., a semiconductor chip) surface-mounted on or embedded in a component carrier (e.g., an integrated circuit (IC) substrate or a printed circuit board (PCB)), with the electronic component and the component carrier mechanically and electrically connected to each other. The package may constitute a more complex electronic device.

[0009] In the context of this application, the term "component carrier" may particularly denote any support structure capable of accommodating one or more components on and / or within it to provide mechanical support and / or electrical connection. In other words, a component carrier may be configured as a mechanical and / or electronic carrier for the components. Specifically, a component carrier may be one of a printed circuit board (PCB), an organic interposer, and an IC (integrated circuit) substrate. A component carrier may also be a hybrid board combining different component carriers of the aforementioned types.

[0010] In the context of the present application, the term "ply stack" may particularly denote a flat or planar sheet-like body. For example, the ply stack may be a layer stack, in particular a laminated layer stack or a laminate. Such a laminate may be formed by connecting a plurality of layer structures by applying mechanical pressure and / or heat. Preferably, the stacked layer structures may be arranged parallel to one another.

[0011] In the context of the present application, the term "layer structure" may particularly denote a continuous layer, a patterned layer or a plurality of discontinuous islands in a common plane.

[0012] In the context of the present application, the term "carrier pad" may particularly denote a (e.g., flat and / or planar) electrically conductive contact element of a component carrier. Such a carrier pad may be accessible on a major surface of the component carrier for electrical connection, or may be an embedded carrier pad. The main horizontal extension of the exposed carrier pad (i.e., perpendicular to the thickness direction of the component carrier) may be parallel to the plane of the layers of the component carrier stack.

[0013] In the context of this application, the term "electronic component" may particularly denote a device or component that performs an electronic task. Such an electronic component may be a passive component, such as a capacitor component. It may also be an active component, such as a semiconductor chip containing a semiconductor material, in particular a semiconductor chip containing a semiconductor material as the primary or primary material. The semiconductor material may be, for example, a type IV semiconductor, such as silicon or germanium, or a type III-V semiconductor material, such as gallium arsenide. Specifically, the semiconductor component may be a semiconductor chip, such as a bare wafer or a molded wafer. At least one integrated circuit element may be monolithically integrated within the semiconductor chip.

[0014] In the context of the present application, the term "component pad" may particularly denote an electrically conductive contact element of an electronic component that is accessible at a main surface of the electronic component for electrical connection purposes (e.g., flat and / or planar). The main horizontal extension of the exposed component pad (i.e., perpendicular to the thickness direction of the component) may be parallel to the plane of the layers of the component-carrier stack.

[0015] In the context of this application, the term "connection structure for electromechanically connecting pads" may particularly refer to a physical structure that provides both an electrical connection between the pads and a mechanical connection between the pads. The electrical connection may electrically couple the pads to enable the transmission of electrical signals and / or power. The mechanical connection may be used to mechanically couple the pads to ensure the mechanical integrity of the package to withstand the mechanical loads generated during normal operation. The connection between the component pad and the carrier pad may be ensured by a connection structure configured to electromechanically connect the pads.

[0016] In the context of the present application, the term "microstructure and / or nanostructure" can particularly denote a structure having a size of the order of micrometer (in the case of microstructure) or a size of the order of nanometer (in the case of nanostructure). For example, the microstructure and / or nanostructure can comprise microwires and / or nanowires, microtubes and / or nanotubes and / or microporous and / or nanopores in a microporous body and / or nanoporous body. Specifically, the microstructure and / or nanostructure realized in the form of microwires and / or nanowires and / or microtubes and / or nanotubes can be long filaments having a diameter of the order of micrometer or nanometer, respectively. Accordingly, the nanopores in the microporous body and / or nanoporous body can be elongated channels in a sponge-like body. For example, the microstructure and / or nanostructure can be manufactured by plating or deposition processes, optionally on a catalytic base.

[0017] In the context of this application, the term "microstructures and / or nanostructures and one or more pads made of the same material" may particularly mean that the microstructures and / or nanostructures and at least one pad are made of the same material, in particular the surface material of the component pad and / or connection pad. However, the microstructures and / or nanostructures and at least one pad made of the same material may simply share the same primary material (which may constitute at least 95% by weight, in particular at least 99% by weight, of the microstructures and / or nanostructures and at least one pad), while the microstructures and / or nanostructures and at least one pad may differ in one or more additives (which may together constitute no more than 5% by weight, in particular no more than 1% by weight, of the microstructures and / or nanostructures and at least one pad). Such slight deviations may be caused, for example, by impurities, manufacturing tolerances, different manufacturing processes, and similar technically unavoidable phenomena.

[0018] In the context of the present application, the term "main surface of the body" may particularly denote one of the two opposite largest surfaces of the body. The main surfaces may be connected by a circumferential sidewall. The thickness of the body, for example a stack, may be defined by the distance between the two opposite main surfaces.

[0019] According to an embodiment of the present invention, a package may include a laminated component carrier (e.g., a printed circuit board or an integrated circuit substrate) having one or more carrier pads, which may be exposed to simplify the connection of the carrier pads. An electronic component (e.g., a semiconductor chip) may be assembled with the component carrier (e.g., may be surface mounted on the component carrier or embedded in the component carrier), and may be provided with one or more component pads, which may be exposed to simplify the connection of the component pads. Advantageously, a connection structure may be provided for electromechanically connecting one or more carrier pads to one or more component pads using microstructures and / or nanostructures. An array of such microstructures and / or nanostructures may advantageously provide elasticity and flexibility to the package to balance mechanical impacts applied to the package during manufacture and / or operation. For example, the microstructures and / or nanostructures may offset or buffer the mechanical stress applied between the component carrier and the assembled electronic component. In addition, the microstructures and / or nanostructures may allow a certain angular deviation between the component carrier and the component. A good connection is ensured even if the components are attached in an inclined manner (e.g. at an inclination angle of between 1° and 30°). This can cover slight balancing movements between the component carrier and one or more electronic components due to shear forces, tensile stresses, torsion and / or thermal expansion during the manufacturing process and / or operation of the package. Advantageously, the microstructures and / or nanostructures and the one or more carrier pads and / or component pads can be made of the same material. Advantageously, this can prevent the formation of material bridges between the microstructures and / or nanostructures and the one or more pads. Such material bridges can be mechanical weak points that are particularly prone to failure. In addition, such material bridges can increase unnecessary contact resistance or transition resistance. The microstructures and / or nanostructures and one or more pads are made of the same material, which can also make the CTE (coefficient of thermal expansion) mismatch around the connection structure small enough, so that the package can be effectively protected from thermal stress. Furthermore, even if there is a CTE mismatch between the materials of the electronic component (e.g., a semiconductor chip containing silicon) and the component carrier (particularly a laminate substrate), the stress-balancing function of the elastic microstructures and / or nanostructures ensures high reliability of the package even without an additional interposer or the like. Consequently, a reliable package can be manufactured in a compact and simple manner.

[0020] Detailed Description of Exemplary Embodiments

[0021] Below, additional exemplary embodiments of the package and method will be further described.

[0022] In an embodiment, the microstructures and / or nanostructures comprise nanowires, in particular copper nanowires. The term "nanowire" may particularly indicate a linear nanostructure having a diameter in the nanometer range, for example a diameter not exceeding 900 nanometers, for example not exceeding 10 nanometers. More generally, a nanowire may be defined as a structure whose thickness or diameter is limited to a few tens of nanometers or less and whose length is not limited. For example, a nanowire may comprise or consist of one or more electrically conductive (in particular metal) materials, such as copper, nickel, platinum, gold and / or silver. Nanowires or nanotubes made of electrically conductive carbon are also possible. Metal nanowire arrays or jungle-like metal nanowires have superior properties in terms of electrical conductivity and mechanical strength, and may have excellent elasticity. In addition, metal nanowire arrays or jungle-like metal nanowires can ensure the transmission of high currents, for example at least 1 A / mm 2 , especially at least 10A / mm 2 .

[0023] In an embodiment, the microstructure and / or nanostructure comprises a nanoporous body, particularly nanoporous copper. The nanoporous body can be a solid body with a plurality of elongated pores. These pores can extend through the body independently of each other and / or extend through the body in a mutually interconnected manner. The nanoporous body has excellent properties in terms of electrical conductivity and mechanical strength and has suitable elasticity. The nanoporous body is preferably made of a metallic material. Most preferably, the nanoporous body is made of copper because this can make it fully compatible with a copper base carrier, which is, for example, a PCB or IC substrate comprising copper pads and traces.

[0024] In an embodiment, the microstructures and / or nanostructures comprise or consist of a metal, preferably copper. Microstructures and / or nanostructures made of metal combine high electrical and thermal conductivity with high mechanical strength while also possessing a sufficient degree of elasticity. Furthermore, metals, particularly copper, can provide high thermal conductivity, which can be used to transport heat.

[0025] In an embodiment, the stack comprises an outer layer structure (e.g. an underfill or solder mask) covering the sidewalls of the at least one carrier pad, in particular also covering a portion of the upper exposed surface of the at least one carrier pad (see Figure 17 and Figure 18). This can have the advantage of protecting the microstructure and / or nanostructure from external environmental influences (for example, preventing oxidation). In addition, the external layer structure can cover at least a portion of the microstructure and / or nanostructure respectively. In the context of the present application, the term "external layer structure" can represent an electrically insulating material, such as a resin. In addition or alternatively, the "external layer structure" can include a solder mask material and / or a ceramic material. The external layer structure can cover at least a portion of the carrier pad. Alternatively or additionally, the external layer structure can constitute the entire layer of the stack. This can bring the advantage of forming a reliable connection between the electronic component and the component carrier. In addition, the at least one carrier pad and / or the part of the microstructure and / or nanostructure can be protected from environmental influences, that is, from the influence of oxygen and / or water.

[0026] In an embodiment, the ratio between the length and diameter of the microstructures and / or nanostructures is at least 10, in particular at least 40. Therefore, the microstructures and / or nanostructures can be provided with a relatively high aspect ratio. This can enhance the elasticity of the microstructures and / or nanostructures, thereby providing the package with a significant ability to balance mechanical and thermal loads, thereby extending the service life of the package.

[0027] In an embodiment, the microstructures and / or nanostructures form a jungle of microstructures and / or nanostructures extending from the component carrier and / or from the electronic component. "Jungle" can be a two-dimensional array of microstructures and / or nanostructures extending or growing from a common base, in particular from respective carrier pads or component pads. The microstructures and / or nanostructures in the jungle can extend independently of each other or can be cross-linked and / or entangled with each other. The microstructures and / or nanostructures arranged in a jungle can provide a plurality of said microstructures and / or nanostructures, for example at least 10 or at least 100 microstructures and / or nanostructures per pad. This can ensure high mechanical strength and high electrical conductivity without affecting elasticity.

[0028] In an embodiment, the microstructures and / or nanostructures are spaced apart from each other, particularly at and / or near the common base (e.g., corresponding carrier pad or component pad) where the microstructures and / or nanostructures extend. For example, the microstructures and / or nanostructures can grow directly on the corresponding carrier pad or component pad, and adjacent microstructures and / or nanostructures can be spaced apart from each other. The microstructures and / or nanostructures that protrude beyond the specified base pad can extend independently of each other, or can be cross-linked and / or entangled with adjacent microstructures and / or nanostructures. Nevertheless, the mutual spacing between the microstructures and / or nanostructures can ensure that a sufficiently high degree of elasticity is maintained to offset mechanical stress and / or thermal stress. In addition, the gaps between the microstructures and / or nanostructures can optionally be filled with an appropriate filling medium, for example, for enhancing the mechanical strength of the connection structure or for passivating the microstructures and / or nanostructures. This filling medium can be an electrically conductive filling medium, such as solder, which is also used to provide solderability. The filling medium can also perform other functions, for example, to prevent the microstructures and / or nanostructures from oxidizing and / or corroding. Additionally, the filler medium provides mechanical strength.

[0029] In an embodiment, the microstructures and / or nanostructures provide a permanent, inseparable connection between the component carrier and the electronic component. For example, the microstructures and / or nanostructures extending from two opposing pads can be configured to form a permanent, inseparable connection by being pressed together. Specifically, when a component carrier with a component pad having microstructures and / or nanostructures is pressed together with an electronic component with a component pad having other microstructures and / or nanostructures, the microstructures and / or nanostructures will become entangled or engaged with the other microstructures and / or nanostructures, making it difficult for the microstructures and / or nanostructures to become disconnected. This entanglement of sufficiently numerous and densely packed microstructures and / or nanostructures can be very complex and significant, so that a permanent connection is established between the component carrier and one or more electronic components through the connecting structure. This combines a simple connection process with a reliable interconnection package. Alternatively, the durability of the connection can be further enhanced by filling the gaps between the microstructures and / or nanostructures with a filling medium such as solder. The pressing process can also be carried out for a period at temperatures exceeding 200° C. by applying high temperatures during the pressing process, for example above 90° C., in particular 150° C., and in particular above 170° C. Alternatively, the connection can also be solderless.

[0030] In an embodiment, the microstructures and / or nanostructures are configured to act as elastic members, particularly to impart elastic properties to the connecting structure. Therefore, the microstructures and / or nanostructures can be formed to have properties that prevent the connecting structure from undergoing plastic deformation under mechanical and / or thermal stress. Advantageously, the array of microstructures and / or nanostructures extending from at least one of the opposing carriers and / or component pads can be configured so that the response of the microstructures and / or nanostructures corresponds to the response of the mechanical elastic members. Specifically, the microstructures and / or nanostructures can be configured to undergo behavior consistent with Hooke's law. According to Hooke's law, the force required to extend or compress an elastic microstructure and / or nanostructure by a certain distance is linearly proportional to the distance. This property enables the microstructures and / or nanostructures to respond correctly to external forces, thereby preventing damage to the package. In particular, this configuration of the microstructures and / or nanostructures can also prevent the microstructures and / or nanostructures from undergoing plastic deformation when subjected to stress, which could damage or even destroy the electromechanical connection established between the component carrier and the electronic component via the microstructures and / or nanostructures of the connecting structure.

[0031] In embodiments, the microstructures and / or nanostructures acting as elastic members are configured to generate a restoring force when elongated within the plane of the connection between the component carrier and the electronic component. In short, the elastic properties of the microstructures and / or nanostructures can generate a counter-acting force within a plane corresponding to the opposing major surfaces of the component carrier and the electronic component. Specifically, the correspondingly configured microstructures and / or nanostructures can buffer shear forces between the component carrier and the electronic component.

[0032] Alternatively, the microstructure and / or nanostructure may also be configured to have no intrinsic relaxation properties. In this way, the microstructure and / or nanostructure may only have flexibility but no elasticity.

[0033] In embodiments, the microstructures and / or nanostructures acting as elastic members are configured to generate a restoring force when they expand or contract (which may be expansion or compression) along the connection direction between the component carrier and the electronic component. Specifically, the elastic properties of the microstructures and / or nanostructures can generate a reverse driving force in a direction perpendicular to the plane corresponding to the opposing major surfaces of the component carrier and the electronic component. Specifically, the correspondingly configured microstructures and / or nanostructures are capable of elastically deforming when a tensile or compressive force is applied between the component carrier and the electronic component.

[0034] Preferably, the microstructures and / or nanostructures are configured such that they respond to forces in the plane of the connection between the component carrier and the electronic component as well as forces perpendicular to the plane of the connection. This protects the package from various types of stress.

[0035] In an embodiment, the microstructures and / or nanostructures are coated with a functional coating. This coating may partially or completely cover the corresponding microstructures and / or nanostructures, and / or may only partially or completely cover a portion of the array of microstructures and / or nanostructures, while other portions may remain exposed. This functional coating may be configured to provide or enhance at least one specific function. For example, the functional coating may be configured to prevent the microstructures and / or nanostructures from corrosion and / or oxidation. For example, the microstructures and / or nanostructures may be made of copper, which is susceptible to oxidation by air or corrosion by ambient moisture. Oxidation or corrosion of such microstructures and / or nanostructures may reduce their electrical conductivity, thereby weakening the electromechanical connection. This undesirable phenomenon can be reliably prevented by the anti-oxidation and / or anti-corrosion coating. Additionally or alternatively, the functional coating may be configured to enhance the thermal conductivity of the microstructures and / or nanostructures. This can promote temperature balance within the package, thereby preventing thermal stress. Additionally or alternatively, the functional coating may enhance the electrical conductivity of the microstructures and / or nanostructures. This can reduce signal quality and / or power losses transmitted between the component carrier and the electronic component. To enhance thermal and / or electrical conductivity, the microstructures and / or nanostructures can be coated, for example, with graphene. In another embodiment, the functional coating can impart solderability to the microstructures and / or nanostructures (i.e., can render the microstructures and / or nanostructures solderable), for example by coating the microstructures and / or nanostructures with a solder coating (e.g., tin or tin alloys).

[0036] In an embodiment, a first portion of the microstructures and / or nanostructures extends from the component carrier toward the electronic component, and a second portion of the microstructures and / or nanostructures extends from the electronic component toward the component carrier, such that the first and second portions of the microstructures and / or nanostructures mesh to form an interconnected connecting mesh. In other words, the first and second portions of the microstructures and / or nanostructures can be entangled with each other. By entanglement of the microstructures and / or nanostructures protruding from two opposing pads to be connected, a very simple connection can be achieved between the component carrier and the electronic component simply by pressing the component carrier and the electronic component together, while ensuring that the microstructures and / or nanostructures extending from the opposing pads are fully spatially aligned with each other. This is sufficient to establish a reliable electromechanical connection. For example, one end of the corresponding microstructure and / or nanostructure can be connected to the carrier pad or the component pad, while its opposite end can be a free end. For example, the microstructure and / or nanostructure can extend from the carrier pad or the component pad and can terminate in the gap between the carrier pad and the component pad. Thus, a respective microstructure and / or nanostructure may only bridge a portion of the spacing between the pads to be connected, whereas an array of microstructures and / or nanostructures may bridge the entire spacing.

[0037] In an embodiment, the connection structure comprises a solder structure, which is connected to microstructure and / or nanostructure, particularly to the microstructure and / or nanostructure that only extends from one of the component carrier and the electronic component. In this embodiment, for example, microstructure and / or nanostructure can be combined with solder to set up a highly reliable electromechanical connection between the component carrier and the electronic component. Microstructure and / or nanostructure can provide a high connection surface, so that it can be wetted or contacted by the flowable solder, thereby contributing to the very strong electromechanical connection between the microstructure and / or nanostructure and the flowable solder. In an alternative, microstructure and / or nanostructure can be formed on only one pad in the pads to be connected, and the microstructure and / or nanostructure can be connected to solder, thereby the microstructure and / or nanostructure can be bridged with another pad. However, microstructure and / or nanostructure can also be provided on two relative pads to form (for example preliminary) connection by making the microstructure and / or nanostructure that extend from two relative pads entangled with each other, and fixing the connection by welding.

[0038] In one embodiment, the microstructure and / or nanostructure is embedded, in particular completely embedded, in the solder structure. This allows for a high connection surface and thus a highly reliable electromechanical connection between the component carrier and the electronic component.

[0039] In an embodiment, the microstructures and / or nanostructures are at least partially located outside the solder structure. The portion of the microstructures and / or nanostructures protruding beyond the solder structure can provide a sufficient degree of elasticity (preferably in accordance with elastic properties). The portion of the microstructures and / or nanostructures extending into the solder structure can ensure sufficient robustness and a reliable electrical connection between the microstructures and / or nanostructures and the solder structure.

[0040] In an embodiment, the package includes an underfill, in particular an electrically insulating underfill, in the gap between the component carrier and the electronic component. This preferably dielectric underfill can seal the gap between the component carrier and the electronic component and can therefore improve mechanical integrity and thus the reliability of the package. Additionally, an outer layer structure can be placed laterally between the electronic component and the component carrier. In addition, the underfill can provide protection for the microstructure and / or nanostructure to prevent oxidation and / or corrosion and / or can electrically insulate the microstructure and / or nanostructure. The underfill and / or solder structure can strengthen the connection of the microstructure and / or nanostructure.

[0041] In an embodiment, the diameter of a respective one of the microstructures and / or nanostructures is in the range of 10 nm to 5 μm. Additionally or alternatively, the length of a respective one of the microstructures and / or nanostructures is in the range of 30 nm to 100 μm, preferably in the range of 300 nm to 50 μm. Such microstructures and / or nanostructures can provide advantageous properties for reliably electromechanically interconnecting an electronic component and a component carrier, while ensuring that the resulting package has a sufficient degree of elasticity to buffer stresses.

[0042] When the component carrier is a printed circuit board, the length of the microstructures and / or nanostructures may be in the range of 40 μm to 50 μm, and the diameter of the microstructures and / or nanostructures may be in the range of 400 nm to 1 μm. When the component carrier is an integrated circuit substrate, the length of the microstructures and / or nanostructures may be in the range of 5 μm to 15 μm, and the diameter of the microstructures and / or nanostructures may be in the range of 50 nm to 200 nm.

[0043] In an embodiment, the component carrier and / or the electronic component comprises pads of different sizes, which are connected by a connecting structure comprising microstructures and / or nanostructures. Due to the flexible, elastic and / or bendable properties of the microstructures and / or nanostructures, the microstructures and / or nanostructures can be easily adapted to pads of different sizes (see Figure 14(left side). The adaptive force connecting the microstructures and / or nanostructures to pads of different sizes can be the magnetic attraction generated by the magnetic microstructures and / or nanostructures. When entangled or engaged with each other, the microstructures and / or nanostructures extending from the two pads to be connected can mate to balance the different pad sizes. In addition, the elastically deformable microstructures and / or nanostructures that bridge the entire spatial range between the carrier pad and the component pad can self-adjust to different pad sizes.

[0044] In an embodiment, the component carrier and / or the electronic component comprises pads at different vertical heights, said pads being connected via a connecting structure comprising microstructures and / or nanostructures. Due to the flexible, elastic and / or bendable properties of the microstructures and / or nanostructures, the microstructures and / or nanostructures can be easily adapted to different vertical inter-pad distances (for example, the distances between the pads). Figure 14 (Compare the left and right sides of the diagram.) When entangled, the microstructures and / or nanostructures extending from the two mats to be connected can match to compensate for different vertical spacings. Furthermore, the elastically deformable microstructures and / or nanostructures that bridge the entire spatial extent between the carrier mat and the component mat can also self-adjust to different spacings.

[0045] In an embodiment, the central portion of the at least one carrier mat and the central portion of the corresponding at least one component mat connected to each other by the connecting structure are offset from each other in the lateral direction by an offset dimension in the range of 0.2 μm to 30 μm, in particular in the range of 0.3 μm to 25 μm (see Figure 16 ). The advantage of having a high-density distribution of nanostructures is that, due to capillary forces, the solder will be constrained in the area where the nanowires are deposited. This can reduce the risk of short circuits between adjacent pads due to the proximity of the solder. To this end, the at least one carrier pad and the corresponding at least one component pad can be arranged in parallel with respect to the main surface (or main direction), but offset in the transverse direction. The microstructure and / or nanostructure and / or solder structure can be placed laterally between the at least one carrier pad and the corresponding at least one component pad. Due to the flexibility, elasticity and / or bendable properties of the microstructure and / or nanostructure and / or due to capillary forces, the connection structure itself is adjusted to achieve reliable mechanical connection and / or electrical connection between the at least one carrier pad and the corresponding at least one component pad of the deviation.

[0046] In an embodiment, the electronic components are surface mounted on a component carrier (see e.g. Figure 1 ). Thus, microstructures and / or nanostructures can be used to produce an electromechanical connection between a carrier and a component in SMD (surface mounted device) technology.

[0047] Additionally or alternatively, the electronic components can be embedded in the component carrier (see Figure 13 Advantageously, an electromechanical connection can also be formed between the component carrier and the electronic component when the electronic component is embedded in the cavity of the component carrier. In this case, since the electronic component needs to be placed in the cavity, correct spatial alignment between the pads of the component carrier and the pads of the electronic component can be a challenge in conventional methods. However, it has been found that alignment issues in embedding the component in the component carrier can be alleviated by extending microstructures and / or nanostructures from at least one of the opposing pads (preferably from both of the opposing pads) because the flexibility, deformability and / or elasticity of the microstructures and / or nanostructures can compensate for some deviations.

[0048] In one embodiment, the connection structure is formed solely of microstructures and / or nanostructures. In particular, the connection structure can be solderless. Thus, in this embodiment, no other components besides the microstructures and / or nanostructures are used to establish the electromechanical connection between the electronic component and the component carrier. In this case, it may be advantageous to provide microstructures and / or nanostructures that can entangle with each other on both one or more component pads and one or more carrier pads.

[0049] In an embodiment, the microstructures and / or nanostructures extend over the entire spatial extent between the at least one carrier pad and the at least one component pad. For example, one end of the respective microstructures and / or nanostructures can be connected to the carrier pad, while the other, opposite end thereof can be connected to the component pad. For example, the microstructures and / or nanostructures can extend from the at least one carrier pad to the at least one component pad, or the microstructures and / or nanostructures can extend from the at least one component pad to the at least one carrier pad. Thus, the respective microstructures and / or nanostructures can bridge the entire space between the pads to be connected.

[0050] In an embodiment, the microstructures and / or nanostructures are surrounded by a protective structure that protects the microstructures and / or nanostructures, in particular, from air. This can be achieved, for example, by applying a suitable functional coating to the microstructures and / or nanostructures. By protecting the microstructures and / or nanostructures from air (or another medium in the surrounding environment, such as moisture), unwanted oxidation or corrosion can be prevented.

[0051] In an embodiment, microstructures and / or nanostructures (particularly nanowires) grown on one carrier pad (e.g., of an IC substrate) can be split and connected to at least two component pads, or microstructures and / or nanostructures (particularly nanowires) grown on one component pad can be split and connected to at least two carrier pads (e.g., of an IC substrate). For example, a carrier pad (e.g., a carrier pad that transmits power) can be split into two or more component pads by reorienting or bifurcating the microstructures and / or nanostructures (e.g., nanowires).

[0052] In an embodiment, one connection between a carrier pad and a component pad may be realized by a metal (e.g., copper) pillar (e.g., for aligning the component), while all other connections between the carrier and the component may be realized by microstructures and / or nanostructures (e.g., nanowires). In addition, microstructures and / or nanostructures may also be formed on at least one pillar (e.g., a metal pillar, preferably a copper pillar) of the package (in particular, the component carrier and / or the component of the package).

[0053] In an embodiment, the package includes a mounting base, particularly a printed circuit board (PCB), on which the component carrier is mounted. Such a mounting base can mechanically and electrically connect the component carrier and one or more components mounted on its surface to the electronic peripheral.

[0054] In an embodiment, the package comprises a carrier (in particular an IC substrate) on which further carriers (such as a redistribution structure or a coreless IC substrate, or a plurality of redistribution structures or coreless IC substrates) are interconnected via microstructures and / or nanostructures (e.g. nanowires). More specifically, a redistribution layer (RDL) can be formed on the substrate using microstructures and / or nanostructures. Such an embodiment can be viewed as a carrier comprising different sub-carrier layers, which are interconnected via microstructures and / or nanostructures. The sub-carriers can have different areas. In particular, the top sub-carrier may occupy a smaller area than the bottom sub-carrier.

[0055] In an embodiment, the component may be a silicon interposer, or generally, an interposer structure, such as a carrier having a thinner circuit structure than an IC substrate to which the component is mounted.

[0056] In an embodiment, the component carrier comprises a stack of at least one electrically insulating layer structure and at least one electrically conductive layer structure. For example, the component carrier may be a laminate of the one or more electrically insulating layer structures and the one or more electrically conductive layer structures, the laminate being formed, in particular, by applying mechanical pressure and / or heat. This stack can provide a plate-like component carrier that can provide a large mounting surface for other components while still being very thin and compact.

[0057] In one embodiment, the component carrier is shaped as a plate. This facilitates a compact design, while still providing a large base for mounting components. In particular, bare chips, as an example of electronic components, can be surface-mounted on thin boards such as printed circuit boards.

[0058] In an embodiment, the component carrier is configured as one of a printed circuit board, a substrate (in particular an IC substrate) and an interposer.

[0059] In the context of the present application, the term "printed circuit board" (PCB) may particularly denote a plate-like component carrier formed by laminating a plurality of electrically conductive layer structures with a plurality of electrically insulating layer structures, for example by applying pressure and / or providing heat energy. As a preferred material for PCB technology, the electrically conductive layer structures are made of copper, while the electrically insulating layer structures may comprise resin and / or fiberglass, so-called prepregs or FR4 materials. The individual electrically conductive layer structures can be connected to one another in the desired manner by forming holes through the laminate, for example by laser drilling or mechanical drilling, and partially or completely filling the holes with an electrically conductive material, in particular copper, to form vias or any other through-hole connections. The filled holes may connect the entire stack (through-hole connections extending through multiple layers or the entire stack), or they may connect at least two electrically conductive layers, so-called vias. Similarly, optical interconnects may be formed through the various layers of the stack to accommodate electro-optical circuit boards (EOCBs). A printed circuit board is typically constructed to house one or more components on one or both opposing surfaces of a plate-shaped printed circuit board. The one or more components may be connected to the corresponding major surfaces by soldering. The dielectric portion of the PCB may include a resin with reinforcing fibers, such as glass fibers.

[0060] In the context of this application, the term "substrate" can particularly refer to a small component carrier. A substrate can be a relatively small component carrier relative to a PCB, one or more components can be mounted on this relatively small component carrier, and this relatively small component carrier can be used as a connecting medium between one or more chips and another PCB. For example, a substrate can have approximately the same size as the components (particularly electronic components) to be mounted thereon (for example in the case of a chip-scale package (CSP)). More specifically, a substrate can be understood as a component carrier: a carrier for electrical connectors or electrical meshes, and a component carrier for connectors that are comparable to a printed circuit board (PCB) but have a relatively high density of lateral and / or vertical arrangements. Lateral connectors are, for example, conductive paths, while vertical connectors can be, for example, drilled holes. These lateral connectors and / or vertical connectors can be arranged within the substrate and can be used to provide electrical, thermal, and / or mechanical connections between accommodated components or unaccommodated components (such as bare wafers), in particular IC chips, and printed circuit boards or intermediate printed circuit boards. Therefore, the term "substrate" also includes "IC substrates." The dielectric portion of the substrate may comprise a resin with reinforcement particles, such as reinforcement spheres, particularly glass spheres.

[0061] The substrate or interposer may include or be composed of a layer of at least one of the following: glass; silicon (Si); and / or a photosensitive or dry-etchable organic material, such as an epoxy-based laminate material (e.g., an epoxy-based laminate film); or a polymer compound (which may or may not include photosensitive and / or heat-sensitive molecules), such as polyimide or polybenzoxazole.

[0062] In an embodiment, the at least one electrically insulating layer structure comprises at least one of the following: a resin or polymer, such as an epoxy resin, a cyanate resin, a benzocyclobutene resin, a melamine derivative, a polybenzoxabenzole (PBO), a bismaleimide-triazine resin, a polyphenylene derivative (e.g. based on polyphenylene ether, PPE), a polyimide (PI), a polyamide (PA), a liquid crystal polymer (LCP), polytetrafluoroethylene (PTFE), bisbenzocyclobutene (BCB) and / or a combination thereof. Reinforcement structures such as meshes, fibers, spheres or other types of filler particles made of glass (multilayer glass) can also be used to form a composite. Semi-cured resins combined with reinforcing agents, such as fibers impregnated with the above resins, are called prepregs. These prepregs are usually named after their properties, such as FR4 or FR5, which describe their flame retardant properties. While prepregs, particularly FR4, are generally preferred for rigid PCBs, other materials, particularly epoxy-based buildup materials (such as buildup films) or photosensitive dielectric materials, can also be used. For high-frequency applications, high-frequency materials such as polytetrafluoroethylene, liquid crystal polymers, and / or cyanate ester resins may be preferred. In addition to these polymers, low-temperature co-fired ceramics (LTCC) or other low, very low, or ultra-low DK materials can be used as electrical insulation structures in component carriers.

[0063] In an embodiment, the at least one electrically conductive layer structure comprises at least one of the following: copper, aluminum, nickel, silver, gold, palladium, tungsten, and magnesium. Although copper is generally preferred, other materials or coatings thereof are also possible, in particular coatings with superconducting materials or conductive polymers, such as graphene or poly(3,4-ethylenedioxythiophene) (PEDOT), respectively.

[0064] The at least one component can be selected from the following: a non-electrically conductive inlay, an electrically conductive inlay (such as a metal inlay, preferably comprising copper or aluminum), a heat transfer unit (such as a heat pipe), an optical element (such as an optical waveguide or optical conductor connector), an electronic component, or a combination thereof. The inlay can be, for example, a metal block with or without an insulating material coating (IMS inlay), which can be surface-mounted to facilitate heat dissipation. Suitable materials are defined by their thermal conductivity, which should be at least 2 W / mK. Such materials are typically based on, but not limited to, metals, metal oxides, and / or ceramics, such as copper, aluminum oxide (Al2O3), or aluminum nitride (AlN). Other geometries with increased surface area are also often used to increase heat exchange capacity. Furthermore, the component may be an active electronic component (having at least one realized pn junction), a passive electronic component (such as a resistor, an inductor, or a capacitor), an electronic chip, a memory device (e.g., a DRAM or another data memory), a filter, an integrated circuit (such as a field programmable gate array (FPGA), a programmable array logic (PAL), a general array logic (GAL), and a complex programmable logic device (CPLD)), a signal processing component, a power management component (such as a field effect transistor (FET), a metal oxide semiconductor field effect transistor (MOSFET), a complementary metal oxide semiconductor (CMOS), a junction field effect transistor (JFET), or an insulating Gate field effect transistors (IGFETs), all of which are based on semiconductor materials such as silicon carbide (SiC), gallium arsenide (GaAs), gallium nitride (GaN), gallium oxide (Ga2O3), indium gallium arsenide (InGaAs) and / or any other suitable inorganic compound), optoelectronic interface elements, light-emitting diodes, optical connectors, voltage converters (e.g., DC / DC converters or AC / DC converters), cryptographic components, transmitters and / or receivers, electromechanical transducers, sensors, actuators, microelectromechanical systems (MEMS), microprocessors, capacitors, resistors, inductors, batteries, switches, cameras, antennas, logic chips, and energy harvesting units. However, other components can be surface-mounted on the component carrier. For example, a magnetic element can be used as a component. Such a magnetic element can be a permanent magnetic element (e.g., a ferromagnetic element, an antiferromagnetic element, a multiferroic element, or a ferrimagnetic element, such as a ferrite core) or can be a paramagnetic element. However, the component can also be an IC substrate, an interposer, or another component carrier, for example in a board-in-board configuration. The component can be surface-mounted on the component carrier and / or can be embedded in the component carrier.In addition, other components, in particular components that generate and emit electromagnetic radiation and / or are sensitive to electromagnetic radiation propagating from the environment, can also be used as components.

[0065] In an embodiment, the component carrier is a laminated component carrier. In this embodiment, the component carrier is a composite of multiple layers that are stacked and connected together by applying pressure and / or heat.

[0066] After the internal layer structure of the component carrier has been treated, one or both main surfaces of the treated layer structure can be covered symmetrically or asymmetrically with one or more further electrically insulating and / or electrically conductive layer structures (in particular by lamination). In other words, the layer buildup can be continued until the desired number of layers is achieved.

[0067] After the formation of the stack of electrically insulating and electrically conductive layer structures has been completed, the resulting layer structure or component carrier can be subjected to a surface treatment.

[0068] In particular, with regard to surface treatment, an electrically insulating solder resist can be applied to one or both major surfaces of a laminate or component carrier. For example, such a solder resist can be formed over the entire major surface, and the solder resist layer can then be patterned to expose one or more electrically conductive surface portions that will be used to electrically couple the component carrier to an electronic peripheral. Surface portions of the component carrier still covered with solder resist, particularly those containing copper, can be effectively protected from oxidation or corrosion.

[0069] In terms of surface treatment, a surface treatment can also be selectively applied to exposed electrically conductive surface portions of the component carrier. This surface treatment can be an electrically conductive covering material on exposed electrically conductive layer structures (such as pads, conductive traces, etc., particularly pads, conductive traces, etc. comprising or consisting of copper) on the surface of the component carrier. If such exposed electrically conductive layer structures are not protected, the exposed electrically conductive component carrier material (particularly copper) may oxidize, thereby reducing the reliability of the component carrier. The surface treatment can then, for example, form a joint between a surface-mounted component and the component carrier. The surface treatment has the function of protecting the exposed electrically conductive layer structures (particularly copper circuits) and enables connection to one or more components, such as by soldering. Examples of suitable materials for the surface treatment include organic solderability preservatives (OSP), electroless nickel immersion gold (ENIG), electroless nickel immersion palladium immersion gold (ENIPIG), gold (particularly hard gold), chemical tin, nickel gold, nickel palladium, etc. BRIEF DESCRIPTION OF THE DRAWINGS

[0070] The aspects defined above and further aspects of the present invention are apparent from the examples of embodiment to be described hereinafter and are explained with reference to these examples of embodiment.

[0071] Figure 1A cross-sectional view of a package according to an exemplary embodiment of the present invention is shown.

[0072] Figure 2 A cross-sectional view of a package according to another exemplary embodiment of the present invention is shown.

[0073] Figure 3 A cross-sectional view of a package according to yet another exemplary embodiment of the present invention is shown.

[0074] Figure 4 A cross-sectional view illustrating a portion of an arrangement structure of a pad connection structure of a package according to another exemplary embodiment of the present invention.

[0075] Figure 5 Shown include Figure 4 Cross-sectional view of the complete connection structure of the part shown in .

[0076] Figure 6 A cross-sectional view illustrating a connection structure of a package according to an exemplary embodiment of the present invention.

[0077] Figure 7 A cross-sectional view illustrating a connection structure of a package according to yet another exemplary embodiment of the present invention.

[0078] Figure 8 A cross-sectional view illustrating a portion of an arrangement structure of a pad connection structure of a package according to another exemplary embodiment of the present invention.

[0079] Figure 9 Shown include Figure 8 The cross-sectional view of the complete connection structure of the part shown in FIG.

[0080] Figure 10 A cross-sectional view showing a preform of a connection structure of a package according to yet another exemplary embodiment of the present invention.

[0081] Figure 11 A cross-sectional view showing a preform of a connection structure of a package according to yet another exemplary embodiment of the present invention.

[0082] Figure 12 A cross-sectional view illustrating a portion of an arrangement structure of a pad connection structure of a package according to yet another exemplary embodiment of the present invention.

[0083] Figure 13 A cross-sectional view of a package according to another exemplary embodiment of the present invention is shown.

[0084] Figure 14 A cross-sectional view of a package according to yet another exemplary embodiment of the present invention is shown.

[0085] Figure 15 A cross-sectional view of a portion of an arrangement structure of a pad connection structure according to yet another exemplary embodiment of the present invention and a corresponding cross-sectional view of a complete connection structure of a package are shown.

[0086] Figure 16 A cross-sectional view illustrating a connection structure of a package according to an exemplary embodiment of the present invention.

[0087] Figure 17 A cross-sectional view of a package according to yet another exemplary embodiment of the present invention is shown.

[0088] Figure 18 A cross-sectional view of a package according to yet another exemplary embodiment of the present invention is shown.

[0089] Figures 19 to 22 A cross-sectional view of a microstructure and / or nanostructure on a pad of a package according to other exemplary embodiments of the present invention is shown.

[0090] Figures 23 to 25 A cross-sectional image of microstructures and / or nanostructures on a pad according to an exemplary embodiment of the present invention is shown.

[0091] Figures 26 to 29 A cross-sectional view of a structure obtained during the execution of a method for manufacturing a package according to an exemplary embodiment of the invention, the method comprising growing microstructures and / or nanostructures on a pad, is shown. DETAILED DESCRIPTION

[0092] The illustrations in the drawings are schematically shown. In different drawings, similar or identical elements are provided with the same reference signs.

[0093] Before exemplary embodiments will be described in more detail with reference to the accompanying drawings, some basic considerations on which exemplary embodiments of the present invention are developed will be summarized.

[0094] In conventional packages, a mismatch in the CTE (coefficient of thermal expansion) between the materials of surface-mounted electronic components (particularly silicon-based semiconductor chips) and the component carrier (particularly the IC substrate) in the horizontal mounting plane can be a root cause of package reliability issues. Consequently, an interposer or similar material is required as an intermediate to mount the electronic components on the component carrier. This can result in complex package designs and a large footprint.

[0095] According to an exemplary embodiment of the present invention, a package includes a laminated component carrier (such as a PCB or IC substrate) and at least one surface-mounted and / or embedded electronic component (e.g., a semiconductor chip). The electromechanical connection between the pads of the component carrier and the pads of the electronic component can be achieved by microstructures and / or nanostructures between the pads of the component carrier and the pads of the electronic component. Advantageously, the microstructures and / or nanostructures can be made of the same material as one or both of the connected pads. Achieving the electromechanical connection between the pads of the component carrier and the pads of the electronic component by means of microstructures and / or nanostructures simplifies the manufacturing process while providing elasticity to the connection to balance mechanical and / or thermal stresses that may occur between the component carrier and the electronic component. At the same time, when using microstructures and / or nanostructures, the connection can be electrically and mechanically reliable. Advantageously, forming the microstructures and / or nanostructures and at least one of the connected pads, preferably both pads, from the same material can avoid material bridging between the microstructures and / or nanostructures and the connected pads. This can make the contact or transition resistance between one or more pads and the microstructure and / or nanostructure smaller, thereby can make the power loss and / or electrical signal loss generated by the connection structure reduced. In addition, by avoiding material bridging and making the microstructure and / or nanostructure and the connected pads use the same material, the mechanical integrity of the package can be enhanced, and the CTE mismatch between the connection structure and one or more pads can be prevented. Therefore, a package with high mechanical and thermal reliability can be obtained. The microstructure and / or nanostructure can also be grown directly on one or both of the component pad and the carrier pad. In short, the microstructure and / or nanostructure made of the same material as the pad or preferably two pads to be interconnected by the connection structure can provide a stable and stress-resistant connection between the component carrier and the electronic component without the risk of cracks (such cracks may usually occur due to CTE mismatch).

[0096] In particular, the microstructures and / or nanostructures of the connection structures of a package (e.g., a chip package) can form interconnects that can absorb horizontal movement between the component carrier and the electronic component and compensate for vertical height tolerances of the component carrier and / or the electronic component to improve the reliability of the package. Furthermore, such a manufacturing architecture can also provide interconnects between the component carrier and the electronic component that can absorb lateral movement to at least partially compensate for CTE mismatch in the horizontal plane.

[0097] The package design according to the exemplary embodiments of the present invention allows for the installation of large electronic components (e.g., large silicon chips or interposers). The corresponding manufacturing architecture can have lower height tolerance requirements than conventional methods. In addition, higher connection reliability can be achieved compared to conventional package designs. In particular, when the microstructures and / or nanostructures are implemented as nanowires, very fine pitches can be achieved by the connection structure.

[0098] Advantageously, copper growth wires can be used as microstructures and / or nanostructures to improve the reliability of the package. Copper growth wires can have the advantages of particularly high ductility and low Young's modulus. In addition, excellent leveling in the vertical direction can also be achieved. In addition, the package can be manufactured using an easy assembly process. Advantageously, in an embodiment, nanowire-enhanced solder joints can be formed to further improve the heat dissipation and reliability of the package.

[0099] Alternatively, carbon nanotubes may be used as microstructures and / or nanostructures.

[0100] An exemplary application of an exemplary embodiment of the present invention is a high performance computing (HPC) package.Furthermore, a package manufactured according to an exemplary embodiment of the present invention is capable of providing ultra-high density interconnects.

[0101] Preferably, the microstructures and / or nanostructures can form a connection between the component carrier and the electronic component similar to an elastic member. The microstructures and / or nanostructures, which can be implemented as nanowires, can form an electrically conductive and mechanically reliable connection between the component carrier and the electronic component, while supporting the fine pitch and reduced size of the package. In addition, an array of microstructures and / or nanostructures as connecting structures can ensure a resilient electromechanical connection that remains reliable even if a single microstructure and / or nanostructure fails. Advantageously, the direct connection of the microstructures and / or nanostructures to other microstructures and / or nanostructures can be permanent. Although the significant flatness of the component carrier and the electronic component is conventionally very important, the microstructures and / or nanostructures can compensate for different height levels when under pressure. Through this leveling effect of the microstructures and / or nanostructures, it can be ensured that all pads of the electronic component and the component carrier are reliably connected even in the presence of warping. Therefore, the package design using microstructures and / or nanostructures can be resistant to warping. This can be of greatest advantage when using pads of different sizes (e.g., large pads for high power and small pads for signal transmission).

[0102] Exemplary embodiments of the present invention can provide a package having an increased reliability of connection between a component carrier and an electronic component. This can be achieved by using microstructures and / or nanostructures made of a pad material and used to connect the pad to another pad (which is preferably also made of the same material). For example, filamentous microstructures and / or nanostructures can be used, which can be configured to entangle or engage with each other. The microstructures and / or nanostructures can also be configured in a hook-and-loop manner, for example, when extending from the two pads to be connected.

[0103] Figure 1 A cross-sectional view of a package 100 according to an exemplary embodiment of the present invention is shown.

[0104] The illustrated package 100 includes a component carrier 102 (e.g., an integrated circuit substrate) and includes an electronic component 110 mounted on the component carrier 102 via a connection structure 112. Alternatively, the number of electronic components 110 surface-mounted on the component carrier 102 can be at least two. In addition to or as an alternative to the surface-mounted components 110, one or more electronic components 110 can be embedded in the component carrier 102 by establishing a connection portion for connecting between the component carrier 102 and the surface-mounted electronic components 110 as described herein.

[0105] For example, component carrier 102 may include or be composed of a laminated stack 104 comprising a plurality of electrically conductive layer structures 106 and a plurality of electrically insulating layer structures 108. The electrically conductive layer structures 106 may include patterned copper layers that may form horizontal pads and / or horizontal wiring structures. Additionally or alternatively, the electrically conductive layer structures 106 may include vertical through-connections such as copper pillars and / or copper-filled laser vias. Furthermore, the stack 104 of component carrier 102 may include one or more electrically insulating layer structures 108 (e.g., prepreg or resin sheets). Furthermore, a surface treatment 153 (e.g., ENIG or ENEPIG, solder resist, etc.) may optionally be applied to the top and / or bottom sides of the stack 104. Figure 1 The lowermost electrically insulating layer structure 108 is a surface treatment 153 implemented as a solder resist. The solder resist can support correct soldering of the component carrier 102 to an underlying mounting base (not shown), such as a printed circuit board.

[0106] The electronic component 110 is configured as a bare wafer (i.e., a non-packaged semiconductor chip) and is surface mounted on the top main surface of the component carrier 102. The electronic component 110 can be configured as a semiconductor chip, such as an active semiconductor chip. Examples of IC-type electronic components 110 include processors, memories, sensors, logic chips, micro-electromechanical systems (MEMS), etc. The electronic component 110 can include an integrated circuit having at least one monolithic integrated circuit element, such as a transistor or a diode, in an active area. The electronic component 110 can also be a stacked IC, module, chipset, or system on chip (SoC).

[0107] Still refer to Figure 1 , the component carrier 102 includes a plurality of exposed carrier pads 120 in the upper portion of the component carrier 102. For example, each of the carrier pads 120 is made of copper. Correspondingly, the illustrated electronic component 110 has exposed component pads 122. For example, each of the component pads 122 is made of copper. Advantageously, the material of the carrier pads 120 and the material of the component pads 122 can be the same, which can achieve a strong connection through the connecting structure 112, which can also be made of the same material (in this case, copper). The same material of the pads 120, 122 and the material of the connecting structure 112 can ensure good reliability of the package 100.

[0108] Connecting structures 112 are configured to electromechanically connect carrier pads 120 to component pads 122 via corresponding arrays of micro- and / or nano-structures 114. More specifically, each carrier pad 120 is connected to a designated one of component pads 122 via a designated set of entangled micro- and / or nano-structures 114. A corresponding array of micro- and / or nano-structures 114 extends upward from each of the carrier pads 120 toward a designated one of the component pads 122. Correspondingly, a corresponding additional array of micro- and / or nano-structures 114 extends downward from each of the component pads 122 toward a designated one of the carrier pads 120. By pressing component carrier 102 and electronic component 110 together with carrier pads 120 and component pads 122 aligned with each other, the corresponding arrays of micro- and / or nano-structures 114 can become entangled with each other to form a reliable and permanent connection between component carrier 102 and electronic component 110. This connection can be so tight that it cannot be separated without destroying the package 100. Alternatively, the array of microstructures and / or nanostructures 114 can be designed such that it allows for reversible assembly and disassembly of the component carrier 102 and the electronic component 110.

[0109] Advantageously, all of the microstructures and / or nanostructures 114 can be made of the same material as the carrier pad 120 and the component pad 122, which in the embodiment described is copper. The same material can be exactly the same material. However, the same material can also be a material that differs only in technically unavoidable impurities or foreign matter, different material properties due to manufacturing tolerances, or different additives or trace components whose total weight percentage is only a few weight percent and preferably less than 1 weight percent. For example, the microstructures and / or nanostructures 114 can be made of copper nanowires. When some or all of the pads 120, 122 and some or all of the microstructures and / or nanostructures 114 are made of the same material, the direct formation (e.g., direct growth) of the microstructures and / or nanostructures 114 on the respective pads 120, 122 can be simplified. Furthermore, this can avoid or at least reduce material bridging between the different materials in the arrangement 120-114-122. This, in turn, may reduce electrical and / or thermal contact resistance and reduce or even eliminate CTE mismatch between the connection structure 112 and the pads 120 , 122 .

[0110] Advantageously, the microstructures and / or nanostructures 114 include copper or consist of copper. The use of copper for both the microstructures and / or nanostructures 114 and for the electrically conductive layer structure 106 of the component carrier 102 ensures that the connection structure 112 is fully compatible with PCB technology and IC substrate technology, in which copper is the preferred option.

[0111] Referring now to detail 151, in which, for illustrative purposes, a microstructure and / or nanostructure 114 is shown in a straight configuration, the ratio between length L and diameter D being, for example, 10 or greater. For example, the diameter D of the illustrated microstructure and / or nanostructure 114 can be in the range of 10 nm to 5 μm. The length L of the illustrated microstructure and / or nanostructure 114 can be, for example, in the range of 300 nm to 50 μm. The exact size or size distribution of the microstructure and / or nanostructure 114 can be selected based on the requirements of the specific application (e.g., larger for a PCB-type component carrier 102 and smaller for an IC substrate-type component carrier 102). The size or size distribution of the microstructure and / or nanostructure 114 can be adjusted by correspondingly adjusting the manufacturing parameters of the plating or deposition process used to produce the microstructure and / or nanostructure 114. Although the microstructures and / or nanostructures 114 according to detail 151 are shown in a straight configuration, the microstructures and / or nanostructures 114 can in practice also be presented, for example, in a bent, curled, coiled, looped or spiral configuration or a combination of the above and / or other configurations due to the high aspect ratio of the microstructures and / or nanostructures 114.

[0112] according to Figure 1 , a first portion of microstructures and / or nanostructures 114 extends from carrier pad 120 of component carrier 102 toward component pad 122 of electronic component 110 and has a free end. Correspondingly, a second portion of microstructures and / or nanostructures 114 extends from component pad 122 of electronic component 110 toward carrier pad 120 of component carrier 102 and has a free end. Thus, the first and second portions of microstructures and / or nanostructures 114 mesh to form an interconnected, connected network. Different arrays of microstructures and / or nanostructures 114 can form corresponding two-dimensional jungles of microstructures and / or nanostructures 114, each jungle of microstructures and / or nanostructures 114 extending from a corresponding one of carrier pads 120 of component carrier 102 or from component pad 122 of electronic component 110. Such two-dimensional jungle-like microstructures and / or nanostructures 114 protruding from the relative and aligned pads 120 and 122 can be joined to each other by simply pressing the component carrier 102 and the electronic component 110 together, thereby forming a connection, in particular a permanent connection. Therefore, the microstructures and / or nanostructures 114 on the functionally interacting pads 120, 122 can provide a permanent, inseparable connection between the component carrier 102 and the electronic component 110. Preferably, the corresponding jungle-like or arrayed microstructures and / or nanostructures 114 are spaced apart relative to each other so that there are gaps between adjacent microstructures and / or nanostructures 114. This can allow other microstructures and / or nanostructures 114 from another jungle-like or array to join into the gaps to form a reliable connection by entangling the microstructures and / or nanostructures 114 with each other. According to Figure 1 , the connection structure 112 is formed only of the microstructure and / or nanostructure 114, thereby realizing a single structure.

[0113] Advantageously, the microstructures and / or nanostructures 114 can be configured to act as elastic members to impart elastic properties to the connection structure 112. Preferably, the microstructures and / or nanostructures 114 can act as elastic members according to the properties of Hooke's law. Such elastic properties of the microstructures and / or nanostructures 114 can be adjusted in particular by selecting a suitable material (e.g. copper) and selecting a suitable aspect ratio (preferably in the range of 10 to 40). In addition, the density of the microstructures and / or nanostructures 114, i.e. the number of microstructures and / or nanostructures 114 per unit area of ​​the respective pads 120 and 122, may also influence the elastic function of the microstructures and / or nanostructures 114. Preferably, the microstructures and / or nanostructures 114 acting as elastic members are configured to generate a restoring force when expanding and contracting in the connection plane between the component carrier 102 and the electronic component 110. In the embodiment currently described, the connection plane is perpendicular to the connection plane. Figure 1 Horizontal plane of the paper plane. For example, in the event of shear forces, mutual displacement between the component carrier 102 and the electronic component 110 may occur in the connection plane. The elastic function of the microstructures and / or nanostructures 114 can generate a reverse driving force, which tends to drive the component carrier 102 and the electronic component 110 back to the mutual target position of the component carrier 102 and the electronic component 110. In addition, in view of the elasticity, the elastic function can avoid cracks in the connection structure 112 due to a shear stress buffering effect. In addition, the microstructures and / or nanostructures 114 used as elastic members can be configured to generate a restoring force when they are stretched (for example, expanded or compressed) along the connection direction between the component carrier 102 and the electronic component 110. In the embodiment currently described, the connection direction is Figure 1 direction in the plane of the paper. For example, in the event of tensile or compressive stress, a mutual displacement between the component carrier 102 and the electronic component 110 may occur along the connection direction. The elastic function of the elasticity of the microstructures and / or nanostructures 114 can generate a reverse driving force, which tends to return the component carrier 102 and the electronic component 110 to a mutual vertical target distance of the component carrier 102 and the electronic component 110. In addition, due to the elasticity described, the elastic function can avoid cracks in the connection structure 112 due to tensile and compressive stress buffering effects. In short, the elastic connection is formed by the microstructures and / or nanostructures 114 located on both sides of the connection structure 112, i.e. by the microstructures and / or nanostructures 114 on the side facing the component carrier 102 and on the side facing the electronic component 110.

[0114] Figure 2 A cross-sectional view of a package 100 according to another exemplary embodiment of the present invention is shown.

[0115] Figure 2 The implementation method and Figure 1 The embodiments differ in particular in that: Figure 2 , the connection structure 112 includes a solder structure 118 (the solder structure 118 can be formed by a corresponding material configuration of the component pad 122, or can be formed as a coating on the component pad 122). The solder structure 118 is connected to the free end of the microstructure and / or nanostructure 114 extending from the carrier pad 120. For example, the solder structure 118 can include tin or a tin alloy, or be composed of tin or a tin alloy. The microstructure and / or nanostructure 114 can be copper nanowires, and the carrier pad 120 can also be made of copper. Figure 2 As shown, most of the microstructure and / or nanostructure 114 is located outside the solder structure 118, so that the elastic function of the microstructure and / or nanostructure 114 can be effective. More specifically, the microstructure and / or nanostructure 114 extends upward from the carrier pad 120 to the solder-type component pad 122, that is, bridges the entire distance between the carrier pad 120 and the component pad 122. The microstructure and / or nanostructure 114 has the greatest advantage of having a length that can bridge the entire distance between the carrier pad 120 and the component pad 122. This can make it possible to create an integrally formed connection structure 112 with elastic properties. The corresponding package 100 can have very high reliability and can be manufactured in a simple manner.

[0116] in short, Figure 2 The embodiment corresponds to the elastic connection portion on the IC substrate and the solder on the semiconductor chip.

[0117] Figure 3 A cross-sectional view of a package 100 according to yet another exemplary embodiment of the present invention is shown.

[0118] Figure 3 The implementation method and Figure 2 The embodiments differ in particular in that: Figure 3 , the microstructures and / or nanostructures 114 are almost completely or even entirely embedded in the solder structure 118. Figure 3 , the solder structures 118 are implemented as solder bumps on the component pads 122. The two-dimensional array of microstructures and / or nanostructures 114 extends from each carrier pad 120 toward the designated component pad 122 or even extends from each carrier pad 120 upward to the designated component pad 122. Furthermore, the microstructures and / or nanostructures 114 are embedded in the solder structures 118, which extend over the entire gap between the corresponding carrier pad 120 and the corresponding component pad 122.

[0119] in short, Figure 3 The embodiment can form a flexible connection portion located on an IC substrate and a corresponding solder ball for packaging.

[0120] Figure 4 A cross-sectional view showing a portion of an arrangement structure of a pad connection structure of a package 100 according to another exemplary embodiment of the present invention is shown. Figure 5 Shown include Figure 5 FIG. 1 is a cross-sectional view of a partially completed connection structure 112 shown in FIG.

[0121] Descriptively speaking, Figure 4 A carrier pad 120 is shown with microstructures and / or nanostructures 114 extending from the carrier pad 120 and made of the same material as the carrier pad 120, preferably made of copper. A solder structure 118 covers parts of the microstructures and / or nanostructures 114 and the carrier pad 120. Figure 5 The interconnection is obtained after component mounting and soldering, wherein, ultimately, both the solder structure 118 and the microstructure and / or nanostructure 114 extend over the entire gap between the carrier pad 120 and the component pad 122. This ensures a reliable mechanical connection and a low-ohmic electrical coupling between the carrier pad 120 and the component pad 122.

[0122] In an embodiment, it is possible that the plurality of microstructures and / or nanostructures 114 may have the extension directions of the plurality of microstructures and / or nanostructures 114 reversed. Figure 5 As shown in FIG, the microstructure and / or nanostructure 114 may extend from the bottom to the top. However, due to pressure, for example, the microstructure and / or nanostructure 114 may bend so that the end portion points from the top to the bottom.

[0123] Figure 6 and Figure 7 A cross-sectional view of a connection structure 112 of a package 100 according to another exemplary embodiment of the present invention is shown. In each of these embodiments, an electrically insulating underfill 126 is provided to fill the gap between the illustrated carrier pad 120 of the component carrier 102 and the illustrated component pad 122 of the electronic component 110. Thus, these embodiments can fill the vertical gap between the component carrier 102 and the electronic component 110 without the need for solder. As shown, the dielectric underfill 126 covers the entire microstructure and / or nanostructure 114. Figure 6 In the embodiment, the dielectric underfill 126 also fills the volume below the upper horizontal major surface of the carrier pad 120 and thus also covers the sidewalls of the carrier pad 120. Figure 7In the embodiment, the dielectric underfill 126 fills only the volume above the upper horizontal major surface of the carrier pad 120 and thus leaves the sidewalls of the carrier pad 120 exposed. This can have the advantage of preventing at least partial oxidation and / or corrosion of the surfaces of the microstructures and / or nanostructures 114.

[0124] Figure 8 A cross-sectional view illustrating a portion of an arrangement structure of a pad connection structure of a package 100 according to another exemplary embodiment of the present invention. Figure 9 Shown include Figure 8 A cross-sectional view of a portion of the complete connection structure 112 is shown in FIG.

[0125] Figure 8 and Figure 9 The implementation method and Figure 4 and Figure 5 The embodiments differ in particular in that: Figure 8 and Figure 9 The microstructures and / or nanostructures 114 are surrounded by a protective structure 128 for protecting the microstructures and / or nanostructures 114 from air and embedded as a non-conductive paste or liquid glue. Thus, the copper nanowire structure can be protected from oxidation and corrosion caused by ambient oxygen or humidity.

[0126] Figure 10 A cross-sectional view of a preform of a connection structure 112 of a package 100 according to yet another exemplary embodiment of the present invention is shown.

[0127] Figure 10 The microstructures and / or nanostructures 114 are shown extending from the carrier pad 120 and surrounded by a temporary protective structure 128, which is embodied here as a flux for solder. Microspheres, which may be made of a solder material such as tin or a tin alloy, are arranged as solder structures 118 on top of the temporary protective structure 128. Figure 10 When the structure shown in FIG. 1 is subjected to temperature treatment (e.g., by exposing the structure to reflow soldering conditions), the flux will be consumed and the solder structure 118 will be converted to Figure 4 The configuration shown in .

[0128] therefore, Figure 10 Shown is one possibility of how to apply solder inside the nanowires.

[0129] Figure 11 A cross-sectional view of a preform of a connection structure 112 of a package 100 according to yet another exemplary embodiment of the present invention is shown.

[0130] Figure 11Shown are microstructures and / or nanostructures 114 extending from a carrier pad 120. On top of the microstructures and / or nanostructures 114 are provided solder structures 118. Such structures may be manufactured, for example, by dispensing, screen printing, aerosol jetting or other additive methods.

[0131] Although not in Figure 11 It is shown in FIG. 1 , but it is also possible that by applying a solder structure 118 , parts of this solder structure 118 can even penetrate the microstructures and / or nanostructures 114 (eg in a jungle of nanowires) before the heat treatment.

[0132] When Figure 11 When the structure shown in FIG. 1 is subjected to a temperature treatment (e.g., by exposing the structure to a reflow condition), the solder structure 118 will become flowable and will flow in the gaps between adjacent microstructures and / or nanostructures 114, thereby converting the structure into a solder paste. Figure 4 configuration.

[0133] therefore, Figure 11 Another possibility is shown how to apply solder inside the nanowires.

[0134] Figure 12 A cross-sectional view illustrating a portion of an arrangement structure of a pad connection structure of a package 100 according to yet another exemplary embodiment of the present invention.

[0135] Figure 12 The implementation method and Figure 4 The embodiments differ in particular in that: Figure 12 , the micro-structures and / or nano-structures 114 are coated with a functional coating 116, which is made of a solder material (e.g., comprising tin or a tin alloy, or consisting of tin or a tin alloy). Thus, empty gaps 155 may remain between different coated micro-structures and / or nano-structures 114. Such gaps 155 may be formed by the component pads 122 (not in the Figure 12 The functional coating 116 is filled with other cooperating microstructures and / or nanostructures 114 extending downwardly (shown in FIG). In the illustrated embodiment, the functional coating 116 can enhance the solderability of the microstructures and / or nanostructures 114. The microstructures and / or nanostructures 114 can preferably be formed of copper. For example, the microstructures and / or nanostructures 114 can be copper nanowires. For example, the functional coating 116 can be formed by electroless deposition, electroplating, or physical vapor deposition (PVD).

[0136] Additionally or alternatively to the described functions, the functional coating 116 may also be configured to enhance thermal conductivity, electrical conductivity, and / or may prevent oxidation or corrosion of the microstructures and / or nanostructures 114. The material of the functional coating 118 may be adapted to the assigned function.

[0137] Figure 13 A cross-sectional view of a package 100 according to another exemplary embodiment of the present invention is shown.

[0138] according to Figure 13 , the electronic component 110 is embedded in the cavity 157 of the component carrier 102. Figure 13 , the upper main surface of the embedded electronic component 110 can be exposed to the environment. Alternatively, the electronic component 110 can also be completely embedded in the interior of the component carrier 102, so that the embedded electronic component 110 is completely surrounded by the material of the component carrier 102 in the circumferential direction (not shown).

[0139] When one or more electronic components 110 are embedded in the component carrier 102 , the electromechanical connections between the component carrier 102 and the one or more electronic components 110 may be as described herein, for example with reference to Figures 1 to 12 This is accomplished as with any of the embodiments described with respect to the surface mounted electronic component 110 .

[0140] Figure 14 A cross-sectional view of a package 100 according to another exemplary embodiment of the present invention is shown.

[0141] like Figure 14 As shown in , the component carrier 102 includes carrier pads 120 of different sizes d1, d2, wherein, in the example shown, d1>d2. In addition, the electronic component 110 may include component pads 122 of different sizes d3, d4. In addition, the sizes of the corresponding pairs of carrier pads 120 and component pads 122 to be interconnected by the connecting structure 112 may also be different, in the embodiment shown, d1>d3. As indicated by reference numeral 159, even in this scenario, the flexible, bendable and elastic configuration of the microstructure and / or nanostructure 114 can still allow a reliable connection to be established between such pads 120, 122 of different sizes. For example, the adaptive force used to connect the microstructures and / or nanostructures 114 between pads 120 and 122 of different sizes can be the magnetic attraction force generated by the microstructures and / or nanostructures 114 when the microstructures and / or nanostructures 114 are made of magnetic material, and optionally can also be the magnetic attraction force generated by the pads 120 and / or 122 when the pads 120 and / or 122 are made of magnetic material.

[0142] Still refer to Figure 14 It is also possible that component carrier 102 includes carrier pads 120 at different vertical heights, for example, with the bottom main surfaces vertically spaced apart by a distance B. Although not shown, component pads 122 at different vertical heights may also be present on electronic component 110. As indicated by reference numeral 161, even in this scenario, the flexible, bendable, and elastic configuration of the microstructures and / or nanostructures 114 can still allow for a reliable connection involving carrier pads 120 at different vertical heights. The microstructures and / or nanostructures 114 are capable of bridging different vertical spacings H2>H1.

[0143] Figure 15 1 shows a cross-sectional view of a portion of an arrangement structure of an electrical connection structure of a package 100 according to another exemplary embodiment of the present invention and a corresponding cross-sectional view of a completed connection structure 112. Figure 15 As shown in FIG, solder structure 118 is applied to component pad 122 or bump and assembled with microstructures and / or nanostructures 114 (e.g., nanowires) on carrier pad 120 or bump. Of course, the reverse configuration (i.e., solder structure 118 on carrier pad 120 and microstructures and / or nanostructures 114 on component pad 122) can also be achieved. Transition 182 can be completed by assembly and reflow.

[0144] Figure 16 FIG. 1 shows a cross-sectional view of the connection structure 112 of the package 100 according to an exemplary embodiment of the present invention. Figure 16 As shown by the displaced vertical line in FIG, the centers of the carrier pad 120 and the corresponding component pad 122, connected to each other by the connection structure 112, are offset in the lateral direction by an offset dimension "a." This offset dimension "a" can be in the range of 0.2 μm to 30 μm, for example, in the range of 0.3 μm to 25 μm. The advantage of having a high density of nanostructures is that, due to capillary forces, the solder can be confined to the area where the nanowires are located. This can reduce the risk of short circuits between adjacent pads due to the proximity of solder.

[0145] Figure 17 A cross-sectional view of a package 100 according to another exemplary embodiment of the present invention is shown. In this embodiment, the stack 104 includes an outer layer structure 180 in the form of a solder mask 153, which covers the sidewalls and also covers a portion of the upper exposed surface of the carrier pad 120. Advantageously, the outer layer structure 180 can form a protection for the carrier pad 120, for example to prevent oxidation of the carrier pad 120. Figure 17, the bottom portion of the connection structure 112 is embedded by the solder resist 153, while the top portion of the connection structure 112 is embedded in the underfill 126. It should be noted that the solder mask 153 is applied to protect the copper pads and traces from environmental influences. However, non-solder mask protection is also possible.

[0146] Figure 18 1 shows a cross-sectional view of a package 100 according to another exemplary embodiment of the present invention. In this embodiment, the stack 104 includes an outer layer structure 108 in the form of an underfill 126 that covers the sidewalls and also covers a portion of the horizontally exposed surfaces of the carrier pad 120 and the component pad 122. In addition, the outer layer structure 108 can protect the carrier pad 120 and the component pad 122 from environmental influences. Figure 18 , the connection structure 112 is completely embedded in the underfill 126. Other embodiments use underfill below the wafer area and a solder mask around it.

[0147] Figures 19 to 22 A cross-sectional view of microstructures and / or nanostructures 114 on a carrier pad 120 or a component pad 122 of a package 100 according to another exemplary embodiment of the present invention is shown. As shown, the microstructures / nanostructures 114 can be grown over the entire area of ​​the pad 120 / 122 (which may be a preferred option), or the microstructures / nanostructures 114 can be grown only on a specific portion of the area (e.g., a central portion or a peripheral portion). However, the microstructures and / or nanostructures 114 can also be grown on the sidewalls of the corresponding pad 120 / 122.

[0148] refer to Figure 19 The microstructures and / or nanostructures 114 are arranged over the entire main surface of the carrier pad 120 / component pad 122 .

[0149] refer to Figure 20 , the microstructures and / or nanostructures 114 are arranged on only a peripheral portion of the main surface of the carrier pad 120 / component pad 122 , while a central portion of the main surface of the carrier pad 120 / component pad 122 is free of microstructures and / or nanostructures 114 .

[0150] refer to Figure 21 , the microstructures and / or nanostructures 114 are arranged on only a central portion of the main surface of the carrier pad 120 / component pad 122 , while the peripheral portion of the main surface of the carrier pad 120 / component pad 122 is free of microstructures and / or nanostructures 114 .

[0151] refer to Figure 22The microstructures and / or nanostructures 114 are arranged on a main surface of the carrier pad 120 / component pad 122 , and the microstructures and / or nanostructures 114 are additionally arranged on at least a portion of a sidewall of the carrier pad 120 / component pad 122 .

[0152] Figures 23 to 25 A cross-sectional image of micro- and / or nano-structures 114 on pads 120, 122 is shown according to an exemplary embodiment of the present invention.

[0153] refer to Figure 23 , showing microstructures and / or nanostructures 114 grown on a pad 120 .

[0154] refer to Figure 24 , showing Figure 23 The microstructures and / or nanostructures 114 grown on the pad 120 (by Figure 23 Details of the ).

[0155] refer to Figure 25 , showing microstructures and / or nanostructures 114 grown on opposing pads 120, 122. The microstructures and / or nanostructures 114 attached to the exposed surface of the carrier pad 120 and extending in a direction toward the component pad 122 mesh with the microstructures and / or nanostructures 114 attached to the exposed surface of the component pad 122 and extending in a direction toward the carrier pad 120 to form an interconnected connecting network in the portion between the component pad 122 and the carrier pad 120.

[0156] Still refer to Figures 23 to 25 , in terms of length (L), the microstructures and / or nanostructures 114 (embodied here as nanowires) at the peripheral portion of the carrier pad 120 or component pad 122 are smaller than the microstructures and / or nanostructures 114 in the central portion, which produces a tilt in the cross-sectional view, as shown in FIG. Figure 24 Seen in.

[0157] Figures 26 to 29 A cross-sectional view of a structure obtained during the execution of a method for manufacturing a package 100 according to an exemplary embodiment of the invention, the method comprising growing microstructures and / or nanostructures 114 on a pad 120 , is shown.

[0158] refer to Figure 26 , shows the carrier pads 120 exposed on top of the stack 104. In short, the pads on the PCB are shown.

[0159] refer to Figure 27 , a porous layer 189 is formed on top of the stack 104 including the carrier pads 120. The porous layer 189 is pressed onto the exposed pads 120 during the deposition process.

[0160] refer to Figure 28 , nanowire deposition is triggered by a flow of chemical substances, as indicated by reference numeral 187 .

[0161] refer to Figure 29 , remove the porous layer 189.

[0162] As shown, when there is no photoresist masking the edges of the pad 120, the chemicals flow through the porous layer 189 on the sides of the copper pad 120. This can slightly increase the diameter of the copper pad 120 in a plate-like manner, and as soon as the chemicals reach the bottom layer of the porous layer, nanowires begin to grow within the porous layer. The nanowires at the edges of such a pad 120 may be shorter because the volume of deposited copper is the same as the volume in the middle, and copper deposition only starts from the sides of the pad 120.

[0163] It should be noted that the expression "comprising" does not exclude other elements or steps, and "a" or "the" does not exclude a plurality. Furthermore, elements described in connection with different embodiments may be combined.

[0164] It should also be noted that reference signs in the claims should not be construed as limiting the scope of the claims.

[0165] The implementation of the invention is not limited to the preferred embodiments shown in the figures and described above. On the contrary, the solutions shown and described can also be used even in the case of fundamentally different embodiments.

[0166] There are many variations according to the principles of the invention.

Claims

1. A package (100), comprising: A component carrier (102), the component carrier (102) having a stack (104), the stack (104) comprising at least one electrically conductive layer structure (106) and at least one electrically insulating layer structure (108), wherein the at least one electrically conductive layer structure (106) comprises at least one carrier mat (120); an electronic component (110), the electronic component (110) being assembled with the component carrier (102), and the electronic component (110) comprising at least one component pad (122); and a connecting structure (112) configured to electromechanically connect the at least one carrier pad (120) to the at least one component pad (122) via a microstructure and / or a nanostructure (114); The microstructure and / or nanostructure (114) is made of the same material as the at least one carrier pad (120) and / or the at least one component pad (122).

2. The package (100) according to claim 1, wherein The microstructures and / or nanostructures (114) include nanowires, in particular, the microstructures and / or nanostructures (114) include copper nanowires, and / or the microstructures and / or nanostructures (114) include microporous bodies and / or nanoporous bodies, in particular, the microstructures and / or nanostructures (114) include nanoporous copper.

3. The package (100) according to claim 1 or 2, wherein: The microstructure and / or nanostructure (114) comprises metal or consists of metal. Preferably, the microstructure and / or nanostructure (114) comprises copper or consists of copper.

4. The package (100) according to any one of claims 1 to 3, wherein: The microstructures and / or nanostructures (114) have a ratio between length (L) and diameter (D) of at least 10, in particular, the microstructures and / or nanostructures (114) have a ratio between length (L) and diameter (D) of at least 40.

5. The package (100) according to any one of claims 1 to 4, wherein: The microstructures and / or nanostructures (114) are spaced apart relative to each other, in particular, at and / or near a common base from which the microstructures and / or nanostructures (114) extend.

6. The package (100) according to any one of claims 1 to 5, wherein: The microstructure and / or nanostructure (114) is configured to function as an elastic member, and in particular, the microstructure and / or nanostructure (114) is configured to impart elastic properties to the connecting structure (112).

7. The package (100) according to claim 6, wherein The microstructures and / or nanostructures (114) acting as elastic elements are configured to generate a restoring force when stretched or contracted within a connection plane between the component carrier (102) and the electronic component (110).

8. The package (100) according to claim 6 or 7, wherein: The microstructure and / or nanostructure (114) serving as an elastic member is configured to generate a restoring force when expanding or contracting along a connection direction between the component carrier (102) and the electronic component (110).

9. The package (100) according to any one of claims 1 to 8, wherein: The microstructures and / or nanostructures (114) are coated with a functional coating (116).

10. The package (100) according to claim 9, wherein The functional coating portion (118) is configured to prevent the microstructure and / or nanostructure (114) from corrosion and / or oxidation, to enhance the thermal conductivity of the microstructure and / or nanostructure (114), to enhance the electrical conductivity of the microstructure and / or nanostructure (114), and / or to enable the solderability of the microstructure and / or nanostructure (114).

11. The package (100) according to any one of claims 1 to 10, wherein: A first portion of the microstructures and / or nanostructures (114) extends from the component carrier (102) towards the electronic component (110), and wherein a second portion of the microstructures and / or nanostructures (114) extends from the electronic component (110) towards the component carrier (102), such that the first portion and the second portion of the microstructures and / or nanostructures (114) mesh to form an interconnected connected network.

12. The package (100) according to any one of claims 1 to 11, wherein The connection structure (112) includes a solder structure (118) connected to the microstructure and / or nanostructure (114), in particular, the connection structure (112) includes a solder structure (118) connected to the microstructure and / or nanostructure (114) extending from only one of the component carrier (102) and the electronic component (110).

13. The package (100) according to claim 12, wherein The microstructure and / or nanostructure (114) is embedded in the solder structure (118), in particular, the microstructure and / or nanostructure (114) is completely embedded in the solder structure (118).

14. The package (100) according to claim 12 or 13, wherein: The microstructures and / or nanostructures (114) are at least partially located outside the solder structure (118).

15. The package (100) according to any one of claims 1 to 14, wherein The component carrier (102) and / or the electronic component (110) comprises pads (120, 122) of different sizes (d1, d2, d3, d4), which are connected via the connecting structure (112) comprising the microstructure and / or nanostructure (114).

16. The package (100) according to any one of claims 1 to 15, wherein The component carrier (102) and / or the electronic component (110) comprises pads (120, 122) at different vertical heights, the pads (120, 122) being connected by the connecting structure (112) comprising the microstructure and / or nanostructure (114).

17. The package (100) according to any one of claims 1 to 16, wherein The microstructure and / or nanostructure (114) is surrounded by a protective structure (128), thereby protecting the microstructure and / or nanostructure (114). In particular, the microstructure and / or nanostructure (114) is surrounded by the protective structure (128) to protect the microstructure and / or nanostructure (114) from air.

18. The package (100) according to any one of claims 1 or 17, wherein The stack (104) includes an outer layer structure (180) that covers the side walls of the at least one carrier pad (120), and in particular, the outer layer structure (180) also covers a portion of the upper exposed surface of the at least one carrier pad (120).

19. The package (100) according to any one of claims 1 to 18, wherein The central portion of the at least one carrier pad (120) and the central portion of the corresponding at least one component pad (122) connected to each other by the connecting structure (112) are offset from each other by an offset dimension (a) in the lateral direction, and the offset dimension (a) is in the range of 0.2 μm to 30 μm, in particular, the offset dimension (a) is in the range of 0.3 μm to 25 μm.

20. The package (100) according to any one of claims 1 or 19, wherein The stack (104) includes an outer layer structure that covers the sidewalls of the at least one carrier pad (120), and in particular, the outer layer structure also covers a portion of the upper exposed surface of the at least one carrier pad (120).

21. The package (100) according to any one of claims 1 to 20, wherein The microstructures and / or nanostructures (114) form a jungle of microstructures and / or nanostructures (114) extending from the component carrier (102) and / or from the electronic component (110).

22. The package (100) according to any one of claims 1 to 21, wherein The microstructures and / or nanostructures (114) provide a permanent, inseparable connection between the component carrier (102) and the electronic component (110).

23. The package (100) according to any one of claims 1 to 22, comprising a bottom filling portion (126) located in the gap between the component carrier (102) and the electronic component (110), in particular, the package (100) comprises an electrically insulating bottom filling portion located in the gap between the component carrier (102) and the electronic component (110).

24. The package (100) according to any one of claims 1 to 23, wherein The diameter (D) of a corresponding one of the microstructures and / or nanostructures (114) is in the range of 10 nm to 5 μm.

25. The package (100) according to any one of claims 1 to 24, wherein The length (L) of a corresponding one of the microstructures and / or nanostructures (114) is in the range of 30 nm to 100 μm, preferably, the length (L) of a corresponding one of the microstructures and / or nanostructures (114) is in the range of 300 nm to 50 μm.

26. The package (100) according to any one of claims 1 to 25, wherein The at least one carrier pad (120) and the corresponding at least one component pad (122) connected to each other via the connecting structure (112) deviate from each other in the vertical direction by a range of 0.2 μm to 30 μm, in particular, the at least one carrier pad (120) and the corresponding at least one component pad (122) connected to each other via the connecting structure (112) deviate from each other in the vertical direction by a range of 0.3 μm to 25 μm.

27. The package (100) according to any one of claims 1 to 26, wherein The electronic component (110) is surface mounted on the component carrier (102).

28. The package (100) according to any one of claims 1 to 26, wherein The electronic component (110) is embedded in the component carrier (102).

29. The package (100) according to any one of claims 1 to 28, wherein The connection structure (112) is formed only of the microstructure and / or nanostructure (114).

30. The package (100) according to any one of claims 1 to 29, wherein The microstructure and / or nanostructure (114) extends over the entire spatial extent between the at least one carrier pad (120) and the at least one component pad (122).

31. A method of manufacturing a package (100), wherein: The method comprises: Providing a component carrier (102), the component carrier (102) having a stack (104), the stack (104) comprising at least one electrically conductive layer structure (106) and at least one electrically insulating layer structure (108), wherein the at least one electrically conductive layer structure (106) comprises at least one carrier pad (120); Assembling an electronic component (110) with the component carrier (102), the electronic component (110) including at least one component pad (122); and The at least one carrier pad (120) is electromechanically connected to the at least one component pad (122) via a connecting structure (112) comprising microstructures and / or nanostructures (114), wherein the microstructures and / or nanostructures (114) are made of the same material as the at least one carrier pad (120) and / or the at least one component pad (122).

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