Limphome control circuit and vehicle
By controlling the first switch module to be non-conductive before the SBC is powered on and keeping it conductive after the power-on is completed, the problem of false triggering of the Limphome control circuit during power-on and sleep wake-up is solved, and the signal accuracy and stable operation of the vehicle controller are achieved.
Patent Information
- Application Number
- CN202510839794.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-06-20
- Publication Date
- 2025-09-16
AI Technical Summary
The existing Limphome control circuit mistakenly triggers the limp home function when the SBC is powered on, resulting in reduced signal control accuracy, especially during the power-on and sleep-wake-up processes of the vehicle controller.
Before the SBC is powered on, the delay module controls the first switch module to be non-conductive. After the SBC is powered on, the self-locking module keeps the first switch module conductive, ensuring that the second switch module receives the Limphome enable signal normally and drives the load in combination with the external switch signal.
Improved the accuracy of the Limphome enable signal to avoid unintended limp home function triggering and ensure the vehicle controller operates normally at critical moments.
Smart Images

Figure CN120653018A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of vehicle control, and in particular to a Limphome control circuit and a vehicle. Background Art
[0002] All vehicle controllers include Limphome circuitry. This circuit replaces the MCU and maintains critical functions when it fails, enabling limp home operation. For example, in the case of a vehicle body controller, the SBC (System Basic Chip)—which powers and communicates with the MCU—generates a Limphome enable signal. This signal, combined with load switch signals, generates a corresponding control signal through a logic circuit, which is then fed into the driver to continue driving the corresponding loads, such as wipers, low-beam headlights, and IGN relays. Currently, the logic circuit only activates the Limphome function upon receiving the Limphome enable signal without any processing. However, the SBC can be mistakenly triggered upon power-up, sending the Limphome enable signal even when limp home is not required. This reduces the accuracy of the Limphome enable signal control. Summary of the Invention
[0003] The present invention provides a Limphome control circuit and vehicle. Before the SBC (Solid Business Card) is powered on, a delay module controls the first switch module to be non-conductive, preventing the second switch module from receiving the Limphome enable signal. After the SBC is powered on, it outputs a high-level Limphome enable signal. After the first switch module is turned on, the self-locking module controls the first switch module to remain conductive, allowing the second switch module to normally receive the Limphome enable signal.
[0004] To solve the above technical problems, the present invention provides a Limphome control circuit, comprising:
[0005] A first switch module, wherein a first end of the first switch module is connected to a power supply, a second end of the first switch module is connected to a first end of the self-locking module and a first end of the second switch module, and a control end is respectively connected to a second end of the delay module and a second end of the self-locking module, and is configured to be turned on based on a Limphome enable signal from the control end;
[0006] The self-locking module is used to control the first switch module to be continuously turned on when the first switch module is turned on;
[0007] The second switch module has a second end connected to the first input end of the logic circuit and a control end connected to the Limphome enable signal, and is configured to output the Limphome enable signal at the second end when the first switch module is turned on and the Limphome enable signal is valid;
[0008] The delay module, wherein a first terminal of the delay module is connected to a Limphome enable signal sent by the SBC, and is used to control the first switch module to be non-conductive before the SBC is powered on, and send the Limphome enable signal to the control terminal of the first switch module after the SBC is powered on;
[0009] The logic circuit has a second input terminal connected to an external switch signal, and an output terminal connected to a load of the vehicle, and is configured to drive the load corresponding to the external switch signal to operate when receiving the Limphome enable signal and the external switch signal, wherein the load includes at least one of a wiper, a headlight, and an ignition relay.
[0010] On the other hand, it also includes a power supply module, the power supply module including a first diode, a first controllable switch, a first resistor, a second diode and a first capacitor;
[0011] An anode of the first diode is connected to the power supply, a second end of the first diode is connected to the first end of the first resistor and the first end of the first controllable switch, a control end of the first controllable switch is connected to the second end of the first resistor and the cathode of the second diode, an anode of the second diode is grounded, a second end of the first controllable switch is connected to the first end of the first capacitor, and a common end of the connections is connected to the first end of the first switch module, and a second end of the first capacitor is grounded;
[0012] The first diode is used for anti-reverse operation, the second diode and the first resistor are used for clamping the voltage at the first end of the first controllable switch, the first controllable switch is used for being turned on when the power supply is supplied to supply power to the first switch module, and the first capacitor is used for filtering.
[0013] On the other hand, the first switch module includes a second controllable switch, a third controllable switch, a second resistor, a third resistor, a fourth resistor and a fifth resistor;
[0014] The first end of the second controllable switch is connected to the first end of the second resistor, and the common end of the connections serves as the first end of the first switch module. The control end of the second controllable switch is respectively connected to the second end of the second resistor and the first end of the third resistor. The second end of the second controllable switch serves as the second end of the first switch module. The second end of the third resistor is connected to the first end of the third controllable switch. The first end of the fourth resistor serves as the control end of the first switch module. The second end of the fourth resistor is respectively connected to the control end of the third controllable switch and the first end of the fifth resistor. The second end of the fifth resistor is connected to the second end of the third controllable switch. The common end of the connections is grounded.
[0015] The third controllable switch is configured to be turned on based on a signal from a control terminal, the second controllable switch is configured to be turned on when the fourth controllable switch is turned on, and the second resistor, the third resistor, the fourth resistor, and the fifth resistor are bias resistors.
[0016] On the other hand, the self-locking module includes a third diode and a sixth resistor;
[0017] The anode of the third diode serves as the first end of the self-locking module, the cathode of the third diode is connected to the first end of the sixth resistor, and the second end of the sixth resistor serves as the second end of the self-locking module;
[0018] The third diode is used for reverse flow prevention, and the sixth resistor is used for current limiting.
[0019] On the other hand, the second switch module includes a fourth controllable switch, a seventh resistor and an eighth resistor;
[0020] A first end of the fourth controllable switch is connected to the first end of the seventh resistor, and a common end of the connections serves as the first end of the second switch module. A control end of the fourth controllable switch is connected to the second end of the seventh resistor and the first end of the eighth resistor, respectively. A second end of the fourth controllable switch is connected to the first end of the second capacitor, and a common end of the connections serves as the second end of the second switch. The second end of the eighth resistor serves as the control end of the second switch module.
[0021] The seventh resistor and the eighth resistor are both bias resistors. The fourth controllable switch is configured to output a Limphome enable signal at the second end when the first switch module is turned on and the Limphome enable signal is valid.
[0022] On the other hand, the delay module includes a fourth diode, a ninth resistor, and a fifth diode;
[0023] The anode of the fourth diode serves as the first end of the delay module, the cathode of the fourth diode is connected to the first end of the ninth resistor, the second end of the ninth resistor is connected to the cathode of the fifth diode, and the anode of the fifth diode serves as the second end of the delay module;
[0024] The fourth diode is used for reverse flow prevention, the ninth resistor is used for current limiting, and the fifth diode is used for voltage stabilization.
[0025] On the other hand, it also includes a fifth controllable switch, a tenth resistor, an eleventh resistor, a first signal passing module and a second signal passing module;
[0026] a first end of the fifth controllable switch connected to the second end of the first signal passing module and the control end of the first switch module, respectively; a first end of the fifth controllable switch connected to the second end of the eleventh resistor, and a common end of the connections being grounded; a first end of the tenth resistor connected to the second end of the second signal passing module, and a second end of the tenth resistor connected to the control end of the fifth controllable switch and the first end of the eleventh resistor, respectively; and a first end of the first signal passing module and a first end of the second signal passing module both connected to the output end of the slave microcontroller;
[0027] The slave single-chip microcomputer of the vehicle is used to send a first signal or a second signal based on the working status of the master single-chip microcomputer of the vehicle. The first signal is passed through a module to send the first signal to the control end of the first switch module to control the first switch module to be turned on. The second signal is passed through a module to send the second signal to the fifth controllable switch to control the fifth controllable switch to be turned on and the first switch module to be turned off.
[0028] On the other hand, when the first signal is a constant voltage signal and the second signal is a PWM signal, the first signal passing module includes a twelfth resistor, a sixth diode, a third capacitor and a seventh diode;
[0029] A first end of the twelfth resistor is connected to the cathode of the sixth diode, and a common end of the connections serves as a first end of the first signal passing through the module. A second end of the twelfth resistor is connected to the anode of the sixth diode, the first end of the third capacitor, and the anode of the seventh diode. A second end of the third capacitor is grounded. The cathode of the seventh diode serves as a second end of the first signal passing through the module.
[0030] The sixth diode is used to be turned on in a low-level stage when the PWM signal is output from the single-chip microcomputer to clear the energy stored in the third capacitor. The seventh diode is used for anti-reverse operation. The third capacitor is used to store energy to control the first switch module to be turned on.
[0031] The second signal passing module includes a fourth capacitor, an eighth diode, a ninth diode, a fifth capacitor and a thirteenth resistor;
[0032] a first end of the fourth capacitor serving as a first end of the first signal passing module, a second end of the fourth capacitor being connected to a cathode of the eighth diode and an anode of the ninth diode, respectively, the anode of the eighth diode being grounded, a cathode of the ninth diode being connected to a first end of the fifth capacitor and a first end of the thirteenth resistor, a second end of the fifth capacitor being grounded, and a second end of the thirteenth resistor serving as a second end of the second signal passing module;
[0033] The eighth diode is used to release the energy stored in the fourth capacitor in the low level stage when the PWM signal is output from the single chip microcomputer. The ninth diode is used for anti-reverse operation. The fifth capacitor is used to store energy to control the conduction of the fifth controllable switch.
[0034] On the other hand, a sixth capacitor is further included, wherein a first end of the sixth capacitor is connected to the power supply, and a second end of the sixth capacitor is connected to a first end of a tenth resistor, and is used to clear the electric energy stored in the first switch module and the second switch module when the controller is powered on for the first time.
[0035] In order to solve the above technical problems, the present invention also provides a vehicle, comprising the above Limphome control circuit.
[0036] The present invention discloses a Limphome control circuit and vehicle, which relate to the field of vehicle control and include: a first switch module that is turned on based on a high-level Limphome enable signal, and a second switch module that is turned on based on a low-level enable signal. The second module can only output the Limphome enable signal when the first module is turned on and the third module is not turned on. When power is just turned on, the Limphome enable signal sent by the SBC is at a low level, resulting in the erroneous triggering of limp home. Therefore, before the SBC completes power-on, the delay module controls the first switch module to be non-conductive and the second switch module to have no output. After power-on is completed, the Limphome enable signal sent by the SBC turns to a high level. After the first switch module is turned on, the self-locking module controls the first switch module to be continuously turned on, so that the first switch module no longer blocks the Limphome enable signal. Then, the logic circuit combines the Limphome enable signal output by the second switch module with the external switch signal to drive the load to work, completing limp home. BRIEF DESCRIPTION OF THE DRAWINGS
[0037] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the prior art and the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.
[0038] Figure 1 A schematic structural diagram of a Limphome control circuit provided by the present invention;
[0039] Figure 2 A structural diagram of a limphome function provided by the prior art;
[0040] Figure 3 A circuit diagram of a Limphome control circuit provided by the present invention;
[0041] Figure 4 A structural diagram of a limphome function provided by the present invention;
[0042] Figure 5 A flowchart of a limphome function provided by the present invention;
[0043] Figure 6 A flowchart of another limphome function provided by the present invention;
[0044] Figure 7 This is a structural diagram of another limphome function provided by the present invention. DETAILED DESCRIPTION
[0045] The core of this invention is a Limphome control circuit and vehicle. Before the SBC (Solid Business Card) is powered on, a delay module controls the first switch module to be non-conductive, preventing the second switch module from receiving the Limphome enable signal. After the SBC is powered on, it outputs a high-level Limphome enable signal. After the first switch module is turned on, the self-locking module controls the first switch module to remain conductive, allowing the second switch module to normally receive the Limphome enable signal.
[0046] To make the objectives, technical solutions, and advantages of the embodiments of the present invention more clear, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts shall fall within the scope of protection of the present invention.
[0047] Figure 1 This is a structural diagram of a Limphome control circuit provided by the present invention, the Limphome control circuit comprising:
[0048] A first switch module 1, wherein a first end of the first switch module 1 is connected to a power supply, a second end of the first switch module 2 is connected to a first end of the self-locking module 2 and a first end of the second switch module 3, and a control end is respectively connected to a second end of the delay module 4 and a second end of the self-locking module 2, and is configured to be turned on based on a Limphome enable signal from the control end;
[0049] The self-locking module 2 is used to control the first switch module 1 to be continuously turned on when the first switch module 1 is turned on;
[0050] The second switch module 3 has a second end connected to the first input end of the logic circuit 5 and a control end connected to the Limphome enable signal, and is configured to output the Limphome enable signal at the second end when the first switch module 1 is turned on and the Limphome enable signal is valid;
[0051] Delay module 4, where a first terminal of the delay module 4 is connected to a Limphome enable signal sent by the SBC, and is used to control the first switch module 1 to be non-conductive before the SBC is powered on, and to send the Limphome enable signal to the control terminal of the first switch module 1 after the SBC is powered on;
[0052] The logic circuit 5 has a second input terminal connected to the external switch signal, and an output terminal connected to a load of the vehicle. The logic circuit 5 is used to drive the load corresponding to the external switch signal to work when the Limphome enable signal and the external switch signal are received. The load includes at least one of a wiper, a lamp, and an ignition relay.
[0053] Figure 2 This is a schematic diagram of the structure of a limphome function provided by existing technology. Various vehicle controllers are equipped with limphome circuits. When the MCU fails to work properly, the circuit replaces the MCU to maintain the operation of important functions, thus achieving limp home. Taking the body controller as an example, when the MCU fails, the SBC (System Basic Chip) that supplies power to the MCU and communicates with it will generate a limphome enable signal. This signal, together with the load switch signal, generates a corresponding control signal through the logic circuit 5, which is input to the driver to continue driving the corresponding load, such as the wiper, low beam, IGN relay, etc. Figure 2 shown.
[0054] If the Limphome enable signal generated by the SBC is unexpected and one-sided, and is still used as a referee input to the logic circuit 5, control anomalies will inevitably occur in some cases. This situation cannot be avoided no matter how the logic circuit 5 is optimized. The existing technology does not take this into consideration.
[0055] Furthermore, only by ensuring the accuracy of the Limphome enable signal can the operation of logic circuit 5 be meaningful. In fact, in recent years, the SBC Limphome enable signal is not only triggered when the MCU is incorrectly feeding the dog (the Limphome enable signal is valid, generally when the internal open-drain transistor is turned on and grounded), but also in many other situations, such as failure mode applications. Therefore, current technology simply accepts the Limphome enable signal from the SBC without processing. This can indeed trigger the Limphome circuit when the MCU is down and not feeding the dog, and it can also trigger the Limphome circuit in quite a few situations. Other situations include: Scenario 1: When the vehicle controller is first connected to the battery to power on, the SBC immediately triggers the Limphome enable signal and simultaneously turns on the MCU power supply until the power supply voltage stabilizes. Scenario 2: When the vehicle controller wakes up from sleep mode (when the vehicle controller shuts down the power supply and enters low-power mode), the SBC immediately triggers the Limphome enable signal and simultaneously turns on the MCU power supply until the power supply voltage stabilizes. Obviously, these situations do not trigger the limp home circuit, so the problem of unexpected triggering of the Limphome enable signal needs to be solved.
[0056] Both Cases 1 and 2 above refer to power-up conditions. The only difference is that in Case 1, the slave MCU is also powering up (powered by an independent LDO) and, since it is not yet operational, cannot operate the preprocessing circuit. In Case 2, the slave MCU is continuously operational, not in sleep mode, and can therefore be used to operate the preprocessing circuit. To simplify control, analyzing the commonality between Cases 1 and 2, both involve a Limphome trigger signal. Therefore, the issues in Cases 1 and 2 are addressed by processing the Limphome trigger signal itself. Specifically, a switch circuit is added to the preprocessing circuit, controlled by the Limphome trigger signal. The control logic is such that the switch circuit is inactive when the Limphome trigger signal is active, and is active and self-locking when the Limphome trigger signal is inactive.
[0057] It should be noted that the preprocessing circuit in the figure is a circuit composed of a first switch module 1 , a self-locking module 2 , a second switch module 3 , and a delay module 4 .
[0058] The first switch module 1 can be turned on based on a signal input from the control terminal. The signal from the control terminal is the Limphome enable signal passed through the delay module 4. This application assumes that the Limphome enable signal is low (0V) when the limp home function is triggered, and high (5V) when the limp home function is not required. Therefore, before power-on is complete, the Limphome enable signal output by the SBC may be low, but the limp home function is not required at this time. Therefore, the delay module 4 will not control the first switch module 1 to turn on. After power-on is complete, if the Limphome enable signal is valid, the first switch module 1 will be turned on. Simultaneously, after the first switch module 1 is turned on and the Limphome enable signal is valid, the second switch module 3 will turn on and output the Limphome enable signal, thus enabling the limp home function. When the logic circuit 5 receives an external switch signal, such as turning on the lights, it will directly control the lights to turn on, without the need for a microcontroller.
[0059] The present invention discloses a Limphome control circuit and vehicle, relating to the field of vehicle control. The circuit comprises: a first switch module 1 that turns on based on a high-level Limphome enable signal, and a second switch module 3 that turns on based on a low-level enable signal. Only when the first module 1 is turned on can the second module 3 output the Limphome enable signal. Upon power-on, the Limphome enable signal sent by the SBC is at a low level, causing limp home control to be falsely triggered. Therefore, before the SBC completes power-on, the delay module 4 controls the first switch module 1 to be non-conductive, and the second switch module 3 to have no output. After power-on, the Limphome enable signal sent by the SBC turns high. After the first switch module 1 is turned on, the self-locking module 2 controls the first switch module 1 to remain on, preventing the first switch module 1 from shielding the Limphome enable signal. The logic circuit then drives the load in conjunction with the Limphome enable signal output by the second switch module 3 and the external switch signal, completing limp home control.
[0060] Based on the above embodiment:
[0061] In some embodiments, a power supply module 6 is further included, and the power supply module 6 includes a first diode D1, a first controllable switch T1, a first resistor R1, a second diode D2 and a first capacitor C1;
[0062] The anode of the first diode D1 is connected to the power supply, the second end of the first diode D1 is connected to the first end of the first resistor R1 and the first end of the first controllable switch T1 respectively, the control end of the first controllable switch T1 is connected to the second end of the first resistor R1 and the cathode of the second diode D2 respectively, the anode of the second diode D2 is grounded, the second end of the first controllable switch T1 is connected to the first end of the first capacitor C1, and the common end of the connections is connected to the first end of the first switch module 1, and the second end of the first capacitor C1 is grounded;
[0063] The first diode D1 is used for anti-reverse operation, the second diode D2 and the first resistor R1 are used for clamping the voltage at the first end of the first controllable switch T1, the first controllable switch T1 is used to be turned on when the power supply is on to supply power to the first switch module 1, and the first capacitor C1 is used for filtering.
[0064] The power source, like the controller, comes from the vehicle battery, with a nominal voltage of 12V (normal voltage range: 9V-16V). This voltage is stepped down to 5V / 3.3V for subsequent logic processing (the choice of 5V / 3.3V depends on the output voltage level of the microcontroller). Traditional power supply circuits use independent LDOs (low dropout regulators) to generate 5V. While this offers excellent performance and high accuracy, it comes at the expense of relatively high cost. Considering that this circuit, used for limphome processing and limp-state control, consumes low current and does not require high voltage accuracy, a regulated 5V output voltage is proposed. The first diode D1 provides reverse voltage protection in the event of reverse battery connection, safeguarding subsequent circuitry. The second diode D2 is a 5V6 zener diode. When the battery voltage exceeds 5.6V + 0.6V (0.6V is the diode voltage drop), the cathode of the second diode D2 is clamped to 5.6V. Considering the 0.6V voltage drop between the base b and emitter e of the first controllable switch T1, the 5V output voltage is regulated according to the following formula: Figure 1 In the illustrated connection, the first controllable switch T1 operates in the amplification region, and the emitter voltage is 0.6V lower than the cathode voltage of the second diode D2, resulting in a 5V output voltage. The first capacitor C1 is a filter capacitor. When the first controllable switch T1 operates in the amplification region, it consumes the most power.
[0065] In some embodiments, the first switch module 1 includes a second controllable switch T2, a third controllable switch T3, a second resistor R2, a third resistor R3, a fourth resistor R4 and a fifth resistor R5;
[0066] A first end of the second controllable switch T2 is connected to a first end of the second resistor R2, and a common end of the connections serves as a first end of the first switch module 1. The control end of the second controllable switch T2 is respectively connected to the second end of the second resistor R2 and the first end of the third resistor R3. The second end of the second controllable switch T2 serves as the second end of the first switch module 1. The second end of the third resistor R3 is connected to the first end of the third controllable switch T3. A first end of the fourth resistor R4 serves as a control end of the first switch module 1. The second end of the fourth resistor R4 is respectively connected to the control end of the third controllable switch T3 and the first end of the fifth resistor R5. The second end of the fifth resistor R5 is connected to the second end of the third controllable switch T3. The common end of the connections is grounded.
[0067] The third controllable switch T3 is used to be turned on based on the signal of the control terminal. The second controllable switch T2 is used to be turned on when the fourth controllable switch T4 is turned on. The second resistor R2, the third resistor R3, the fourth resistor R4 and the fifth resistor R5 are bias resistors.
[0068] The second controllable switch T2 is a PNP transistor, and the third controllable switch T3 is an NPN transistor. Bias resistors can be 47kΩ or 10kΩ, or transistors with built-in bias resistors. The collector of the third controllable switch T3 is connected to the base of the second controllable switch T2, forming a common switching circuit. Turning on the third controllable switch T3 controls the turning on of the second controllable switch T2. Controlling the third controllable switch T3 is crucial to achieving logic control.
[0069] In some embodiments, the self-locking module 2 includes a third diode D3 and a sixth resistor R6;
[0070] The anode of the third diode D3 serves as the first end of the self-locking module, the cathode of the third diode D3 is connected to the first end of the sixth resistor R6, and the second end of the sixth resistor R6 serves as the second end of the self-locking module 2;
[0071] The third diode D3 is used for reverse protection, and the sixth resistor R6 is used for current limiting.
[0072] When the third controllable switch T3 is controlled to turn on, the second controllable switch T2 is turned on. The 5V output from the second controllable switch T2 then continues to control the third controllable switch T3 to turn on through the third diode D3 and the sixth resistor R6, forming a self-locking state. It should be noted that the self-locking state can be achieved through the sixth resistor R6, but the third diode D3 is required to prevent voltage backflow.
[0073] In some embodiments, the second switch module 3 includes a fourth controllable switch T4, a seventh resistor R7, and an eighth resistor R8;
[0074] A first end of the fourth controllable switch T4 is connected to the first end of the seventh resistor R7, and the common end of the connection serves as the first end of the second switch module 3. A control end of the fourth controllable switch T4 is respectively connected to the second end of the seventh resistor R7 and the first end of the eighth resistor R8. A second end of the fourth controllable switch T4 is connected to the first end of the second capacitor C2, and the common end of the connection serves as the second end of the second switch. The second end of the eighth resistor R8 serves as the control end of the second switch module 3.
[0075] The seventh resistor R7 and the eighth resistor R8 are both bias resistors. The fourth controllable switch T4 is configured to output a Limphome enable signal at the second end when the first switch module 1 is turned on and the Limphome enable signal is valid.
[0076] The fourth controllable switch T4 turns on when the second controllable switch T2 is turned on and the Limphome enable signal is at a low level. This shows that even if the Limphome enable signal unexpectedly turns low, the Limphome circuit will not be triggered as long as the second controllable switch T2 is turned off. Therefore, the key is to determine how to disable the second controllable switch T2 in various situations while maintaining it open in other situations to avoid affecting the normal Limphome function. Here, the emitter of the fourth controllable switch T4 is connected to the collector of the second controllable switch T2. The base of the fourth controllable switch T4 is connected to the Limphome enable signal of the SBC via an eighth resistor R8. The collector output of the fourth controllable switch T4 is the final Limphome enable signal output by the preprocessing circuit. Because the fourth controllable switch T4 can only be powered on after the second controllable switch T2 is turned on, the final Limphome enable signal is controlled not only by the Limphome enable signal but also by the second controllable switch T2. It should be noted that a filter capacitor is also introduced here. The function of the second capacitor C2 is that when the battery is connected, due to the existence of the transistor junction capacitance, even if the transistor base is not turned on and floating, the fast power-on slope applied to the transistor emitter will cause series current to the collector output. Actual measurements have found that this is more likely to occur when the voltage change rate is fast, but not when it is slow. Generally, the leakage voltage is below 1V and lasts for microseconds. Therefore, the second controllable switch T2 and the fourth controllable switch T4 will have leakage voltage. Therefore, this tiny leakage voltage is absorbed by the second capacitor C2 to prevent false triggering of the subsequent circuit.
[0077] In some embodiments, the delay module 4 includes a fourth diode D4, a ninth resistor R9, and a fifth diode D5;
[0078] The anode of the fourth diode D4 serves as the first end of the delay module 4, the cathode of the fourth diode D4 is connected to the first end of the ninth resistor R9, the second end of the ninth resistor R9 is connected to the cathode of the fifth diode D5, and the anode of the fifth diode D5 serves as the second end of the delay module 4;
[0079] The fourth diode D4 is used for reverse protection, the ninth resistor R9 is used for current limiting, and the fifth diode D5 is used for voltage stabilization.
[0080] The anode of the fourth diode D4 is connected to the Limphome enable signal, and the fifth diode D5 is a voltage regulator diode used to control the opening of the third controllable switch T3. The fourth diode D4 is a reverse-bias diode, ensuring that the third controllable switch T3 does not turn off when the Limphome enable signal is low. Without this diode, when the Limphome enable signal is low, the third controllable switch T3 will turn off, and thus the second controllable switch T2. Normally, the base of the third controllable switch T3 is high, so the third controllable switch T3 is always open. When the Limphome enable signal is low, without this diode, the base of the third controllable switch T3 is pulled low, turning off the third controllable switch T3. The fifth diode D5 is a 3V3 voltage regulator diode. This is because the voltage drop of the fourth diode D4 is 0.6V, and the PN junction turn-on voltage drop of the third controllable switch T3 is 0.6V. Therefore, the Limphome enable signal must be greater than 0.6V + 0.6V + 3.3V = 4.5V to ensure that the third controllable switch T3 can properly turn on. It should be noted that when the Limphome enable signal is triggered (internal ground), the level is 0V. When it is not triggered, the level is pulled to the SBC's own 5V output through an external pull-up resistor. That is, when the SBC is first powered on, the Limphome enable signal level is 0V until its own 5V output stabilizes to 5V (if the SBC is powering a 3.3V microcontroller, it is 3.3V here). It should be emphasized that the SBC power-on process can be divided into three cases: Case 1, when the SBC is powered on for the first time and its own 5V is not turned on, the Limphome enable signal trigger level is 0V, which can turn on the fourth controllable switch T4 but cannot turn on the third controllable switch T3, so the Limphome improvement signal is not triggered; Case 2, when the SBC is powered on and its own 5V is turned on and the voltage climbs from 0V to 5V, the Limphome enable signal also has a 0V to 5V climbing process, but the third controllable switch T3 can only be turned on when the voltage rises to 4.5V, and the fourth controllable switch T4 is closed when the voltage rises to 2.6V. The seventh resistor R7 and the eighth resistor R8 are 10kΩ and 33kΩ, respectively. This ensures that when the voltage difference between the seventh resistor R7 and the eighth resistor R8 is less than 2.4V, that is, when the external voltage rises to 2.6V, the fourth controllable switch T4 is turned off. This avoids the race condition when the fourth controllable switch T4 and the third controllable switch T3 are switched. As a result, the Limphome improvement signal is not triggered during the ramp-up period of the Limphome enable signal. In the third scenario, after the SBC is powered on for the first time, the Limphome enable signal is 5V, which can turn on the third controllable switch T3 but not the fourth controllable switch T4. Therefore, the Limphome improvement signal is still not triggered. In summary, this delay circuit can solve the problem of false triggering of Limphome at power-on.In addition, a fifth Zener diode D5 is introduced here as a delay circuit instead of a traditional RC device. This is because the release time of the Limphome enable signal is different for different SBCs, resulting in low versatility of the RC circuit. At the same time, the RC circuit is also difficult to match when the fourth controllable switch T4 and the third controllable switch T3 are switched.
[0081] Figure 3 A circuit diagram of another Limphome control circuit provided by the present invention;
[0082] Figure 4 A structural diagram of a limphome function provided by the present invention;
[0083] In some embodiments, the device further includes a fifth controllable switch T5, a tenth resistor R10, an eleventh resistor R11, a first signal passing module, and a second signal passing module;
[0084] A first end of a fifth controllable switch T5 is respectively connected to the second end of the first signal passing module and the control end of the first switch module 1. The fifth controllable switch T5 is connected to the second end of the eleventh resistor R11, and the common end of the connections is grounded. A first end of a tenth resistor R10 is connected to the second end of the second signal passing module. A second end of the tenth resistor R10 is respectively connected to the control end of the fifth controllable switch T5 and the first end of the eleventh resistor R11. A first end of the first signal passing module and a first end of the second signal passing module are both connected to the output end of the slave microcontroller.
[0085] The vehicle's slave microcontroller is used to send a first signal or a second signal based on the working status of the vehicle's master microcontroller. The first signal is passed through a module to send the first signal to the control end of the first switch module 1 to control the first switch module 1 to be turned on. The second signal is passed through a module to send the second signal to the fifth controllable switch T5 to control the fifth controllable switch T5 to be turned on and the first switch module 1 to be turned off.
[0086] There's also a third scenario: after the initial power supply voltage stabilizes, the SBC disables the Limphome enable signal. However, within the subsequent 200ms (a waiting period that varies slightly between SBCs), if it doesn't receive the correct feed signal from the MCU, it will re-trigger the Limphome enable signal. In a fourth scenario, some SBCs will trigger the Limphome enable signal even when the controller is in sleep mode and powering off the MCU. To summarize these four scenarios, as long as the MCU is not operating normally, the SBC defaults to safe mode and triggers the Limphome enable signal, even during sleep, power cycles, and other conditions. This is a fundamental requirement for current controller functional safety. Triggering the limp home circuitry in these situations is also undesirable, ultimately resolving the issue of unintended Limphome enable signal triggering. In scenario three, the main MCU must complete initialization and correctly feed the SBC within 200ms, a challenge for today's high-computing MCUs. Higher-end MCUs take longer to initialize. These devices often have multiple initialization self-checks and, for information security, also run encryption algorithms during initialization. Therefore, a 200ms wait time is clearly insufficient for the master MCU to complete initialization. If the system is re-run, the initialization time will only increase. This can be addressed by disabling the switch in the preprocessing circuit in the slave MCU during this period. In case four, the SBC powers off the master MCU during sleep mode but still asserts the Limphome trigger signal. This can also be addressed by disabling the switch in the preprocessing circuit in the slave MCU during this period.
[0087] The collector of the fifth controllable switch T5 is connected to the left side of the fourth resistor R4, the base resistor of the third controllable switch T3, to control the on and off state of the third controllable switch T3. The left side of the tenth resistor R10, the base resistor of the fifth controllable switch T5, is connected to a control signal from the slave microcontroller. When the slave microcontroller controls the base of the fifth controllable switch T5 to be pulled high, the collector of the fifth controllable switch T5 is connected to ground, thereby pulling the base of the third controllable switch T3 low, turning the third controllable switch T3 off.
[0088] In some embodiments, when the first signal is a constant voltage signal and the second signal is a PWM signal, the first signal passing module includes a twelfth resistor R12, a sixth diode D6, a third capacitor C3 and a seventh diode D7;
[0089] A first end of a twelfth resistor R12 is connected to a cathode of a sixth diode D6, and a common end of the connections serves as a first end of the first signal passing through the module. A second end of the twelfth resistor R12 is connected to an anode of the sixth diode D6, a first end of a third capacitor C3, and an anode of a seventh diode D7. A second end of the third capacitor C3 is grounded. A cathode of the seventh diode D7 serves as a second end of the first signal passing through the module.
[0090] The sixth diode D6 is used to conduct in the low-level stage when the PWM signal is output from the single-chip microcomputer to clear the energy stored in the third capacitor C3. The seventh diode D7 is used to prevent reverse flow. The third capacitor C3 is used to store energy to control the first switch module 1 to conduct;
[0091] The second signal passing module includes a fourth capacitor C4, an eighth diode D8, a ninth diode D9, a fifth capacitor C5 and a thirteenth resistor R13;
[0092] A first end of the fourth capacitor C4 serves as the first end of the first signal passing through the module. A second end of the fourth capacitor C4 is respectively connected to the cathode of the eighth diode D8 and the anode of the ninth diode D9. The anode of the eighth diode D8 is grounded. The cathode of the ninth diode D9 is connected to the first end of the fifth capacitor C5 and the first end of the thirteenth resistor R13. The second end of the fifth capacitor C5 is grounded. The second end of the thirteenth resistor R13 serves as the second end of the second signal passing through the module.
[0093] The eighth diode D8 is used to release the energy stored in the fourth capacitor C4 in the low level stage when the PWM signal is output from the single chip microcomputer. The ninth diode D9 is used for anti-reverse. The fifth capacitor C5 is used to store energy to control the fifth controllable switch T5 to be turned on.
[0094] Because of the presence of the sixth diode D6, the MCU outputs a PWM signal. When the PWM output is high, the sixth diode D6 is non-conductive, charging the MCU through the twelfth resistor R12 and the third capacitor C3. When the PWM output is low, the sixth diode D6 is conductive, and the charge on the third capacitor C3 is discharged through the sixth diode D6 by the PWM low output from the MCU IO port. The twelfth resistor R12 and the sixth diode D6 are connected in anti-parallel to the third capacitor C3 and the seventh diode D7. The left end of the twelfth resistor R12 is connected to the control signal from the MCU, and the cathode of the diode D7 is connected to the left side of the base resistor of the third controllable switch T3 and the fourth resistor R4, controlling the activation of the third controllable switch T3. The first signal passing module functions to: first, filter out abnormally short pulses (if any) that may occur during MCU initialization; second, prevent the MCU output PWM signal from passing, such as a 10kHz, 50% duty cycle signal. The twelfth resistor R12 is 10kΩ, and the third capacitor C3 is 470nF, resulting in an RC constant of 4.7ms. Therefore, when the microcontroller outputs 10kHz with a 50% duty cycle, the third capacitor C3 starts charging from 0V. During the first 50us on-time, the voltage across the third capacitor C3 increases by 5V×(1-e^-50us / 4.7ms)=0.0529V; during the second 50us on-time, the voltage across the third capacitor C3 increases by (5V-0.0529V)×(1-e^-50us / 4.7ms)=0.0523V, resulting in a voltage of 0.0529V+0.0523V=0.1052V. Similarly, the voltage across the third capacitor C3 continues to accumulate. During the 50us off-time, since the third capacitor C3 can only discharge through the fourth resistor R4 and the fifth resistor R5, a total of 57kΩ, the voltage drop is minimal and can be ignored. After multiple cycles, the voltage across the third capacitor C3 must be greater than 0.6V. At this time, during the following 50us off time, the voltage across the third capacitor C3 is greater than the turn-on voltage of the sixth diode D6, causing the sixth diode D6 to conduct. Since the MCU IO pin outputs a low level of 0V at this time, current flows through the sixth diode D6 to the MCU IO pin. Since there is no resistor in series, the discharge time constant is very small. The voltage across the third capacitor C3 can quickly release to 0.6V within this 50us (if it is lower than this value, the sixth diode D6 is cut off, the discharge path returns to 57k, and the voltage drop is very small and can be ignored). It can be seen that after this point, no matter how many times the third capacitor C3 undergoes the charge and discharge process, the maximum charge of the third capacitor C3 can reach 0.6V + (5V-0.6V) × (1-e^-50us / 4.7ms) = 0.6466V.The third capacitor C3 is followed by a seventh diode D7. Its purpose is not only to prevent reverse voltage flow into the MCU's IO pin; more importantly, it causes the voltage to drop to 0.0466V after passing through the seventh diode D7, which is unable to activate the third controllable switch T3. Similarly, abnormal, instantaneous short pulses cannot cause the third capacitor C3 to reach a high enough voltage to activate the third controllable switch T3. However, if the output from the MCU is a steady-state high level, the third capacitor C3 can be charged to 5V (at which point the sixth diode D6 is blocked by the reverse voltage). After passing through the seventh diode D7, the voltage is 4.4V, which can activate the third controllable switch T3. This module achieves the goal of preventing PWM pulses or instantaneous short pulses from passing through, but allowing a steady-state high level to pass through, thereby activating the third controllable switch T3.
[0095] The left end of the fourth capacitor C4 is connected to the control signal output by the slave microcontroller. The right end of the thirteenth resistor R13 is connected to the base resistor of the fifth controllable switch T5, which is connected to the left side of the tenth resistor R10, to control the activation of the fifth controllable switch T5. This module serves two purposes: first, it prevents the passage of uncontrolled, abnormally short pulses (if any) during the initialization of the slave microcontroller; second, it prevents the passage of steady-state high-level signals output by the slave microcontroller, allowing only PWM signals of a specific frequency to pass, thereby improving reliability. The second signal transmission module is controlled by the slave microcontroller and is intended to disable the Limphome function in certain situations (such as sleep mode). While ensuring the reliability of the slave microcontroller is crucial, slave microcontrollers may also undergo initialization and may experience downtime. Specifically, when a slave microcontroller experiences an anomaly, it may emit short pulses or uncontrolled high-level signals. If the master microcontroller experiences a downtime, it is desirable to enable the Limphome function normally. If the secondary signal doesn't pass through the module and the slave MCU's IO port directly controls the fifth controllable switch T5, if the slave MCU malfunctions, the abnormal voltage level at its IO port will turn on the fifth controllable switch T5, thereby turning off the third and second controllable switches T3 and T2. This will cause the master MCU to shut down, and the entire limphome circuit will fail because the second controllable switch T2 is disconnected. Even if the SBC sends a limphome enable signal to the second switch module 3, the third controllable switch T3 in the first switch module 1 will be forced low by the fifth controllable switch T5, and the second controllable switch T2 will not be able to turn on.
[0096] To avoid abnormal output signals from the microcontroller, the microcontroller must output a signal with a specific frequency and duty cycle. This ensures that the signal is output only when the microcontroller is operating normally; otherwise, it will either not output or remain permanently high and uncontrolled. Therefore, the function of the second signal pass module is to allow specific PWM signals to pass, while short pulses or permanently high levels are not allowed. Here, the PWM parameters output from the microcontroller are set to 10kHz and a 50% duty cycle (other frequencies can be set, such as 1k, 2k, or 5k, to match the selected fourth and fifth capacitors C4 and C5). Here, the fourth capacitor C4 is 10nF and the fifth capacitor C5 is 100nF, with a capacitance ratio of 1:10 (other ratios are possible, but 1:10 is easier to implement). When the PWM frequency is 10k, the capacitive reactance of the fourth capacitor C4 is 1 / (2×3.14×10000×10×10^-9) = 1.6k, and the capacitive reactance of the fifth capacitor C5 is 0.16k. It is easy to see that the result of connecting the fifth capacitor C5 in parallel with the 67k resistor formed by R13, R10, and R11 is still around 0.16k. This is the first reason why 10k is selected for the frequency and 10k and 47k for the resistor values. It is easy to see that 10k and a 50% duty cycle mean that each on and off time is 50us. The fifth capacitor C5 is charged from 0V. It can be seen that during the first 50us on time, the voltage increment of the fifth capacitor C5 is (5V-0.6V) / (1.6k+0.16k) ×0.16k=0.4V; during the second 50us on time, the voltage increment of the fifth capacitor C5 is (5V-0.6V-0.4V) / (1.6k+0.16k)×0.16k=0.364V. At this time, the voltage of the fifth capacitor C5 is 0.4V+0.364V=0.764V. The same logic applies to the following cases, and the voltage of the fifth capacitor C5 continues to accumulate and superimpose. During the 50µs off time, the fifth capacitor C5 can only discharge through the 67k resistors R13, R10, and R11, resulting in a negligible voltage drop. Simultaneously, the charge stored on the fourth capacitor C4 is completely discharged through diode D8 within the 50µs off time. This is why the voltage increment of the fifth capacitor C5 is not included in the calculation of the voltage increment of the fifth capacitor C5. Therefore, it is necessary to introduce diode D8 to discharge the charge of C4. When the voltage across the fifth capacitor C5 is added to 0.6V / (47k / 67k) = 0.855V, the voltage across R11 is 0.6V, and the fifth controllable switch T5 is turned on. This module achieves the purpose of passing a specific PWM frequency and turning on the fifth controllable switch T5.If the microcontroller outputs a steady-state high level, it's easy to see that the final voltage across capacitor C5 stabilizes at 0.4V. When the microcontroller outputs a steady-state high level, such as 5V, this 5V is evenly divided by C4, C5, and D9. Considering the 0.6V voltage drop across D9, 4.4V is evenly divided between C4 and C5. Since C4 has a capacitance of 10nF and C5 has a capacitance of 100nF, capacitor C5 divides the voltage by 10 / (100+10)×4.4V=0.4V. The voltage divider ratio of a capacitor is inversely proportional to its capacitance: the larger the capacitance, the smaller the voltage divided. Therefore, capacitor C5 cannot store energy in the steady-state state. After voltage division by R13, R10, and R11, the voltage across R11 is 0.4V×47kΩ / 67kΩ=0.28V, preventing the fifth controllable switch T5 from turning on. This is the second reason for selecting 10kΩ for the frequency and 10kΩ and 47kΩ for the resistors. Similarly, abnormal instantaneous short pulses cannot cause the fifth capacitor C5 to reach a high enough voltage to turn on the fifth controllable switch T5. This module achieves the purpose of turning on the fifth controllable switch T5 while preventing steady-state high levels or instantaneous short pulses from passing through.
[0097] It is worth noting that the traditional way of controlling the opening and closing of the third controllable switch T3 and the fifth controllable switch T5 is through the IO pin of the single chip microcomputer: one IO pin is connected to the base of the fifth controllable switch T5 of the transistor, controlling the fifth controllable switch T5 to turn on and thus control the third controllable switch T3 to turn off; at the same time, another IO pin is directly connected to the base of the third controllable switch T3, sending a high level to control the third controllable switch T3 to turn on. Figure 5Point A is directly connected to point C, and point B is directly connected to point D. Although this idea is simple to implement, it does not take into account the reliability of the control signal from the single-chip microcomputer. On the one hand, the premise of doing so is that the single-chip microcomputer will not crash and can always work normally (giving the third controllable switch T3 a base high level while not giving the fifth controllable switch T5 a base high level, and vice versa). Obviously, this assumption has unexpected situations. If the single-chip microcomputer crashes, it cannot be guaranteed what level state its IO pin is in. It may be both high or one high and one low. It cannot be guaranteed that both are low. On the other hand, it does not consider whether the IO pin will output a high level for a short time when the single-chip microcomputer is powered on and initialized (similar to the short-term erroneous output of the transistor caused by the junction capacitance mentioned above). Therefore, the present invention does not use the high and low levels of the IO pin to directly control the opening and closing of the transistor, but controls the opening and closing of the transistor by outputting a specific pulse frequency through the IO pin to improve reliability, so the first signal passing module and the second signal passing module are introduced. The third controllable switch T3 is closed by the PWM signal of the second signal passing module, and opened by the steady-state high level of the first signal passing module, without swapping the second and first signal passing modules. This is because if the slave microcontroller crashes, the first signal passing module may be forced to output a steady-state high level. In this case, opening the third controllable switch T3 does not cause problems. If the first signal passing module were swapped to force a steady-state high level, the third controllable switch T3 would be forced to close, which is undesirable. Closing the third controllable switch T3 by connecting the PWM signal of the second signal passing module to the fifth controllable switch T5 ensures the normal operation of the slave microcontroller (otherwise, it would not output the specific frequency). This ensures that the closing action is more important than the opening action, preventing the unintended forced closing of the transistor third controllable switch T3, which could cause the entire preprocessing circuit to fail. Furthermore, since they are connected to a single IO output port of the slave microcontroller, only a single IO pin is required to control the opening and closing of different transistor circuits. This not only saves IO resources, but also ensures that the IO has only one logic state at a time, avoiding timing issues with the control of two IO pins.
[0098] In some embodiments, a sixth capacitor C6 is further included, a first end of the sixth capacitor C6 is connected to the power supply, and a second end of the sixth capacitor C6 is connected to the first end of the tenth resistor R10 for clearing the electrical energy stored in the first switch module 1 and the second switch module 3.
[0099] In addition, since the pre-processing circuit is constructed by transistor switching devices, the transistor will be slightly turned on when the battery is first connected to the power (caused by the transistor parasitic capacitance). That is, the switching circuit may be mis-conducted uncontrollably at the moment of first power-on (the probability depends on the voltage rise slope and the voltage amplitude of the leakage). Therefore, a power-on clear circuit is added to avoid the phenomenon of false triggering caused by the parasitic parameters of the discrete devices in the pre-processing circuit.
[0100] When powered on, 5V charges the sixth capacitor C6. During this charging process, the third controllable switch T3 is turned on, which in turn pulls down the base of the third controllable switch T3 to turn off the self-locking state. This circuit is necessary in some cases, such as the phenomenon of false triggering and false self-locking caused by the junction capacitance of the discrete device mentioned above; for example, when the controller is plugged in or out of the battery, the first switch module 1 and the self-locking module 2 have formed a self-locking circuit according to the logic requirements before the controller is unplugged. If the power is suddenly unplugged and then powered on again, due to the presence of residual charge, the self-locking state of the first switch module 1 and the self-locking module 2 may still exist when powered on again, which is undesirable. It is expected that when powered on for the first time (not when waking up from sleep mode), the self-locking of the first switch module 1 and the self-locking module 2 must be turned on through normal logic to form the correct Limphome logic.
[0101] Figure 5 A flowchart of a limphome function provided by the present invention;
[0102] Figure 6 A flowchart of another limphome function provided by the present invention;
[0103] Figure 7 A schematic diagram of the structure of another limphome function provided by the present invention;
[0104] In summary, the Limphome control circuit flow provided by this application is as follows:
[0105] First, during initial power-up or wakeup from hibernation, while the Limphome enable signal is active (pulled low) and the second switch module 3 is on, it cannot reflect the status of the master and slave MCUs (they are in the process of power-up and initialization). Therefore, the first switch module 1 is disconnected to address the issue of the Limphome enable signal being pulled low during this period. The SBC then powers the master MCU normally, and the main core MCU begins initialization. Simultaneously, the Limphome enable signal is pulled high, turning off the second switch module 3 and turning on the delay module 4, thereby turning on the first switch module 1 and the self-locking module 2. Because the master MCU initialization takes a long time, which may exceed the SBC's waiting time (typically 200ms), the Limphome enable signal is pulled low again after this period, turning on the second switch module 3. At this point, the first switch module 1 and the self-locking module 2 are in the self-locking open state, which could erroneously cause the Limphome improvement signal to be output. To achieve this, a PWM signal of a specific frequency is sent from an initialized slave MCU (which has fewer power-on verification mechanisms and faster initialization time). This signal passes through a second signal path, then activates the fifth controllable switch T5, which is then controlled by the slave MCU. There are two main operating conditions: one is the sleep mode, in which the master MCU is asleep while the slave MCU is active. Therefore, the slave MCU can send a PWM signal to block the SBC's limphome signal. The other is the initial connection, at power-up. At this time, because the second controllable switch T2 is open, even if the limphome signal is pulled low, it has no effect. Next comes the initialization process. During this time, the SBC will first disable the limphome signal. However, since the master MCU takes too long to initialize, the SBC cannot wait and therefore re-enables the limphome signal. However, the slave MCU does not have as many verification steps and has a very short power-up initialization time, so the slave MCU can prioritize issuing the PWM signal. Even if the master MCU initializes slowly and the SBC cannot wait and issues the limphome enable signal, it is blocked by the slave MCU (by turning on the fifth controllable switch T5, which in turn turns off the third controllable switch T3 and the second controllable switch T2). This forces the first switch module 1 and the self-locking module 2 to close, preventing the erroneous output of the limphome improvement signal. After the master MCU completes initialization, the SBC is re-fed, and the limphome enable signal is turned off (pulled high). At this point, in conjunction with the preprocessing circuit, Limphome completes the power-up monitoring of the master and slave MCUs.
[0106] Subsequently, during normal operation, the slave MCU should stop sending PWM signals and instead send high-level signals. This will unlock the first switch module 1 and the self-locking module 2 (pulling the limphome enable signal high also has the same effect). If the MCU crashes during normal operation, two scenarios may occur. In scenario one, if the master MCU crashes, the slave MCU can detect the crash through SPI communication with the master MCU. The slave MCU then decides whether to execute the limp home circuit. If execution is allowed, normal limp home is determined by the master MCU's status; if the master MCU crashes, the limp home function is executed. However, some system strategies consider the slave MCU as a slave and assign its control of the limp home function to the slave MCU. The corresponding hardware switch signals are also sent to the slave MCU. The limp home function is only executed if the slave MCU fails. Therefore, in this case, the slave MCU determines whether to execute the circuit. The slave MCU then continues to send a high-level signal, driving the first switch module 1 and self-locking module 2 to open via the first signal path. Since the Limphome enable signal is 0V at this time (caused by a master MCU failure), the second switch module 3 is also on, and the Limphome modified signal output drives the subsequent limp home circuit. If execution is not permitted, the slave MCU switches to output a PWM signal to forcibly close the first switch module 1 and notify the master MCU of the fault via an external interface / network. In the second scenario, if the slave MCU fails at this time, the master MCU can detect the failure through SPI communication with the slave MCU. The master MCU then decides whether to execute the limp home circuit. If execution is allowed, the master MCU instructs the SBC via SPI to actively pull the Limphome enable signal low, turning on the second switch module 3. Together with the previously turned-on first switch module 1, this marks the start-up phase for first switch module 1. First switch module 1 and self-locking module 2 form a self-locking circuit. As long as the third controllable switch T3 has previously received a high-level signal, the second controllable switch T2 will turn on. This, in turn, causes the fourth controllable switch T4 to continuously send a high-level signal to the third controllable switch T3, thus achieving self-locking. So, who first sends the high-level signal to the third controllable switch T3? It is the SBClimphome enable signal itself. When the master MCU completes initialization and feeds the SBC, the SBClimphome signal transitions from low to high, turning on the third controllable switch T3 and turning on the first switch module 1. This process occurs whenever the master MCU initializes properly. This results in the Limphome improvement signal output, which drives the subsequent limp-home circuitry. If the master MCU does not allow execution, it notifies the external world of the slave MCU failure through an external interface / network. At this point, in conjunction with the pre-processing circuit, Limphome has completed the monitoring of the master and slave microcontroller failure links.
[0107] Finally, during sleep, the master MCU notifies the slave MCU via SPI to enter the sleep process. The slave MCU then stops sending high-level signals and instead sends PWM signals, forcing the first switch module 1 to shut down. This prevents the Limphome improvement signal output from the slave MCU, even if the SBC pulls the Limphome enable signal low and the second switch module 3 turns on, from malfunctioning the limp home circuit. The duration of the slave MCU's PWM transmission depends on the master MCU's operating mode transition and the wait for the SBC to transition the Limphome enable signal from high to low, typically within 10ms. Afterward, the slave MCU stops sending PWM signals to reduce sleep power consumption. At this point, in conjunction with the preprocessing circuit, Limphome monitors the sleep state of both the master and slave MCUs.
[0108] The present application also provides a vehicle, comprising the above-mentioned Limphome control circuit.
[0109] For an introduction to the vehicle provided in this application, please refer to the above embodiments and will not be repeated here.
[0110] It should also be noted that, in this specification, relational terms such as first and second, etc., are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprises," "comprising," or any other variants thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or apparatus. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of additional identical elements in the process, method, article, or apparatus comprising the element.
[0111] Professionals may further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the above description has generally described the components and steps of each example according to their functions. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians may use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of the present invention.
[0112] The above description of the disclosed embodiments is intended to enable one skilled in the art to implement or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention is not limited to the embodiments shown herein but is intended to conform to the widest scope consistent with the principles and novel features disclosed herein.
Claims
1. A Limphome control circuit, characterized in that: include: A first switch module, wherein a first end of the first switch module is connected to a power supply, a second end of the first switch module is connected to a first end of the self-locking module and a first end of the second switch module, and a control end is respectively connected to a second end of the delay module and a second end of the self-locking module, and is configured to be turned on based on a Limphome enable signal from the control end; The self-locking module is used to control the first switch module to be continuously turned on when the first switch module is turned on; The second switch module has a second end connected to the first input end of the logic circuit and a control end connected to the Limphome enable signal, and is configured to output the Limphome enable signal at the second end when the first switch module is turned on and the Limphome enable signal is valid; The delay module, wherein a first terminal of the delay module is connected to a Limphome enable signal sent by the SBC, and is used to control the first switch module to be non-conductive before the SBC is powered on, and send the Limphome enable signal to the control terminal of the first switch module after the SBC is powered on; The logic circuit has a second input terminal connected to an external switch signal, and an output terminal connected to a load of the vehicle, and is configured to drive the load corresponding to the external switch signal to operate when receiving the Limphome enable signal and the external switch signal, wherein the load includes at least one of a wiper, a headlight, and an ignition relay.
2. The Limphome control circuit according to claim 1, wherein: Also included is a power supply module, the power supply module including a first diode, a first controllable switch, a first resistor, a second diode and a first capacitor; An anode of the first diode is connected to the power supply, a second end of the first diode is connected to the first end of the first resistor and the first end of the first controllable switch, a control end of the first controllable switch is connected to the second end of the first resistor and the cathode of the second diode, an anode of the second diode is grounded, a second end of the first controllable switch is connected to the first end of the first capacitor, and a common end of the connections is connected to the first end of the first switch module, and a second end of the first capacitor is grounded; The first diode is used for anti-reverse operation, the second diode and the first resistor are used for clamping the voltage at the first end of the first controllable switch, the first controllable switch is used for being turned on when the power supply is supplied to supply power to the first switch module, and the first capacitor is used for filtering.
3. The Limphome control circuit according to claim 1, wherein: The first switch module includes a second controllable switch, a third controllable switch, a second resistor, a third resistor, a fourth resistor and a fifth resistor; The first end of the second controllable switch is connected to the first end of the second resistor, and the common end of the connections serves as the first end of the first switch module. The control end of the second controllable switch is respectively connected to the second end of the second resistor and the first end of the third resistor. The second end of the second controllable switch serves as the second end of the first switch module. The second end of the third resistor is connected to the first end of the third controllable switch. The first end of the fourth resistor serves as the control end of the first switch module. The second end of the fourth resistor is respectively connected to the control end of the third controllable switch and the first end of the fifth resistor. The second end of the fifth resistor is connected to the second end of the third controllable switch. The common end of the connections is grounded. The third controllable switch is configured to be turned on based on a signal from a control terminal, the second controllable switch is configured to be turned on when the fourth controllable switch is turned on, and the second resistor, the third resistor, the fourth resistor, and the fifth resistor are bias resistors.
4. The Limphome control circuit according to claim 1, wherein: The self-locking module includes a third diode and a sixth resistor; The anode of the third diode serves as the first end of the self-locking module, the cathode of the third diode is connected to the first end of the sixth resistor, and the second end of the sixth resistor serves as the second end of the self-locking module; The third diode is used for reverse flow prevention, and the sixth resistor is used for current limiting.
5. The Limphome control circuit according to claim 1, wherein: The second switch module includes a fourth controllable switch, a seventh resistor and an eighth resistor; A first end of the fourth controllable switch is connected to the first end of the seventh resistor, and a common end of the connections serves as the first end of the second switch module. A control end of the fourth controllable switch is connected to the second end of the seventh resistor and the first end of the eighth resistor, respectively. A second end of the fourth controllable switch is connected to the first end of the second capacitor, and a common end of the connections serves as the second end of the second switch. The second end of the eighth resistor serves as the control end of the second switch module. The seventh resistor and the eighth resistor are both bias resistors. The fourth controllable switch is configured to output a Limphome enable signal at the second end when the first switch module is turned on and the Limphome enable signal is valid.
6. The Limphome control circuit according to claim 1, wherein: The delay module includes a fourth diode, a ninth resistor and a fifth diode; The anode of the fourth diode serves as the first end of the delay module, the cathode of the fourth diode is connected to the first end of the ninth resistor, the second end of the ninth resistor is connected to the cathode of the fifth diode, and the anode of the fifth diode serves as the second end of the delay module; The fourth diode is used for reverse flow prevention, the ninth resistor is used for current limiting, and the fifth diode is used for voltage stabilization.
7. The Limphome control circuit according to any one of claims 1 to 6, characterized in that: Also includes a fifth controllable switch, a tenth resistor, an eleventh resistor, a first signal passing module and a second signal passing module; a first end of the fifth controllable switch connected to the second end of the first signal passing module and the control end of the first switch module, respectively; a first end of the fifth controllable switch connected to the second end of the eleventh resistor, and a common end of the connections being grounded; a first end of the tenth resistor connected to the second end of the second signal passing module, and a second end of the tenth resistor connected to the control end of the fifth controllable switch and the first end of the eleventh resistor, respectively; and a first end of the first signal passing module and a first end of the second signal passing module both connected to the output end of the slave microcontroller; The slave single-chip microcomputer of the vehicle is used to send a first signal or a second signal based on the working status of the master single-chip microcomputer of the vehicle. The first signal is passed through a module to send the first signal to the control end of the first switch module to control the first switch module to be turned on. The second signal is passed through a module to send the second signal to the fifth controllable switch to control the fifth controllable switch to be turned on and the first switch module to be turned off.
8. The Limphome control circuit according to claim 7, wherein: When the first signal is a constant voltage signal and the second signal is a PWM signal, the first signal passing module includes a twelfth resistor, a sixth diode, a third capacitor and a seventh diode; A first end of the twelfth resistor is connected to the cathode of the sixth diode, and a common end of the connections serves as a first end of the first signal passing through the module. A second end of the twelfth resistor is connected to the anode of the sixth diode, the first end of the third capacitor, and the anode of the seventh diode. A second end of the third capacitor is grounded. The cathode of the seventh diode serves as a second end of the first signal passing through the module. The sixth diode is used to be turned on in a low-level stage when the PWM signal is output from the single-chip microcomputer to clear the energy stored in the third capacitor. The seventh diode is used for anti-reverse operation. The third capacitor is used to store energy to control the first switch module to be turned on. The second signal passing module includes a fourth capacitor, an eighth diode, a ninth diode, a fifth capacitor and a thirteenth resistor; a first end of the fourth capacitor serving as a first end of the first signal passing module, a second end of the fourth capacitor being connected to a cathode of the eighth diode and an anode of the ninth diode, respectively, the anode of the eighth diode being grounded, a cathode of the ninth diode being connected to a first end of the fifth capacitor and a first end of the thirteenth resistor, a second end of the fifth capacitor being grounded, and a second end of the thirteenth resistor serving as a second end of the second signal passing module; The eighth diode is used to release the energy stored in the fourth capacitor in the low level stage when the PWM signal is output from the single chip microcomputer. The ninth diode is used for anti-reverse operation. The fifth capacitor is used to store energy to control the conduction of the fifth controllable switch.
9. The Limphome control circuit according to claim 7, wherein: It also includes a sixth capacitor, a first end of the sixth capacitor is connected to the power supply, and a second end of the sixth capacitor is connected to the first end of the tenth resistor, and is used to clear the electrical energy stored in the first switch module and the second switch module when the controller is powered on for the first time.
10. A vehicle, characterized in that: The method comprises the Limphome control circuit according to any one of claims 1 to 9.